31 # Test R5900 specific instructions:
35 # The c.lt.s instruction of R5900 has the same opcode as c.olt.s of MIPS I.
39 # The c.le.s instruction of R5900 has the same opcode as c.ole.s of MIPS I.
49 # The cvt.w.s instruction of the R5900 does the same as trunc.w.s in MIPS I.
50 # The cvt.w.s instruction of MIPS I doesn't exist in the R5900 CPU.
51 # For compatibilty the instruction trunc.w.s uses the opcode of cvt.w.s.
52 # cvt.w.s should not be used on R5900.
56 # Test ei/di, but the R5900 has a bug. ei/di should not be used.
60 # Like div but result is written to lo1 and hi1 registers (pipeline 1).
66 # 128 bit store instruction.
74 sq $31, 0xF1234567($4)
77 # 128 bit load instruction.
84 lq $31, 0xF1234567($4)
92 # Floating point multiply-ADD
94 madd.s $f31, $f0, $f31
96 # Like maddu, but pipeline 1
102 # Like madd, but pipeline 1
108 # Floating point multiply-ADD
112 # Floating point maximum
114 max.s $f31, $f0, $f31
116 # Floating point minimum
118 min.s $f31, $f0, $f31
120 # Preformance counter registers
170 # Shift amount register
189 # Floating multiply and subtract
190 msub.s $f0, $f31, $f0
191 msub.s $f31, $f0, $f31
193 # Floating multiply and subtract from accumulator
197 # Floating point multiply to accumulator
201 # Like mult but pipeline 1
207 # Like multu but pipeline 1
213 # Quadword funnel shift right variable
217 # Floating point reciprocal squre root
218 rsqrt.s $f0, $f31, $f0
219 rsqrt.s $f31, $f0, $f31
221 # Floating point subtract to accumulator
225 # Parallel instructions operating on 128 bit registers:
428 # Enable sc/ll instructions by changing ISA level:
435 # Enable scd/lld instructions by changing ISA level: