1 #objdump: -dr --prefix-addresses -mmips:3000
2 #name: MIPS1 branch relaxation with swapping
3 #as: -32 -mips1 -KPIC -relax-branch
7 .*: +file format .*mips.*
9 Disassembly of section \.text:
10 0+0000 <[^>]*> b 00000000 <foo>
11 0+0004 <[^>]*> move v0,a0
12 0+0008 <[^>]*> lw at,2\(gp\)
13 [ ]*8: R_MIPS_GOT16 \.text
15 0+0010 <[^>]*> addiu at,at,1000
16 [ ]*10: R_MIPS_LO16 \.text
18 0+0018 <[^>]*> move v0,a0
19 0+001c <[^>]*> lw v0,0\(a0\)
20 0+0020 <[^>]*> b 00000000 <foo>
22 0+0028 <[^>]*> lw v0,0\(a0\)
23 0+002c <[^>]*> lw at,2\(gp\)
24 [ ]*2c: R_MIPS_GOT16 \.text
26 0+0034 <[^>]*> addiu at,at,1000
27 [ ]*34: R_MIPS_LO16 \.text
30 0+0040 <[^>]*> b 00000000 <foo>
31 0+0044 <[^>]*> sw v0,0\(a0\)
32 0+0048 <[^>]*> lw at,2\(gp\)
33 [ ]*48: R_MIPS_GOT16 \.text
35 0+0050 <[^>]*> addiu at,at,1000
36 [ ]*50: R_MIPS_LO16 \.text
38 0+0058 <[^>]*> sw v0,0\(a0\)
39 0+005c <[^>]*> move v0,a0
40 0+0060 <[^>]*> beq v0,v1,00000000 <foo>
42 0+0068 <[^>]*> move v0,a0
43 0+006c <[^>]*> bne v0,v1,00000084 <foo\+0x84>
45 0+0074 <[^>]*> lw at,2\(gp\)
46 [ ]*74: R_MIPS_GOT16 \.text
48 0+007c <[^>]*> addiu at,at,1000
49 [ ]*7c: R_MIPS_LO16 \.text
52 0+0088 <[^>]*> beq a0,a1,00000000 <foo>
53 0+008c <[^>]*> move v0,a0
54 0+0090 <[^>]*> bne a0,a1,000000a8 <foo\+0xa8>
56 0+0098 <[^>]*> lw at,2\(gp\)
57 [ ]*98: R_MIPS_GOT16 \.text
59 0+00a0 <[^>]*> addiu at,at,1000
60 [ ]*a0: R_MIPS_LO16 \.text
62 0+00a8 <[^>]*> move v0,a0
63 0+00ac <[^>]*> addiu v0,a0,1
64 0+00b0 <[^>]*> beq v0,v1,00000000 <foo>
66 0+00b8 <[^>]*> addiu v0,a0,1
67 0+00bc <[^>]*> bne v0,v1,000000d4 <foo\+0xd4>
69 0+00c4 <[^>]*> lw at,2\(gp\)
70 [ ]*c4: R_MIPS_GOT16 \.text
72 0+00cc <[^>]*> addiu at,at,1000
73 [ ]*cc: R_MIPS_LO16 \.text
76 0+00d8 <[^>]*> beq a0,a1,00000000 <foo>
77 0+00dc <[^>]*> addiu v0,a0,1
78 0+00e0 <[^>]*> bne a0,a1,000000f8 <foo\+0xf8>
80 0+00e8 <[^>]*> lw at,2\(gp\)
81 [ ]*e8: R_MIPS_GOT16 \.text
83 0+00f0 <[^>]*> addiu at,at,1000
84 [ ]*f0: R_MIPS_LO16 \.text
86 0+00f8 <[^>]*> addiu v0,a0,1
87 0+00fc <[^>]*> lw v0,0\(a0\)
89 0+0104 <[^>]*> beq v0,v1,00000000 <foo>
91 0+010c <[^>]*> lw v0,0\(a0\)
93 0+0114 <[^>]*> bne v0,v1,0000012c <foo\+0x12c>
95 0+011c <[^>]*> lw at,2\(gp\)
96 [ ]*11c: R_MIPS_GOT16 \.text
98 0+0124 <[^>]*> addiu at,at,1000
99 [ ]*124: R_MIPS_LO16 \.text
102 0+0130 <[^>]*> lw v0,0\(a0\)
103 0+0134 <[^>]*> beq a0,a1,00000000 <foo>
105 0+013c <[^>]*> lw v0,0\(a0\)
106 0+0140 <[^>]*> bne a0,a1,00000158 <foo\+0x158>
108 0+0148 <[^>]*> lw at,2\(gp\)
109 [ ]*148: R_MIPS_GOT16 \.text
111 0+0150 <[^>]*> addiu at,at,1000
112 [ ]*150: R_MIPS_LO16 \.text
115 0+015c <[^>]*> beq v0,v1,00000000 <foo>
116 0+0160 <[^>]*> sw v0,0\(a0\)
117 0+0164 <[^>]*> bne v0,v1,0000017c <foo\+0x17c>
119 0+016c <[^>]*> lw at,2\(gp\)
120 [ ]*16c: R_MIPS_GOT16 \.text
122 0+0174 <[^>]*> addiu at,at,1000
123 [ ]*174: R_MIPS_LO16 \.text
125 0+017c <[^>]*> sw v0,0\(a0\)
126 0+0180 <[^>]*> beq a0,a1,00000000 <foo>
127 0+0184 <[^>]*> sw v0,0\(a0\)
128 0+0188 <[^>]*> bne a0,a1,000001a0 <foo\+0x1a0>
130 0+0190 <[^>]*> lw at,2\(gp\)
131 [ ]*190: R_MIPS_GOT16 \.text
133 0+0198 <[^>]*> addiu at,at,1000
134 [ ]*198: R_MIPS_LO16 \.text
136 0+01a0 <[^>]*> sw v0,0\(a0\)
137 0+01a4 <[^>]*> mfc1 v0,\$f0
138 0+01a8 <[^>]*> move a2,a3
139 0+01ac <[^>]*> beq v0,v1,00000000 <foo>
141 0+01b4 <[^>]*> mfc1 v0,\$f0
142 0+01b8 <[^>]*> move a2,a3
143 0+01bc <[^>]*> bne v0,v1,000001d4 <foo\+0x1d4>
145 0+01c4 <[^>]*> lw at,2\(gp\)
146 [ ]*1c4: R_MIPS_GOT16 \.text
148 0+01cc <[^>]*> addiu at,at,1000
149 [ ]*1cc: R_MIPS_LO16 \.text
152 0+01d8 <[^>]*> mfc1 v0,\$f0
153 0+01dc <[^>]*> beq a0,a1,00000000 <foo>
154 0+01e0 <[^>]*> move a2,a3
155 0+01e4 <[^>]*> mfc1 v0,\$f0
156 0+01e8 <[^>]*> bne a0,a1,00000200 <foo\+0x200>
158 0+01f0 <[^>]*> lw at,2\(gp\)
159 [ ]*1f0: R_MIPS_GOT16 \.text
161 0+01f8 <[^>]*> addiu at,at,1000
162 [ ]*1f8: R_MIPS_LO16 \.text
164 0+0200 <[^>]*> move a2,a3
165 0+0204 <[^>]*> move v0,a0
166 0+0208 <[^>]*> bc1t 00000000 <foo>
168 0+0210 <[^>]*> move v0,a0
169 0+0214 <[^>]*> bc1f 0000022c <foo\+0x22c>
171 0+021c <[^>]*> lw at,2\(gp\)
172 [ ]*21c: R_MIPS_GOT16 \.text
174 0+0224 <[^>]*> addiu at,at,1000
175 [ ]*224: R_MIPS_LO16 \.text
178 0+0230 <[^>]*> move v0,a0
179 0+0234 <[^>]*> b 00000000 <foo>
181 0+023c <[^>]*> move v0,a0
182 0+0240 <[^>]*> lw at,2\(gp\)
183 [ ]*240: R_MIPS_GOT16 \.text
185 0+0248 <[^>]*> addiu at,at,1000
186 [ ]*248: R_MIPS_LO16 \.text
189 0+0254 <[^>]*> move v0,a0
190 0+0258 <[^>]*> b 00000000 <foo>
192 0+0260 <[^>]*> move v0,a0
193 0+0264 <[^>]*> lw at,2\(gp\)
194 [ ]*264: R_MIPS_GOT16 \.text
196 0+026c <[^>]*> addiu at,at,1000
197 [ ]*26c: R_MIPS_LO16 \.text
200 0+0278 <[^>]*> move a2,a3
201 0+027c <[^>]*> move v0,a0
202 0+0280 <[^>]*> b 00000000 <foo>
204 0+0288 <[^>]*> move a2,a3
205 0+028c <[^>]*> move v0,a0
206 0+0290 <[^>]*> lw at,2\(gp\)
207 [ ]*290: R_MIPS_GOT16 \.text
209 0+0298 <[^>]*> addiu at,at,1000
210 [ ]*298: R_MIPS_LO16 \.text
213 0+02a4 <[^>]*> lw at,0\(gp\)
214 [ ]*2a4: R_MIPS_GOT16 \.text
216 0+02ac <[^>]*> addiu at,at,692
217 [ ]*2ac: R_MIPS_LO16 \.text
218 0+02b0 <[^>]*> sw v0,0\(at\)
219 0+02b4 <[^>]*> b 00000000 <foo>
221 0+02bc <[^>]*> lw at,0\(gp\)
222 [ ]*2bc: R_MIPS_GOT16 \.text
224 0+02c4 <[^>]*> addiu at,at,716
225 [ ]*2c4: R_MIPS_LO16 \.text
226 0+02c8 <[^>]*> sw v0,0\(at\)
227 0+02cc <[^>]*> lw at,2\(gp\)
228 [ ]*2cc: R_MIPS_GOT16 \.text
230 0+02d4 <[^>]*> addiu at,at,1000
231 [ ]*2d4: R_MIPS_LO16 \.text
234 0+02e0 <[^>]*> lwc1 \$f0,0\(a0\)
235 0+02e4 <[^>]*> b 00000000 <foo>
237 0+02ec <[^>]*> lwc1 \$f0,0\(a0\)
238 0+02f0 <[^>]*> lw at,2\(gp\)
239 [ ]*2f0: R_MIPS_GOT16 \.text
241 0+02f8 <[^>]*> addiu at,at,1000
242 [ ]*2f8: R_MIPS_LO16 \.text
245 0+0304 <[^>]*> cfc1 v0,\$31
246 0+0308 <[^>]*> b 00000000 <foo>
248 0+0310 <[^>]*> cfc1 v0,\$31
249 0+0314 <[^>]*> lw at,2\(gp\)
250 [ ]*314: R_MIPS_GOT16 \.text
252 0+031c <[^>]*> addiu at,at,1000
253 [ ]*31c: R_MIPS_LO16 \.text
256 0+0328 <[^>]*> ctc1 v0,\$31
257 0+032c <[^>]*> b 00000000 <foo>
259 0+0334 <[^>]*> ctc1 v0,\$31
260 0+0338 <[^>]*> lw at,2\(gp\)
261 [ ]*338: R_MIPS_GOT16 \.text
263 0+0340 <[^>]*> addiu at,at,1000
264 [ ]*340: R_MIPS_LO16 \.text
267 0+034c <[^>]*> mtc1 v0,\$f31
268 0+0350 <[^>]*> b 00000000 <foo>
270 0+0358 <[^>]*> mtc1 v0,\$f31
271 0+035c <[^>]*> lw at,2\(gp\)
272 [ ]*35c: R_MIPS_GOT16 \.text
274 0+0364 <[^>]*> addiu at,at,1000
275 [ ]*364: R_MIPS_LO16 \.text
278 0+0370 <[^>]*> mfhi v0
279 0+0374 <[^>]*> b 00000000 <foo>
281 0+037c <[^>]*> mfhi v0
282 0+0380 <[^>]*> lw at,2\(gp\)
283 [ ]*380: R_MIPS_GOT16 \.text
285 0+0388 <[^>]*> addiu at,at,1000
286 [ ]*388: R_MIPS_LO16 \.text
289 0+0394 <[^>]*> move v0,a0
293 0+03a4 <[^>]*> move v0,a0
294 0+03a8 <[^>]*> move v0,a0
295 0+03ac <[^>]*> jalr v0
297 0+03b4 <[^>]*> jalr a0
298 0+03b8 <[^>]*> move v0,a0
299 0+03bc <[^>]*> move v0,ra
300 0+03c0 <[^>]*> jalr v1
302 0+03c8 <[^>]*> move ra,a0
303 0+03cc <[^>]*> jalr a1
305 0+03d4 <[^>]*> jalr v0,v1
306 0+03d8 <[^>]*> move ra,a0
307 0+03dc <[^>]*> move v0,ra
308 0+03e0 <[^>]*> jalr v0,v1