gas/testsuite/gas/ppc/astest2.d

   1 #objdump: -Dr
   2 #name: PowerPC test 2
   3
   4 .*
   5
   6 Disassembly of section \.text:
   7
   8 0+0000000 <foo>:
   9    0:   (60 00 00 00|00 00 00 60)       nop
  10    4:   (60 00 00 00|00 00 00 60)       nop
  11    8:   (60 00 00 00|00 00 00 60)       nop
  12    c:   (48 00 00 04|04 00 00 48)       b       10 <foo\+0x10>
  13   10:   (48 00 00 08|08 00 00 48)       b       18 <foo\+0x18>
  14   14:   (48 00 00 00|00 00 00 48)       b       .*
  15                         14: R_PPC_REL24 x
  16   18:   (48 00 00 0.|0. 00 00 48)       b       .*
  17                         18: R_PPC_REL24 \.data\+0x4
  18   1c:   (48 00 00 00|00 00 00 48)       b       .*
  19                         1c: R_PPC_REL24 z
  20   20:   (48 00 00 ..|.. 00 00 48)       b       .*
  21                         20: R_PPC_REL24 z\+0x14
  22   24:   (48 00 00 04|04 00 00 48)       b       28 <foo\+0x28>
  23   28:   (48 00 00 00|00 00 00 48)       b       .*
  24                         28: R_PPC_REL24 a
  25   2c:   (48 00 00 50|50 00 00 48)       b       7c <apfour>
  26   30:   (48 00 00 0.|0. 00 00 48)       b       .*
  27                         30: R_PPC_REL24 a\+0x4
  28   34:   (48 00 00 4c|4c 00 00 48)       b       80 <apfour\+0x4>
  29   38:   (48 00 00 00|00 00 00 48)       b       .*
  30                         38: R_PPC_LOCAL24PC     a
  31   3c:   (48 00 00 40|40 00 00 48)       b       7c <apfour>
  32   40:   (00 00 00 40|40 00 00 00)       \.long 0x40
  33                         40: R_PPC_ADDR32        \.text\+0x40
  34   44:   (00 00 00 4c|4c 00 00 00)       \.long 0x4c
  35                         44: R_PPC_ADDR32        \.text\+0x4c
  36   48:   (00 00 00 00|00 00 00 00)       \.long 0x0
  37                         48: R_PPC_REL32 x
  38   4c:   (00 00 00 04|04 00 00 00)       \.long 0x4
  39                         4c: R_PPC_REL32 x\+0x4
  40   50:   (00 00 00 00|00 00 00 00)       \.long 0x0
  41                         50: R_PPC_REL32 z
  42   54:   (00 00 00 04|04 00 00 00)       \.long 0x4
  43                         54: R_PPC_REL32 \.data\+0x4
  44   58:   (00 00 00 00|00 00 00 00)       \.long 0x0
  45                         58: R_PPC_ADDR32        x
  46   5c:   (00 00 00 04|04 00 00 00)       \.long 0x4
  47                         5c: R_PPC_ADDR32        \.data\+0x4
  48   60:   (00 00 00 00|00 00 00 00)       \.long 0x0
  49                         60: R_PPC_ADDR32        z
  50   64:   (ff ff ff fc|fc ff ff ff)       fnmsub  f31,f31,f31,f31
  51                         64: R_PPC_ADDR32        x-0x4
  52   68:   (00 00 00 00|00 00 00 00)       \.long 0x0
  53                         68: R_PPC_ADDR32        \.data
  54   6c:   (ff ff ff fc|fc ff ff ff)       fnmsub  f31,f31,f31,f31
  55                         6c: R_PPC_ADDR32        z-0x4
  56   70:   (00 00 00 08|08 00 00 00)       \.long 0x8
  57   74:   (00 00 00 08|08 00 00 00)       \.long 0x8
  58
  59 0+0000078 <a>:
  60   78:   (00 00 00 00|00 00 00 00)       \.long 0x0
  61                         78: R_PPC_ADDR32        a
  62
  63 0+000007c <apfour>:
  64   7c:   (00 00 00 7c|7c 00 00 00)       \.long 0x7c
  65                         7c: R_PPC_ADDR32        \.text\+0x7c
  66   80:   (00 00 00 7c|7c 00 00 00)       \.long 0x7c
  67                         80: R_PPC_ADDR32        \.text\+0x7c
  68   84:   (ff ff ff fc|fc ff ff ff)       fnmsub  f31,f31,f31,f31
  69   88:   (00 00 00 7e|7e 00 00 00)       \.long 0x7e
  70                         88: R_PPC_ADDR32        \.text\+0x7e
  71   8c:   (00 00 00 00|00 00 00 00)       \.long 0x0
  72   90:   (60 00 00 00|00 00 00 60)       nop
  73   94:   (40 a5 ff fc|fc ff a5 40)       ble-    cr1,90 <apfour\+0x14>
  74   98:   (41 a9 ff f8|f8 ff a9 41)       bgt-    cr2,90 <apfour\+0x14>
  75   9c:   (40 8d ff f4|f4 ff 8d 40)       ble\+    cr3,90 <apfour\+0x14>
  76   a0:   (41 91 ff f0|f0 ff 91 41)       bgt\+    cr4,90 <apfour\+0x14>
  77   a4:   (40 95 00 10|10 00 95 40)       ble-    cr5,b4 <nop>
  78   a8:   (41 99 00 0c|0c 00 99 41)       bgt-    cr6,b4 <nop>
  79   ac:   (40 bd 00 08|08 00 bd 40)       ble\+    cr7,b4 <nop>
  80   b0:   (41 a1 00 04|04 00 a1 41)       bgt\+    b4 <nop>
  81 Disassembly of section \.data:
  82
  83 0+0000000 <x>:
  84    0:   00 00 00 00     \.long 0x0
  85
  86 0+0000004 <y>:
  87    4:   00 00 00 00     \.long 0x0