x86-64: fix handling of PUSH/POP of segment register
[deliverable/binutils-gdb.git] / gas / testsuite / gas / ppc / astest2.d
1 #objdump: -Dr -Mppc
2 #as: --generate-missing-build-notes=no
3 #name: PowerPC test 2
4
5 .*
6
7 Disassembly of section \.text:
8
9 0+0000000 <foo>:
10 0: (60 00 00 00|00 00 00 60) nop
11 4: (60 00 00 00|00 00 00 60) nop
12 8: (60 00 00 00|00 00 00 60) nop
13 c: (48 00 00 04|04 00 00 48) b 10 <foo\+0x10>
14 10: (48 00 00 08|08 00 00 48) b 18 <foo\+0x18>
15 14: (48 00 00 00|00 00 00 48) b .*
16 14: R_PPC_REL24 x
17 18: (48 00 00 0.|0. 00 00 48) b .*
18 18: R_PPC_REL24 \.data\+0x4
19 1c: (48 00 00 00|00 00 00 48) b .*
20 1c: R_PPC_REL24 z
21 20: (48 00 00 ..|.. 00 00 48) b .*
22 20: R_PPC_REL24 z\+0x14
23 24: (48 00 00 04|04 00 00 48) b 28 <foo\+0x28>
24 28: (48 00 00 00|00 00 00 48) b .*
25 28: R_PPC_REL24 a
26 2c: (48 00 00 50|50 00 00 48) b 7c <apfour>
27 30: (48 00 00 0.|0. 00 00 48) b .*
28 30: R_PPC_REL24 a\+0x4
29 34: (48 00 00 4c|4c 00 00 48) b 80 <apfour\+0x4>
30 38: (48 00 00 00|00 00 00 48) b .*
31 38: R_PPC_LOCAL24PC a
32 3c: (48 00 00 40|40 00 00 48) b 7c <apfour>
33 \.\.\.
34 40: R_PPC_ADDR32 \.text\+0x40
35 44: R_PPC_ADDR32 \.text\+0x4c
36 48: R_PPC_REL32 x
37 4c: R_PPC_REL32 x\+0x4
38 50: R_PPC_REL32 z
39 54: R_PPC_REL32 \.data\+0x4
40 58: R_PPC_ADDR32 x
41 5c: R_PPC_ADDR32 \.data\+0x4
42 60: R_PPC_ADDR32 z
43 64: R_PPC_ADDR32 x-0x4
44 68: R_PPC_ADDR32 \.data
45 6c: R_PPC_ADDR32 z-0x4
46 70: (00 00 00 08|08 00 00 00) \.long 0x8
47 74: (00 00 00 08|08 00 00 00) \.long 0x8
48
49 0+0000078 <a>:
50 78: (00 00 00 00|00 00 00 00) \.long 0x0
51 78: R_PPC_ADDR32 a
52
53 0+000007c <apfour>:
54 \.\.\.
55 7c: R_PPC_ADDR32 \.text\+0x7c
56 80: R_PPC_ADDR32 \.text\+0x7c
57 84: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
58 \.\.\.
59 88: R_PPC_ADDR32 \.text\+0x7e
60 90: (60 00 00 00|00 00 00 60) nop
61 94: (40 a5 ff fc|fc ff a5 40) ble- cr1,90 <apfour\+0x14>
62 98: (41 a9 ff f8|f8 ff a9 41) bgt- cr2,90 <apfour\+0x14>
63 9c: (40 8d ff f4|f4 ff 8d 40) ble\+ cr3,90 <apfour\+0x14>
64 a0: (41 91 ff f0|f0 ff 91 41) bgt\+ cr4,90 <apfour\+0x14>
65 a4: (40 95 00 10|10 00 95 40) ble- cr5,b4 <nop>
66 a8: (41 99 00 0c|0c 00 99 41) bgt- cr6,b4 <nop>
67 ac: (40 bd 00 08|08 00 bd 40) ble\+ cr7,b4 <nop>
68 b0: (41 a1 00 04|04 00 a1 41) bgt\+ b4 <nop>
69 Disassembly of section \.data:
70
71 0+0000000 <x>:
72 0: 00 00 00 00 \.long 0x0
73
74 0+0000004 <y>:
75 4: 00 00 00 00 \.long 0x0
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