[AArch64] Warn on load pair to same register
[deliverable/binutils-gdb.git] / gas / testsuite / gas / ppc / astest2_64.d
1 #objdump: -Dr
2 #name: PowerPC 64-bit test 2
3
4 .*
5
6 Disassembly of section \.text:
7
8 0000000000000000 <foo>:
9 0: (60 00 00 00|00 00 00 60) nop
10 4: (60 00 00 00|00 00 00 60) nop
11 8: (60 00 00 00|00 00 00 60) nop
12 c: (48 00 00 04|04 00 00 48) b 10 <foo\+0x10>
13 10: (48 00 00 08|08 00 00 48) b 18 <foo\+0x18>
14 14: (48 00 00 00|00 00 00 48) b .*
15 14: R_PPC64_REL24 x
16 18: (48 00 00 0.|0. 00 00 48) b .*
17 18: R_PPC64_REL24 \.data\+0x4
18 1c: (48 00 00 00|00 00 00 48) b .*
19 1c: R_PPC64_REL24 z
20 20: (48 00 00 ..|.. 00 00 48) b .*
21 20: R_PPC64_REL24 z\+0x14
22 24: (48 00 00 04|04 00 00 48) b 28 <foo\+0x28>
23 28: (48 00 00 00|00 00 00 48) b .*
24 28: R_PPC64_REL24 a
25 2c: (48 00 00 48|48 00 00 48) b 74 <apfour>
26 30: (48 00 00 0.|0. 00 00 48) b .*
27 30: R_PPC64_REL24 a\+0x4
28 34: (48 00 00 44|44 00 00 48) b 78 <apfour\+0x4>
29 \.\.\.
30 38: R_PPC64_ADDR32 \.text\+0x38
31 3c: R_PPC64_ADDR32 \.text\+0x44
32 40: R_PPC64_REL32 x
33 44: R_PPC64_REL32 x\+0x4
34 48: R_PPC64_REL32 z
35 4c: R_PPC64_REL32 \.data\+0x4
36 50: R_PPC64_ADDR32 x
37 54: R_PPC64_ADDR32 \.data\+0x4
38 58: R_PPC64_ADDR32 z
39 5c: R_PPC64_ADDR32 x-0x4
40 60: R_PPC64_ADDR32 \.data
41 64: R_PPC64_ADDR32 z-0x4
42 68: (00 00 00 08|08 00 00 00) \.long 0x8
43 6c: (00 00 00 08|08 00 00 00) \.long 0x8
44
45 0000000000000070 <a>:
46 70: (00 00 00 00|00 00 00 00) \.long 0x0
47 70: R_PPC64_ADDR32 a
48
49 0000000000000074 <apfour>:
50 \.\.\.
51 74: R_PPC64_ADDR32 \.text\+0x74
52 78: R_PPC64_ADDR32 \.text\+0x74
53 7c: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
54 \.\.\.
55 80: R_PPC64_ADDR32 \.text\+0x76
56 Disassembly of section \.data:
57
58 0000000000000000 <x>:
59 0: 00 00 00 00 \.long 0x0
60
61 0000000000000004 <y>:
62 4: 00 00 00 00 \.long 0x0
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