2 #name: PowerPC 64-bit test 1
4 .*: +file format elf64-powerpc
6 Disassembly of section \.text:
8 0000000000000000 <foo>:
14 c: 48 00 00 04 b 10 <apfour>
16 0000000000000010 <apfour>:
17 10: 48 00 00 08 b 18 <apfour\+0x8>
18 14: 48 00 00 00 b 14 <apfour\+0x4>
20 18: 48 00 00 04 b 1c <apfour\+0xc>
21 18: R_PPC64_REL24 \.data\+0x4
22 1c: 48 00 00 00 b 1c <apfour\+0xc>
24 20: 48 00 00 14 b 34 <apfour\+0x24>
25 20: R_PPC64_REL24 z\+0x14
26 24: 48 00 00 04 b 28 <apfour\+0x18>
27 28: 48 00 00 00 b 28 <apfour\+0x18>
29 2c: 4b ff ff e4 b 10 <apfour>
30 30: 48 00 00 04 b 34 <apfour\+0x24>
31 30: R_PPC64_REL24 a\+0x4
32 34: 4b ff ff e0 b 14 <apfour\+0x4>
33 38: 00 00 00 38 \.long 0x38
34 38: R_PPC64_ADDR32 \.text\+0x38
35 3c: 00 00 00 44 \.long 0x44
36 3c: R_PPC64_ADDR32 \.text\+0x44
37 40: 00 00 00 00 \.long 0x0
39 44: 00 00 00 04 \.long 0x4
40 44: R_PPC64_REL32 x\+0x4
47 5c: ff ff ff fc fnmsub f31,f31,f31,f31
48 5c: R_PPC64_ADDR32 x\+0xfffffffffffffffc
49 60: ff ff ff fc fnmsub f31,f31,f31,f31
50 60: R_PPC64_ADDR32 y\+0xfffffffffffffffc
51 64: ff ff ff fc fnmsub f31,f31,f31,f31
52 64: R_PPC64_ADDR32 z\+0xfffffffffffffffc
53 68: ff ff ff a4 \.long 0xffffffa4
54 6c: ff ff ff a4 \.long 0xffffffa4
58 78: R_PPC64_ADDR32 apfour
59 7c: ff ff ff fc fnmsub f31,f31,f31,f31
60 80: 00 00 00 02 \.long 0x2
61 80: R_PPC64_ADDR32 apfour\+0x2
62 84: 00 00 00 00 \.long 0x0
63 Disassembly of section \.data:
66 0: 00 00 00 00 \.long 0x0
69 4: 00 00 00 00 \.long 0x0