include/opcode/
[deliverable/binutils-gdb.git] / gas / testsuite / gas / ppc / astest64.d
1 #objdump: -Dr
2 #name: PowerPC 64-bit test 1
3
4 .*: +file format elf64-powerpc
5
6 Disassembly of section \.text:
7
8 0000000000000000 <foo>:
9 0: 60 00 00 00 nop
10 4: 60 00 00 00 nop
11 8: 60 00 00 00 nop
12
13 000000000000000c <a>:
14 c: 48 00 00 04 b 10 <apfour>
15
16 0000000000000010 <apfour>:
17 10: 48 00 00 08 b 18 <apfour\+0x8>
18 14: 48 00 00 00 b 14 <apfour\+0x4>
19 14: R_PPC64_REL24 x
20 18: 48 00 00 04 b 1c <apfour\+0xc>
21 18: R_PPC64_REL24 \.data\+0x4
22 1c: 48 00 00 00 b 1c <apfour\+0xc>
23 1c: R_PPC64_REL24 z
24 20: 48 00 00 14 b 34 <apfour\+0x24>
25 20: R_PPC64_REL24 z\+0x14
26 24: 48 00 00 04 b 28 <apfour\+0x18>
27 28: 48 00 00 00 b 28 <apfour\+0x18>
28 28: R_PPC64_REL24 a
29 2c: 4b ff ff e4 b 10 <apfour>
30 30: 48 00 00 04 b 34 <apfour\+0x24>
31 30: R_PPC64_REL24 a\+0x4
32 34: 4b ff ff e0 b 14 <apfour\+0x4>
33 38: 00 00 00 38 \.long 0x38
34 38: R_PPC64_ADDR32 \.text\+0x38
35 3c: 00 00 00 44 \.long 0x44
36 3c: R_PPC64_ADDR32 \.text\+0x44
37 40: 00 00 00 00 \.long 0x0
38 40: R_PPC64_REL32 x
39 44: 00 00 00 04 \.long 0x4
40 44: R_PPC64_REL32 x\+0x4
41 48: 00 00 00 00 \.long 0x0
42 48: R_PPC64_REL32 z
43 4c: 00 00 00 04 \.long 0x4
44 4c: R_PPC64_REL32 \.data\+0x4
45 50: 00 00 00 00 \.long 0x0
46 50: R_PPC64_ADDR32 x
47 54: 00 00 00 04 \.long 0x4
48 54: R_PPC64_ADDR32 \.data\+0x4
49 58: 00 00 00 00 \.long 0x0
50 58: R_PPC64_ADDR32 z
51 5c: ff ff ff fc fnmsub f31,f31,f31,f31
52 5c: R_PPC64_ADDR32 x\+0xfffffffffffffffc
53 60: 00 00 00 00 \.long 0x0
54 60: R_PPC64_ADDR32 \.data
55 64: ff ff ff fc fnmsub f31,f31,f31,f31
56 64: R_PPC64_ADDR32 z\+0xfffffffffffffffc
57 68: ff ff ff a4 \.long 0xffffffa4
58 6c: ff ff ff a4 \.long 0xffffffa4
59 70: 00 00 00 00 \.long 0x0
60 70: R_PPC64_ADDR32 a
61 74: 00 00 00 10 \.long 0x10
62 74: R_PPC64_ADDR32 \.text\+0x10
63 78: 00 00 00 10 \.long 0x10
64 78: R_PPC64_ADDR32 \.text\+0x10
65 7c: ff ff ff fc fnmsub f31,f31,f31,f31
66 80: 00 00 00 12 \.long 0x12
67 80: R_PPC64_ADDR32 \.text\+0x12
68 84: 00 00 00 00 \.long 0x0
69 Disassembly of section \.data:
70
71 0000000000000000 <x>:
72 0: 00 00 00 00 \.long 0x0
73
74 0000000000000004 <y>:
75 4: 00 00 00 00 \.long 0x0
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