x86-64: fix handling of PUSH/POP of segment register
[deliverable/binutils-gdb.git] / gas / testsuite / gas / ppc / lsp-checks.s
1 # Test PA LSP operands checks
2 .section ".text"
3
4 .equ rA,1
5 .equ rB,2
6 .equ rD,0 ;# ok
7 .equ rD_odd, 1 ;# GPR odd is illegal
8 .equ rS,0 ;# ok
9 .equ rS_odd, 1 ;# GPR odd is illegal
10 .equ UIMM_GT15, 16 ;# UIMM values >15 are illegal
11 .equ UIMM_2, 2 ;# ok
12 .equ UIMM_2_ILL, 3 ;# 3 is not a multiple of 2
13 .equ UIMM_2_ZERO, 0 ;# UIMM = 00000 is illegal if U=1
14 .equ UIMM_4, 4 ;# ok
15 .equ UIMM_4_ILL, 3 ;# 3 is not a multiple of 4
16 .equ UIMM_4_ZERO, 0 ;# UIMM = 00000 is illegal if U=1
17 .equ UIMM_8, 8 ;# ok
18 .equ UIMM_8_ILL, 7 ;# 7 is not a multiple of 8
19 .equ UIMM_8_ZERO, 0 ;# UIMM = 00000 is illegal if U=1
20 .equ offset, 0 ;# invalid offset
21
22 zxtrw rD, rA, rB, offset
23 zvsrhiu rD, rA, UIMM_GT15
24 zvsrhis rD, rA, UIMM_GT15
25 zvslhi rD, rA, UIMM_GT15
26 zvrlhi rD, rA, UIMM_GT15
27 zvslhius rD, rA, UIMM_GT15
28 zvslhiss rD, rA, UIMM_GT15
29 zldd rD_odd, UIMM_8(rA)
30 zldd rD, UIMM_8_ILL(rA)
31 zldw rD_odd, UIMM_8(rA)
32 zldw rD, UIMM_8_ILL(rA)
33 zldh rD_odd, UIMM_8(rA)
34 zldh rD, UIMM_8_ILL(rA)
35 zlwgsfd rD_odd, UIMM_4(rA)
36 zlwgsfd rD, UIMM_4_ILL(rA)
37 zlwwosd rD_odd, UIMM_4(rA)
38 zlwwosd rD, UIMM_4_ILL(rA)
39 zlwhsplatwd rD_odd, UIMM_4(rA)
40 zlwhsplatwd rD, UIMM_4_ILL(rA)
41 zlwhsplatd rD_odd, UIMM_4(rA)
42 zlwhsplatd rD, UIMM_4_ILL(rA)
43 zlwhgwsfd rD_odd, UIMM_4(rA)
44 zlwhgwsfd rD, UIMM_4_ILL(rA)
45 zlwhed rD_odd, UIMM_4(rA)
46 zlwhed rD, UIMM_4_ILL(rA)
47 zlwhosd rD_odd, UIMM_4(rA)
48 zlwhosd rD, UIMM_4_ILL(rA)
49 zlwhoud rD_odd, UIMM_4(rA)
50 zlwh rD, UIMM_4_ILL(rA)
51 zlww rD, UIMM_4_ILL(rA)
52 zlhgwsf rD, UIMM_2_ILL(rA)
53 zlhhsplat rD, UIMM_2_ILL(rA)
54 zstdd rS_odd, UIMM_8(rA)
55 zstdd rS, UIMM_8_ILL(rA)
56 zstdw rS_odd, UIMM_8(rA)
57 zstdw rS, UIMM_8_ILL(rA)
58 zstdh rS_odd, UIMM_8(rA)
59 zstdh rS, UIMM_8_ILL(rA)
60 zstwhed rS_odd, UIMM_4(rA)
61 zstwhed rS, UIMM_4_ILL(rA)
62 zstwhod rS_odd, UIMM_4(rA)
63 zstwhod rS, UIMM_4_ILL(rA)
64 zlhhe rD, UIMM_2_ILL(rA)
65 zlhhos rD, UIMM_2_ILL(rA)
66 zlhhou rD, UIMM_2_ILL(rA)
67 zsthe rS, UIMM_2_ILL(rA)
68 zstho rS, UIMM_2_ILL(rA)
69 zstwh rS, UIMM_4_ILL(rA)
70 zstww rS, UIMM_4_ILL(rA)
71 zlddu rD_odd, UIMM_8(rA)
72 zlddu rD, UIMM_8_ZERO(rA)
73 zldwu rD_odd, UIMM_8(rA)
74 zldwu rD, UIMM_8_ZERO(rA)
75 zldhu rD_odd, UIMM_8(rA)
76 zldhu rD, UIMM_8_ZERO(rA)
77 zlwgsfdu rD_odd, UIMM_4(rA)
78 zlwgsfdu rD, UIMM_4_ZERO(rA)
79 zlwwosdu rD_odd, UIMM_4(rA)
80 zlwwosdu rD, UIMM_4_ZERO(rA)
81 zlwhsplatwdu rD_odd, UIMM_4(rA)
82 zlwhsplatwdu rD, UIMM_4_ZERO(rA)
83 zlwhsplatdu rD_odd, UIMM_4(rA)
84 zlwhsplatdu rD, UIMM_4_ZERO(rA)
85 zlwhgwsfdu rD_odd, UIMM_4(rA)
86 zlwhgwsfdu rD, UIMM_4_ZERO(rA)
87 zlwhedu rD_odd, UIMM_4(rA)
88 zlwhedu rD, UIMM_4_ZERO(rA)
89 zlwhosdu rD_odd, UIMM_4(rA)
90 zlwhosdu rD, UIMM_4_ZERO(rA)
91 zlwhoudu rD_odd, UIMM_4(rA)
92 zlwhoudu rD, UIMM_4_ZERO(rA)
93 zlwhu rD, UIMM_4_ZERO(rA)
94 zlwwu rD, UIMM_4_ZERO(rA)
95 zlhgwsfu rD, UIMM_2_ZERO(rA)
96 zlhhsplatu rD, UIMM_2_ZERO(rA)
97 zstddu rS, UIMM_8_ZERO(rA)
98 zstdwu rS_odd, UIMM_8(rA)
99 zstdwu rS, UIMM_8_ZERO(rA)
100 zstdhu rS_odd, UIMM_8(rA)
101 zstdhu rS, UIMM_8_ZERO(rA)
102 zstwhedu rS_odd, UIMM_4(rA)
103 zstwhedu rS, UIMM_4_ZERO(rA)
104 zstwhodu rS_odd, UIMM_4(rA)
105 zstwhodu rS, UIMM_4_ZERO(rA)
106 zlhheu rD, UIMM_2_ZERO(rA)
107 zlhhosu rD, UIMM_2_ZERO(rA)
108 zlhhouu rD, UIMM_2_ZERO(rA)
109 zstheu rS, UIMM_2_ZERO(rA)
110 zsthou rS, UIMM_2_ZERO(rA)
111 zstwhu rS, UIMM_4_ZERO(rA)
112 zstwwu rS, UIMM_4_ZERO(rA)
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