gas/testsuite/gas/sparc/splet.d

   1 #as: -Asparclet
   2 #objdump: -dr
   3 #name: sparclet extensions
   4
   5 .*: +file format .*
   6
   7 Disassembly of section .text:
   8 0+0000 <start> rd  %y, %l0
   9 0+0004 <start\+4> rd  %asr1, %l0
  10 0+0008 <start\+8> rd  %asr15, %l0
  11 0+000c <start\+c> rd  %asr17, %l0
  12 0+0010 <start\+10> rd  %asr18, %l0
  13 0+0014 <start\+14> rd  %asr19, %l0
  14 0+0018 <start\+18> rd  %asr20, %l0
  15 0+001c <start\+1c> rd  %asr21, %l0
  16 0+0020 <start\+20> rd  %asr22, %l0
  17 0+0024 <start\+24> mov  %l0, %y
  18 0+0028 <start\+28> mov  %l0, %asr1
  19 0+002c <start\+2c> mov  %l0, %asr15
  20 0+0030 <start\+30> mov  %l0, %asr17
  21 0+0034 <start\+34> mov  %l0, %asr18
  22 0+0038 <start\+38> mov  %l0, %asr19
  23 0+003c <start\+3c> mov  %l0, %asr20
  24 0+0040 <start\+40> mov  %l0, %asr21
  25 0+0044 <start\+44> mov  %l0, %asr22
  26 0+0048 <test_umul> umul  %g1, %g2, %g3
  27 0+004c <test_umul\+4> umul  %g1, %g2, %g3
  28 0+0050 <test_smul> smul  %g1, %g2, %g3
  29 0+0054 <test_smul\+4> smul  %g1, %g2, %g3
  30 0+0058 <test_stbar> stbar
  31 0+005c <test_stbar\+4> stbar
  32 0+0060 <test_stbar\+8> unimp  0x1
  33 0+0064 <test_stbar\+c> flush  %l1
  34 0+0068 <test_scan> scan  %l1, -1, %l3
  35 0+006c <test_scan\+4> scan  %l1, 0, %l3
  36 0+0070 <test_scan\+8> scan  %l1, %l1, %l3
  37 0+0074 <test_shuffle> shuffle  %l0, 1, %l1
  38 0+0078 <test_shuffle\+4> shuffle  %l0, 2, %l1
  39 0+007c <test_shuffle\+8> shuffle  %l0, 4, %l1
  40 0+0080 <test_shuffle\+c> shuffle  %l0, 8, %l1
  41 0+0084 <test_shuffle\+10> shuffle  %l0, 0x10, %l1
  42 0+0088 <test_shuffle\+14> shuffle  %l0, 0x18, %l1
  43 0+008c <test_umac> umac  %l1, %l2, %l0
  44 0+0090 <test_umac\+4> umac  %l1, 2, %l0
  45 0+0094 <test_umac\+8> umac  %l1, 2, %l0
  46 0+0098 <test_umacd> umacd  %l2, %l4, %l0
  47 0+009c <test_umacd\+4> umacd  %l2, 3, %l0
  48 0+00a0 <test_umacd\+8> umacd  %l2, 3, %l0
  49 0+00a4 <test_smac> smac  %l1, %l2, %l0
  50 0+00a8 <test_smac\+4> smac  %l1, -42, %l0
  51 0+00ac <test_smac\+8> smac  %l1, -42, %l0
  52 0+00b0 <test_smacd> smacd  %l2, %l4, %l0
  53 0+00b4 <test_smacd\+4> smacd  %l2, 0x7b, %l0
  54 0+00b8 <test_smacd\+8> smacd  %l2, 0x7b, %l0
  55 0+00bc <test_umuld> umuld  %o2, %o4, %o0
  56 0+00c0 <test_umuld\+4> umuld  %o2, 0x234, %o0
  57 0+00c4 <test_umuld\+8> umuld  %o2, 0x567, %o0
  58 0+00c8 <test_smuld> smuld  %i2, %i4, %i0
  59 0+00cc <test_smuld\+4> smuld  %i2, -4096, %i0
  60 0+00d0 <test_smuld\+8> smuld  %i4, 0xfff, %i0
  61 0+00d4 <test_coprocessor> cpush  %l0, %l1
  62 0+00d8 <test_coprocessor\+4> cpush  %l0, 1
  63 0+00dc <test_coprocessor\+8> cpusha  %l0, %l1
  64 0+00e0 <test_coprocessor\+c> cpush  %l0, 1
  65 0+00e4 <test_coprocessor\+10> cpull  %l0
  66 0+00e8 <test_coprocessor\+14> crdcxt  %ccsr, %l0
  67 0+00ec <test_coprocessor\+18> crdcxt  %ccfr, %l0
  68 0+00f0 <test_coprocessor\+1c> crdcxt  %ccpr, %l0
  69 0+00f4 <test_coprocessor\+20> crdcxt  %cccrcr, %l0
  70 0+00f8 <test_coprocessor\+24> cwrcxt  %l0, %ccsr
  71 0+00fc <test_coprocessor\+28> cwrcxt  %l0, %ccfr
  72 0+0100 <test_coprocessor\+2c> cwrcxt  %l0, %ccpr
  73 0+0104 <test_coprocessor\+30> cwrcxt  %l0, %cccrcr
  74 0+0108 <test_coprocessor\+34> cbn  0000010c <test_coprocessor\+38>
  75 .*RELOC: 0+0108 WDISP22 stop\+0xfffffef8
  76 0+010c <test_coprocessor\+38> nop
  77 0+0110 <test_coprocessor\+3c> cbn,a   00000114 <test_coprocessor\+40>
  78 .*RELOC: 0+0110 WDISP22 stop\+0xfffffef0
  79 0+0114 <test_coprocessor\+40> nop
  80 0+0118 <test_coprocessor\+44> cbe  0000011c <test_coprocessor\+48>
  81 .*RELOC: 0+0118 WDISP22 stop\+0xfffffee8
  82 0+011c <test_coprocessor\+48> nop
  83 0+0120 <test_coprocessor\+4c> cbe,a   00000124 <test_coprocessor\+50>
  84 .*RELOC: 0+0120 WDISP22 stop\+0xfffffee0
  85 0+0124 <test_coprocessor\+50> nop
  86 0+0128 <test_coprocessor\+54> cbf  0000012c <test_coprocessor\+58>
  87 .*RELOC: 0+0128 WDISP22 stop\+0xfffffed8
  88 0+012c <test_coprocessor\+58> nop
  89 0+0130 <test_coprocessor\+5c> cbf,a   00000134 <test_coprocessor\+60>
  90 .*RELOC: 0+0130 WDISP22 stop\+0xfffffed0
  91 0+0134 <test_coprocessor\+60> nop
  92 0+0138 <test_coprocessor\+64> cbef  0000013c <test_coprocessor\+68>
  93 .*RELOC: 0+0138 WDISP22 stop\+0xfffffec8
  94 0+013c <test_coprocessor\+68> nop
  95 0+0140 <test_coprocessor\+6c> cbef,a   00000144 <test_coprocessor\+70>
  96 .*RELOC: 0+0140 WDISP22 stop\+0xfffffec0
  97 0+0144 <test_coprocessor\+70> nop
  98 0+0148 <test_coprocessor\+74> cbr  0000014c <test_coprocessor\+78>
  99 .*RELOC: 0+0148 WDISP22 stop\+0xfffffeb8
 100 0+014c <test_coprocessor\+78> nop
 101 0+0150 <test_coprocessor\+7c> cbr,a   00000154 <test_coprocessor\+80>
 102 .*RELOC: 0+0150 WDISP22 stop\+0xfffffeb0
 103 0+0154 <test_coprocessor\+80> nop
 104 0+0158 <test_coprocessor\+84> cber  0000015c <test_coprocessor\+88>
 105 .*RELOC: 0+0158 WDISP22 stop\+0xfffffea8
 106 0+015c <test_coprocessor\+88> nop
 107 0+0160 <test_coprocessor\+8c> cber,a   00000164 <test_coprocessor\+90>
 108 .*RELOC: 0+0160 WDISP22 stop\+0xfffffea0
 109 0+0164 <test_coprocessor\+90> nop
 110 0+0168 <test_coprocessor\+94> cbfr  0000016c <test_coprocessor\+98>
 111 .*RELOC: 0+0168 WDISP22 stop\+0xfffffe98
 112 0+016c <test_coprocessor\+98> nop
 113 0+0170 <test_coprocessor\+9c> cbfr,a   00000174 <test_coprocessor\+a0>
 114 .*RELOC: 0+0170 WDISP22 stop\+0xfffffe90
 115 0+0174 <test_coprocessor\+a0> nop
 116 0+0178 <test_coprocessor\+a4> cbefr  0000017c <test_coprocessor\+a8>
 117 .*RELOC: 0+0178 WDISP22 stop\+0xfffffe88
 118 0+017c <test_coprocessor\+a8> nop
 119 0+0180 <test_coprocessor\+ac> cbefr,a   00000184 <test_coprocessor\+b0>
 120 .*RELOC: 0+0180 WDISP22 stop\+0xfffffe80
 121 0+0184 <test_coprocessor\+b0> nop
 122 0+0188 <test_coprocessor\+b4> cba  0000018c <test_coprocessor\+b8>
 123 .*RELOC: 0+0188 WDISP22 stop\+0xfffffe78
 124 0+018c <test_coprocessor\+b8> nop
 125 0+0190 <test_coprocessor\+bc> cba,a   00000194 <test_coprocessor\+c0>
 126 .*RELOC: 0+0190 WDISP22 stop\+0xfffffe70
 127 0+0194 <test_coprocessor\+c0> nop
 128 0+0198 <test_coprocessor\+c4> cbne  0000019c <test_coprocessor\+c8>
 129 .*RELOC: 0+0198 WDISP22 stop\+0xfffffe68
 130 0+019c <test_coprocessor\+c8> nop
 131 0+01a0 <test_coprocessor\+cc> cbne,a   000001a4 <test_coprocessor\+d0>
 132 .*RELOC: 0+01a0 WDISP22 stop\+0xfffffe60
 133 0+01a4 <test_coprocessor\+d0> nop
 134 0+01a8 <test_coprocessor\+d4> cbnf  000001ac <test_coprocessor\+d8>
 135 .*RELOC: 0+01a8 WDISP22 stop\+0xfffffe58
 136 0+01ac <test_coprocessor\+d8> nop
 137 0+01b0 <test_coprocessor\+dc> cbnf,a   000001b4 <test_coprocessor\+e0>
 138 .*RELOC: 0+01b0 WDISP22 stop\+0xfffffe50
 139 0+01b4 <test_coprocessor\+e0> nop
 140 0+01b8 <test_coprocessor\+e4> cbnef  000001bc <test_coprocessor\+e8>
 141 .*RELOC: 0+01b8 WDISP22 stop\+0xfffffe48
 142 0+01bc <test_coprocessor\+e8> nop
 143 0+01c0 <test_coprocessor\+ec> cbnef,a   000001c4 <test_coprocessor\+f0>
 144 .*RELOC: 0+01c0 WDISP22 stop\+0xfffffe40
 145 0+01c4 <test_coprocessor\+f0> nop
 146 0+01c8 <test_coprocessor\+f4> cbnr  000001cc <test_coprocessor\+f8>
 147 .*RELOC: 0+01c8 WDISP22 stop\+0xfffffe38
 148 0+01cc <test_coprocessor\+f8> nop
 149 0+01d0 <test_coprocessor\+fc> cbnr,a   000001d4 <test_coprocessor\+100>
 150 .*RELOC: 0+01d0 WDISP22 stop\+0xfffffe30
 151 0+01d4 <test_coprocessor\+100> nop
 152 0+01d8 <test_coprocessor\+104> cbner  000001dc <test_coprocessor\+108>
 153 .*RELOC: 0+01d8 WDISP22 stop\+0xfffffe28
 154 0+01dc <test_coprocessor\+108> nop
 155 0+01e0 <test_coprocessor\+10c> cbner,a   000001e4 <test_coprocessor\+110>
 156 .*RELOC: 0+01e0 WDISP22 stop\+0xfffffe20
 157 0+01e4 <test_coprocessor\+110> nop
 158 0+01e8 <test_coprocessor\+114> cbnfr  000001ec <test_coprocessor\+118>
 159 .*RELOC: 0+01e8 WDISP22 stop\+0xfffffe18
 160 0+01ec <test_coprocessor\+118> nop
 161 0+01f0 <test_coprocessor\+11c> cbnfr,a   000001f4 <test_coprocessor\+120>
 162 .*RELOC: 0+01f0 WDISP22 stop\+0xfffffe10
 163 0+01f4 <test_coprocessor\+120> nop
 164 0+01f8 <test_coprocessor\+124> cbnefr  000001fc <test_coprocessor\+128>
 165 .*RELOC: 0+01f8 WDISP22 stop\+0xfffffe08
 166 0+01fc <test_coprocessor\+128> nop
 167 0+0200 <test_coprocessor\+12c> cbnefr,a   00000204 <test_coprocessor\+130>
 168 .*RELOC: 0+0200 WDISP22 stop\+0xfffffe00
 169 0+0204 <test_coprocessor\+130> nop