gdb/aarch64-linux-nat.c

   1 /* Native-dependent code for GNU/Linux AArch64.
   2
   3    Copyright (C) 2011-2018 Free Software Foundation, Inc.
   4    Contributed by ARM Ltd.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "defs.h"
  22
  23 #include "inferior.h"
  24 #include "gdbcore.h"
  25 #include "regcache.h"
  26 #include "linux-nat.h"
  27 #include "target-descriptions.h"
  28 #include "auxv.h"
  29 #include "gdbcmd.h"
  30 #include "aarch64-tdep.h"
  31 #include "aarch64-linux-tdep.h"
  32 #include "aarch32-linux-nat.h"
  33 #include "nat/aarch64-linux.h"
  34 #include "nat/aarch64-linux-hw-point.h"
  35 #include "nat/aarch64-sve-linux-ptrace.h"
  36
  37 #include "elf/external.h"
  38 #include "elf/common.h"
  39
  40 #include "nat/gdb_ptrace.h"
  41 #include <sys/utsname.h>
  42 #include <asm/ptrace.h>
  43
  44 #include "gregset.h"
  45
  46 /* Defines ps_err_e, struct ps_prochandle.  */
  47 #include "gdb_proc_service.h"
  48
  49 #ifndef TRAP_HWBKPT
  50 #define TRAP_HWBKPT 0x0004
  51 #endif
  52
  53 class aarch64_linux_nat_target final : public linux_nat_target
  54 {
  55 public:
  56   /* Add our register access methods.  */
  57   void fetch_registers (struct regcache *, int) override;
  58   void store_registers (struct regcache *, int) override;
  59
  60   const struct target_desc *read_description () override;
  61
  62   /* Add our hardware breakpoint and watchpoint implementation.  */
  63   int can_use_hw_breakpoint (enum bptype, int, int) override;
  64   int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  65   int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  66   int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
  67   int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  68                          struct expression *) override;
  69   int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  70                          struct expression *) override;
  71   bool stopped_by_watchpoint () override;
  72   bool stopped_data_address (CORE_ADDR *) override;
  73   bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
  74
  75   int can_do_single_step () override;
  76
  77   /* Override the GNU/Linux inferior startup hook.  */
  78   void post_startup_inferior (ptid_t) override;
  79
  80   /* These three defer to common nat/ code.  */
  81   void low_new_thread (struct lwp_info *lp) override
  82   { aarch64_linux_new_thread (lp); }
  83   void low_delete_thread (struct arch_lwp_info *lp) override
  84   { aarch64_linux_delete_thread (lp); }
  85   void low_prepare_to_resume (struct lwp_info *lp) override
  86   { aarch64_linux_prepare_to_resume (lp); }
  87
  88   void low_new_fork (struct lwp_info *parent, pid_t child_pid) override;
  89   void low_forget_process (pid_t pid) override;
  90
  91   /* Add our siginfo layout converter.  */
  92   bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
  93     override;
  94 };
  95
  96 static aarch64_linux_nat_target the_aarch64_linux_nat_target;
  97
  98 /* Per-process data.  We don't bind this to a per-inferior registry
  99    because of targets like x86 GNU/Linux that need to keep track of
 100    processes that aren't bound to any inferior (e.g., fork children,
 101    checkpoints).  */
 102
 103 struct aarch64_process_info
 104 {
 105   /* Linked list.  */
 106   struct aarch64_process_info *next;
 107
 108   /* The process identifier.  */
 109   pid_t pid;
 110
 111   /* Copy of aarch64 hardware debug registers.  */
 112   struct aarch64_debug_reg_state state;
 113 };
 114
 115 static struct aarch64_process_info *aarch64_process_list = NULL;
 116
 117 /* Find process data for process PID.  */
 118
 119 static struct aarch64_process_info *
 120 aarch64_find_process_pid (pid_t pid)
 121 {
 122   struct aarch64_process_info *proc;
 123
 124   for (proc = aarch64_process_list; proc; proc = proc->next)
 125     if (proc->pid == pid)
 126       return proc;
 127
 128   return NULL;
 129 }
 130
 131 /* Add process data for process PID.  Returns newly allocated info
 132    object.  */
 133
 134 static struct aarch64_process_info *
 135 aarch64_add_process (pid_t pid)
 136 {
 137   struct aarch64_process_info *proc;
 138
 139   proc = XCNEW (struct aarch64_process_info);
 140   proc->pid = pid;
 141
 142   proc->next = aarch64_process_list;
 143   aarch64_process_list = proc;
 144
 145   return proc;
 146 }
 147
 148 /* Get data specific info for process PID, creating it if necessary.
 149    Never returns NULL.  */
 150
 151 static struct aarch64_process_info *
 152 aarch64_process_info_get (pid_t pid)
 153 {
 154   struct aarch64_process_info *proc;
 155
 156   proc = aarch64_find_process_pid (pid);
 157   if (proc == NULL)
 158     proc = aarch64_add_process (pid);
 159
 160   return proc;
 161 }
 162
 163 /* Called whenever GDB is no longer debugging process PID.  It deletes
 164    data structures that keep track of debug register state.  */
 165
 166 void
 167 aarch64_linux_nat_target::low_forget_process (pid_t pid)
 168 {
 169   struct aarch64_process_info *proc, **proc_link;
 170
 171   proc = aarch64_process_list;
 172   proc_link = &aarch64_process_list;
 173
 174   while (proc != NULL)
 175     {
 176       if (proc->pid == pid)
 177         {
 178           *proc_link = proc->next;
 179
 180           xfree (proc);
 181           return;
 182         }
 183
 184       proc_link = &proc->next;
 185       proc = *proc_link;
 186     }
 187 }
 188
 189 /* Get debug registers state for process PID.  */
 190
 191 struct aarch64_debug_reg_state *
 192 aarch64_get_debug_reg_state (pid_t pid)
 193 {
 194   return &aarch64_process_info_get (pid)->state;
 195 }
 196
 197 /* Fill GDB's register array with the general-purpose register values
 198    from the current thread.  */
 199
 200 static void
 201 fetch_gregs_from_thread (struct regcache *regcache)
 202 {
 203   int ret, tid;
 204   struct gdbarch *gdbarch = regcache->arch ();
 205   elf_gregset_t regs;
 206   struct iovec iovec;
 207
 208   /* Make sure REGS can hold all registers contents on both aarch64
 209      and arm.  */
 210   gdb_static_assert (sizeof (regs) >= 18 * 4);
 211
 212   tid = ptid_get_lwp (regcache->ptid ());
 213
 214   iovec.iov_base = &regs;
 215   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 216     iovec.iov_len = 18 * 4;
 217   else
 218     iovec.iov_len = sizeof (regs);
 219
 220   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 221   if (ret < 0)
 222     perror_with_name (_("Unable to fetch general registers."));
 223
 224   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 225     aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1);
 226   else
 227     {
 228       int regno;
 229
 230       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 231         regcache->raw_supply (regno, &regs[regno - AARCH64_X0_REGNUM]);
 232     }
 233 }
 234
 235 /* Store to the current thread the valid general-purpose register
 236    values in the GDB's register array.  */
 237
 238 static void
 239 store_gregs_to_thread (const struct regcache *regcache)
 240 {
 241   int ret, tid;
 242   elf_gregset_t regs;
 243   struct iovec iovec;
 244   struct gdbarch *gdbarch = regcache->arch ();
 245
 246   /* Make sure REGS can hold all registers contents on both aarch64
 247      and arm.  */
 248   gdb_static_assert (sizeof (regs) >= 18 * 4);
 249   tid = ptid_get_lwp (regcache->ptid ());
 250
 251   iovec.iov_base = &regs;
 252   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 253     iovec.iov_len = 18 * 4;
 254   else
 255     iovec.iov_len = sizeof (regs);
 256
 257   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 258   if (ret < 0)
 259     perror_with_name (_("Unable to fetch general registers."));
 260
 261   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 262     aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1);
 263   else
 264     {
 265       int regno;
 266
 267       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 268         if (REG_VALID == regcache->get_register_status (regno))
 269           regcache->raw_collect (regno, &regs[regno - AARCH64_X0_REGNUM]);
 270     }
 271
 272   ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec);
 273   if (ret < 0)
 274     perror_with_name (_("Unable to store general registers."));
 275 }
 276
 277 /* Fill GDB's register array with the fp/simd register values
 278    from the current thread.  */
 279
 280 static void
 281 fetch_fpregs_from_thread (struct regcache *regcache)
 282 {
 283   int ret, tid;
 284   elf_fpregset_t regs;
 285   struct iovec iovec;
 286   struct gdbarch *gdbarch = regcache->arch ();
 287
 288   /* Make sure REGS can hold all VFP registers contents on both aarch64
 289      and arm.  */
 290   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
 291
 292   tid = ptid_get_lwp (regcache->ptid ());
 293
 294   iovec.iov_base = &regs;
 295
 296   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 297     {
 298       iovec.iov_len = VFP_REGS_SIZE;
 299
 300       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 301       if (ret < 0)
 302         perror_with_name (_("Unable to fetch VFP registers."));
 303
 304       aarch32_vfp_regcache_supply (regcache, (gdb_byte *) &regs, 32);
 305     }
 306   else
 307     {
 308       int regno;
 309
 310       iovec.iov_len = sizeof (regs);
 311
 312       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 313       if (ret < 0)
 314         perror_with_name (_("Unable to fetch vFP/SIMD registers."));
 315
 316       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 317         regcache->raw_supply (regno, &regs.vregs[regno - AARCH64_V0_REGNUM]);
 318
 319       regcache->raw_supply (AARCH64_FPSR_REGNUM, &regs.fpsr);
 320       regcache->raw_supply (AARCH64_FPCR_REGNUM, &regs.fpcr);
 321     }
 322 }
 323
 324 /* Store to the current thread the valid fp/simd register
 325    values in the GDB's register array.  */
 326
 327 static void
 328 store_fpregs_to_thread (const struct regcache *regcache)
 329 {
 330   int ret, tid;
 331   elf_fpregset_t regs;
 332   struct iovec iovec;
 333   struct gdbarch *gdbarch = regcache->arch ();
 334
 335   /* Make sure REGS can hold all VFP registers contents on both aarch64
 336      and arm.  */
 337   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
 338   tid = ptid_get_lwp (regcache->ptid ());
 339
 340   iovec.iov_base = &regs;
 341
 342   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 343     {
 344       iovec.iov_len = VFP_REGS_SIZE;
 345
 346       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 347       if (ret < 0)
 348         perror_with_name (_("Unable to fetch VFP registers."));
 349
 350       aarch32_vfp_regcache_collect (regcache, (gdb_byte *) &regs, 32);
 351     }
 352   else
 353     {
 354       int regno;
 355
 356       iovec.iov_len = sizeof (regs);
 357
 358       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 359       if (ret < 0)
 360         perror_with_name (_("Unable to fetch FP/SIMD registers."));
 361
 362       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 363         if (REG_VALID == regcache->get_register_status (regno))
 364           regcache->raw_collect
 365             (regno, (char *) &regs.vregs[regno - AARCH64_V0_REGNUM]);
 366
 367       if (REG_VALID == regcache->get_register_status (AARCH64_FPSR_REGNUM))
 368         regcache->raw_collect (AARCH64_FPSR_REGNUM, (char *) &regs.fpsr);
 369       if (REG_VALID == regcache->get_register_status (AARCH64_FPCR_REGNUM))
 370         regcache->raw_collect (AARCH64_FPCR_REGNUM, (char *) &regs.fpcr);
 371     }
 372
 373   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 374     {
 375       ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec);
 376       if (ret < 0)
 377         perror_with_name (_("Unable to store VFP registers."));
 378     }
 379   else
 380     {
 381       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec);
 382       if (ret < 0)
 383         perror_with_name (_("Unable to store FP/SIMD registers."));
 384     }
 385 }
 386
 387 /* Fill GDB's register array with the sve register values
 388    from the current thread.  */
 389
 390 static void
 391 fetch_sveregs_from_thread (struct regcache *regcache)
 392 {
 393   std::unique_ptr<gdb_byte[]> base
 394     = aarch64_sve_get_sveregs (ptid_get_lwp (regcache->ptid ()));
 395   aarch64_sve_regs_copy_to_reg_buf (regcache, base.get ());
 396 }
 397
 398 /* Store to the current thread the valid sve register
 399    values in the GDB's register array.  */
 400
 401 static void
 402 store_sveregs_to_thread (struct regcache *regcache)
 403 {
 404   int ret;
 405   struct iovec iovec;
 406   int tid = ptid_get_lwp (regcache->ptid ());
 407
 408   /* Obtain a dump of SVE registers from ptrace.  */
 409   std::unique_ptr<gdb_byte[]> base = aarch64_sve_get_sveregs (tid);
 410
 411   /* Overwrite with regcache state.  */
 412   aarch64_sve_regs_copy_from_reg_buf (regcache, base.get ());
 413
 414   /* Write back to the kernel.  */
 415   iovec.iov_base = base.get ();
 416   iovec.iov_len = ((struct user_sve_header *) base.get ())->size;
 417   ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_SVE, &iovec);
 418
 419   if (ret < 0)
 420     perror_with_name (_("Unable to store sve registers"));
 421 }
 422
 423 /* Implement the "fetch_registers" target_ops method.  */
 424
 425 void
 426 aarch64_linux_nat_target::fetch_registers (struct regcache *regcache,
 427                                            int regno)
 428 {
 429   struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
 430
 431   if (regno == -1)
 432     {
 433       fetch_gregs_from_thread (regcache);
 434       if (tdep->has_sve ())
 435         fetch_sveregs_from_thread (regcache);
 436       else
 437         fetch_fpregs_from_thread (regcache);
 438     }
 439   else if (regno < AARCH64_V0_REGNUM)
 440     fetch_gregs_from_thread (regcache);
 441   else if (tdep->has_sve ())
 442     fetch_sveregs_from_thread (regcache);
 443   else
 444     fetch_fpregs_from_thread (regcache);
 445 }
 446
 447 /* Implement the "store_registers" target_ops method.  */
 448
 449 void
 450 aarch64_linux_nat_target::store_registers (struct regcache *regcache,
 451                                            int regno)
 452 {
 453   struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
 454
 455   if (regno == -1)
 456     {
 457       store_gregs_to_thread (regcache);
 458       if (tdep->has_sve ())
 459         store_sveregs_to_thread (regcache);
 460       else
 461         store_fpregs_to_thread (regcache);
 462     }
 463   else if (regno < AARCH64_V0_REGNUM)
 464     store_gregs_to_thread (regcache);
 465   else if (tdep->has_sve ())
 466     store_sveregs_to_thread (regcache);
 467   else
 468     store_fpregs_to_thread (regcache);
 469 }
 470
 471 /* Fill register REGNO (if it is a general-purpose register) in
 472    *GREGSETPS with the value in GDB's register array.  If REGNO is -1,
 473    do this for all registers.  */
 474
 475 void
 476 fill_gregset (const struct regcache *regcache,
 477               gdb_gregset_t *gregsetp, int regno)
 478 {
 479   regcache_collect_regset (&aarch64_linux_gregset, regcache,
 480                            regno, (gdb_byte *) gregsetp,
 481                            AARCH64_LINUX_SIZEOF_GREGSET);
 482 }
 483
 484 /* Fill GDB's register array with the general-purpose register values
 485    in *GREGSETP.  */
 486
 487 void
 488 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 489 {
 490   regcache_supply_regset (&aarch64_linux_gregset, regcache, -1,
 491                           (const gdb_byte *) gregsetp,
 492                           AARCH64_LINUX_SIZEOF_GREGSET);
 493 }
 494
 495 /* Fill register REGNO (if it is a floating-point register) in
 496    *FPREGSETP with the value in GDB's register array.  If REGNO is -1,
 497    do this for all registers.  */
 498
 499 void
 500 fill_fpregset (const struct regcache *regcache,
 501                gdb_fpregset_t *fpregsetp, int regno)
 502 {
 503   regcache_collect_regset (&aarch64_linux_fpregset, regcache,
 504                            regno, (gdb_byte *) fpregsetp,
 505                            AARCH64_LINUX_SIZEOF_FPREGSET);
 506 }
 507
 508 /* Fill GDB's register array with the floating-point register values
 509    in *FPREGSETP.  */
 510
 511 void
 512 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 513 {
 514   regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1,
 515                           (const gdb_byte *) fpregsetp,
 516                           AARCH64_LINUX_SIZEOF_FPREGSET);
 517 }
 518
 519 /* linux_nat_new_fork hook.   */
 520
 521 void
 522 aarch64_linux_nat_target::low_new_fork (struct lwp_info *parent,
 523                                         pid_t child_pid)
 524 {
 525   pid_t parent_pid;
 526   struct aarch64_debug_reg_state *parent_state;
 527   struct aarch64_debug_reg_state *child_state;
 528
 529   /* NULL means no watchpoint has ever been set in the parent.  In
 530      that case, there's nothing to do.  */
 531   if (parent->arch_private == NULL)
 532     return;
 533
 534   /* GDB core assumes the child inherits the watchpoints/hw
 535      breakpoints of the parent, and will remove them all from the
 536      forked off process.  Copy the debug registers mirrors into the
 537      new process so that all breakpoints and watchpoints can be
 538      removed together.  */
 539
 540   parent_pid = ptid_get_pid (parent->ptid);
 541   parent_state = aarch64_get_debug_reg_state (parent_pid);
 542   child_state = aarch64_get_debug_reg_state (child_pid);
 543   *child_state = *parent_state;
 544 }
 545 \f
 546
 547 /* Called by libthread_db.  Returns a pointer to the thread local
 548    storage (or its descriptor).  */
 549
 550 ps_err_e
 551 ps_get_thread_area (struct ps_prochandle *ph,
 552                     lwpid_t lwpid, int idx, void **base)
 553 {
 554   int is_64bit_p
 555     = (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 64);
 556
 557   return aarch64_ps_get_thread_area (ph, lwpid, idx, base, is_64bit_p);
 558 }
 559 \f
 560
 561 /* Implement the "post_startup_inferior" target_ops method.  */
 562
 563 void
 564 aarch64_linux_nat_target::post_startup_inferior (ptid_t ptid)
 565 {
 566   low_forget_process (ptid_get_pid (ptid));
 567   aarch64_linux_get_debug_reg_capacity (ptid_get_pid (ptid));
 568   linux_nat_target::post_startup_inferior (ptid);
 569 }
 570
 571 extern struct target_desc *tdesc_arm_with_neon;
 572
 573 /* Implement the "read_description" target_ops method.  */
 574
 575 const struct target_desc *
 576 aarch64_linux_nat_target::read_description ()
 577 {
 578   int ret, tid;
 579   gdb_byte regbuf[VFP_REGS_SIZE];
 580   struct iovec iovec;
 581
 582   tid = ptid_get_lwp (inferior_ptid);
 583
 584   iovec.iov_base = regbuf;
 585   iovec.iov_len = VFP_REGS_SIZE;
 586
 587   ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 588   if (ret == 0)
 589     return tdesc_arm_with_neon;
 590   else
 591     return aarch64_read_description (aarch64_sve_get_vq (tid));
 592 }
 593
 594 /* Convert a native/host siginfo object, into/from the siginfo in the
 595    layout of the inferiors' architecture.  Returns true if any
 596    conversion was done; false otherwise.  If DIRECTION is 1, then copy
 597    from INF to NATIVE.  If DIRECTION is 0, copy from NATIVE to
 598    INF.  */
 599
 600 bool
 601 aarch64_linux_nat_target::low_siginfo_fixup (siginfo_t *native, gdb_byte *inf,
 602                                              int direction)
 603 {
 604   struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
 605
 606   /* Is the inferior 32-bit?  If so, then do fixup the siginfo
 607      object.  */
 608   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 609     {
 610       if (direction == 0)
 611         aarch64_compat_siginfo_from_siginfo ((struct compat_siginfo *) inf,
 612                                              native);
 613       else
 614         aarch64_siginfo_from_compat_siginfo (native,
 615                                              (struct compat_siginfo *) inf);
 616
 617       return true;
 618     }
 619
 620   return false;
 621 }
 622
 623 /* Returns the number of hardware watchpoints of type TYPE that we can
 624    set.  Value is positive if we can set CNT watchpoints, zero if
 625    setting watchpoints of type TYPE is not supported, and negative if
 626    CNT is more than the maximum number of watchpoints of type TYPE
 627    that we can support.  TYPE is one of bp_hardware_watchpoint,
 628    bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
 629    CNT is the number of such watchpoints used so far (including this
 630    one).  OTHERTYPE is non-zero if other types of watchpoints are
 631    currently enabled.  */
 632
 633 int
 634 aarch64_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
 635                                                  int cnt, int othertype)
 636 {
 637   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 638       || type == bp_access_watchpoint || type == bp_watchpoint)
 639     {
 640       if (aarch64_num_wp_regs == 0)
 641         return 0;
 642     }
 643   else if (type == bp_hardware_breakpoint)
 644     {
 645       if (aarch64_num_bp_regs == 0)
 646         return 0;
 647     }
 648   else
 649     gdb_assert_not_reached ("unexpected breakpoint type");
 650
 651   /* We always return 1 here because we don't have enough information
 652      about possible overlap of addresses that they want to watch.  As an
 653      extreme example, consider the case where all the watchpoints watch
 654      the same address and the same region length: then we can handle a
 655      virtually unlimited number of watchpoints, due to debug register
 656      sharing implemented via reference counts.  */
 657   return 1;
 658 }
 659
 660 /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
 661    Return 0 on success, -1 on failure.  */
 662
 663 int
 664 aarch64_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
 665                                                 struct bp_target_info *bp_tgt)
 666 {
 667   int ret;
 668   CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
 669   int len;
 670   const enum target_hw_bp_type type = hw_execute;
 671   struct aarch64_debug_reg_state *state
 672     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 673
 674   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 675
 676   if (show_debug_regs)
 677     fprintf_unfiltered
 678       (gdb_stdlog,
 679        "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 680        (unsigned long) addr, len);
 681
 682   ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state);
 683
 684   if (show_debug_regs)
 685     {
 686       aarch64_show_debug_reg_state (state,
 687                                     "insert_hw_breakpoint", addr, len, type);
 688     }
 689
 690   return ret;
 691 }
 692
 693 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
 694    Return 0 on success, -1 on failure.  */
 695
 696 int
 697 aarch64_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
 698                                                 struct bp_target_info *bp_tgt)
 699 {
 700   int ret;
 701   CORE_ADDR addr = bp_tgt->placed_address;
 702   int len = 4;
 703   const enum target_hw_bp_type type = hw_execute;
 704   struct aarch64_debug_reg_state *state
 705     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 706
 707   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 708
 709   if (show_debug_regs)
 710     fprintf_unfiltered
 711       (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 712        (unsigned long) addr, len);
 713
 714   ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state);
 715
 716   if (show_debug_regs)
 717     {
 718       aarch64_show_debug_reg_state (state,
 719                                     "remove_hw_watchpoint", addr, len, type);
 720     }
 721
 722   return ret;
 723 }
 724
 725 /* Implement the "insert_watchpoint" target_ops method.
 726
 727    Insert a watchpoint to watch a memory region which starts at
 728    address ADDR and whose length is LEN bytes.  Watch memory accesses
 729    of the type TYPE.  Return 0 on success, -1 on failure.  */
 730
 731 int
 732 aarch64_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
 733                                              enum target_hw_bp_type type,
 734                                              struct expression *cond)
 735 {
 736   int ret;
 737   struct aarch64_debug_reg_state *state
 738     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 739
 740   if (show_debug_regs)
 741     fprintf_unfiltered (gdb_stdlog,
 742                         "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 743                         (unsigned long) addr, len);
 744
 745   gdb_assert (type != hw_execute);
 746
 747   ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state);
 748
 749   if (show_debug_regs)
 750     {
 751       aarch64_show_debug_reg_state (state,
 752                                     "insert_watchpoint", addr, len, type);
 753     }
 754
 755   return ret;
 756 }
 757
 758 /* Implement the "remove_watchpoint" target_ops method.
 759    Remove a watchpoint that watched the memory region which starts at
 760    address ADDR, whose length is LEN bytes, and for accesses of the
 761    type TYPE.  Return 0 on success, -1 on failure.  */
 762
 763 int
 764 aarch64_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len,
 765                                              enum target_hw_bp_type type,
 766                                              struct expression *cond)
 767 {
 768   int ret;
 769   struct aarch64_debug_reg_state *state
 770     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 771
 772   if (show_debug_regs)
 773     fprintf_unfiltered (gdb_stdlog,
 774                         "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 775                         (unsigned long) addr, len);
 776
 777   gdb_assert (type != hw_execute);
 778
 779   ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state);
 780
 781   if (show_debug_regs)
 782     {
 783       aarch64_show_debug_reg_state (state,
 784                                     "remove_watchpoint", addr, len, type);
 785     }
 786
 787   return ret;
 788 }
 789
 790 /* Implement the "region_ok_for_hw_watchpoint" target_ops method.  */
 791
 792 int
 793 aarch64_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
 794 {
 795   return aarch64_linux_region_ok_for_watchpoint (addr, len);
 796 }
 797
 798 /* Implement the "stopped_data_address" target_ops method.  */
 799
 800 bool
 801 aarch64_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p)
 802 {
 803   siginfo_t siginfo;
 804   int i, tid;
 805   struct aarch64_debug_reg_state *state;
 806
 807   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
 808     return false;
 809
 810   /* This must be a hardware breakpoint.  */
 811   if (siginfo.si_signo != SIGTRAP
 812       || (siginfo.si_code & 0xffff) != TRAP_HWBKPT)
 813     return false;
 814
 815   /* Check if the address matches any watched address.  */
 816   state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 817   for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
 818     {
 819       const unsigned int offset
 820         = aarch64_watchpoint_offset (state->dr_ctrl_wp[i]);
 821       const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
 822       const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr;
 823       const CORE_ADDR addr_watch = state->dr_addr_wp[i] + offset;
 824       const CORE_ADDR addr_watch_aligned = align_down (state->dr_addr_wp[i], 8);
 825       const CORE_ADDR addr_orig = state->dr_addr_orig_wp[i];
 826
 827       if (state->dr_ref_count_wp[i]
 828           && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
 829           && addr_trap >= addr_watch_aligned
 830           && addr_trap < addr_watch + len)
 831         {
 832           /* ADDR_TRAP reports the first address of the memory range
 833              accessed by the CPU, regardless of what was the memory
 834              range watched.  Thus, a large CPU access that straddles
 835              the ADDR_WATCH..ADDR_WATCH+LEN range may result in an
 836              ADDR_TRAP that is lower than the
 837              ADDR_WATCH..ADDR_WATCH+LEN range.  E.g.:
 838
 839              addr: |   4   |   5   |   6   |   7   |   8   |
 840                                    |---- range watched ----|
 841                    |----------- range accessed ------------|
 842
 843              In this case, ADDR_TRAP will be 4.
 844
 845              To match a watchpoint known to GDB core, we must never
 846              report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN
 847              range.  ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false
 848              positive on kernels older than 4.10.  See PR
 849              external/20207.  */
 850           *addr_p = addr_orig;
 851           return true;
 852         }
 853     }
 854
 855   return false;
 856 }
 857
 858 /* Implement the "stopped_by_watchpoint" target_ops method.  */
 859
 860 bool
 861 aarch64_linux_nat_target::stopped_by_watchpoint ()
 862 {
 863   CORE_ADDR addr;
 864
 865   return stopped_data_address (&addr);
 866 }
 867
 868 /* Implement the "watchpoint_addr_within_range" target_ops method.  */
 869
 870 bool
 871 aarch64_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr,
 872                                                         CORE_ADDR start, int length)
 873 {
 874   return start <= addr && start + length - 1 >= addr;
 875 }
 876
 877 /* Implement the "can_do_single_step" target_ops method.  */
 878
 879 int
 880 aarch64_linux_nat_target::can_do_single_step ()
 881 {
 882   return 1;
 883 }
 884
 885 /* Define AArch64 maintenance commands.  */
 886
 887 static void
 888 add_show_debug_regs_command (void)
 889 {
 890   /* A maintenance command to enable printing the internal DRi mirror
 891      variables.  */
 892   add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
 893                            &show_debug_regs, _("\
 894 Set whether to show variables that mirror the AArch64 debug registers."), _("\
 895 Show whether to show variables that mirror the AArch64 debug registers."), _("\
 896 Use \"on\" to enable, \"off\" to disable.\n\
 897 If enabled, the debug registers values are shown when GDB inserts\n\
 898 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
 899 triggers a breakpoint or watchpoint."),
 900                            NULL,
 901                            NULL,
 902                            &maintenance_set_cmdlist,
 903                            &maintenance_show_cmdlist);
 904 }
 905
 906 void
 907 _initialize_aarch64_linux_nat (void)
 908 {
 909   add_show_debug_regs_command ();
 910
 911   /* Register the target.  */
 912   linux_target = &the_aarch64_linux_nat_target;
 913   add_inf_child_target (&the_aarch64_linux_nat_target);
 914 }