1 /* Common target dependent code for GDB on AArch64 systems.
3 Copyright (C) 2009-2020 Free Software Foundation, Inc.
4 Contributed by ARM Ltd.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #ifndef AARCH64_TDEP_H
23 #define AARCH64_TDEP_H
25 #include "arch/aarch64.h"
26 #include "displaced-stepping.h"
29 /* Forward declarations. */
33 /* AArch64 Dwarf register numbering. */
34 #define AARCH64_DWARF_X0 0
35 #define AARCH64_DWARF_SP 31
36 #define AARCH64_DWARF_PAUTH_RA_STATE 34
37 #define AARCH64_DWARF_PAUTH_DMASK 35
38 #define AARCH64_DWARF_PAUTH_CMASK 36
39 #define AARCH64_DWARF_V0 64
40 #define AARCH64_DWARF_SVE_VG 46
41 #define AARCH64_DWARF_SVE_FFR 47
42 #define AARCH64_DWARF_SVE_P0 48
43 #define AARCH64_DWARF_SVE_Z0 96
45 /* Size of integer registers. */
46 #define X_REGISTER_SIZE 8
47 #define B_REGISTER_SIZE 1
48 #define H_REGISTER_SIZE 2
49 #define S_REGISTER_SIZE 4
50 #define D_REGISTER_SIZE 8
51 #define V_REGISTER_SIZE 16
52 #define Q_REGISTER_SIZE 16
54 /* Total number of general (X) registers. */
55 #define AARCH64_X_REGISTER_COUNT 32
56 /* Total number of D registers. */
57 #define AARCH64_D_REGISTER_COUNT 32
59 /* The maximum number of modified instructions generated for one
60 single-stepped instruction. */
61 #define AARCH64_DISPLACED_MODIFIED_INSNS 1
63 /* Target-dependent structure in gdbarch. */
66 /* Lowest address at which instructions will appear. */
69 /* Offset to PC value in jump buffer. If this is negative, longjmp
70 support will be disabled. */
73 /* And the size of each entry in the buf. */
76 /* Types for AdvSISD registers. */
77 struct type
*vnq_type
;
78 struct type
*vnd_type
;
79 struct type
*vns_type
;
80 struct type
*vnh_type
;
81 struct type
*vnb_type
;
82 struct type
*vnv_type
;
85 int (*aarch64_syscall_record
) (struct regcache
*regcache
, unsigned long svc_number
);
87 /* The VQ value for SVE targets, or zero if SVE is not supported. */
90 /* Returns true if the target supports SVE. */
97 int pauth_ra_state_regnum
;
99 /* Returns true if the target supports pauth. */
100 bool has_pauth () const
102 return pauth_reg_base
!= -1;
106 const target_desc
*aarch64_read_description (uint64_t vq
, bool pauth_p
);
108 extern int aarch64_process_record (struct gdbarch
*gdbarch
,
109 struct regcache
*regcache
, CORE_ADDR addr
);
111 displaced_step_copy_insn_closure_up
112 aarch64_displaced_step_copy_insn (struct gdbarch
*gdbarch
,
113 CORE_ADDR from
, CORE_ADDR to
,
114 struct regcache
*regs
);
116 void aarch64_displaced_step_fixup (struct gdbarch
*gdbarch
,
117 displaced_step_copy_insn_closure
*dsc
,
118 CORE_ADDR from
, CORE_ADDR to
,
119 struct regcache
*regs
);
121 bool aarch64_displaced_step_hw_singlestep (struct gdbarch
*gdbarch
);
123 #endif /* aarch64-tdep.h */