Remove some unnecessary focus switches
[deliverable/binutils-gdb.git] / gdb / aarch64-tdep.h
1 /* Common target dependent code for GDB on AArch64 systems.
2
3 Copyright (C) 2009-2019 Free Software Foundation, Inc.
4 Contributed by ARM Ltd.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21
22 #ifndef AARCH64_TDEP_H
23 #define AARCH64_TDEP_H
24
25 #include "arch/aarch64.h"
26
27 /* Forward declarations. */
28 struct gdbarch;
29 struct regset;
30
31 /* AArch64 Dwarf register numbering. */
32 #define AARCH64_DWARF_X0 0
33 #define AARCH64_DWARF_SP 31
34 #define AARCH64_DWARF_PAUTH_RA_STATE 34
35 #define AARCH64_DWARF_PAUTH_DMASK 35
36 #define AARCH64_DWARF_PAUTH_CMASK 36
37 #define AARCH64_DWARF_V0 64
38 #define AARCH64_DWARF_SVE_VG 46
39 #define AARCH64_DWARF_SVE_FFR 47
40 #define AARCH64_DWARF_SVE_P0 48
41 #define AARCH64_DWARF_SVE_Z0 96
42
43 /* Size of integer registers. */
44 #define X_REGISTER_SIZE 8
45 #define B_REGISTER_SIZE 1
46 #define H_REGISTER_SIZE 2
47 #define S_REGISTER_SIZE 4
48 #define D_REGISTER_SIZE 8
49 #define V_REGISTER_SIZE 16
50 #define Q_REGISTER_SIZE 16
51
52 /* Total number of general (X) registers. */
53 #define AARCH64_X_REGISTER_COUNT 32
54 /* Total number of D registers. */
55 #define AARCH64_D_REGISTER_COUNT 32
56
57 /* The maximum number of modified instructions generated for one
58 single-stepped instruction. */
59 #define AARCH64_DISPLACED_MODIFIED_INSNS 1
60
61 /* Target-dependent structure in gdbarch. */
62 struct gdbarch_tdep
63 {
64 /* Lowest address at which instructions will appear. */
65 CORE_ADDR lowest_pc;
66
67 /* Offset to PC value in jump buffer. If this is negative, longjmp
68 support will be disabled. */
69 int jb_pc;
70
71 /* And the size of each entry in the buf. */
72 size_t jb_elt_size;
73
74 /* Types for AdvSISD registers. */
75 struct type *vnq_type;
76 struct type *vnd_type;
77 struct type *vns_type;
78 struct type *vnh_type;
79 struct type *vnb_type;
80 struct type *vnv_type;
81
82 /* syscall record. */
83 int (*aarch64_syscall_record) (struct regcache *regcache, unsigned long svc_number);
84
85 /* The VQ value for SVE targets, or zero if SVE is not supported. */
86 uint64_t vq;
87
88 /* Returns true if the target supports SVE. */
89 bool has_sve () const
90 {
91 return vq != 0;
92 }
93
94 int pauth_reg_base;
95 int pauth_ra_state_regnum;
96
97 /* Returns true if the target supports pauth. */
98 bool has_pauth () const
99 {
100 return pauth_reg_base != -1;
101 }
102 };
103
104 const target_desc *aarch64_read_description (uint64_t vq, bool pauth_p);
105
106 extern int aarch64_process_record (struct gdbarch *gdbarch,
107 struct regcache *regcache, CORE_ADDR addr);
108
109 struct displaced_step_closure *
110 aarch64_displaced_step_copy_insn (struct gdbarch *gdbarch,
111 CORE_ADDR from, CORE_ADDR to,
112 struct regcache *regs);
113
114 void aarch64_displaced_step_fixup (struct gdbarch *gdbarch,
115 struct displaced_step_closure *dsc,
116 CORE_ADDR from, CORE_ADDR to,
117 struct regcache *regs);
118
119 int aarch64_displaced_step_hw_singlestep (struct gdbarch *gdbarch,
120 struct displaced_step_closure *closure);
121
122 #endif /* aarch64-tdep.h */
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