* dwarf2dbg.c (get_frag_fix): Revert 2001-11-15 change.
[deliverable/binutils-gdb.git] / gdb / alpha-tdep.c
1 /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #include "defs.h"
23 #include "doublest.h"
24 #include "frame.h"
25 #include "frame-unwind.h"
26 #include "frame-base.h"
27 #include "dwarf2-frame.h"
28 #include "inferior.h"
29 #include "symtab.h"
30 #include "value.h"
31 #include "gdbcmd.h"
32 #include "gdbcore.h"
33 #include "dis-asm.h"
34 #include "symfile.h"
35 #include "objfiles.h"
36 #include "gdb_string.h"
37 #include "linespec.h"
38 #include "regcache.h"
39 #include "reggroups.h"
40 #include "arch-utils.h"
41 #include "osabi.h"
42 #include "block.h"
43
44 #include "elf-bfd.h"
45
46 #include "alpha-tdep.h"
47
48 \f
49 static const char *
50 alpha_register_name (int regno)
51 {
52 static const char * const register_names[] =
53 {
54 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
55 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
56 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
57 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
58 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
59 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
60 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
61 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
62 "pc", "", "unique"
63 };
64
65 if (regno < 0)
66 return NULL;
67 if (regno >= (sizeof(register_names) / sizeof(*register_names)))
68 return NULL;
69 return register_names[regno];
70 }
71
72 static int
73 alpha_cannot_fetch_register (int regno)
74 {
75 return regno == ALPHA_ZERO_REGNUM;
76 }
77
78 static int
79 alpha_cannot_store_register (int regno)
80 {
81 return regno == ALPHA_ZERO_REGNUM;
82 }
83
84 static struct type *
85 alpha_register_type (struct gdbarch *gdbarch, int regno)
86 {
87 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
88 return builtin_type_void_data_ptr;
89 if (regno == ALPHA_PC_REGNUM)
90 return builtin_type_void_func_ptr;
91
92 /* Don't need to worry about little vs big endian until
93 some jerk tries to port to alpha-unicosmk. */
94 if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31)
95 return builtin_type_ieee_double_little;
96
97 return builtin_type_int64;
98 }
99
100 /* Is REGNUM a member of REGGROUP? */
101
102 static int
103 alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
104 struct reggroup *group)
105 {
106 /* Filter out any registers eliminated, but whose regnum is
107 reserved for backward compatibility, e.g. the vfp. */
108 if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0')
109 return 0;
110
111 if (group == all_reggroup)
112 return 1;
113
114 /* Zero should not be saved or restored. Technically it is a general
115 register (just as $f31 would be a float if we represented it), but
116 there's no point displaying it during "info regs", so leave it out
117 of all groups except for "all". */
118 if (regnum == ALPHA_ZERO_REGNUM)
119 return 0;
120
121 /* All other registers are saved and restored. */
122 if (group == save_reggroup || group == restore_reggroup)
123 return 1;
124
125 /* All other groups are non-overlapping. */
126
127 /* Since this is really a PALcode memory slot... */
128 if (regnum == ALPHA_UNIQUE_REGNUM)
129 return group == system_reggroup;
130
131 /* Force the FPCR to be considered part of the floating point state. */
132 if (regnum == ALPHA_FPCR_REGNUM)
133 return group == float_reggroup;
134
135 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
136 return group == float_reggroup;
137 else
138 return group == general_reggroup;
139 }
140
141 static int
142 alpha_register_byte (int regno)
143 {
144 return (regno * 8);
145 }
146
147 static int
148 alpha_register_raw_size (int regno)
149 {
150 return 8;
151 }
152
153 static int
154 alpha_register_virtual_size (int regno)
155 {
156 return 8;
157 }
158
159 /* The following represents exactly the conversion performed by
160 the LDS instruction. This applies to both single-precision
161 floating point and 32-bit integers. */
162
163 static void
164 alpha_lds (void *out, const void *in)
165 {
166 ULONGEST mem = extract_unsigned_integer (in, 4);
167 ULONGEST frac = (mem >> 0) & 0x7fffff;
168 ULONGEST sign = (mem >> 31) & 1;
169 ULONGEST exp_msb = (mem >> 30) & 1;
170 ULONGEST exp_low = (mem >> 23) & 0x7f;
171 ULONGEST exp, reg;
172
173 exp = (exp_msb << 10) | exp_low;
174 if (exp_msb)
175 {
176 if (exp_low == 0x7f)
177 exp = 0x7ff;
178 }
179 else
180 {
181 if (exp_low != 0x00)
182 exp |= 0x380;
183 }
184
185 reg = (sign << 63) | (exp << 52) | (frac << 29);
186 store_unsigned_integer (out, 8, reg);
187 }
188
189 /* Similarly, this represents exactly the conversion performed by
190 the STS instruction. */
191
192 static inline void
193 alpha_sts (void *out, const void *in)
194 {
195 ULONGEST reg, mem;
196
197 reg = extract_unsigned_integer (in, 8);
198 mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff);
199 store_unsigned_integer (out, 4, mem);
200 }
201
202 /* The alpha needs a conversion between register and memory format if the
203 register is a floating point register and memory format is float, as the
204 register format must be double or memory format is an integer with 4
205 bytes or less, as the representation of integers in floating point
206 registers is different. */
207
208 static int
209 alpha_convert_register_p (int regno, struct type *type)
210 {
211 return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31);
212 }
213
214 static void
215 alpha_register_to_value (struct frame_info *frame, int regnum,
216 struct type *valtype, void *out)
217 {
218 char in[MAX_REGISTER_SIZE];
219 frame_register_read (frame, regnum, in);
220 switch (TYPE_LENGTH (valtype))
221 {
222 case 4:
223 alpha_sts (out, in);
224 break;
225 case 8:
226 memcpy (out, in, 8);
227 break;
228 default:
229 error ("Cannot retrieve value from floating point register");
230 }
231 }
232
233 static void
234 alpha_value_to_register (struct frame_info *frame, int regnum,
235 struct type *valtype, const void *in)
236 {
237 char out[MAX_REGISTER_SIZE];
238 switch (TYPE_LENGTH (valtype))
239 {
240 case 4:
241 alpha_lds (out, in);
242 break;
243 case 8:
244 memcpy (out, in, 8);
245 break;
246 default:
247 error ("Cannot store value in floating point register");
248 }
249 put_frame_register (frame, regnum, out);
250 }
251
252 \f
253 /* The alpha passes the first six arguments in the registers, the rest on
254 the stack. The register arguments are stored in ARG_REG_BUFFER, and
255 then moved into the register file; this simplifies the passing of a
256 large struct which extends from the registers to the stack, plus avoids
257 three ptrace invocations per word.
258
259 We don't bother tracking which register values should go in integer
260 regs or fp regs; we load the same values into both.
261
262 If the called function is returning a structure, the address of the
263 structure to be returned is passed as a hidden first argument. */
264
265 static CORE_ADDR
266 alpha_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
267 struct regcache *regcache, CORE_ADDR bp_addr,
268 int nargs, struct value **args, CORE_ADDR sp,
269 int struct_return, CORE_ADDR struct_addr)
270 {
271 int i;
272 int accumulate_size = struct_return ? 8 : 0;
273 struct alpha_arg
274 {
275 char *contents;
276 int len;
277 int offset;
278 };
279 struct alpha_arg *alpha_args
280 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
281 register struct alpha_arg *m_arg;
282 char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
283 int required_arg_regs;
284
285 /* The ABI places the address of the called function in T12. */
286 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
287
288 /* Set the return address register to point to the entry point
289 of the program, where a breakpoint lies in wait. */
290 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
291
292 /* Lay out the arguments in memory. */
293 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
294 {
295 struct value *arg = args[i];
296 struct type *arg_type = check_typedef (VALUE_TYPE (arg));
297
298 /* Cast argument to long if necessary as the compiler does it too. */
299 switch (TYPE_CODE (arg_type))
300 {
301 case TYPE_CODE_INT:
302 case TYPE_CODE_BOOL:
303 case TYPE_CODE_CHAR:
304 case TYPE_CODE_RANGE:
305 case TYPE_CODE_ENUM:
306 if (TYPE_LENGTH (arg_type) == 4)
307 {
308 /* 32-bit values must be sign-extended to 64 bits
309 even if the base data type is unsigned. */
310 arg_type = builtin_type_int32;
311 arg = value_cast (arg_type, arg);
312 }
313 if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE)
314 {
315 arg_type = builtin_type_int64;
316 arg = value_cast (arg_type, arg);
317 }
318 break;
319
320 case TYPE_CODE_FLT:
321 /* "float" arguments loaded in registers must be passed in
322 register format, aka "double". */
323 if (accumulate_size < sizeof (arg_reg_buffer)
324 && TYPE_LENGTH (arg_type) == 4)
325 {
326 arg_type = builtin_type_ieee_double_little;
327 arg = value_cast (arg_type, arg);
328 }
329 /* Tru64 5.1 has a 128-bit long double, and passes this by
330 invisible reference. No one else uses this data type. */
331 else if (TYPE_LENGTH (arg_type) == 16)
332 {
333 /* Allocate aligned storage. */
334 sp = (sp & -16) - 16;
335
336 /* Write the real data into the stack. */
337 write_memory (sp, VALUE_CONTENTS (arg), 16);
338
339 /* Construct the indirection. */
340 arg_type = lookup_pointer_type (arg_type);
341 arg = value_from_pointer (arg_type, sp);
342 }
343 break;
344
345 case TYPE_CODE_COMPLEX:
346 /* ??? The ABI says that complex values are passed as two
347 separate scalar values. This distinction only matters
348 for complex float. However, GCC does not implement this. */
349
350 /* Tru64 5.1 has a 128-bit long double, and passes this by
351 invisible reference. */
352 if (TYPE_LENGTH (arg_type) == 32)
353 {
354 /* Allocate aligned storage. */
355 sp = (sp & -16) - 16;
356
357 /* Write the real data into the stack. */
358 write_memory (sp, VALUE_CONTENTS (arg), 32);
359
360 /* Construct the indirection. */
361 arg_type = lookup_pointer_type (arg_type);
362 arg = value_from_pointer (arg_type, sp);
363 }
364 break;
365
366 default:
367 break;
368 }
369 m_arg->len = TYPE_LENGTH (arg_type);
370 m_arg->offset = accumulate_size;
371 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
372 m_arg->contents = VALUE_CONTENTS (arg);
373 }
374
375 /* Determine required argument register loads, loading an argument register
376 is expensive as it uses three ptrace calls. */
377 required_arg_regs = accumulate_size / 8;
378 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
379 required_arg_regs = ALPHA_NUM_ARG_REGS;
380
381 /* Make room for the arguments on the stack. */
382 if (accumulate_size < sizeof(arg_reg_buffer))
383 accumulate_size = 0;
384 else
385 accumulate_size -= sizeof(arg_reg_buffer);
386 sp -= accumulate_size;
387
388 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
389 sp &= ~15;
390
391 /* `Push' arguments on the stack. */
392 for (i = nargs; m_arg--, --i >= 0;)
393 {
394 char *contents = m_arg->contents;
395 int offset = m_arg->offset;
396 int len = m_arg->len;
397
398 /* Copy the bytes destined for registers into arg_reg_buffer. */
399 if (offset < sizeof(arg_reg_buffer))
400 {
401 if (offset + len <= sizeof(arg_reg_buffer))
402 {
403 memcpy (arg_reg_buffer + offset, contents, len);
404 continue;
405 }
406 else
407 {
408 int tlen = sizeof(arg_reg_buffer) - offset;
409 memcpy (arg_reg_buffer + offset, contents, tlen);
410 offset += tlen;
411 contents += tlen;
412 len -= tlen;
413 }
414 }
415
416 /* Everything else goes to the stack. */
417 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
418 }
419 if (struct_return)
420 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr);
421
422 /* Load the argument registers. */
423 for (i = 0; i < required_arg_regs; i++)
424 {
425 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
426 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
427 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
428 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
429 }
430
431 /* Finally, update the stack pointer. */
432 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
433
434 return sp;
435 }
436
437 /* Extract from REGCACHE the value about to be returned from a function
438 and copy it into VALBUF. */
439
440 static void
441 alpha_extract_return_value (struct type *valtype, struct regcache *regcache,
442 void *valbuf)
443 {
444 int length = TYPE_LENGTH (valtype);
445 char raw_buffer[ALPHA_REGISTER_SIZE];
446 ULONGEST l;
447
448 switch (TYPE_CODE (valtype))
449 {
450 case TYPE_CODE_FLT:
451 switch (length)
452 {
453 case 4:
454 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer);
455 alpha_sts (valbuf, raw_buffer);
456 break;
457
458 case 8:
459 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
460 break;
461
462 case 16:
463 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
464 read_memory (l, valbuf, 16);
465 break;
466
467 default:
468 internal_error (__FILE__, __LINE__, "unknown floating point width");
469 }
470 break;
471
472 case TYPE_CODE_COMPLEX:
473 switch (length)
474 {
475 case 8:
476 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
477 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
478 break;
479
480 case 16:
481 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
482 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM+1,
483 (char *)valbuf + 8);
484 break;
485
486 case 32:
487 regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l);
488 read_memory (l, valbuf, 32);
489 break;
490
491 default:
492 internal_error (__FILE__, __LINE__, "unknown floating point width");
493 }
494 break;
495
496 default:
497 /* Assume everything else degenerates to an integer. */
498 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
499 store_unsigned_integer (valbuf, length, l);
500 break;
501 }
502 }
503
504 /* Extract from REGCACHE the address of a structure about to be returned
505 from a function. */
506
507 static CORE_ADDR
508 alpha_extract_struct_value_address (struct regcache *regcache)
509 {
510 ULONGEST addr;
511 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr);
512 return addr;
513 }
514
515 /* Insert the given value into REGCACHE as if it was being
516 returned by a function. */
517
518 static void
519 alpha_store_return_value (struct type *valtype, struct regcache *regcache,
520 const void *valbuf)
521 {
522 int length = TYPE_LENGTH (valtype);
523 char raw_buffer[ALPHA_REGISTER_SIZE];
524 ULONGEST l;
525
526 switch (TYPE_CODE (valtype))
527 {
528 case TYPE_CODE_FLT:
529 switch (length)
530 {
531 case 4:
532 alpha_lds (raw_buffer, valbuf);
533 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer);
534 break;
535
536 case 8:
537 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
538 break;
539
540 case 16:
541 /* FIXME: 128-bit long doubles are returned like structures:
542 by writing into indirect storage provided by the caller
543 as the first argument. */
544 error ("Cannot set a 128-bit long double return value.");
545
546 default:
547 internal_error (__FILE__, __LINE__, "unknown floating point width");
548 }
549 break;
550
551 case TYPE_CODE_COMPLEX:
552 switch (length)
553 {
554 case 8:
555 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
556 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
557 break;
558
559 case 16:
560 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
561 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM+1,
562 (const char *)valbuf + 8);
563 break;
564
565 case 32:
566 /* FIXME: 128-bit long doubles are returned like structures:
567 by writing into indirect storage provided by the caller
568 as the first argument. */
569 error ("Cannot set a 128-bit long double return value.");
570
571 default:
572 internal_error (__FILE__, __LINE__, "unknown floating point width");
573 }
574 break;
575
576 default:
577 /* Assume everything else degenerates to an integer. */
578 /* 32-bit values must be sign-extended to 64 bits
579 even if the base data type is unsigned. */
580 if (length == 4)
581 valtype = builtin_type_int32;
582 l = unpack_long (valtype, valbuf);
583 regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l);
584 break;
585 }
586 }
587
588 \f
589 static const unsigned char *
590 alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
591 {
592 static const unsigned char alpha_breakpoint[] =
593 { 0x80, 0, 0, 0 }; /* call_pal bpt */
594
595 *lenptr = sizeof(alpha_breakpoint);
596 return (alpha_breakpoint);
597 }
598
599 \f
600 /* This returns the PC of the first insn after the prologue.
601 If we can't find the prologue, then return 0. */
602
603 CORE_ADDR
604 alpha_after_prologue (CORE_ADDR pc)
605 {
606 struct symtab_and_line sal;
607 CORE_ADDR func_addr, func_end;
608
609 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
610 return 0;
611
612 sal = find_pc_line (func_addr, 0);
613 if (sal.end < func_end)
614 return sal.end;
615
616 /* The line after the prologue is after the end of the function. In this
617 case, tell the caller to find the prologue the hard way. */
618 return 0;
619 }
620
621 /* Read an instruction from memory at PC, looking through breakpoints. */
622
623 unsigned int
624 alpha_read_insn (CORE_ADDR pc)
625 {
626 char buf[4];
627 int status;
628
629 status = read_memory_nobpt (pc, buf, 4);
630 if (status)
631 memory_error (status, pc);
632 return extract_unsigned_integer (buf, 4);
633 }
634
635 /* To skip prologues, I use this predicate. Returns either PC itself
636 if the code at PC does not look like a function prologue; otherwise
637 returns an address that (if we're lucky) follows the prologue. If
638 LENIENT, then we must skip everything which is involved in setting
639 up the frame (it's OK to skip more, just so long as we don't skip
640 anything which might clobber the registers which are being saved. */
641
642 static CORE_ADDR
643 alpha_skip_prologue (CORE_ADDR pc)
644 {
645 unsigned long inst;
646 int offset;
647 CORE_ADDR post_prologue_pc;
648 char buf[4];
649
650 /* Silently return the unaltered pc upon memory errors.
651 This could happen on OSF/1 if decode_line_1 tries to skip the
652 prologue for quickstarted shared library functions when the
653 shared library is not yet mapped in.
654 Reading target memory is slow over serial lines, so we perform
655 this check only if the target has shared libraries (which all
656 Alpha targets do). */
657 if (target_read_memory (pc, buf, 4))
658 return pc;
659
660 /* See if we can determine the end of the prologue via the symbol table.
661 If so, then return either PC, or the PC after the prologue, whichever
662 is greater. */
663
664 post_prologue_pc = alpha_after_prologue (pc);
665 if (post_prologue_pc != 0)
666 return max (pc, post_prologue_pc);
667
668 /* Can't determine prologue from the symbol table, need to examine
669 instructions. */
670
671 /* Skip the typical prologue instructions. These are the stack adjustment
672 instruction and the instructions that save registers on the stack
673 or in the gcc frame. */
674 for (offset = 0; offset < 100; offset += 4)
675 {
676 inst = alpha_read_insn (pc + offset);
677
678 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
679 continue;
680 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
681 continue;
682 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
683 continue;
684 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
685 continue;
686
687 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
688 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
689 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
690 continue;
691
692 if (inst == 0x47de040f) /* bis sp,sp,fp */
693 continue;
694 if (inst == 0x47fe040f) /* bis zero,sp,fp */
695 continue;
696
697 break;
698 }
699 return pc + offset;
700 }
701
702 \f
703 /* Figure out where the longjmp will land.
704 We expect the first arg to be a pointer to the jmp_buf structure from
705 which we extract the PC (JB_PC) that we will land at. The PC is copied
706 into the "pc". This routine returns true on success. */
707
708 static int
709 alpha_get_longjmp_target (CORE_ADDR *pc)
710 {
711 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
712 CORE_ADDR jb_addr;
713 char raw_buffer[ALPHA_REGISTER_SIZE];
714
715 jb_addr = read_register (ALPHA_A0_REGNUM);
716
717 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
718 raw_buffer, tdep->jb_elt_size))
719 return 0;
720
721 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size);
722 return 1;
723 }
724
725 \f
726 /* Frame unwinder for signal trampolines. We use alpha tdep bits that
727 describe the location and shape of the sigcontext structure. After
728 that, all registers are in memory, so it's easy. */
729 /* ??? Shouldn't we be able to do this generically, rather than with
730 OSABI data specific to Alpha? */
731
732 struct alpha_sigtramp_unwind_cache
733 {
734 CORE_ADDR sigcontext_addr;
735 };
736
737 static struct alpha_sigtramp_unwind_cache *
738 alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
739 void **this_prologue_cache)
740 {
741 struct alpha_sigtramp_unwind_cache *info;
742 struct gdbarch_tdep *tdep;
743
744 if (*this_prologue_cache)
745 return *this_prologue_cache;
746
747 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
748 *this_prologue_cache = info;
749
750 tdep = gdbarch_tdep (current_gdbarch);
751 info->sigcontext_addr = tdep->sigcontext_addr (next_frame);
752
753 return info;
754 }
755
756 /* Return the address of REGNUM in a sigtramp frame. Since this is
757 all arithmetic, it doesn't seem worthwhile to cache it. */
758
759 static CORE_ADDR
760 alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, int regnum)
761 {
762 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
763
764 if (regnum >= 0 && regnum < 32)
765 return sigcontext_addr + tdep->sc_regs_offset + regnum * 8;
766 else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32)
767 return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8;
768 else if (regnum == ALPHA_PC_REGNUM)
769 return sigcontext_addr + tdep->sc_pc_offset;
770
771 return 0;
772 }
773
774 /* Given a GDB frame, determine the address of the calling function's
775 frame. This will be used to create a new GDB frame struct. */
776
777 static void
778 alpha_sigtramp_frame_this_id (struct frame_info *next_frame,
779 void **this_prologue_cache,
780 struct frame_id *this_id)
781 {
782 struct alpha_sigtramp_unwind_cache *info
783 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
784 struct gdbarch_tdep *tdep;
785 CORE_ADDR stack_addr, code_addr;
786
787 /* If the OSABI couldn't locate the sigcontext, give up. */
788 if (info->sigcontext_addr == 0)
789 return;
790
791 /* If we have dynamic signal trampolines, find their start.
792 If we do not, then we must assume there is a symbol record
793 that can provide the start address. */
794 tdep = gdbarch_tdep (current_gdbarch);
795 if (tdep->dynamic_sigtramp_offset)
796 {
797 int offset;
798 code_addr = frame_pc_unwind (next_frame);
799 offset = tdep->dynamic_sigtramp_offset (code_addr);
800 if (offset >= 0)
801 code_addr -= offset;
802 else
803 code_addr = 0;
804 }
805 else
806 code_addr = frame_func_unwind (next_frame);
807
808 /* The stack address is trivially read from the sigcontext. */
809 stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr,
810 ALPHA_SP_REGNUM);
811 stack_addr = get_frame_memory_unsigned (next_frame, stack_addr,
812 ALPHA_REGISTER_SIZE);
813
814 *this_id = frame_id_build (stack_addr, code_addr);
815 }
816
817 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
818
819 static void
820 alpha_sigtramp_frame_prev_register (struct frame_info *next_frame,
821 void **this_prologue_cache,
822 int regnum, int *optimizedp,
823 enum lval_type *lvalp, CORE_ADDR *addrp,
824 int *realnump, void *bufferp)
825 {
826 struct alpha_sigtramp_unwind_cache *info
827 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
828 CORE_ADDR addr;
829
830 if (info->sigcontext_addr != 0)
831 {
832 /* All integer and fp registers are stored in memory. */
833 addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum);
834 if (addr != 0)
835 {
836 *optimizedp = 0;
837 *lvalp = lval_memory;
838 *addrp = addr;
839 *realnump = -1;
840 if (bufferp != NULL)
841 get_frame_memory (next_frame, addr, bufferp, ALPHA_REGISTER_SIZE);
842 return;
843 }
844 }
845
846 /* This extra register may actually be in the sigcontext, but our
847 current description of it in alpha_sigtramp_frame_unwind_cache
848 doesn't include it. Too bad. Fall back on whatever's in the
849 outer frame. */
850 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
851 realnump, bufferp);
852 }
853
854 static const struct frame_unwind alpha_sigtramp_frame_unwind = {
855 SIGTRAMP_FRAME,
856 alpha_sigtramp_frame_this_id,
857 alpha_sigtramp_frame_prev_register
858 };
859
860 static const struct frame_unwind *
861 alpha_sigtramp_frame_p (CORE_ADDR pc)
862 {
863 char *name;
864
865 /* We shouldn't even bother to try if the OSABI didn't register
866 a sigcontext_addr handler. */
867 if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr)
868 return NULL;
869
870 /* Otherwise we should be in a signal frame. */
871 find_pc_partial_function (pc, &name, NULL, NULL);
872 if (PC_IN_SIGTRAMP (pc, name))
873 return &alpha_sigtramp_frame_unwind;
874
875 return NULL;
876 }
877 \f
878 /* Fallback alpha frame unwinder. Uses instruction scanning and knows
879 something about the traditional layout of alpha stack frames. */
880
881 struct alpha_heuristic_unwind_cache
882 {
883 CORE_ADDR *saved_regs;
884 CORE_ADDR vfp;
885 CORE_ADDR start_pc;
886 int return_reg;
887 };
888
889 /* Heuristic_proc_start may hunt through the text section for a long
890 time across a 2400 baud serial line. Allows the user to limit this
891 search. */
892 static unsigned int heuristic_fence_post = 0;
893
894 /* Attempt to locate the start of the function containing PC. We assume that
895 the previous function ends with an about_to_return insn. Not foolproof by
896 any means, since gcc is happy to put the epilogue in the middle of a
897 function. But we're guessing anyway... */
898
899 static CORE_ADDR
900 alpha_heuristic_proc_start (CORE_ADDR pc)
901 {
902 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
903 CORE_ADDR last_non_nop = pc;
904 CORE_ADDR fence = pc - heuristic_fence_post;
905 CORE_ADDR orig_pc = pc;
906 CORE_ADDR func;
907
908 if (pc == 0)
909 return 0;
910
911 /* First see if we can find the start of the function from minimal
912 symbol information. This can succeed with a binary that doesn't
913 have debug info, but hasn't been stripped. */
914 func = get_pc_function_start (pc);
915 if (func)
916 return func;
917
918 if (heuristic_fence_post == UINT_MAX
919 || fence < tdep->vm_min_address)
920 fence = tdep->vm_min_address;
921
922 /* Search back for previous return; also stop at a 0, which might be
923 seen for instance before the start of a code section. Don't include
924 nops, since this usually indicates padding between functions. */
925 for (pc -= 4; pc >= fence; pc -= 4)
926 {
927 unsigned int insn = alpha_read_insn (pc);
928 switch (insn)
929 {
930 case 0: /* invalid insn */
931 case 0x6bfa8001: /* ret $31,($26),1 */
932 return last_non_nop;
933
934 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
935 case 0x47ff041f: /* nop: bis $31,$31,$31 */
936 break;
937
938 default:
939 last_non_nop = pc;
940 break;
941 }
942 }
943
944 /* It's not clear to me why we reach this point when stopping quietly,
945 but with this test, at least we don't print out warnings for every
946 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
947 if (stop_soon == NO_STOP_QUIETLY)
948 {
949 static int blurb_printed = 0;
950
951 if (fence == tdep->vm_min_address)
952 warning ("Hit beginning of text section without finding");
953 else
954 warning ("Hit heuristic-fence-post without finding");
955 warning ("enclosing function for address 0x%s", paddr_nz (orig_pc));
956
957 if (!blurb_printed)
958 {
959 printf_filtered ("\
960 This warning occurs if you are debugging a function without any symbols\n\
961 (for example, in a stripped executable). In that case, you may wish to\n\
962 increase the size of the search with the `set heuristic-fence-post' command.\n\
963 \n\
964 Otherwise, you told GDB there was a function where there isn't one, or\n\
965 (more likely) you have encountered a bug in GDB.\n");
966 blurb_printed = 1;
967 }
968 }
969
970 return 0;
971 }
972
973 static struct alpha_heuristic_unwind_cache *
974 alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame,
975 void **this_prologue_cache,
976 CORE_ADDR start_pc)
977 {
978 struct alpha_heuristic_unwind_cache *info;
979 ULONGEST val;
980 CORE_ADDR limit_pc, cur_pc;
981 int frame_reg, frame_size, return_reg, reg;
982
983 if (*this_prologue_cache)
984 return *this_prologue_cache;
985
986 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
987 *this_prologue_cache = info;
988 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS);
989
990 limit_pc = frame_pc_unwind (next_frame);
991 if (start_pc == 0)
992 start_pc = alpha_heuristic_proc_start (limit_pc);
993 info->start_pc = start_pc;
994
995 frame_reg = ALPHA_SP_REGNUM;
996 frame_size = 0;
997 return_reg = -1;
998
999 /* If we've identified a likely place to start, do code scanning. */
1000 if (start_pc != 0)
1001 {
1002 /* Limit the forward search to 50 instructions. */
1003 if (start_pc + 200 < limit_pc)
1004 limit_pc = start_pc + 200;
1005
1006 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4)
1007 {
1008 unsigned int word = alpha_read_insn (cur_pc);
1009
1010 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
1011 {
1012 if (word & 0x8000)
1013 {
1014 /* Consider only the first stack allocation instruction
1015 to contain the static size of the frame. */
1016 if (frame_size == 0)
1017 frame_size = (-word) & 0xffff;
1018 }
1019 else
1020 {
1021 /* Exit loop if a positive stack adjustment is found, which
1022 usually means that the stack cleanup code in the function
1023 epilogue is reached. */
1024 break;
1025 }
1026 }
1027 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1028 {
1029 reg = (word & 0x03e00000) >> 21;
1030
1031 if (reg == 31)
1032 continue;
1033
1034 /* Do not compute the address where the register was saved yet,
1035 because we don't know yet if the offset will need to be
1036 relative to $sp or $fp (we can not compute the address
1037 relative to $sp if $sp is updated during the execution of
1038 the current subroutine, for instance when doing some alloca).
1039 So just store the offset for the moment, and compute the
1040 address later when we know whether this frame has a frame
1041 pointer or not. */
1042 /* Hack: temporarily add one, so that the offset is non-zero
1043 and we can tell which registers have save offsets below. */
1044 info->saved_regs[reg] = (word & 0xffff) + 1;
1045
1046 /* Starting with OSF/1-3.2C, the system libraries are shipped
1047 without local symbols, but they still contain procedure
1048 descriptors without a symbol reference. GDB is currently
1049 unable to find these procedure descriptors and uses
1050 heuristic_proc_desc instead.
1051 As some low level compiler support routines (__div*, __add*)
1052 use a non-standard return address register, we have to
1053 add some heuristics to determine the return address register,
1054 or stepping over these routines will fail.
1055 Usually the return address register is the first register
1056 saved on the stack, but assembler optimization might
1057 rearrange the register saves.
1058 So we recognize only a few registers (t7, t9, ra) within
1059 the procedure prologue as valid return address registers.
1060 If we encounter a return instruction, we extract the
1061 the return address register from it.
1062
1063 FIXME: Rewriting GDB to access the procedure descriptors,
1064 e.g. via the minimal symbol table, might obviate this hack. */
1065 if (return_reg == -1
1066 && cur_pc < (start_pc + 80)
1067 && (reg == ALPHA_T7_REGNUM
1068 || reg == ALPHA_T9_REGNUM
1069 || reg == ALPHA_RA_REGNUM))
1070 return_reg = reg;
1071 }
1072 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1073 return_reg = (word >> 16) & 0x1f;
1074 else if (word == 0x47de040f) /* bis sp,sp,fp */
1075 frame_reg = ALPHA_GCC_FP_REGNUM;
1076 else if (word == 0x47fe040f) /* bis zero,sp,fp */
1077 frame_reg = ALPHA_GCC_FP_REGNUM;
1078 }
1079
1080 /* If we haven't found a valid return address register yet, keep
1081 searching in the procedure prologue. */
1082 if (return_reg == -1)
1083 {
1084 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
1085 {
1086 unsigned int word = alpha_read_insn (cur_pc);
1087
1088 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1089 {
1090 reg = (word & 0x03e00000) >> 21;
1091 if (reg == ALPHA_T7_REGNUM
1092 || reg == ALPHA_T9_REGNUM
1093 || reg == ALPHA_RA_REGNUM)
1094 {
1095 return_reg = reg;
1096 break;
1097 }
1098 }
1099 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1100 {
1101 return_reg = (word >> 16) & 0x1f;
1102 break;
1103 }
1104
1105 cur_pc += 4;
1106 }
1107 }
1108 }
1109
1110 /* Failing that, do default to the customary RA. */
1111 if (return_reg == -1)
1112 return_reg = ALPHA_RA_REGNUM;
1113 info->return_reg = return_reg;
1114
1115 frame_unwind_unsigned_register (next_frame, frame_reg, &val);
1116 info->vfp = val + frame_size;
1117
1118 /* Convert offsets to absolute addresses. See above about adding
1119 one to the offsets to make all detected offsets non-zero. */
1120 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
1121 if (info->saved_regs[reg])
1122 info->saved_regs[reg] += val - 1;
1123
1124 return info;
1125 }
1126
1127 /* Given a GDB frame, determine the address of the calling function's
1128 frame. This will be used to create a new GDB frame struct. */
1129
1130 static void
1131 alpha_heuristic_frame_this_id (struct frame_info *next_frame,
1132 void **this_prologue_cache,
1133 struct frame_id *this_id)
1134 {
1135 struct alpha_heuristic_unwind_cache *info
1136 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
1137
1138 /* This is meant to halt the backtrace at "_start". Make sure we
1139 don't halt it at a generic dummy frame. */
1140 if (inside_entry_file (info->start_pc))
1141 return;
1142
1143 *this_id = frame_id_build (info->vfp, info->start_pc);
1144 }
1145
1146 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
1147
1148 static void
1149 alpha_heuristic_frame_prev_register (struct frame_info *next_frame,
1150 void **this_prologue_cache,
1151 int regnum, int *optimizedp,
1152 enum lval_type *lvalp, CORE_ADDR *addrp,
1153 int *realnump, void *bufferp)
1154 {
1155 struct alpha_heuristic_unwind_cache *info
1156 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
1157
1158 /* The PC of the previous frame is stored in the link register of
1159 the current frame. Frob regnum so that we pull the value from
1160 the correct place. */
1161 if (regnum == ALPHA_PC_REGNUM)
1162 regnum = info->return_reg;
1163
1164 /* For all registers known to be saved in the current frame,
1165 do the obvious and pull the value out. */
1166 if (info->saved_regs[regnum])
1167 {
1168 *optimizedp = 0;
1169 *lvalp = lval_memory;
1170 *addrp = info->saved_regs[regnum];
1171 *realnump = -1;
1172 if (bufferp != NULL)
1173 get_frame_memory (next_frame, *addrp, bufferp, ALPHA_REGISTER_SIZE);
1174 return;
1175 }
1176
1177 /* The stack pointer of the previous frame is computed by popping
1178 the current stack frame. */
1179 if (regnum == ALPHA_SP_REGNUM)
1180 {
1181 *optimizedp = 0;
1182 *lvalp = not_lval;
1183 *addrp = 0;
1184 *realnump = -1;
1185 if (bufferp != NULL)
1186 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp);
1187 return;
1188 }
1189
1190 /* Otherwise assume the next frame has the same register value. */
1191 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
1192 realnump, bufferp);
1193 }
1194
1195 static const struct frame_unwind alpha_heuristic_frame_unwind = {
1196 NORMAL_FRAME,
1197 alpha_heuristic_frame_this_id,
1198 alpha_heuristic_frame_prev_register
1199 };
1200
1201 static const struct frame_unwind *
1202 alpha_heuristic_frame_p (CORE_ADDR pc)
1203 {
1204 return &alpha_heuristic_frame_unwind;
1205 }
1206
1207 static CORE_ADDR
1208 alpha_heuristic_frame_base_address (struct frame_info *next_frame,
1209 void **this_prologue_cache)
1210 {
1211 struct alpha_heuristic_unwind_cache *info
1212 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
1213
1214 return info->vfp;
1215 }
1216
1217 static const struct frame_base alpha_heuristic_frame_base = {
1218 &alpha_heuristic_frame_unwind,
1219 alpha_heuristic_frame_base_address,
1220 alpha_heuristic_frame_base_address,
1221 alpha_heuristic_frame_base_address
1222 };
1223
1224 /* Just like reinit_frame_cache, but with the right arguments to be
1225 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
1226
1227 static void
1228 reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
1229 {
1230 reinit_frame_cache ();
1231 }
1232
1233 \f
1234 /* ALPHA stack frames are almost impenetrable. When execution stops,
1235 we basically have to look at symbol information for the function
1236 that we stopped in, which tells us *which* register (if any) is
1237 the base of the frame pointer, and what offset from that register
1238 the frame itself is at.
1239
1240 This presents a problem when trying to examine a stack in memory
1241 (that isn't executing at the moment), using the "frame" command. We
1242 don't have a PC, nor do we have any registers except SP.
1243
1244 This routine takes two arguments, SP and PC, and tries to make the
1245 cached frames look as if these two arguments defined a frame on the
1246 cache. This allows the rest of info frame to extract the important
1247 arguments without difficulty. */
1248
1249 struct frame_info *
1250 alpha_setup_arbitrary_frame (int argc, CORE_ADDR *argv)
1251 {
1252 if (argc != 2)
1253 error ("ALPHA frame specifications require two arguments: sp and pc");
1254
1255 return create_new_frame (argv[0], argv[1]);
1256 }
1257
1258 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1259 dummy frame. The frame ID's base needs to match the TOS value
1260 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1261 breakpoint. */
1262
1263 static struct frame_id
1264 alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
1265 {
1266 ULONGEST base;
1267 frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base);
1268 return frame_id_build (base, frame_pc_unwind (next_frame));
1269 }
1270
1271 static CORE_ADDR
1272 alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1273 {
1274 ULONGEST pc;
1275 frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc);
1276 return pc;
1277 }
1278
1279 \f
1280 /* Helper routines for alpha*-nat.c files to move register sets to and
1281 from core files. The UNIQUE pointer is allowed to be NULL, as most
1282 targets don't supply this value in their core files. */
1283
1284 void
1285 alpha_supply_int_regs (int regno, const void *r0_r30,
1286 const void *pc, const void *unique)
1287 {
1288 int i;
1289
1290 for (i = 0; i < 31; ++i)
1291 if (regno == i || regno == -1)
1292 supply_register (i, (const char *)r0_r30 + i*8);
1293
1294 if (regno == ALPHA_ZERO_REGNUM || regno == -1)
1295 supply_register (ALPHA_ZERO_REGNUM, NULL);
1296
1297 if (regno == ALPHA_PC_REGNUM || regno == -1)
1298 supply_register (ALPHA_PC_REGNUM, pc);
1299
1300 if (regno == ALPHA_UNIQUE_REGNUM || regno == -1)
1301 supply_register (ALPHA_UNIQUE_REGNUM, unique);
1302 }
1303
1304 void
1305 alpha_fill_int_regs (int regno, void *r0_r30, void *pc, void *unique)
1306 {
1307 int i;
1308
1309 for (i = 0; i < 31; ++i)
1310 if (regno == i || regno == -1)
1311 regcache_collect (i, (char *)r0_r30 + i*8);
1312
1313 if (regno == ALPHA_PC_REGNUM || regno == -1)
1314 regcache_collect (ALPHA_PC_REGNUM, pc);
1315
1316 if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1))
1317 regcache_collect (ALPHA_UNIQUE_REGNUM, unique);
1318 }
1319
1320 void
1321 alpha_supply_fp_regs (int regno, const void *f0_f30, const void *fpcr)
1322 {
1323 int i;
1324
1325 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1326 if (regno == i || regno == -1)
1327 supply_register (i, (const char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8);
1328
1329 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1330 supply_register (ALPHA_FPCR_REGNUM, fpcr);
1331 }
1332
1333 void
1334 alpha_fill_fp_regs (int regno, void *f0_f30, void *fpcr)
1335 {
1336 int i;
1337
1338 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1339 if (regno == i || regno == -1)
1340 regcache_collect (i, (char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8);
1341
1342 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1343 regcache_collect (ALPHA_FPCR_REGNUM, fpcr);
1344 }
1345
1346 \f
1347 /* alpha_software_single_step() is called just before we want to resume
1348 the inferior, if we want to single-step it but there is no hardware
1349 or kernel single-step support (NetBSD on Alpha, for example). We find
1350 the target of the coming instruction and breakpoint it.
1351
1352 single_step is also called just after the inferior stops. If we had
1353 set up a simulated single-step, we undo our damage. */
1354
1355 static CORE_ADDR
1356 alpha_next_pc (CORE_ADDR pc)
1357 {
1358 unsigned int insn;
1359 unsigned int op;
1360 int offset;
1361 LONGEST rav;
1362
1363 insn = alpha_read_insn (pc);
1364
1365 /* Opcode is top 6 bits. */
1366 op = (insn >> 26) & 0x3f;
1367
1368 if (op == 0x1a)
1369 {
1370 /* Jump format: target PC is:
1371 RB & ~3 */
1372 return (read_register ((insn >> 16) & 0x1f) & ~3);
1373 }
1374
1375 if ((op & 0x30) == 0x30)
1376 {
1377 /* Branch format: target PC is:
1378 (new PC) + (4 * sext(displacement)) */
1379 if (op == 0x30 || /* BR */
1380 op == 0x34) /* BSR */
1381 {
1382 branch_taken:
1383 offset = (insn & 0x001fffff);
1384 if (offset & 0x00100000)
1385 offset |= 0xffe00000;
1386 offset *= 4;
1387 return (pc + 4 + offset);
1388 }
1389
1390 /* Need to determine if branch is taken; read RA. */
1391 rav = (LONGEST) read_register ((insn >> 21) & 0x1f);
1392 switch (op)
1393 {
1394 case 0x38: /* BLBC */
1395 if ((rav & 1) == 0)
1396 goto branch_taken;
1397 break;
1398 case 0x3c: /* BLBS */
1399 if (rav & 1)
1400 goto branch_taken;
1401 break;
1402 case 0x39: /* BEQ */
1403 if (rav == 0)
1404 goto branch_taken;
1405 break;
1406 case 0x3d: /* BNE */
1407 if (rav != 0)
1408 goto branch_taken;
1409 break;
1410 case 0x3a: /* BLT */
1411 if (rav < 0)
1412 goto branch_taken;
1413 break;
1414 case 0x3b: /* BLE */
1415 if (rav <= 0)
1416 goto branch_taken;
1417 break;
1418 case 0x3f: /* BGT */
1419 if (rav > 0)
1420 goto branch_taken;
1421 break;
1422 case 0x3e: /* BGE */
1423 if (rav >= 0)
1424 goto branch_taken;
1425 break;
1426
1427 /* ??? Missing floating-point branches. */
1428 }
1429 }
1430
1431 /* Not a branch or branch not taken; target PC is:
1432 pc + 4 */
1433 return (pc + 4);
1434 }
1435
1436 void
1437 alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p)
1438 {
1439 static CORE_ADDR next_pc;
1440 typedef char binsn_quantum[BREAKPOINT_MAX];
1441 static binsn_quantum break_mem;
1442 CORE_ADDR pc;
1443
1444 if (insert_breakpoints_p)
1445 {
1446 pc = read_pc ();
1447 next_pc = alpha_next_pc (pc);
1448
1449 target_insert_breakpoint (next_pc, break_mem);
1450 }
1451 else
1452 {
1453 target_remove_breakpoint (next_pc, break_mem);
1454 write_pc (next_pc);
1455 }
1456 }
1457
1458 \f
1459 /* Initialize the current architecture based on INFO. If possible, re-use an
1460 architecture from ARCHES, which is a list of architectures already created
1461 during this debugging session.
1462
1463 Called e.g. at program startup, when reading a core file, and when reading
1464 a binary file. */
1465
1466 static struct gdbarch *
1467 alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1468 {
1469 struct gdbarch_tdep *tdep;
1470 struct gdbarch *gdbarch;
1471
1472 /* Try to determine the ABI of the object we are loading. */
1473 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
1474 {
1475 /* If it's an ECOFF file, assume it's OSF/1. */
1476 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
1477 info.osabi = GDB_OSABI_OSF1;
1478 }
1479
1480 /* Find a candidate among extant architectures. */
1481 arches = gdbarch_list_lookup_by_info (arches, &info);
1482 if (arches != NULL)
1483 return arches->gdbarch;
1484
1485 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1486 gdbarch = gdbarch_alloc (&info, tdep);
1487
1488 /* Lowest text address. This is used by heuristic_proc_start()
1489 to decide when to stop looking. */
1490 tdep->vm_min_address = (CORE_ADDR) 0x120000000;
1491
1492 tdep->dynamic_sigtramp_offset = NULL;
1493 tdep->sigcontext_addr = NULL;
1494 tdep->sc_pc_offset = 2 * 8;
1495 tdep->sc_regs_offset = 4 * 8;
1496 tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8;
1497
1498 tdep->jb_pc = -1; /* longjmp support not enabled by default */
1499
1500 /* Type sizes */
1501 set_gdbarch_short_bit (gdbarch, 16);
1502 set_gdbarch_int_bit (gdbarch, 32);
1503 set_gdbarch_long_bit (gdbarch, 64);
1504 set_gdbarch_long_long_bit (gdbarch, 64);
1505 set_gdbarch_float_bit (gdbarch, 32);
1506 set_gdbarch_double_bit (gdbarch, 64);
1507 set_gdbarch_long_double_bit (gdbarch, 64);
1508 set_gdbarch_ptr_bit (gdbarch, 64);
1509
1510 /* Register info */
1511 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1512 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
1513 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1514 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1515
1516 set_gdbarch_register_name (gdbarch, alpha_register_name);
1517 set_gdbarch_deprecated_register_byte (gdbarch, alpha_register_byte);
1518 set_gdbarch_deprecated_register_raw_size (gdbarch, alpha_register_raw_size);
1519 set_gdbarch_deprecated_register_virtual_size (gdbarch, alpha_register_virtual_size);
1520 set_gdbarch_register_type (gdbarch, alpha_register_type);
1521
1522 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1523 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1524
1525 set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p);
1526 set_gdbarch_register_to_value (gdbarch, alpha_register_to_value);
1527 set_gdbarch_value_to_register (gdbarch, alpha_value_to_register);
1528
1529 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p);
1530
1531 /* Prologue heuristics. */
1532 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1533
1534 /* Disassembler. */
1535 set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1536
1537 /* Call info. */
1538 set_gdbarch_frameless_function_invocation (gdbarch,
1539 generic_frameless_function_invocation_not);
1540
1541 set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention);
1542 set_gdbarch_extract_return_value (gdbarch, alpha_extract_return_value);
1543 set_gdbarch_store_return_value (gdbarch, alpha_store_return_value);
1544 set_gdbarch_extract_struct_value_address (gdbarch,
1545 alpha_extract_struct_value_address);
1546
1547 /* Settings for calling functions in the inferior. */
1548 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
1549
1550 /* Methods for saving / extracting a dummy frame's ID. */
1551 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id);
1552
1553 /* Return the unwound PC value. */
1554 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
1555
1556 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1557 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
1558
1559 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
1560 set_gdbarch_decr_pc_after_break (gdbarch, 4);
1561
1562 set_gdbarch_function_start_offset (gdbarch, 0);
1563 set_gdbarch_frame_args_skip (gdbarch, 0);
1564
1565 /* Hook in ABI-specific overrides, if they have been registered. */
1566 gdbarch_init_osabi (info, gdbarch);
1567
1568 /* Now that we have tuned the configuration, set a few final things
1569 based on what the OS ABI has told us. */
1570
1571 if (tdep->jb_pc >= 0)
1572 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1573
1574 frame_unwind_append_predicate (gdbarch, alpha_sigtramp_frame_p);
1575 frame_unwind_append_predicate (gdbarch, alpha_heuristic_frame_p);
1576
1577 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
1578
1579 return gdbarch;
1580 }
1581
1582 void
1583 alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1584 {
1585 frame_unwind_append_predicate (gdbarch, dwarf2_frame_p);
1586 frame_base_append_predicate (gdbarch, dwarf2_frame_base_p);
1587 set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info);
1588 }
1589
1590 extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */
1591
1592 void
1593 _initialize_alpha_tdep (void)
1594 {
1595 struct cmd_list_element *c;
1596
1597 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
1598
1599 /* Let the user set the fence post for heuristic_proc_start. */
1600
1601 /* We really would like to have both "0" and "unlimited" work, but
1602 command.c doesn't deal with that. So make it a var_zinteger
1603 because the user can always use "999999" or some such for unlimited. */
1604 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
1605 (char *) &heuristic_fence_post,
1606 "\
1607 Set the distance searched for the start of a function.\n\
1608 If you are debugging a stripped executable, GDB needs to search through the\n\
1609 program for the start of a function. This command sets the distance of the\n\
1610 search. The only need to set it is when debugging a stripped executable.",
1611 &setlist);
1612 /* We need to throw away the frame cache when we set this, since it
1613 might change our ability to get backtraces. */
1614 set_cmd_sfunc (c, reinit_frame_cache_sfunc);
1615 add_show_from_set (c, &showlist);
1616 }
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