* minsyms.c: Include "target.h".
[deliverable/binutils-gdb.git] / gdb / alpha-tdep.c
1 /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
2
3 Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
4 2003, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #include "defs.h"
22 #include "doublest.h"
23 #include "frame.h"
24 #include "frame-unwind.h"
25 #include "frame-base.h"
26 #include "dwarf2-frame.h"
27 #include "inferior.h"
28 #include "symtab.h"
29 #include "value.h"
30 #include "gdbcmd.h"
31 #include "gdbcore.h"
32 #include "dis-asm.h"
33 #include "symfile.h"
34 #include "objfiles.h"
35 #include "gdb_string.h"
36 #include "linespec.h"
37 #include "regcache.h"
38 #include "reggroups.h"
39 #include "arch-utils.h"
40 #include "osabi.h"
41 #include "block.h"
42 #include "infcall.h"
43 #include "trad-frame.h"
44
45 #include "elf-bfd.h"
46
47 #include "alpha-tdep.h"
48
49 \f
50 /* Return the name of the REGNO register.
51
52 An empty name corresponds to a register number that used to
53 be used for a virtual register. That virtual register has
54 been removed, but the index is still reserved to maintain
55 compatibility with existing remote alpha targets. */
56
57 static const char *
58 alpha_register_name (struct gdbarch *gdbarch, int regno)
59 {
60 static const char * const register_names[] =
61 {
62 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
63 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
64 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
65 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
66 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
67 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
68 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
69 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
70 "pc", "", "unique"
71 };
72
73 if (regno < 0)
74 return NULL;
75 if (regno >= ARRAY_SIZE(register_names))
76 return NULL;
77 return register_names[regno];
78 }
79
80 static int
81 alpha_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
82 {
83 return (regno == ALPHA_ZERO_REGNUM
84 || strlen (alpha_register_name (gdbarch, regno)) == 0);
85 }
86
87 static int
88 alpha_cannot_store_register (struct gdbarch *gdbarch, int regno)
89 {
90 return (regno == ALPHA_ZERO_REGNUM
91 || strlen (alpha_register_name (gdbarch, regno)) == 0);
92 }
93
94 static struct type *
95 alpha_register_type (struct gdbarch *gdbarch, int regno)
96 {
97 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
98 return builtin_type_void_data_ptr;
99 if (regno == ALPHA_PC_REGNUM)
100 return builtin_type_void_func_ptr;
101
102 /* Don't need to worry about little vs big endian until
103 some jerk tries to port to alpha-unicosmk. */
104 if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31)
105 return builtin_type_ieee_double;
106
107 return builtin_type_int64;
108 }
109
110 /* Is REGNUM a member of REGGROUP? */
111
112 static int
113 alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
114 struct reggroup *group)
115 {
116 /* Filter out any registers eliminated, but whose regnum is
117 reserved for backward compatibility, e.g. the vfp. */
118 if (gdbarch_register_name (gdbarch, regnum) == NULL
119 || *gdbarch_register_name (gdbarch, regnum) == '\0')
120 return 0;
121
122 if (group == all_reggroup)
123 return 1;
124
125 /* Zero should not be saved or restored. Technically it is a general
126 register (just as $f31 would be a float if we represented it), but
127 there's no point displaying it during "info regs", so leave it out
128 of all groups except for "all". */
129 if (regnum == ALPHA_ZERO_REGNUM)
130 return 0;
131
132 /* All other registers are saved and restored. */
133 if (group == save_reggroup || group == restore_reggroup)
134 return 1;
135
136 /* All other groups are non-overlapping. */
137
138 /* Since this is really a PALcode memory slot... */
139 if (regnum == ALPHA_UNIQUE_REGNUM)
140 return group == system_reggroup;
141
142 /* Force the FPCR to be considered part of the floating point state. */
143 if (regnum == ALPHA_FPCR_REGNUM)
144 return group == float_reggroup;
145
146 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
147 return group == float_reggroup;
148 else
149 return group == general_reggroup;
150 }
151
152 /* The following represents exactly the conversion performed by
153 the LDS instruction. This applies to both single-precision
154 floating point and 32-bit integers. */
155
156 static void
157 alpha_lds (void *out, const void *in)
158 {
159 ULONGEST mem = extract_unsigned_integer (in, 4);
160 ULONGEST frac = (mem >> 0) & 0x7fffff;
161 ULONGEST sign = (mem >> 31) & 1;
162 ULONGEST exp_msb = (mem >> 30) & 1;
163 ULONGEST exp_low = (mem >> 23) & 0x7f;
164 ULONGEST exp, reg;
165
166 exp = (exp_msb << 10) | exp_low;
167 if (exp_msb)
168 {
169 if (exp_low == 0x7f)
170 exp = 0x7ff;
171 }
172 else
173 {
174 if (exp_low != 0x00)
175 exp |= 0x380;
176 }
177
178 reg = (sign << 63) | (exp << 52) | (frac << 29);
179 store_unsigned_integer (out, 8, reg);
180 }
181
182 /* Similarly, this represents exactly the conversion performed by
183 the STS instruction. */
184
185 static void
186 alpha_sts (void *out, const void *in)
187 {
188 ULONGEST reg, mem;
189
190 reg = extract_unsigned_integer (in, 8);
191 mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff);
192 store_unsigned_integer (out, 4, mem);
193 }
194
195 /* The alpha needs a conversion between register and memory format if the
196 register is a floating point register and memory format is float, as the
197 register format must be double or memory format is an integer with 4
198 bytes or less, as the representation of integers in floating point
199 registers is different. */
200
201 static int
202 alpha_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type)
203 {
204 return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31
205 && TYPE_LENGTH (type) != 8);
206 }
207
208 static void
209 alpha_register_to_value (struct frame_info *frame, int regnum,
210 struct type *valtype, gdb_byte *out)
211 {
212 gdb_byte in[MAX_REGISTER_SIZE];
213
214 frame_register_read (frame, regnum, in);
215 switch (TYPE_LENGTH (valtype))
216 {
217 case 4:
218 alpha_sts (out, in);
219 break;
220 default:
221 error (_("Cannot retrieve value from floating point register"));
222 }
223 }
224
225 static void
226 alpha_value_to_register (struct frame_info *frame, int regnum,
227 struct type *valtype, const gdb_byte *in)
228 {
229 gdb_byte out[MAX_REGISTER_SIZE];
230
231 switch (TYPE_LENGTH (valtype))
232 {
233 case 4:
234 alpha_lds (out, in);
235 break;
236 default:
237 error (_("Cannot store value in floating point register"));
238 }
239 put_frame_register (frame, regnum, out);
240 }
241
242 \f
243 /* The alpha passes the first six arguments in the registers, the rest on
244 the stack. The register arguments are stored in ARG_REG_BUFFER, and
245 then moved into the register file; this simplifies the passing of a
246 large struct which extends from the registers to the stack, plus avoids
247 three ptrace invocations per word.
248
249 We don't bother tracking which register values should go in integer
250 regs or fp regs; we load the same values into both.
251
252 If the called function is returning a structure, the address of the
253 structure to be returned is passed as a hidden first argument. */
254
255 static CORE_ADDR
256 alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
257 struct regcache *regcache, CORE_ADDR bp_addr,
258 int nargs, struct value **args, CORE_ADDR sp,
259 int struct_return, CORE_ADDR struct_addr)
260 {
261 int i;
262 int accumulate_size = struct_return ? 8 : 0;
263 struct alpha_arg
264 {
265 gdb_byte *contents;
266 int len;
267 int offset;
268 };
269 struct alpha_arg *alpha_args
270 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
271 struct alpha_arg *m_arg;
272 gdb_byte arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
273 int required_arg_regs;
274 CORE_ADDR func_addr = find_function_addr (function, NULL);
275
276 /* The ABI places the address of the called function in T12. */
277 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
278
279 /* Set the return address register to point to the entry point
280 of the program, where a breakpoint lies in wait. */
281 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
282
283 /* Lay out the arguments in memory. */
284 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
285 {
286 struct value *arg = args[i];
287 struct type *arg_type = check_typedef (value_type (arg));
288
289 /* Cast argument to long if necessary as the compiler does it too. */
290 switch (TYPE_CODE (arg_type))
291 {
292 case TYPE_CODE_INT:
293 case TYPE_CODE_BOOL:
294 case TYPE_CODE_CHAR:
295 case TYPE_CODE_RANGE:
296 case TYPE_CODE_ENUM:
297 if (TYPE_LENGTH (arg_type) == 4)
298 {
299 /* 32-bit values must be sign-extended to 64 bits
300 even if the base data type is unsigned. */
301 arg_type = builtin_type_int32;
302 arg = value_cast (arg_type, arg);
303 }
304 if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE)
305 {
306 arg_type = builtin_type_int64;
307 arg = value_cast (arg_type, arg);
308 }
309 break;
310
311 case TYPE_CODE_FLT:
312 /* "float" arguments loaded in registers must be passed in
313 register format, aka "double". */
314 if (accumulate_size < sizeof (arg_reg_buffer)
315 && TYPE_LENGTH (arg_type) == 4)
316 {
317 arg_type = builtin_type_ieee_double;
318 arg = value_cast (arg_type, arg);
319 }
320 /* Tru64 5.1 has a 128-bit long double, and passes this by
321 invisible reference. No one else uses this data type. */
322 else if (TYPE_LENGTH (arg_type) == 16)
323 {
324 /* Allocate aligned storage. */
325 sp = (sp & -16) - 16;
326
327 /* Write the real data into the stack. */
328 write_memory (sp, value_contents (arg), 16);
329
330 /* Construct the indirection. */
331 arg_type = lookup_pointer_type (arg_type);
332 arg = value_from_pointer (arg_type, sp);
333 }
334 break;
335
336 case TYPE_CODE_COMPLEX:
337 /* ??? The ABI says that complex values are passed as two
338 separate scalar values. This distinction only matters
339 for complex float. However, GCC does not implement this. */
340
341 /* Tru64 5.1 has a 128-bit long double, and passes this by
342 invisible reference. */
343 if (TYPE_LENGTH (arg_type) == 32)
344 {
345 /* Allocate aligned storage. */
346 sp = (sp & -16) - 16;
347
348 /* Write the real data into the stack. */
349 write_memory (sp, value_contents (arg), 32);
350
351 /* Construct the indirection. */
352 arg_type = lookup_pointer_type (arg_type);
353 arg = value_from_pointer (arg_type, sp);
354 }
355 break;
356
357 default:
358 break;
359 }
360 m_arg->len = TYPE_LENGTH (arg_type);
361 m_arg->offset = accumulate_size;
362 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
363 m_arg->contents = value_contents_writeable (arg);
364 }
365
366 /* Determine required argument register loads, loading an argument register
367 is expensive as it uses three ptrace calls. */
368 required_arg_regs = accumulate_size / 8;
369 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
370 required_arg_regs = ALPHA_NUM_ARG_REGS;
371
372 /* Make room for the arguments on the stack. */
373 if (accumulate_size < sizeof(arg_reg_buffer))
374 accumulate_size = 0;
375 else
376 accumulate_size -= sizeof(arg_reg_buffer);
377 sp -= accumulate_size;
378
379 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
380 sp &= ~15;
381
382 /* `Push' arguments on the stack. */
383 for (i = nargs; m_arg--, --i >= 0;)
384 {
385 gdb_byte *contents = m_arg->contents;
386 int offset = m_arg->offset;
387 int len = m_arg->len;
388
389 /* Copy the bytes destined for registers into arg_reg_buffer. */
390 if (offset < sizeof(arg_reg_buffer))
391 {
392 if (offset + len <= sizeof(arg_reg_buffer))
393 {
394 memcpy (arg_reg_buffer + offset, contents, len);
395 continue;
396 }
397 else
398 {
399 int tlen = sizeof(arg_reg_buffer) - offset;
400 memcpy (arg_reg_buffer + offset, contents, tlen);
401 offset += tlen;
402 contents += tlen;
403 len -= tlen;
404 }
405 }
406
407 /* Everything else goes to the stack. */
408 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
409 }
410 if (struct_return)
411 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr);
412
413 /* Load the argument registers. */
414 for (i = 0; i < required_arg_regs; i++)
415 {
416 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
417 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
418 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
419 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
420 }
421
422 /* Finally, update the stack pointer. */
423 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
424
425 return sp;
426 }
427
428 /* Extract from REGCACHE the value about to be returned from a function
429 and copy it into VALBUF. */
430
431 static void
432 alpha_extract_return_value (struct type *valtype, struct regcache *regcache,
433 gdb_byte *valbuf)
434 {
435 int length = TYPE_LENGTH (valtype);
436 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
437 ULONGEST l;
438
439 switch (TYPE_CODE (valtype))
440 {
441 case TYPE_CODE_FLT:
442 switch (length)
443 {
444 case 4:
445 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer);
446 alpha_sts (valbuf, raw_buffer);
447 break;
448
449 case 8:
450 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
451 break;
452
453 case 16:
454 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
455 read_memory (l, valbuf, 16);
456 break;
457
458 default:
459 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
460 }
461 break;
462
463 case TYPE_CODE_COMPLEX:
464 switch (length)
465 {
466 case 8:
467 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
468 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
469 break;
470
471 case 16:
472 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
473 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8);
474 break;
475
476 case 32:
477 regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l);
478 read_memory (l, valbuf, 32);
479 break;
480
481 default:
482 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
483 }
484 break;
485
486 default:
487 /* Assume everything else degenerates to an integer. */
488 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
489 store_unsigned_integer (valbuf, length, l);
490 break;
491 }
492 }
493
494 /* Insert the given value into REGCACHE as if it was being
495 returned by a function. */
496
497 static void
498 alpha_store_return_value (struct type *valtype, struct regcache *regcache,
499 const gdb_byte *valbuf)
500 {
501 int length = TYPE_LENGTH (valtype);
502 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
503 ULONGEST l;
504
505 switch (TYPE_CODE (valtype))
506 {
507 case TYPE_CODE_FLT:
508 switch (length)
509 {
510 case 4:
511 alpha_lds (raw_buffer, valbuf);
512 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer);
513 break;
514
515 case 8:
516 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
517 break;
518
519 case 16:
520 /* FIXME: 128-bit long doubles are returned like structures:
521 by writing into indirect storage provided by the caller
522 as the first argument. */
523 error (_("Cannot set a 128-bit long double return value."));
524
525 default:
526 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
527 }
528 break;
529
530 case TYPE_CODE_COMPLEX:
531 switch (length)
532 {
533 case 8:
534 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
535 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
536 break;
537
538 case 16:
539 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
540 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8);
541 break;
542
543 case 32:
544 /* FIXME: 128-bit long doubles are returned like structures:
545 by writing into indirect storage provided by the caller
546 as the first argument. */
547 error (_("Cannot set a 128-bit long double return value."));
548
549 default:
550 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
551 }
552 break;
553
554 default:
555 /* Assume everything else degenerates to an integer. */
556 /* 32-bit values must be sign-extended to 64 bits
557 even if the base data type is unsigned. */
558 if (length == 4)
559 valtype = builtin_type_int32;
560 l = unpack_long (valtype, valbuf);
561 regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l);
562 break;
563 }
564 }
565
566 static enum return_value_convention
567 alpha_return_value (struct gdbarch *gdbarch, struct type *func_type,
568 struct type *type, struct regcache *regcache,
569 gdb_byte *readbuf, const gdb_byte *writebuf)
570 {
571 enum type_code code = TYPE_CODE (type);
572
573 if ((code == TYPE_CODE_STRUCT
574 || code == TYPE_CODE_UNION
575 || code == TYPE_CODE_ARRAY)
576 && gdbarch_tdep (gdbarch)->return_in_memory (type))
577 {
578 if (readbuf)
579 {
580 ULONGEST addr;
581 regcache_raw_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr);
582 read_memory (addr, readbuf, TYPE_LENGTH (type));
583 }
584
585 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
586 }
587
588 if (readbuf)
589 alpha_extract_return_value (type, regcache, readbuf);
590 if (writebuf)
591 alpha_store_return_value (type, regcache, writebuf);
592
593 return RETURN_VALUE_REGISTER_CONVENTION;
594 }
595
596 static int
597 alpha_return_in_memory_always (struct type *type)
598 {
599 return 1;
600 }
601 \f
602 static const gdb_byte *
603 alpha_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
604 {
605 static const gdb_byte break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */
606
607 *len = sizeof(break_insn);
608 return break_insn;
609 }
610
611 \f
612 /* This returns the PC of the first insn after the prologue.
613 If we can't find the prologue, then return 0. */
614
615 CORE_ADDR
616 alpha_after_prologue (CORE_ADDR pc)
617 {
618 struct symtab_and_line sal;
619 CORE_ADDR func_addr, func_end;
620
621 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
622 return 0;
623
624 sal = find_pc_line (func_addr, 0);
625 if (sal.end < func_end)
626 return sal.end;
627
628 /* The line after the prologue is after the end of the function. In this
629 case, tell the caller to find the prologue the hard way. */
630 return 0;
631 }
632
633 /* Read an instruction from memory at PC, looking through breakpoints. */
634
635 unsigned int
636 alpha_read_insn (CORE_ADDR pc)
637 {
638 gdb_byte buf[ALPHA_INSN_SIZE];
639 int status;
640
641 status = target_read_memory (pc, buf, sizeof (buf));
642 if (status)
643 memory_error (status, pc);
644 return extract_unsigned_integer (buf, sizeof (buf));
645 }
646
647 /* To skip prologues, I use this predicate. Returns either PC itself
648 if the code at PC does not look like a function prologue; otherwise
649 returns an address that (if we're lucky) follows the prologue. If
650 LENIENT, then we must skip everything which is involved in setting
651 up the frame (it's OK to skip more, just so long as we don't skip
652 anything which might clobber the registers which are being saved. */
653
654 static CORE_ADDR
655 alpha_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
656 {
657 unsigned long inst;
658 int offset;
659 CORE_ADDR post_prologue_pc;
660 gdb_byte buf[ALPHA_INSN_SIZE];
661
662 /* Silently return the unaltered pc upon memory errors.
663 This could happen on OSF/1 if decode_line_1 tries to skip the
664 prologue for quickstarted shared library functions when the
665 shared library is not yet mapped in.
666 Reading target memory is slow over serial lines, so we perform
667 this check only if the target has shared libraries (which all
668 Alpha targets do). */
669 if (target_read_memory (pc, buf, sizeof (buf)))
670 return pc;
671
672 /* See if we can determine the end of the prologue via the symbol table.
673 If so, then return either PC, or the PC after the prologue, whichever
674 is greater. */
675
676 post_prologue_pc = alpha_after_prologue (pc);
677 if (post_prologue_pc != 0)
678 return max (pc, post_prologue_pc);
679
680 /* Can't determine prologue from the symbol table, need to examine
681 instructions. */
682
683 /* Skip the typical prologue instructions. These are the stack adjustment
684 instruction and the instructions that save registers on the stack
685 or in the gcc frame. */
686 for (offset = 0; offset < 100; offset += ALPHA_INSN_SIZE)
687 {
688 inst = alpha_read_insn (pc + offset);
689
690 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
691 continue;
692 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
693 continue;
694 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
695 continue;
696 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
697 continue;
698
699 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
700 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
701 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
702 continue;
703
704 if (inst == 0x47de040f) /* bis sp,sp,fp */
705 continue;
706 if (inst == 0x47fe040f) /* bis zero,sp,fp */
707 continue;
708
709 break;
710 }
711 return pc + offset;
712 }
713
714 \f
715 /* Figure out where the longjmp will land.
716 We expect the first arg to be a pointer to the jmp_buf structure from
717 which we extract the PC (JB_PC) that we will land at. The PC is copied
718 into the "pc". This routine returns true on success. */
719
720 static int
721 alpha_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
722 {
723 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
724 CORE_ADDR jb_addr;
725 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
726
727 jb_addr = get_frame_register_unsigned (frame, ALPHA_A0_REGNUM);
728
729 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
730 raw_buffer, tdep->jb_elt_size))
731 return 0;
732
733 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size);
734 return 1;
735 }
736
737 \f
738 /* Frame unwinder for signal trampolines. We use alpha tdep bits that
739 describe the location and shape of the sigcontext structure. After
740 that, all registers are in memory, so it's easy. */
741 /* ??? Shouldn't we be able to do this generically, rather than with
742 OSABI data specific to Alpha? */
743
744 struct alpha_sigtramp_unwind_cache
745 {
746 CORE_ADDR sigcontext_addr;
747 };
748
749 static struct alpha_sigtramp_unwind_cache *
750 alpha_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
751 void **this_prologue_cache)
752 {
753 struct alpha_sigtramp_unwind_cache *info;
754 struct gdbarch_tdep *tdep;
755
756 if (*this_prologue_cache)
757 return *this_prologue_cache;
758
759 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
760 *this_prologue_cache = info;
761
762 tdep = gdbarch_tdep (get_frame_arch (this_frame));
763 info->sigcontext_addr = tdep->sigcontext_addr (this_frame);
764
765 return info;
766 }
767
768 /* Return the address of REGNUM in a sigtramp frame. Since this is
769 all arithmetic, it doesn't seem worthwhile to cache it. */
770
771 static CORE_ADDR
772 alpha_sigtramp_register_address (struct gdbarch *gdbarch,
773 CORE_ADDR sigcontext_addr, int regnum)
774 {
775 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
776
777 if (regnum >= 0 && regnum < 32)
778 return sigcontext_addr + tdep->sc_regs_offset + regnum * 8;
779 else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32)
780 return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8;
781 else if (regnum == ALPHA_PC_REGNUM)
782 return sigcontext_addr + tdep->sc_pc_offset;
783
784 return 0;
785 }
786
787 /* Given a GDB frame, determine the address of the calling function's
788 frame. This will be used to create a new GDB frame struct. */
789
790 static void
791 alpha_sigtramp_frame_this_id (struct frame_info *this_frame,
792 void **this_prologue_cache,
793 struct frame_id *this_id)
794 {
795 struct gdbarch *gdbarch = get_frame_arch (this_frame);
796 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
797 struct alpha_sigtramp_unwind_cache *info
798 = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
799 CORE_ADDR stack_addr, code_addr;
800
801 /* If the OSABI couldn't locate the sigcontext, give up. */
802 if (info->sigcontext_addr == 0)
803 return;
804
805 /* If we have dynamic signal trampolines, find their start.
806 If we do not, then we must assume there is a symbol record
807 that can provide the start address. */
808 if (tdep->dynamic_sigtramp_offset)
809 {
810 int offset;
811 code_addr = get_frame_pc (this_frame);
812 offset = tdep->dynamic_sigtramp_offset (code_addr);
813 if (offset >= 0)
814 code_addr -= offset;
815 else
816 code_addr = 0;
817 }
818 else
819 code_addr = get_frame_func (this_frame);
820
821 /* The stack address is trivially read from the sigcontext. */
822 stack_addr = alpha_sigtramp_register_address (gdbarch, info->sigcontext_addr,
823 ALPHA_SP_REGNUM);
824 stack_addr = get_frame_memory_unsigned (this_frame, stack_addr,
825 ALPHA_REGISTER_SIZE);
826
827 *this_id = frame_id_build (stack_addr, code_addr);
828 }
829
830 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
831
832 static struct value *
833 alpha_sigtramp_frame_prev_register (struct frame_info *this_frame,
834 void **this_prologue_cache, int regnum)
835 {
836 struct alpha_sigtramp_unwind_cache *info
837 = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
838 CORE_ADDR addr;
839
840 if (info->sigcontext_addr != 0)
841 {
842 /* All integer and fp registers are stored in memory. */
843 addr = alpha_sigtramp_register_address (get_frame_arch (this_frame),
844 info->sigcontext_addr, regnum);
845 if (addr != 0)
846 return frame_unwind_got_memory (this_frame, regnum, addr);
847 }
848
849 /* This extra register may actually be in the sigcontext, but our
850 current description of it in alpha_sigtramp_frame_unwind_cache
851 doesn't include it. Too bad. Fall back on whatever's in the
852 outer frame. */
853 return frame_unwind_got_register (this_frame, regnum, regnum);
854 }
855
856 static int
857 alpha_sigtramp_frame_sniffer (const struct frame_unwind *self,
858 struct frame_info *this_frame,
859 void **this_prologue_cache)
860 {
861 struct gdbarch *gdbarch = get_frame_arch (this_frame);
862 CORE_ADDR pc = get_frame_pc (this_frame);
863 char *name;
864
865 /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
866 look at tramp-frame.h and other simplier per-architecture
867 sigtramp unwinders. */
868
869 /* We shouldn't even bother to try if the OSABI didn't register a
870 sigcontext_addr handler or pc_in_sigtramp hander. */
871 if (gdbarch_tdep (gdbarch)->sigcontext_addr == NULL)
872 return 0;
873 if (gdbarch_tdep (gdbarch)->pc_in_sigtramp == NULL)
874 return 0;
875
876 /* Otherwise we should be in a signal frame. */
877 find_pc_partial_function (pc, &name, NULL, NULL);
878 if (gdbarch_tdep (gdbarch)->pc_in_sigtramp (pc, name))
879 return 1;
880
881 return 0;
882 }
883
884 static const struct frame_unwind alpha_sigtramp_frame_unwind = {
885 SIGTRAMP_FRAME,
886 alpha_sigtramp_frame_this_id,
887 alpha_sigtramp_frame_prev_register,
888 NULL,
889 alpha_sigtramp_frame_sniffer
890 };
891
892 \f
893
894 /* Heuristic_proc_start may hunt through the text section for a long
895 time across a 2400 baud serial line. Allows the user to limit this
896 search. */
897 static unsigned int heuristic_fence_post = 0;
898
899 /* Attempt to locate the start of the function containing PC. We assume that
900 the previous function ends with an about_to_return insn. Not foolproof by
901 any means, since gcc is happy to put the epilogue in the middle of a
902 function. But we're guessing anyway... */
903
904 static CORE_ADDR
905 alpha_heuristic_proc_start (struct gdbarch *gdbarch, CORE_ADDR pc)
906 {
907 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
908 CORE_ADDR last_non_nop = pc;
909 CORE_ADDR fence = pc - heuristic_fence_post;
910 CORE_ADDR orig_pc = pc;
911 CORE_ADDR func;
912
913 if (pc == 0)
914 return 0;
915
916 /* First see if we can find the start of the function from minimal
917 symbol information. This can succeed with a binary that doesn't
918 have debug info, but hasn't been stripped. */
919 func = get_pc_function_start (pc);
920 if (func)
921 return func;
922
923 if (heuristic_fence_post == UINT_MAX
924 || fence < tdep->vm_min_address)
925 fence = tdep->vm_min_address;
926
927 /* Search back for previous return; also stop at a 0, which might be
928 seen for instance before the start of a code section. Don't include
929 nops, since this usually indicates padding between functions. */
930 for (pc -= ALPHA_INSN_SIZE; pc >= fence; pc -= ALPHA_INSN_SIZE)
931 {
932 unsigned int insn = alpha_read_insn (pc);
933 switch (insn)
934 {
935 case 0: /* invalid insn */
936 case 0x6bfa8001: /* ret $31,($26),1 */
937 return last_non_nop;
938
939 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
940 case 0x47ff041f: /* nop: bis $31,$31,$31 */
941 break;
942
943 default:
944 last_non_nop = pc;
945 break;
946 }
947 }
948
949 /* It's not clear to me why we reach this point when stopping quietly,
950 but with this test, at least we don't print out warnings for every
951 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
952 if (stop_soon == NO_STOP_QUIETLY)
953 {
954 static int blurb_printed = 0;
955
956 if (fence == tdep->vm_min_address)
957 warning (_("Hit beginning of text section without finding \
958 enclosing function for address 0x%s"), paddr_nz (orig_pc));
959 else
960 warning (_("Hit heuristic-fence-post without finding \
961 enclosing function for address 0x%s"), paddr_nz (orig_pc));
962
963 if (!blurb_printed)
964 {
965 printf_filtered (_("\
966 This warning occurs if you are debugging a function without any symbols\n\
967 (for example, in a stripped executable). In that case, you may wish to\n\
968 increase the size of the search with the `set heuristic-fence-post' command.\n\
969 \n\
970 Otherwise, you told GDB there was a function where there isn't one, or\n\
971 (more likely) you have encountered a bug in GDB.\n"));
972 blurb_printed = 1;
973 }
974 }
975
976 return 0;
977 }
978
979 /* Fallback alpha frame unwinder. Uses instruction scanning and knows
980 something about the traditional layout of alpha stack frames. */
981
982 struct alpha_heuristic_unwind_cache
983 {
984 CORE_ADDR vfp;
985 CORE_ADDR start_pc;
986 struct trad_frame_saved_reg *saved_regs;
987 int return_reg;
988 };
989
990 static struct alpha_heuristic_unwind_cache *
991 alpha_heuristic_frame_unwind_cache (struct frame_info *this_frame,
992 void **this_prologue_cache,
993 CORE_ADDR start_pc)
994 {
995 struct gdbarch *gdbarch = get_frame_arch (this_frame);
996 struct alpha_heuristic_unwind_cache *info;
997 ULONGEST val;
998 CORE_ADDR limit_pc, cur_pc;
999 int frame_reg, frame_size, return_reg, reg;
1000
1001 if (*this_prologue_cache)
1002 return *this_prologue_cache;
1003
1004 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
1005 *this_prologue_cache = info;
1006 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1007
1008 limit_pc = get_frame_pc (this_frame);
1009 if (start_pc == 0)
1010 start_pc = alpha_heuristic_proc_start (gdbarch, limit_pc);
1011 info->start_pc = start_pc;
1012
1013 frame_reg = ALPHA_SP_REGNUM;
1014 frame_size = 0;
1015 return_reg = -1;
1016
1017 /* If we've identified a likely place to start, do code scanning. */
1018 if (start_pc != 0)
1019 {
1020 /* Limit the forward search to 50 instructions. */
1021 if (start_pc + 200 < limit_pc)
1022 limit_pc = start_pc + 200;
1023
1024 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += ALPHA_INSN_SIZE)
1025 {
1026 unsigned int word = alpha_read_insn (cur_pc);
1027
1028 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
1029 {
1030 if (word & 0x8000)
1031 {
1032 /* Consider only the first stack allocation instruction
1033 to contain the static size of the frame. */
1034 if (frame_size == 0)
1035 frame_size = (-word) & 0xffff;
1036 }
1037 else
1038 {
1039 /* Exit loop if a positive stack adjustment is found, which
1040 usually means that the stack cleanup code in the function
1041 epilogue is reached. */
1042 break;
1043 }
1044 }
1045 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1046 {
1047 reg = (word & 0x03e00000) >> 21;
1048
1049 /* Ignore this instruction if we have already encountered
1050 an instruction saving the same register earlier in the
1051 function code. The current instruction does not tell
1052 us where the original value upon function entry is saved.
1053 All it says is that the function we are scanning reused
1054 that register for some computation of its own, and is now
1055 saving its result. */
1056 if (trad_frame_addr_p(info->saved_regs, reg))
1057 continue;
1058
1059 if (reg == 31)
1060 continue;
1061
1062 /* Do not compute the address where the register was saved yet,
1063 because we don't know yet if the offset will need to be
1064 relative to $sp or $fp (we can not compute the address
1065 relative to $sp if $sp is updated during the execution of
1066 the current subroutine, for instance when doing some alloca).
1067 So just store the offset for the moment, and compute the
1068 address later when we know whether this frame has a frame
1069 pointer or not. */
1070 /* Hack: temporarily add one, so that the offset is non-zero
1071 and we can tell which registers have save offsets below. */
1072 info->saved_regs[reg].addr = (word & 0xffff) + 1;
1073
1074 /* Starting with OSF/1-3.2C, the system libraries are shipped
1075 without local symbols, but they still contain procedure
1076 descriptors without a symbol reference. GDB is currently
1077 unable to find these procedure descriptors and uses
1078 heuristic_proc_desc instead.
1079 As some low level compiler support routines (__div*, __add*)
1080 use a non-standard return address register, we have to
1081 add some heuristics to determine the return address register,
1082 or stepping over these routines will fail.
1083 Usually the return address register is the first register
1084 saved on the stack, but assembler optimization might
1085 rearrange the register saves.
1086 So we recognize only a few registers (t7, t9, ra) within
1087 the procedure prologue as valid return address registers.
1088 If we encounter a return instruction, we extract the
1089 the return address register from it.
1090
1091 FIXME: Rewriting GDB to access the procedure descriptors,
1092 e.g. via the minimal symbol table, might obviate this hack. */
1093 if (return_reg == -1
1094 && cur_pc < (start_pc + 80)
1095 && (reg == ALPHA_T7_REGNUM
1096 || reg == ALPHA_T9_REGNUM
1097 || reg == ALPHA_RA_REGNUM))
1098 return_reg = reg;
1099 }
1100 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1101 return_reg = (word >> 16) & 0x1f;
1102 else if (word == 0x47de040f) /* bis sp,sp,fp */
1103 frame_reg = ALPHA_GCC_FP_REGNUM;
1104 else if (word == 0x47fe040f) /* bis zero,sp,fp */
1105 frame_reg = ALPHA_GCC_FP_REGNUM;
1106 }
1107
1108 /* If we haven't found a valid return address register yet, keep
1109 searching in the procedure prologue. */
1110 if (return_reg == -1)
1111 {
1112 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
1113 {
1114 unsigned int word = alpha_read_insn (cur_pc);
1115
1116 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1117 {
1118 reg = (word & 0x03e00000) >> 21;
1119 if (reg == ALPHA_T7_REGNUM
1120 || reg == ALPHA_T9_REGNUM
1121 || reg == ALPHA_RA_REGNUM)
1122 {
1123 return_reg = reg;
1124 break;
1125 }
1126 }
1127 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1128 {
1129 return_reg = (word >> 16) & 0x1f;
1130 break;
1131 }
1132
1133 cur_pc += ALPHA_INSN_SIZE;
1134 }
1135 }
1136 }
1137
1138 /* Failing that, do default to the customary RA. */
1139 if (return_reg == -1)
1140 return_reg = ALPHA_RA_REGNUM;
1141 info->return_reg = return_reg;
1142
1143 val = get_frame_register_unsigned (this_frame, frame_reg);
1144 info->vfp = val + frame_size;
1145
1146 /* Convert offsets to absolute addresses. See above about adding
1147 one to the offsets to make all detected offsets non-zero. */
1148 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
1149 if (trad_frame_addr_p(info->saved_regs, reg))
1150 info->saved_regs[reg].addr += val - 1;
1151
1152 return info;
1153 }
1154
1155 /* Given a GDB frame, determine the address of the calling function's
1156 frame. This will be used to create a new GDB frame struct. */
1157
1158 static void
1159 alpha_heuristic_frame_this_id (struct frame_info *this_frame,
1160 void **this_prologue_cache,
1161 struct frame_id *this_id)
1162 {
1163 struct alpha_heuristic_unwind_cache *info
1164 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1165
1166 *this_id = frame_id_build (info->vfp, info->start_pc);
1167 }
1168
1169 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
1170
1171 static struct value *
1172 alpha_heuristic_frame_prev_register (struct frame_info *this_frame,
1173 void **this_prologue_cache, int regnum)
1174 {
1175 struct alpha_heuristic_unwind_cache *info
1176 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1177
1178 /* The PC of the previous frame is stored in the link register of
1179 the current frame. Frob regnum so that we pull the value from
1180 the correct place. */
1181 if (regnum == ALPHA_PC_REGNUM)
1182 regnum = info->return_reg;
1183
1184 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
1185 }
1186
1187 static const struct frame_unwind alpha_heuristic_frame_unwind = {
1188 NORMAL_FRAME,
1189 alpha_heuristic_frame_this_id,
1190 alpha_heuristic_frame_prev_register,
1191 NULL,
1192 default_frame_sniffer
1193 };
1194
1195 static CORE_ADDR
1196 alpha_heuristic_frame_base_address (struct frame_info *this_frame,
1197 void **this_prologue_cache)
1198 {
1199 struct alpha_heuristic_unwind_cache *info
1200 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1201
1202 return info->vfp;
1203 }
1204
1205 static const struct frame_base alpha_heuristic_frame_base = {
1206 &alpha_heuristic_frame_unwind,
1207 alpha_heuristic_frame_base_address,
1208 alpha_heuristic_frame_base_address,
1209 alpha_heuristic_frame_base_address
1210 };
1211
1212 /* Just like reinit_frame_cache, but with the right arguments to be
1213 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
1214
1215 static void
1216 reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
1217 {
1218 reinit_frame_cache ();
1219 }
1220
1221 \f
1222 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1223 dummy frame. The frame ID's base needs to match the TOS value
1224 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1225 breakpoint. */
1226
1227 static struct frame_id
1228 alpha_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1229 {
1230 ULONGEST base;
1231 base = get_frame_register_unsigned (this_frame, ALPHA_SP_REGNUM);
1232 return frame_id_build (base, get_frame_pc (this_frame));
1233 }
1234
1235 static CORE_ADDR
1236 alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1237 {
1238 ULONGEST pc;
1239 pc = frame_unwind_register_unsigned (next_frame, ALPHA_PC_REGNUM);
1240 return pc;
1241 }
1242
1243 \f
1244 /* Helper routines for alpha*-nat.c files to move register sets to and
1245 from core files. The UNIQUE pointer is allowed to be NULL, as most
1246 targets don't supply this value in their core files. */
1247
1248 void
1249 alpha_supply_int_regs (struct regcache *regcache, int regno,
1250 const void *r0_r30, const void *pc, const void *unique)
1251 {
1252 const gdb_byte *regs = r0_r30;
1253 int i;
1254
1255 for (i = 0; i < 31; ++i)
1256 if (regno == i || regno == -1)
1257 regcache_raw_supply (regcache, i, regs + i * 8);
1258
1259 if (regno == ALPHA_ZERO_REGNUM || regno == -1)
1260 regcache_raw_supply (regcache, ALPHA_ZERO_REGNUM, NULL);
1261
1262 if (regno == ALPHA_PC_REGNUM || regno == -1)
1263 regcache_raw_supply (regcache, ALPHA_PC_REGNUM, pc);
1264
1265 if (regno == ALPHA_UNIQUE_REGNUM || regno == -1)
1266 regcache_raw_supply (regcache, ALPHA_UNIQUE_REGNUM, unique);
1267 }
1268
1269 void
1270 alpha_fill_int_regs (const struct regcache *regcache,
1271 int regno, void *r0_r30, void *pc, void *unique)
1272 {
1273 gdb_byte *regs = r0_r30;
1274 int i;
1275
1276 for (i = 0; i < 31; ++i)
1277 if (regno == i || regno == -1)
1278 regcache_raw_collect (regcache, i, regs + i * 8);
1279
1280 if (regno == ALPHA_PC_REGNUM || regno == -1)
1281 regcache_raw_collect (regcache, ALPHA_PC_REGNUM, pc);
1282
1283 if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1))
1284 regcache_raw_collect (regcache, ALPHA_UNIQUE_REGNUM, unique);
1285 }
1286
1287 void
1288 alpha_supply_fp_regs (struct regcache *regcache, int regno,
1289 const void *f0_f30, const void *fpcr)
1290 {
1291 const gdb_byte *regs = f0_f30;
1292 int i;
1293
1294 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1295 if (regno == i || regno == -1)
1296 regcache_raw_supply (regcache, i,
1297 regs + (i - ALPHA_FP0_REGNUM) * 8);
1298
1299 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1300 regcache_raw_supply (regcache, ALPHA_FPCR_REGNUM, fpcr);
1301 }
1302
1303 void
1304 alpha_fill_fp_regs (const struct regcache *regcache,
1305 int regno, void *f0_f30, void *fpcr)
1306 {
1307 gdb_byte *regs = f0_f30;
1308 int i;
1309
1310 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1311 if (regno == i || regno == -1)
1312 regcache_raw_collect (regcache, i,
1313 regs + (i - ALPHA_FP0_REGNUM) * 8);
1314
1315 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1316 regcache_raw_collect (regcache, ALPHA_FPCR_REGNUM, fpcr);
1317 }
1318
1319 \f
1320
1321 /* Return nonzero if the G_floating register value in REG is equal to
1322 zero for FP control instructions. */
1323
1324 static int
1325 fp_register_zero_p (LONGEST reg)
1326 {
1327 /* Check that all bits except the sign bit are zero. */
1328 const LONGEST zero_mask = ((LONGEST) 1 << 63) ^ -1;
1329
1330 return ((reg & zero_mask) == 0);
1331 }
1332
1333 /* Return the value of the sign bit for the G_floating register
1334 value held in REG. */
1335
1336 static int
1337 fp_register_sign_bit (LONGEST reg)
1338 {
1339 const LONGEST sign_mask = (LONGEST) 1 << 63;
1340
1341 return ((reg & sign_mask) != 0);
1342 }
1343
1344 /* alpha_software_single_step() is called just before we want to resume
1345 the inferior, if we want to single-step it but there is no hardware
1346 or kernel single-step support (NetBSD on Alpha, for example). We find
1347 the target of the coming instruction and breakpoint it. */
1348
1349 static CORE_ADDR
1350 alpha_next_pc (struct frame_info *frame, CORE_ADDR pc)
1351 {
1352 unsigned int insn;
1353 unsigned int op;
1354 int regno;
1355 int offset;
1356 LONGEST rav;
1357
1358 insn = alpha_read_insn (pc);
1359
1360 /* Opcode is top 6 bits. */
1361 op = (insn >> 26) & 0x3f;
1362
1363 if (op == 0x1a)
1364 {
1365 /* Jump format: target PC is:
1366 RB & ~3 */
1367 return (get_frame_register_unsigned (frame, (insn >> 16) & 0x1f) & ~3);
1368 }
1369
1370 if ((op & 0x30) == 0x30)
1371 {
1372 /* Branch format: target PC is:
1373 (new PC) + (4 * sext(displacement)) */
1374 if (op == 0x30 || /* BR */
1375 op == 0x34) /* BSR */
1376 {
1377 branch_taken:
1378 offset = (insn & 0x001fffff);
1379 if (offset & 0x00100000)
1380 offset |= 0xffe00000;
1381 offset *= ALPHA_INSN_SIZE;
1382 return (pc + ALPHA_INSN_SIZE + offset);
1383 }
1384
1385 /* Need to determine if branch is taken; read RA. */
1386 regno = (insn >> 21) & 0x1f;
1387 switch (op)
1388 {
1389 case 0x31: /* FBEQ */
1390 case 0x36: /* FBGE */
1391 case 0x37: /* FBGT */
1392 case 0x33: /* FBLE */
1393 case 0x32: /* FBLT */
1394 case 0x35: /* FBNE */
1395 regno += gdbarch_fp0_regnum (get_frame_arch (frame));
1396 }
1397
1398 rav = get_frame_register_signed (frame, regno);
1399
1400 switch (op)
1401 {
1402 case 0x38: /* BLBC */
1403 if ((rav & 1) == 0)
1404 goto branch_taken;
1405 break;
1406 case 0x3c: /* BLBS */
1407 if (rav & 1)
1408 goto branch_taken;
1409 break;
1410 case 0x39: /* BEQ */
1411 if (rav == 0)
1412 goto branch_taken;
1413 break;
1414 case 0x3d: /* BNE */
1415 if (rav != 0)
1416 goto branch_taken;
1417 break;
1418 case 0x3a: /* BLT */
1419 if (rav < 0)
1420 goto branch_taken;
1421 break;
1422 case 0x3b: /* BLE */
1423 if (rav <= 0)
1424 goto branch_taken;
1425 break;
1426 case 0x3f: /* BGT */
1427 if (rav > 0)
1428 goto branch_taken;
1429 break;
1430 case 0x3e: /* BGE */
1431 if (rav >= 0)
1432 goto branch_taken;
1433 break;
1434
1435 /* Floating point branches. */
1436
1437 case 0x31: /* FBEQ */
1438 if (fp_register_zero_p (rav))
1439 goto branch_taken;
1440 break;
1441 case 0x36: /* FBGE */
1442 if (fp_register_sign_bit (rav) == 0 || fp_register_zero_p (rav))
1443 goto branch_taken;
1444 break;
1445 case 0x37: /* FBGT */
1446 if (fp_register_sign_bit (rav) == 0 && ! fp_register_zero_p (rav))
1447 goto branch_taken;
1448 break;
1449 case 0x33: /* FBLE */
1450 if (fp_register_sign_bit (rav) == 1 || fp_register_zero_p (rav))
1451 goto branch_taken;
1452 break;
1453 case 0x32: /* FBLT */
1454 if (fp_register_sign_bit (rav) == 1 && ! fp_register_zero_p (rav))
1455 goto branch_taken;
1456 break;
1457 case 0x35: /* FBNE */
1458 if (! fp_register_zero_p (rav))
1459 goto branch_taken;
1460 break;
1461 }
1462 }
1463
1464 /* Not a branch or branch not taken; target PC is:
1465 pc + 4 */
1466 return (pc + ALPHA_INSN_SIZE);
1467 }
1468
1469 int
1470 alpha_software_single_step (struct frame_info *frame)
1471 {
1472 CORE_ADDR pc, next_pc;
1473
1474 pc = get_frame_pc (frame);
1475 next_pc = alpha_next_pc (frame, pc);
1476
1477 insert_single_step_breakpoint (next_pc);
1478 return 1;
1479 }
1480
1481 \f
1482 /* Initialize the current architecture based on INFO. If possible, re-use an
1483 architecture from ARCHES, which is a list of architectures already created
1484 during this debugging session.
1485
1486 Called e.g. at program startup, when reading a core file, and when reading
1487 a binary file. */
1488
1489 static struct gdbarch *
1490 alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1491 {
1492 struct gdbarch_tdep *tdep;
1493 struct gdbarch *gdbarch;
1494
1495 /* Try to determine the ABI of the object we are loading. */
1496 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
1497 {
1498 /* If it's an ECOFF file, assume it's OSF/1. */
1499 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
1500 info.osabi = GDB_OSABI_OSF1;
1501 }
1502
1503 /* Find a candidate among extant architectures. */
1504 arches = gdbarch_list_lookup_by_info (arches, &info);
1505 if (arches != NULL)
1506 return arches->gdbarch;
1507
1508 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1509 gdbarch = gdbarch_alloc (&info, tdep);
1510
1511 /* Lowest text address. This is used by heuristic_proc_start()
1512 to decide when to stop looking. */
1513 tdep->vm_min_address = (CORE_ADDR) 0x120000000LL;
1514
1515 tdep->dynamic_sigtramp_offset = NULL;
1516 tdep->sigcontext_addr = NULL;
1517 tdep->sc_pc_offset = 2 * 8;
1518 tdep->sc_regs_offset = 4 * 8;
1519 tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8;
1520
1521 tdep->jb_pc = -1; /* longjmp support not enabled by default */
1522
1523 tdep->return_in_memory = alpha_return_in_memory_always;
1524
1525 /* Type sizes */
1526 set_gdbarch_short_bit (gdbarch, 16);
1527 set_gdbarch_int_bit (gdbarch, 32);
1528 set_gdbarch_long_bit (gdbarch, 64);
1529 set_gdbarch_long_long_bit (gdbarch, 64);
1530 set_gdbarch_float_bit (gdbarch, 32);
1531 set_gdbarch_double_bit (gdbarch, 64);
1532 set_gdbarch_long_double_bit (gdbarch, 64);
1533 set_gdbarch_ptr_bit (gdbarch, 64);
1534
1535 /* Register info */
1536 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1537 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
1538 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1539 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1540
1541 set_gdbarch_register_name (gdbarch, alpha_register_name);
1542 set_gdbarch_register_type (gdbarch, alpha_register_type);
1543
1544 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1545 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1546
1547 set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p);
1548 set_gdbarch_register_to_value (gdbarch, alpha_register_to_value);
1549 set_gdbarch_value_to_register (gdbarch, alpha_value_to_register);
1550
1551 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p);
1552
1553 /* Prologue heuristics. */
1554 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1555
1556 /* Disassembler. */
1557 set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1558
1559 /* Call info. */
1560
1561 set_gdbarch_return_value (gdbarch, alpha_return_value);
1562
1563 /* Settings for calling functions in the inferior. */
1564 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
1565
1566 /* Methods for saving / extracting a dummy frame's ID. */
1567 set_gdbarch_dummy_id (gdbarch, alpha_dummy_id);
1568
1569 /* Return the unwound PC value. */
1570 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
1571
1572 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1573 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
1574
1575 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
1576 set_gdbarch_decr_pc_after_break (gdbarch, ALPHA_INSN_SIZE);
1577 set_gdbarch_cannot_step_breakpoint (gdbarch, 1);
1578
1579 /* Hook in ABI-specific overrides, if they have been registered. */
1580 gdbarch_init_osabi (info, gdbarch);
1581
1582 /* Now that we have tuned the configuration, set a few final things
1583 based on what the OS ABI has told us. */
1584
1585 if (tdep->jb_pc >= 0)
1586 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1587
1588 frame_unwind_append_unwinder (gdbarch, &alpha_sigtramp_frame_unwind);
1589 frame_unwind_append_unwinder (gdbarch, &alpha_heuristic_frame_unwind);
1590
1591 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
1592
1593 return gdbarch;
1594 }
1595
1596 void
1597 alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1598 {
1599 dwarf2_append_unwinders (gdbarch);
1600 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
1601 }
1602
1603 extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */
1604
1605 void
1606 _initialize_alpha_tdep (void)
1607 {
1608 struct cmd_list_element *c;
1609
1610 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
1611
1612 /* Let the user set the fence post for heuristic_proc_start. */
1613
1614 /* We really would like to have both "0" and "unlimited" work, but
1615 command.c doesn't deal with that. So make it a var_zinteger
1616 because the user can always use "999999" or some such for unlimited. */
1617 /* We need to throw away the frame cache when we set this, since it
1618 might change our ability to get backtraces. */
1619 add_setshow_zinteger_cmd ("heuristic-fence-post", class_support,
1620 &heuristic_fence_post, _("\
1621 Set the distance searched for the start of a function."), _("\
1622 Show the distance searched for the start of a function."), _("\
1623 If you are debugging a stripped executable, GDB needs to search through the\n\
1624 program for the start of a function. This command sets the distance of the\n\
1625 search. The only need to set it is when debugging a stripped executable."),
1626 reinit_frame_cache_sfunc,
1627 NULL, /* FIXME: i18n: The distance searched for the start of a function is \"%d\". */
1628 &setlist, &showlist);
1629 }
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