1 /* Instruction printing code for the AMD 29000
2 Copyright (C) 1990 Free Software Foundation, Inc.
3 Contributed by Cygnus Support. Written by Jim Kingdon.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
23 #include "am29k-opcode.h"
25 /* Print a symbolic representation of a general-purpose
26 register number NUM on STREAM.
27 NUM is a number as found in the instruction, not as found in
28 debugging symbols; it must be in the range 0-255. */
30 print_general (num
, stream
)
35 fprintf_filtered (stream
, "gr%d", num
);
37 fprintf_filtered (stream
, "lr%d", num
- 128);
40 /* Like print_general but a special-purpose register.
42 The mnemonics used by the AMD assembler are not quite the same
43 as the ones in the User's Manual. We use the ones that the
46 print_special (num
, stream
)
50 /* Register names of registers 0-SPEC0_NUM-1. */
51 static char *spec0_names
[] = {
52 "vab", "ops", "cps", "cfg", "cha", "chd", "chc", "rbp", "tmc", "tmr",
53 "pc0", "pc1", "pc2", "mmu", "lru"
55 #define SPEC0_NUM ((sizeof spec0_names) / (sizeof spec0_names[0]))
57 /* Register names of registers 128-128+SPEC128_NUM-1. */
58 static char *spec128_names
[] = {
59 "ipc", "ipa", "ipb", "q", "alu", "bp", "fc", "cr"
61 #define SPEC128_NUM ((sizeof spec128_names) / (sizeof spec128_names[0]))
63 /* Register names of registers 160-160+SPEC160_NUM-1. */
64 static char *spec160_names
[] = {
65 "fpe", "inte", "fps", "sr163", "exop"
67 #define SPEC160_NUM ((sizeof spec160_names) / (sizeof spec160_names[0]))
70 fprintf_filtered (stream
, spec0_names
[num
]);
71 else if (num
>= 128 && num
< 128 + SPEC128_NUM
)
72 fprintf_filtered (stream
, spec128_names
[num
-128]);
73 else if (num
>= 160 && num
< 160 + SPEC160_NUM
)
74 fprintf_filtered (stream
, spec160_names
[num
-160]);
76 fprintf_filtered (stream
, "sr%d", num
);
79 /* Is an instruction with OPCODE a delayed branch? */
81 is_delayed_branch (opcode
)
84 return (opcode
== 0xa8 || opcode
== 0xa9 || opcode
== 0xa0 || opcode
== 0xa1
85 || opcode
== 0xa4 || opcode
== 0xa5
86 || opcode
== 0xb4 || opcode
== 0xb5
87 || opcode
== 0xc4 || opcode
== 0xc0
88 || opcode
== 0xac || opcode
== 0xad
92 /* Now find the four bytes of INSN and put them in *INSN{0,8,16,24}.
93 Note that the amd can be set up as either
94 big or little-endian (the tm file says which) and we can't assume
95 the host machine is the same. */
97 find_bytes (insn
, insn0
, insn8
, insn16
, insn24
)
100 unsigned char *insn8
;
101 unsigned char *insn16
;
102 unsigned char *insn24
;
104 #if TARGET_BYTE_ORDER == BIG_ENDIAN
109 #else /* Little-endian. */
114 #endif /* Little-endian. */
117 /* Print one instruction from MEMADDR on STREAM.
118 Return the size of the instruction (always 4 on am29k). */
120 print_insn (memaddr
, stream
)
124 /* The raw instruction. */
127 /* The four bytes of the instruction. */
128 unsigned char insn24
, insn16
, insn8
, insn0
;
130 struct am29k_opcode
*opcode
;
132 read_memory (memaddr
, &insn
[0], 4);
134 find_bytes (insn
, &insn0
, &insn8
, &insn16
, &insn24
);
136 /* Handle the nop (aseq 0x40,gr1,gr1) specially */
137 if ((insn24
==0x70) && (insn16
==0x40) && (insn8
==0x01) && (insn0
==0x01)) {
138 fprintf_filtered (stream
,"nop");
142 /* The opcode is always in insn24. */
143 for (opcode
= &am29k_opcodes
[0];
144 opcode
< &am29k_opcodes
[NUM_OPCODES
];
147 if (insn24
== opcode
->opcode
)
151 fprintf_filtered (stream
, "%s ", opcode
->name
);
152 for (s
= opcode
->args
; *s
!= '\0'; ++s
)
157 print_general (insn8
, stream
);
161 print_general (insn0
, stream
);
165 print_general (insn16
, stream
);
169 fprintf_filtered (stream
, "%d", insn0
);
173 fprintf_filtered (stream
, "%d", (insn16
<< 8) + insn0
);
177 fprintf_filtered (stream
, "0x%x",
178 (insn16
<< 24) + (insn0
<< 16));
182 fprintf_filtered (stream
, "%d",
183 ((insn16
<< 8) + insn0
) | 0xffff0000);
187 /* This output looks just like absolute addressing, but
188 maybe that's OK (it's what the GDB 68k and EBMON
189 29k disassemblers do). */
190 /* All the shifting is to sign-extend it. p*/
193 (((int)((insn16
<< 10) + (insn0
<< 2)) << 14) >> 14),
198 print_address ((insn16
<< 10) + (insn0
<< 2), stream
);
202 fprintf_filtered (stream
, "%d", insn16
>> 7);
206 fprintf_filtered (stream
, "0x%x", insn16
& 0x7f);
210 fprintf_filtered (stream
, "0x%x", insn16
);
214 print_special (insn8
, stream
);
218 fprintf_filtered (stream
, "%d", insn0
>> 7);
222 fprintf_filtered (stream
, "%d", (insn0
>> 4) & 7);
226 fprintf_filtered (stream
, "%d", (insn0
>> 2) & 3);
230 fprintf_filtered (stream
, "%d", insn0
& 3);
234 fprintf_filtered (stream
, "%d", (insn16
>> 2) & 15);
238 fprintf_filtered (stream
, "%d", insn16
& 3);
242 fprintf_filtered (stream
, "%c", *s
);
246 /* Now we look for a const,consth pair of instructions,
247 in which case we try to print the symbolic address. */
248 if (insn24
== 2) /* consth */
252 unsigned char prev_insn0
, prev_insn8
, prev_insn16
, prev_insn24
;
254 errcode
= target_read_memory (memaddr
- 4,
259 /* If it is a delayed branch, we need to look at the
260 instruction before the delayed brach to handle
267 find_bytes (prev_insn
, &prev_insn0
, &prev_insn8
,
268 &prev_insn16
, &prev_insn24
);
269 if (is_delayed_branch (prev_insn24
))
271 errcode
= target_read_memory
272 (memaddr
- 8, &prev_insn
[0], 4);
273 find_bytes (prev_insn
, &prev_insn0
, &prev_insn8
,
274 &prev_insn16
, &prev_insn24
);
278 /* If there was a problem reading memory, then assume
279 the previous instruction was not const. */
282 /* Is it const to the same register? */
284 && prev_insn8
== insn8
)
286 fprintf_filtered (stream
, "\t; ");
287 print_address (((insn16
<< 24) + (insn0
<< 16)
288 + (prev_insn16
<< 8) + (prev_insn0
)),
297 fprintf_filtered (stream
, ".word 0x%8x",
298 (insn24
<< 24) + (insn16
<< 16) + (insn8
<< 8) + insn0
);
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