1 /* Native-dependent code for GNU/Linux x86-64.
3 Copyright (C) 2001-2018 Free Software Foundation, Inc.
4 Contributed by Jiri Smid, SuSE Labs.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "elf/common.h"
26 #include "nat/gdb_ptrace.h"
27 #include <asm/prctl.h>
30 #include "gdb_proc_service.h"
32 #include "amd64-nat.h"
33 #include "amd64-tdep.h"
34 #include "amd64-linux-tdep.h"
35 #include "i386-linux-tdep.h"
36 #include "x86-xstate.h"
38 #include "x86-linux-nat.h"
39 #include "nat/linux-ptrace.h"
40 #include "nat/amd64-linux-siginfo.h"
42 /* This definition comes from prctl.h. Kernels older than 2.5.64
44 #ifndef PTRACE_ARCH_PRCTL
45 #define PTRACE_ARCH_PRCTL 30
48 struct amd64_linux_nat_target final
: public x86_linux_nat_target
50 /* Add our register access methods. */
51 void fetch_registers (struct regcache
*, int) override
;
52 void store_registers (struct regcache
*, int) override
;
55 static amd64_linux_nat_target the_amd64_linux_nat_target
;
57 /* Mapping between the general-purpose registers in GNU/Linux x86-64
58 `struct user' format and GDB's register cache layout for GNU/Linux
61 Note that most GNU/Linux x86-64 registers are 64-bit, while the
62 GNU/Linux i386 registers are all 32-bit, but since we're
63 little-endian we get away with that. */
65 /* From <sys/reg.h> on GNU/Linux i386. */
66 static int amd64_linux_gregset32_reg_offset
[] =
68 RAX
* 8, RCX
* 8, /* %eax, %ecx */
69 RDX
* 8, RBX
* 8, /* %edx, %ebx */
70 RSP
* 8, RBP
* 8, /* %esp, %ebp */
71 RSI
* 8, RDI
* 8, /* %esi, %edi */
72 RIP
* 8, EFLAGS
* 8, /* %eip, %eflags */
73 CS
* 8, SS
* 8, /* %cs, %ss */
74 DS
* 8, ES
* 8, /* %ds, %es */
75 FS
* 8, GS
* 8, /* %fs, %gs */
76 -1, -1, -1, -1, -1, -1, -1, -1,
77 -1, -1, -1, -1, -1, -1, -1, -1,
78 -1, -1, -1, -1, -1, -1, -1, -1, -1,
79 -1, -1, -1, -1, -1, -1, -1, -1,
80 -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
81 -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
82 -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
83 -1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm7 (AVX512) */
84 -1, /* PKEYS register PKRU */
85 ORIG_RAX
* 8 /* "orig_eax" */
89 /* Transfering the general-purpose registers between GDB, inferiors
92 /* Fill GDB's register cache with the general-purpose register values
96 supply_gregset (struct regcache
*regcache
, const elf_gregset_t
*gregsetp
)
98 amd64_supply_native_gregset (regcache
, gregsetp
, -1);
101 /* Fill register REGNUM (if it is a general-purpose register) in
102 *GREGSETP with the value in GDB's register cache. If REGNUM is -1,
103 do this for all registers. */
106 fill_gregset (const struct regcache
*regcache
,
107 elf_gregset_t
*gregsetp
, int regnum
)
109 amd64_collect_native_gregset (regcache
, gregsetp
, regnum
);
112 /* Transfering floating-point registers between GDB, inferiors and cores. */
114 /* Fill GDB's register cache with the floating-point and SSE register
115 values in *FPREGSETP. */
118 supply_fpregset (struct regcache
*regcache
, const elf_fpregset_t
*fpregsetp
)
120 amd64_supply_fxsave (regcache
, -1, fpregsetp
);
123 /* Fill register REGNUM (if it is a floating-point or SSE register) in
124 *FPREGSETP with the value in GDB's register cache. If REGNUM is
125 -1, do this for all registers. */
128 fill_fpregset (const struct regcache
*regcache
,
129 elf_fpregset_t
*fpregsetp
, int regnum
)
131 amd64_collect_fxsave (regcache
, regnum
, fpregsetp
);
135 /* Transferring arbitrary registers between GDB and inferior. */
137 /* Fetch register REGNUM from the child process. If REGNUM is -1, do
138 this for all registers (including the floating point and SSE
142 amd64_linux_nat_target::fetch_registers (struct regcache
*regcache
, int regnum
)
144 struct gdbarch
*gdbarch
= regcache
->arch ();
147 /* GNU/Linux LWP ID's are process ID's. */
148 tid
= ptid_get_lwp (regcache_get_ptid (regcache
));
150 tid
= ptid_get_pid (regcache_get_ptid (regcache
)); /* Not a threaded program. */
152 if (regnum
== -1 || amd64_native_gregset_supplies_p (gdbarch
, regnum
))
156 if (ptrace (PTRACE_GETREGS
, tid
, 0, (long) ®s
) < 0)
157 perror_with_name (_("Couldn't get registers"));
159 amd64_supply_native_gregset (regcache
, ®s
, -1);
164 if (regnum
== -1 || !amd64_native_gregset_supplies_p (gdbarch
, regnum
))
166 elf_fpregset_t fpregs
;
168 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
170 char xstateregs
[X86_XSTATE_MAX_SIZE
];
173 iov
.iov_base
= xstateregs
;
174 iov
.iov_len
= sizeof (xstateregs
);
175 if (ptrace (PTRACE_GETREGSET
, tid
,
176 (unsigned int) NT_X86_XSTATE
, (long) &iov
) < 0)
177 perror_with_name (_("Couldn't get extended state status"));
179 amd64_supply_xsave (regcache
, -1, xstateregs
);
183 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (long) &fpregs
) < 0)
184 perror_with_name (_("Couldn't get floating point status"));
186 amd64_supply_fxsave (regcache
, -1, &fpregs
);
188 #ifndef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
190 /* PTRACE_ARCH_PRCTL is obsolete since 2.6.25, where the
191 fs_base and gs_base fields of user_regs_struct can be
195 if (regnum
== -1 || regnum
== AMD64_FSBASE_REGNUM
)
197 if (ptrace (PTRACE_ARCH_PRCTL
, tid
, &base
, ARCH_GET_FS
) < 0)
198 perror_with_name (_("Couldn't get segment register fs_base"));
200 regcache_raw_supply (regcache
, AMD64_FSBASE_REGNUM
, &base
);
203 if (regnum
== -1 || regnum
== AMD64_GSBASE_REGNUM
)
205 if (ptrace (PTRACE_ARCH_PRCTL
, tid
, &base
, ARCH_GET_GS
) < 0)
206 perror_with_name (_("Couldn't get segment register gs_base"));
208 regcache_raw_supply (regcache
, AMD64_GSBASE_REGNUM
, &base
);
215 /* Store register REGNUM back into the child process. If REGNUM is
216 -1, do this for all registers (including the floating-point and SSE
220 amd64_linux_nat_target::store_registers (struct regcache
*regcache
, int regnum
)
222 struct gdbarch
*gdbarch
= regcache
->arch ();
225 /* GNU/Linux LWP ID's are process ID's. */
226 tid
= ptid_get_lwp (regcache_get_ptid (regcache
));
228 tid
= ptid_get_pid (regcache_get_ptid (regcache
)); /* Not a threaded program. */
230 if (regnum
== -1 || amd64_native_gregset_supplies_p (gdbarch
, regnum
))
234 if (ptrace (PTRACE_GETREGS
, tid
, 0, (long) ®s
) < 0)
235 perror_with_name (_("Couldn't get registers"));
237 amd64_collect_native_gregset (regcache
, ®s
, regnum
);
239 if (ptrace (PTRACE_SETREGS
, tid
, 0, (long) ®s
) < 0)
240 perror_with_name (_("Couldn't write registers"));
246 if (regnum
== -1 || !amd64_native_gregset_supplies_p (gdbarch
, regnum
))
248 elf_fpregset_t fpregs
;
250 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
252 char xstateregs
[X86_XSTATE_MAX_SIZE
];
255 iov
.iov_base
= xstateregs
;
256 iov
.iov_len
= sizeof (xstateregs
);
257 if (ptrace (PTRACE_GETREGSET
, tid
,
258 (unsigned int) NT_X86_XSTATE
, (long) &iov
) < 0)
259 perror_with_name (_("Couldn't get extended state status"));
261 amd64_collect_xsave (regcache
, regnum
, xstateregs
, 0);
263 if (ptrace (PTRACE_SETREGSET
, tid
,
264 (unsigned int) NT_X86_XSTATE
, (long) &iov
) < 0)
265 perror_with_name (_("Couldn't write extended state status"));
269 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (long) &fpregs
) < 0)
270 perror_with_name (_("Couldn't get floating point status"));
272 amd64_collect_fxsave (regcache
, regnum
, &fpregs
);
274 if (ptrace (PTRACE_SETFPREGS
, tid
, 0, (long) &fpregs
) < 0)
275 perror_with_name (_("Couldn't write floating point status"));
278 #ifndef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
280 /* PTRACE_ARCH_PRCTL is obsolete since 2.6.25, where the
281 fs_base and gs_base fields of user_regs_struct can be
285 if (regnum
== -1 || regnum
== AMD64_FSBASE_REGNUM
)
287 regcache_raw_collect (regcache
, AMD64_FSBASE_REGNUM
, &base
);
289 if (ptrace (PTRACE_ARCH_PRCTL
, tid
, base
, ARCH_SET_FS
) < 0)
290 perror_with_name (_("Couldn't write segment register fs_base"));
292 if (regnum
== -1 || regnum
== AMD64_GSBASE_REGNUM
)
295 regcache_raw_collect (regcache
, AMD64_GSBASE_REGNUM
, &base
);
296 if (ptrace (PTRACE_ARCH_PRCTL
, tid
, base
, ARCH_SET_GS
) < 0)
297 perror_with_name (_("Couldn't write segment register gs_base"));
305 /* This function is called by libthread_db as part of its handling of
306 a request for a thread's local storage address. */
309 ps_get_thread_area (struct ps_prochandle
*ph
,
310 lwpid_t lwpid
, int idx
, void **base
)
312 if (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word
== 32)
314 unsigned int base_addr
;
317 result
= x86_linux_get_thread_area (lwpid
, (void *) (long) idx
,
321 /* Extend the value to 64 bits. Here it's assumed that
322 a "long" and a "void *" are the same. */
323 (*base
) = (void *) (long) base_addr
;
330 /* FIXME: ezannoni-2003-07-09 see comment above about include
331 file order. We could be getting bogus values for these two. */
332 gdb_assert (FS
< ELF_NGREG
);
333 gdb_assert (GS
< ELF_NGREG
);
337 #ifdef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
339 /* PTRACE_ARCH_PRCTL is obsolete since 2.6.25, where the
340 fs_base and gs_base fields of user_regs_struct can be
344 fs
= ptrace (PTRACE_PEEKUSER
, lwpid
,
345 offsetof (struct user_regs_struct
, fs_base
), 0);
353 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, base
, ARCH_GET_FS
) == 0)
357 #ifdef HAVE_STRUCT_USER_REGS_STRUCT_GS_BASE
361 gs
= ptrace (PTRACE_PEEKUSER
, lwpid
,
362 offsetof (struct user_regs_struct
, gs_base
), 0);
370 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, base
, ARCH_GET_GS
) == 0)
373 default: /* Should not happen. */
377 return PS_ERR
; /* ptrace failed. */
381 /* Convert a ptrace/host siginfo object, into/from the siginfo in the
382 layout of the inferiors' architecture. Returns true if any
383 conversion was done; false otherwise. If DIRECTION is 1, then copy
384 from INF to PTRACE. If DIRECTION is 0, copy from PTRACE to
388 amd64_linux_siginfo_fixup (siginfo_t
*ptrace
, gdb_byte
*inf
, int direction
)
390 struct gdbarch
*gdbarch
= get_frame_arch (get_current_frame ());
392 /* Is the inferior 32-bit? If so, then do fixup the siginfo
394 if (gdbarch_bfd_arch_info (gdbarch
)->bits_per_word
== 32)
395 return amd64_linux_siginfo_fixup_common (ptrace
, inf
, direction
,
397 /* No fixup for native x32 GDB. */
398 else if (gdbarch_addr_bit (gdbarch
) == 32 && sizeof (void *) == 8)
399 return amd64_linux_siginfo_fixup_common (ptrace
, inf
, direction
,
406 _initialize_amd64_linux_nat (void)
408 amd64_native_gregset32_reg_offset
= amd64_linux_gregset32_reg_offset
;
409 amd64_native_gregset32_num_regs
= I386_LINUX_NUM_REGS
;
410 amd64_native_gregset64_reg_offset
= amd64_linux_gregset_reg_offset
;
411 amd64_native_gregset64_num_regs
= AMD64_LINUX_NUM_REGS
;
413 gdb_assert (ARRAY_SIZE (amd64_linux_gregset32_reg_offset
)
414 == amd64_native_gregset32_num_regs
);
416 linux_target
= &the_amd64_linux_nat_target
;
418 /* Add the target. */
419 x86_linux_add_target (linux_target
);
421 /* Add our siginfo layout converter. */
422 linux_nat_set_siginfo_fixup (linux_target
, amd64_linux_siginfo_fixup
);