1 /* Target dependent code for ARC arhitecture, for GDB.
3 Copyright 2005-2017 Free Software Foundation, Inc.
4 Contributed by Synopsys Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 /* GDB header files. */
23 #include "arch-utils.h"
25 #include "dwarf2-frame.h"
26 #include "frame-base.h"
27 #include "frame-unwind.h"
31 #include "trad-frame.h"
33 /* ARC header files. */
34 #include "opcode/arc.h"
37 /* Standard headers. */
40 /* Default target descriptions. */
41 #include "features/arc-v2.c"
42 #include "features/arc-arcompact.c"
44 /* The frame unwind cache for the ARC. Current structure is a stub, because
45 it should be filled in during the prologue analysis. */
47 struct arc_frame_cache
49 /* The stack pointer at the time this frame was created; i.e. the caller's
50 stack pointer when this function was called. It is used to identify this
54 /* Store addresses for registers saved in prologue. */
55 struct trad_frame_saved_reg
*saved_regs
;
58 /* Global debug flag. */
62 /* XML target description features. */
64 static const char core_v2_feature_name
[] = "org.gnu.gdb.arc.core.v2";
66 core_reduced_v2_feature_name
[] = "org.gnu.gdb.arc.core-reduced.v2";
68 core_arcompact_feature_name
[] = "org.gnu.gdb.arc.core.arcompact";
69 static const char aux_minimal_feature_name
[] = "org.gnu.gdb.arc.aux-minimal";
71 /* XML target description known registers. */
73 static const char *const core_v2_register_names
[] = {
74 "r0", "r1", "r2", "r3",
75 "r4", "r5", "r6", "r7",
76 "r8", "r9", "r10", "r11",
77 "r12", "r13", "r14", "r15",
78 "r16", "r17", "r18", "r19",
79 "r20", "r21", "r22", "r23",
80 "r24", "r25", "gp", "fp",
81 "sp", "ilink", "r30", "blink",
82 "r32", "r33", "r34", "r35",
83 "r36", "r37", "r38", "r39",
84 "r40", "r41", "r42", "r43",
85 "r44", "r45", "r46", "r47",
86 "r48", "r49", "r50", "r51",
87 "r52", "r53", "r54", "r55",
88 "r56", "r57", "accl", "acch",
92 static const char *const aux_minimal_register_names
[] = {
96 static const char *const core_arcompact_register_names
[] = {
97 "r0", "r1", "r2", "r3",
98 "r4", "r5", "r6", "r7",
99 "r8", "r9", "r10", "r11",
100 "r12", "r13", "r14", "r15",
101 "r16", "r17", "r18", "r19",
102 "r20", "r21", "r22", "r23",
103 "r24", "r25", "gp", "fp",
104 "sp", "ilink1", "ilink2", "blink",
105 "r32", "r33", "r34", "r35",
106 "r36", "r37", "r38", "r39",
107 "r40", "r41", "r42", "r43",
108 "r44", "r45", "r46", "r47",
109 "r48", "r49", "r50", "r51",
110 "r52", "r53", "r54", "r55",
111 "r56", "r57", "r58", "r59",
115 /* Implement the "write_pc" gdbarch method.
117 In ARC PC register is a normal register so in most cases setting PC value
118 is a straightforward process: debugger just writes PC value. However it
119 gets trickier in case when current instruction is an instruction in delay
120 slot. In this case CPU will execute instruction at current PC value, then
121 will set PC to the current value of BTA register; also current instruction
122 cannot be branch/jump and some of the other instruction types. Thus if
123 debugger would try to just change PC value in this case, this instruction
124 will get executed, but then core will "jump" to the original branch target.
126 Whether current instruction is a delay-slot instruction or not is indicated
127 by DE bit in STATUS32 register indicates if current instruction is a delay
128 slot instruction. This bit is writable by debug host, which allows debug
129 host to prevent core from jumping after the delay slot instruction. It
130 also works in another direction: setting this bit will make core to treat
131 any current instructions as a delay slot instruction and to set PC to the
132 current value of BTA register.
134 To workaround issues with changing PC register while in delay slot
135 instruction, debugger should check for the STATUS32.DE bit and reset it if
136 it is set. No other change is required in this function. Most common
137 case, where this function might be required is calling inferior functions
138 from debugger. Generic GDB logic handles this pretty well: current values
139 of registers are stored, value of PC is changed (that is the job of this
140 function), and after inferior function is executed, GDB restores all
141 registers, include BTA and STATUS32, which also means that core is returned
142 to its original state of being halted on delay slot instructions.
144 This method is useless for ARC 600, because it doesn't have externally
145 exposed BTA register. In the case of ARC 600 it is impossible to restore
146 core to its state in all occasions thus core should never be halted (from
147 the perspective of debugger host) in the delay slot. */
150 arc_write_pc (struct regcache
*regcache
, CORE_ADDR new_pc
)
152 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
155 debug_printf ("arc: Writing PC, new value=%s\n",
156 paddress (gdbarch
, new_pc
));
158 regcache_cooked_write_unsigned (regcache
, gdbarch_pc_regnum (gdbarch
),
162 regcache_cooked_read_unsigned (regcache
, gdbarch_ps_regnum (gdbarch
),
165 /* Mask for DE bit is 0x40. */
170 debug_printf ("arc: Changing PC while in delay slot. Will "
171 "reset STATUS32.DE bit to zero. Value of STATUS32 "
172 "register is 0x%s\n",
173 phex (status32
, ARC_REGISTER_SIZE
));
176 /* Reset bit and write to the cache. */
178 regcache_cooked_write_unsigned (regcache
, gdbarch_ps_regnum (gdbarch
),
183 /* Implement the "virtual_frame_pointer" gdbarch method.
185 According to ABI the FP (r27) is used to point to the middle of the current
186 stack frame, just below the saved FP and before local variables, register
187 spill area and outgoing args. However for optimization levels above O2 and
188 in any case in leaf functions, the frame pointer is usually not set at all.
189 The exception being when handling nested functions.
191 We use this function to return a "virtual" frame pointer, marking the start
192 of the current stack frame as a register-offset pair. If the FP is not
193 being used, then it should return SP, with an offset of the frame size.
195 The current implementation doesn't actually know the frame size, nor
196 whether the FP is actually being used, so for now we just return SP and an
197 offset of zero. This is no worse than other architectures, but is needed
198 to avoid assertion failures.
200 TODO: Can we determine the frame size to get a correct offset?
202 PC is a program counter where we need the virtual FP. REG_PTR is the base
203 register used for the virtual FP. OFFSET_PTR is the offset used for the
207 arc_virtual_frame_pointer (struct gdbarch
*gdbarch
, CORE_ADDR pc
,
208 int *reg_ptr
, LONGEST
*offset_ptr
)
210 *reg_ptr
= gdbarch_sp_regnum (gdbarch
);
214 /* Implement the "dummy_id" gdbarch method.
216 Tear down a dummy frame created by arc_push_dummy_call (). This data has
217 to be constructed manually from the data in our hand. The stack pointer
218 and program counter can be obtained from the frame info. */
220 static struct frame_id
221 arc_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
223 return frame_id_build (get_frame_sp (this_frame
),
224 get_frame_pc (this_frame
));
227 /* Implement the "push_dummy_call" gdbarch method.
231 This shows the layout of the stack frame for the general case of a
232 function call; a given function might not have a variable number of
233 arguments or local variables, or might not save any registers, so it would
234 not have the corresponding frame areas. Additionally, a leaf function
235 (i.e. one which calls no other functions) does not need to save the
236 contents of the BLINK register (which holds its return address), and a
237 function might not have a frame pointer.
239 The stack grows downward, so SP points below FP in memory; SP always
240 points to the last used word on the stack, not the first one.
243 | arg word N | | caller's
247 old SP ---> +-----------------------+ --+
251 | including fp, blink | |
253 new FP ---> +-----------------------+ | frame
263 new SP ---> +-----------------------+ --+
272 The list of arguments to be passed to a function is considered to be a
273 sequence of _N_ words (as though all the parameters were stored in order in
274 memory with each parameter occupying an integral number of words). Words
275 1..8 are passed in registers 0..7; if the function has more than 8 words of
276 arguments then words 9..@em N are passed on the stack in the caller's frame.
278 If the function has a variable number of arguments, e.g. it has a form such
279 as `function (p1, p2, ...);' and _P_ words are required to hold the values
280 of the named parameters (which are passed in registers 0..@em P -1), then
281 the remaining 8 - _P_ words passed in registers _P_..7 are spilled into the
282 top of the frame so that the anonymous parameter words occupy a continuous
285 Any arguments are already in target byte order. We just need to store
288 BP_ADDR is the return address where breakpoint must be placed. NARGS is
289 the number of arguments to the function. ARGS is the arguments values (in
290 target byte order). SP is the Current value of SP register. STRUCT_RETURN
291 is TRUE if structures are returned by the function. STRUCT_ADDR is the
292 hidden address for returning a struct. Returns SP of a new frame. */
295 arc_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
296 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
297 struct value
**args
, CORE_ADDR sp
, int struct_return
,
298 CORE_ADDR struct_addr
)
301 debug_printf ("arc: push_dummy_call (nargs = %d)\n", nargs
);
303 int arg_reg
= ARC_FIRST_ARG_REGNUM
;
305 /* Push the return address. */
306 regcache_cooked_write_unsigned (regcache
, ARC_BLINK_REGNUM
, bp_addr
);
308 /* Are we returning a value using a structure return instead of a normal
309 value return? If so, struct_addr is the address of the reserved space for
310 the return structure to be written on the stack, and that address is
311 passed to that function as a hidden first argument. */
314 /* Pass the return address in the first argument register. */
315 regcache_cooked_write_unsigned (regcache
, arg_reg
, struct_addr
);
318 debug_printf ("arc: struct return address %s passed in R%d",
319 print_core_address (gdbarch
, struct_addr
), arg_reg
);
326 unsigned int total_space
= 0;
328 /* How much space do the arguments occupy in total? Must round each
329 argument's size up to an integral number of words. */
330 for (int i
= 0; i
< nargs
; i
++)
332 unsigned int len
= TYPE_LENGTH (value_type (args
[i
]));
333 unsigned int space
= align_up (len
, 4);
335 total_space
+= space
;
338 debug_printf ("arc: arg %d: %u bytes -> %u\n", i
, len
, space
);
341 /* Allocate a buffer to hold a memory image of the arguments. */
342 gdb_byte
*memory_image
= XCNEWVEC (gdb_byte
, total_space
);
344 /* Now copy all of the arguments into the buffer, correctly aligned. */
345 gdb_byte
*data
= memory_image
;
346 for (int i
= 0; i
< nargs
; i
++)
348 unsigned int len
= TYPE_LENGTH (value_type (args
[i
]));
349 unsigned int space
= align_up (len
, 4);
351 memcpy (data
, value_contents (args
[i
]), (size_t) len
);
353 debug_printf ("arc: copying arg %d, val 0x%08x, len %d to mem\n",
354 i
, *((int *) value_contents (args
[i
])), len
);
359 /* Now load as much as possible of the memory image into registers. */
361 while (arg_reg
<= ARC_LAST_ARG_REGNUM
)
364 debug_printf ("arc: passing 0x%02x%02x%02x%02x in register R%d\n",
365 data
[0], data
[1], data
[2], data
[3], arg_reg
);
367 /* Note we don't use write_unsigned here, since that would convert
368 the byte order, but we are already in the correct byte order. */
369 regcache_cooked_write (regcache
, arg_reg
, data
);
371 data
+= ARC_REGISTER_SIZE
;
372 total_space
-= ARC_REGISTER_SIZE
;
374 /* All the data is now in registers. */
375 if (total_space
== 0)
381 /* If there is any data left, push it onto the stack (in a single write
386 debug_printf ("arc: passing %d bytes on stack\n", total_space
);
389 write_memory (sp
, data
, (int) total_space
);
392 xfree (memory_image
);
395 /* Finally, update the SP register. */
396 regcache_cooked_write_unsigned (regcache
, gdbarch_sp_regnum (gdbarch
), sp
);
401 /* Implement the "push_dummy_code" gdbarch method.
403 We don't actually push any code. We just identify where a breakpoint can
404 be inserted to which we are can return and the resume address where we
407 ARC does not necessarily have an executable stack, so we can't put the
408 return breakpoint there. Instead we put it at the entry point of the
409 function. This means the SP is unchanged.
411 SP is a current stack pointer FUNADDR is an address of the function to be
412 called. ARGS is arguments to pass. NARGS is a number of args to pass.
413 VALUE_TYPE is a type of value returned. REAL_PC is a resume address when
414 the function is called. BP_ADDR is an address where breakpoint should be
415 set. Returns the updated stack pointer. */
418 arc_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
419 struct value
**args
, int nargs
, struct type
*value_type
,
420 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
421 struct regcache
*regcache
)
424 *bp_addr
= entry_point_address ();
428 /* Implement the "cannot_fetch_register" gdbarch method. */
431 arc_cannot_fetch_register (struct gdbarch
*gdbarch
, int regnum
)
433 /* Assume that register is readable if it is unknown. */
437 /* Implement the "cannot_store_register" gdbarch method. */
440 arc_cannot_store_register (struct gdbarch
*gdbarch
, int regnum
)
442 /* Assume that register is writable if it is unknown. */
452 /* Get the return value of a function from the registers/memory used to
453 return it, according to the convention used by the ABI - 4-bytes values are
454 in the R0, while 8-byte values are in the R0-R1.
456 TODO: This implementation ignores the case of "complex double", where
457 according to ABI, value is returned in the R0-R3 registers.
459 TYPE is a returned value's type. VALBUF is a buffer for the returned
463 arc_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
464 struct regcache
*regcache
, gdb_byte
*valbuf
)
466 unsigned int len
= TYPE_LENGTH (type
);
469 debug_printf ("arc: extract_return_value\n");
471 if (len
<= ARC_REGISTER_SIZE
)
475 /* Get the return value from one register. */
476 regcache_cooked_read_unsigned (regcache
, ARC_R0_REGNUM
, &val
);
477 store_unsigned_integer (valbuf
, (int) len
,
478 gdbarch_byte_order (gdbarch
), val
);
481 debug_printf ("arc: returning 0x%s\n", phex (val
, ARC_REGISTER_SIZE
));
483 else if (len
<= ARC_REGISTER_SIZE
* 2)
487 /* Get the return value from two registers. */
488 regcache_cooked_read_unsigned (regcache
, ARC_R0_REGNUM
, &low
);
489 regcache_cooked_read_unsigned (regcache
, ARC_R1_REGNUM
, &high
);
491 store_unsigned_integer (valbuf
, ARC_REGISTER_SIZE
,
492 gdbarch_byte_order (gdbarch
), low
);
493 store_unsigned_integer (valbuf
+ ARC_REGISTER_SIZE
,
494 (int) len
- ARC_REGISTER_SIZE
,
495 gdbarch_byte_order (gdbarch
), high
);
498 debug_printf ("arc: returning 0x%s%s\n",
499 phex (high
, ARC_REGISTER_SIZE
),
500 phex (low
, ARC_REGISTER_SIZE
));
503 error (_("arc: extract_return_value: type length %u too large"), len
);
507 /* Store the return value of a function into the registers/memory used to
508 return it, according to the convention used by the ABI.
510 TODO: This implementation ignores the case of "complex double", where
511 according to ABI, value is returned in the R0-R3 registers.
513 TYPE is a returned value's type. VALBUF is a buffer with the value to
517 arc_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
518 struct regcache
*regcache
, const gdb_byte
*valbuf
)
520 unsigned int len
= TYPE_LENGTH (type
);
523 debug_printf ("arc: store_return_value\n");
525 if (len
<= ARC_REGISTER_SIZE
)
529 /* Put the return value into one register. */
530 val
= extract_unsigned_integer (valbuf
, (int) len
,
531 gdbarch_byte_order (gdbarch
));
532 regcache_cooked_write_unsigned (regcache
, ARC_R0_REGNUM
, val
);
535 debug_printf ("arc: storing 0x%s\n", phex (val
, ARC_REGISTER_SIZE
));
537 else if (len
<= ARC_REGISTER_SIZE
* 2)
541 /* Put the return value into two registers. */
542 low
= extract_unsigned_integer (valbuf
, ARC_REGISTER_SIZE
,
543 gdbarch_byte_order (gdbarch
));
544 high
= extract_unsigned_integer (valbuf
+ ARC_REGISTER_SIZE
,
545 (int) len
- ARC_REGISTER_SIZE
,
546 gdbarch_byte_order (gdbarch
));
548 regcache_cooked_write_unsigned (regcache
, ARC_R0_REGNUM
, low
);
549 regcache_cooked_write_unsigned (regcache
, ARC_R1_REGNUM
, high
);
552 debug_printf ("arc: storing 0x%s%s\n",
553 phex (high
, ARC_REGISTER_SIZE
),
554 phex (low
, ARC_REGISTER_SIZE
));
557 error (_("arc_store_return_value: type length too large."));
560 /* Implement the "get_longjmp_target" gdbarch method. */
563 arc_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
566 debug_printf ("arc: get_longjmp_target\n");
568 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
569 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
570 int pc_offset
= tdep
->jb_pc
* ARC_REGISTER_SIZE
;
571 gdb_byte buf
[ARC_REGISTER_SIZE
];
572 CORE_ADDR jb_addr
= get_frame_register_unsigned (frame
, ARC_FIRST_ARG_REGNUM
);
574 if (target_read_memory (jb_addr
+ pc_offset
, buf
, ARC_REGISTER_SIZE
))
575 return 0; /* Failed to read from memory. */
577 *pc
= extract_unsigned_integer (buf
, ARC_REGISTER_SIZE
,
578 gdbarch_byte_order (gdbarch
));
582 /* Implement the "return_value" gdbarch method. */
584 static enum return_value_convention
585 arc_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
586 struct type
*valtype
, struct regcache
*regcache
,
587 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
589 /* If the return type is a struct, or a union, or would occupy more than two
590 registers, the ABI uses the "struct return convention": the calling
591 function passes a hidden first parameter to the callee (in R0). That
592 parameter is the address at which the value being returned should be
593 stored. Otherwise, the result is returned in registers. */
594 int is_struct_return
= (TYPE_CODE (valtype
) == TYPE_CODE_STRUCT
595 || TYPE_CODE (valtype
) == TYPE_CODE_UNION
596 || TYPE_LENGTH (valtype
) > 2 * ARC_REGISTER_SIZE
);
599 debug_printf ("arc: return_value (readbuf = %s, writebuf = %s)\n",
600 host_address_to_string (readbuf
),
601 host_address_to_string (writebuf
));
603 if (writebuf
!= NULL
)
605 /* Case 1. GDB should not ask us to set a struct return value: it
606 should know the struct return location and write the value there
608 gdb_assert (!is_struct_return
);
609 arc_store_return_value (gdbarch
, valtype
, regcache
, writebuf
);
611 else if (readbuf
!= NULL
)
613 /* Case 2. GDB should not ask us to get a struct return value: it
614 should know the struct return location and read the value from there
616 gdb_assert (!is_struct_return
);
617 arc_extract_return_value (gdbarch
, valtype
, regcache
, readbuf
);
620 return (is_struct_return
621 ? RETURN_VALUE_STRUCT_CONVENTION
622 : RETURN_VALUE_REGISTER_CONVENTION
);
625 /* Return the base address of the frame. For ARC, the base address is the
629 arc_frame_base_address (struct frame_info
*this_frame
, void **prologue_cache
)
631 return (CORE_ADDR
) get_frame_register_unsigned (this_frame
, ARC_FP_REGNUM
);
634 /* Implement the "skip_prologue" gdbarch method.
636 Skip the prologue for the function at PC. This is done by checking from
637 the line information read from the DWARF, if possible; otherwise, we scan
638 the function prologue to find its end. */
641 arc_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
644 debug_printf ("arc: skip_prologue\n");
647 const char *func_name
;
649 /* See what the symbol table says. */
650 if (find_pc_partial_function (pc
, &func_name
, &func_addr
, NULL
))
652 /* Found a function. */
653 CORE_ADDR postprologue_pc
654 = skip_prologue_using_sal (gdbarch
, func_addr
);
656 if (postprologue_pc
!= 0)
657 return std::max (pc
, postprologue_pc
);
660 /* No prologue info in symbol table, have to analyze prologue. */
662 /* Find an upper limit on the function prologue using the debug
663 information. If the debug information could not be used to provide that
664 bound, then pass 0 and arc_scan_prologue will estimate value itself. */
665 CORE_ADDR limit_pc
= skip_prologue_using_sal (gdbarch
, pc
);
666 /* We don't have a proper analyze_prologue function yet, but its result
667 should be returned here. Currently GDB will just stop at the first
668 instruction of function if debug information doesn't have prologue info;
669 and if there is a debug info about prologue - this code path will not be
671 return (limit_pc
== 0 ? pc
: limit_pc
);
674 /* Implement the "print_insn" gdbarch method.
676 arc_get_disassembler () may return different functions depending on bfd
677 type, so it is not possible to pass print_insn directly to
678 set_gdbarch_print_insn (). Instead this wrapper function is used. It also
679 may be used by other functions to get disassemble_info for address. It is
680 important to note, that those print_insn from opcodes always print
681 instruction to the stream specified in the INFO. If this is not desired,
682 then either `print_insn` function in INFO should be set to some function
683 that will not print, or `stream` should be different from standard
687 arc_delayed_print_insn (bfd_vma addr
, struct disassemble_info
*info
)
689 int (*print_insn
) (bfd_vma
, struct disassemble_info
*);
690 /* exec_bfd may be null, if GDB is run without a target BFD file. Opcodes
691 will handle NULL value gracefully. */
692 print_insn
= arc_get_disassembler (exec_bfd
);
693 gdb_assert (print_insn
!= NULL
);
694 return print_insn (addr
, info
);
697 /* Baremetal breakpoint instructions.
699 ARC supports both big- and little-endian. However, instructions for
700 little-endian processors are encoded in the middle-endian: half-words are
701 in big-endian, while bytes inside the half-words are in little-endian; data
702 is represented in the "normal" little-endian. Big-endian processors treat
703 data and code identically.
705 Assuming the number 0x01020304, it will be presented this way:
707 Address : N N+1 N+2 N+3
708 little-endian : 0x04 0x03 0x02 0x01
709 big-endian : 0x01 0x02 0x03 0x04
710 ARC middle-endian : 0x02 0x01 0x04 0x03
713 static const gdb_byte arc_brk_s_be
[] = { 0x7f, 0xff };
714 static const gdb_byte arc_brk_s_le
[] = { 0xff, 0x7f };
715 static const gdb_byte arc_brk_be
[] = { 0x25, 0x6f, 0x00, 0x3f };
716 static const gdb_byte arc_brk_le
[] = { 0x6f, 0x25, 0x3f, 0x00 };
718 /* For ARC ELF, breakpoint uses the 16-bit BRK_S instruction, which is 0x7fff
719 (little endian) or 0xff7f (big endian). We used to insert BRK_S even
720 instead of 32-bit instructions, which works mostly ok, unless breakpoint is
721 inserted into delay slot instruction. In this case if branch is taken
722 BLINK value will be set to address of instruction after delay slot, however
723 if we replaced 32-bit instruction in delay slot with 16-bit long BRK_S,
724 then BLINK value will have an invalid value - it will point to the address
725 after the BRK_S (which was there at the moment of branch execution) while
726 it should point to the address after the 32-bit long instruction. To avoid
727 such issues this function disassembles instruction at target location and
730 ARC 600 supports only 16-bit BRK_S.
732 NB: Baremetal GDB uses BRK[_S], while user-space GDB uses TRAP_S. BRK[_S]
733 is much better because it doesn't commit unlike TRAP_S, so it can be set in
734 delay slots; however it cannot be used in user-mode, hence usage of TRAP_S
735 in GDB for user-space. */
737 /* Implement the "breakpoint_kind_from_pc" gdbarch method. */
740 arc_breakpoint_kind_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pcptr
)
742 size_t length_with_limm
= gdb_insn_length (gdbarch
, *pcptr
);
744 /* Replace 16-bit instruction with BRK_S, replace 32-bit instructions with
745 BRK. LIMM is part of instruction length, so it can be either 4 or 8
746 bytes for 32-bit instructions. */
747 if ((length_with_limm
== 4 || length_with_limm
== 8)
748 && !arc_mach_is_arc600 (gdbarch
))
749 return sizeof (arc_brk_le
);
751 return sizeof (arc_brk_s_le
);
754 /* Implement the "sw_breakpoint_from_kind" gdbarch method. */
756 static const gdb_byte
*
757 arc_sw_breakpoint_from_kind (struct gdbarch
*gdbarch
, int kind
, int *size
)
761 if (kind
== sizeof (arc_brk_le
))
763 return ((gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
769 return ((gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
775 /* Implement the "unwind_pc" gdbarch method. */
778 arc_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
780 int pc_regnum
= gdbarch_pc_regnum (gdbarch
);
781 CORE_ADDR pc
= frame_unwind_register_unsigned (next_frame
, pc_regnum
);
784 debug_printf ("arc: unwind PC: %s\n", paddress (gdbarch
, pc
));
789 /* Implement the "unwind_sp" gdbarch method. */
792 arc_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
794 int sp_regnum
= gdbarch_sp_regnum (gdbarch
);
795 CORE_ADDR sp
= frame_unwind_register_unsigned (next_frame
, sp_regnum
);
798 debug_printf ("arc: unwind SP: %s\n", paddress (gdbarch
, sp
));
803 /* Implement the "frame_align" gdbarch method. */
806 arc_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
808 return align_down (sp
, 4);
811 /* Frame unwinder for normal frames. */
813 static struct arc_frame_cache
*
814 arc_make_frame_cache (struct frame_info
*this_frame
)
817 debug_printf ("arc: frame_cache\n");
819 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
821 CORE_ADDR block_addr
= get_frame_address_in_block (this_frame
);
822 CORE_ADDR prev_pc
= get_frame_pc (this_frame
);
824 CORE_ADDR entrypoint
, prologue_end
;
825 if (find_pc_partial_function (block_addr
, NULL
, &entrypoint
, &prologue_end
))
827 struct symtab_and_line sal
= find_pc_line (entrypoint
, 0);
829 /* No line info so use current PC. */
830 prologue_end
= prev_pc
;
831 else if (sal
.end
< prologue_end
)
832 /* The next line begins after the function end. */
833 prologue_end
= sal
.end
;
835 prologue_end
= std::min (prologue_end
, prev_pc
);
839 entrypoint
= get_frame_register_unsigned (this_frame
,
840 gdbarch_pc_regnum (gdbarch
));
844 /* Allocate new frame cache instance and space for saved register info.
845 * FRAME_OBSTACK_ZALLOC will initialize fields to zeroes. */
846 struct arc_frame_cache
*cache
847 = FRAME_OBSTACK_ZALLOC (struct arc_frame_cache
);
848 cache
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
850 /* Should call analyze_prologue here, when it will be implemented. */
855 /* Implement the "this_id" frame_unwind method. */
858 arc_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
859 struct frame_id
*this_id
)
862 debug_printf ("arc: frame_this_id\n");
864 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
866 if (*this_cache
== NULL
)
867 *this_cache
= arc_make_frame_cache (this_frame
);
868 struct arc_frame_cache
*cache
= (struct arc_frame_cache
*) (*this_cache
);
870 CORE_ADDR stack_addr
= cache
->prev_sp
;
872 /* There are 4 possible situation which decide how frame_id->code_addr is
875 1) Function is compiled with option -g. Then frame_id will be created
876 in dwarf_* function and not in this function. NB: even if target
877 binary is compiled with -g, some std functions like __start and _init
878 are not, so they still will follow one of the following choices.
880 2) Function is compiled without -g and binary hasn't been stripped in
881 any way. In this case GDB still has enough information to evaluate
882 frame code_addr properly. This case is covered by call to
885 3) Binary has been striped with option -g (strip debug symbols). In
886 this case there is still enough symbols for get_frame_func () to work
887 properly, so this case is also covered by it.
889 4) Binary has been striped with option -s (strip all symbols). In this
890 case GDB cannot get function start address properly, so we return current
893 CORE_ADDR code_addr
= get_frame_func (this_frame
);
895 code_addr
= get_frame_register_unsigned (this_frame
,
896 gdbarch_pc_regnum (gdbarch
));
898 *this_id
= frame_id_build (stack_addr
, code_addr
);
901 /* Implement the "prev_register" frame_unwind method. */
903 static struct value
*
904 arc_frame_prev_register (struct frame_info
*this_frame
,
905 void **this_cache
, int regnum
)
907 if (*this_cache
== NULL
)
908 *this_cache
= arc_make_frame_cache (this_frame
);
909 struct arc_frame_cache
*cache
= (struct arc_frame_cache
*) (*this_cache
);
911 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
913 /* If we are asked to unwind the PC, then we need to return BLINK instead:
914 the saved value of PC points into this frame's function's prologue, not
915 the next frame's function's resume location. */
916 if (regnum
== gdbarch_pc_regnum (gdbarch
))
917 regnum
= ARC_BLINK_REGNUM
;
919 /* SP is a special case - we should return prev_sp, because
920 trad_frame_get_prev_register will return _current_ SP value.
921 Alternatively we could have stored cache->prev_sp in the cache->saved
922 regs, but here we follow the lead of AArch64, ARM and Xtensa and will
923 leave that logic in this function, instead of prologue analyzers. That I
924 think is a bit more clear as `saved_regs` should contain saved regs, not
927 Because value has been computed, "got_constant" should be used, so that
928 returned value will be a "not_lval" - immutable. */
930 if (regnum
== gdbarch_sp_regnum (gdbarch
))
931 return frame_unwind_got_constant (this_frame
, regnum
, cache
->prev_sp
);
933 return trad_frame_get_prev_register (this_frame
, cache
->saved_regs
, regnum
);
936 /* Implement the "init_reg" dwarf2_frame method. */
939 arc_dwarf2_frame_init_reg (struct gdbarch
*gdbarch
, int regnum
,
940 struct dwarf2_frame_state_reg
*reg
,
941 struct frame_info
*info
)
943 if (regnum
== gdbarch_pc_regnum (gdbarch
))
944 /* The return address column. */
945 reg
->how
= DWARF2_FRAME_REG_RA
;
946 else if (regnum
== gdbarch_sp_regnum (gdbarch
))
947 /* The call frame address. */
948 reg
->how
= DWARF2_FRAME_REG_CFA
;
951 /* Structure defining the ARC ordinary frame unwind functions. Since we are
952 the fallback unwinder, we use the default frame sniffer, which always
953 accepts the frame. */
955 static const struct frame_unwind arc_frame_unwind
= {
957 default_frame_unwind_stop_reason
,
959 arc_frame_prev_register
,
961 default_frame_sniffer
,
967 static const struct frame_base arc_normal_base
= {
969 arc_frame_base_address
,
970 arc_frame_base_address
,
971 arc_frame_base_address
974 /* Initialize target description for the ARC.
976 Returns TRUE if input tdesc was valid and in this case it will assign TDESC
977 and TDESC_DATA output parameters. */
980 arc_tdesc_init (struct gdbarch_info info
, const struct target_desc
**tdesc
,
981 struct tdesc_arch_data
**tdesc_data
)
984 debug_printf ("arc: Target description initialization.\n");
986 const struct target_desc
*tdesc_loc
= info
.target_desc
;
988 /* Depending on whether this is ARCompact or ARCv2 we will assign
989 different default registers sets (which will differ in exactly two core
990 registers). GDB will also refuse to accept register feature from invalid
991 ISA - v2 features can be used only with v2 ARChitecture. We read
992 bfd_arch_info, which looks like to be a safe bet here, as it looks like it
993 is always initialized even when we don't pass any elf file to GDB at all
994 (it uses default arch in this case). Also GDB will call this function
995 multiple times, and if XML target description file contains architecture
996 specifications, then GDB will set this architecture to info.bfd_arch_info,
997 overriding value from ELF file if they are different. That means that,
998 where matters, this value is always our best guess on what CPU we are
999 debugging. It has been noted that architecture specified in tdesc file
1000 has higher precedence over ELF and even "set architecture" - that is,
1001 using "set architecture" command will have no effect when tdesc has "arch"
1003 /* Cannot use arc_mach_is_arcv2 (), because gdbarch is not created yet. */
1004 const int is_arcv2
= (info
.bfd_arch_info
->mach
== bfd_mach_arc_arcv2
);
1006 const char *const *core_regs
;
1007 const char *core_feature_name
;
1009 /* If target doesn't provide a description - use default one. */
1010 if (!tdesc_has_registers (tdesc_loc
))
1014 tdesc_loc
= tdesc_arc_v2
;
1016 debug_printf ("arc: Using default register set for ARC v2.\n");
1020 tdesc_loc
= tdesc_arc_arcompact
;
1022 debug_printf ("arc: Using default register set for ARCompact.\n");
1028 debug_printf ("arc: Using provided register set.\n");
1030 gdb_assert (tdesc_loc
!= NULL
);
1032 /* Now we can search for base registers. Core registers can be either full
1033 or reduced. Summary:
1035 - core.v2 + aux-minimal
1036 - core-reduced.v2 + aux-minimal
1037 - core.arcompact + aux-minimal
1039 NB: It is entirely feasible to have ARCompact with reduced core regs, but
1040 we ignore that because GCC doesn't support that and at the same time
1041 ARCompact is considered obsolete, so there is not much reason to support
1043 const struct tdesc_feature
*feature
1044 = tdesc_find_feature (tdesc_loc
, core_v2_feature_name
);
1045 if (feature
!= NULL
)
1047 /* Confirm that register and architecture match, to prevent accidents in
1048 some situations. This code will trigger an error if:
1050 1. XML tdesc doesn't specify arch explicitly, registers are for arch
1051 X, but ELF specifies arch Y.
1053 2. XML tdesc specifies arch X, but contains registers for arch Y.
1055 It will not protect from case where XML or ELF specify arch X,
1056 registers are for the same arch X, but the real target is arch Y. To
1057 detect this case we need to check IDENTITY register. */
1060 arc_print (_("Error: ARC v2 target description supplied for "
1061 "non-ARCv2 target.\n"));
1065 is_reduced_rf
= FALSE
;
1066 core_feature_name
= core_v2_feature_name
;
1067 core_regs
= core_v2_register_names
;
1071 feature
= tdesc_find_feature (tdesc_loc
, core_reduced_v2_feature_name
);
1072 if (feature
!= NULL
)
1076 arc_print (_("Error: ARC v2 target description supplied for "
1077 "non-ARCv2 target.\n"));
1081 is_reduced_rf
= TRUE
;
1082 core_feature_name
= core_reduced_v2_feature_name
;
1083 core_regs
= core_v2_register_names
;
1087 feature
= tdesc_find_feature (tdesc_loc
,
1088 core_arcompact_feature_name
);
1089 if (feature
!= NULL
)
1093 arc_print (_("Error: ARCompact target description supplied "
1094 "for non-ARCompact target.\n"));
1098 is_reduced_rf
= FALSE
;
1099 core_feature_name
= core_arcompact_feature_name
;
1100 core_regs
= core_arcompact_register_names
;
1104 arc_print (_("Error: Couldn't find core register feature in "
1105 "supplied target description."));
1111 struct tdesc_arch_data
*tdesc_data_loc
= tdesc_data_alloc ();
1113 gdb_assert (feature
!= NULL
);
1116 for (int i
= 0; i
<= ARC_LAST_CORE_REGNUM
; i
++)
1118 /* If rf16, then skip extra registers. */
1119 if (is_reduced_rf
&& ((i
>= ARC_R4_REGNUM
&& i
<= ARC_R9_REGNUM
)
1120 || (i
>= ARC_R16_REGNUM
&& i
<= ARC_R25_REGNUM
)))
1123 valid_p
= tdesc_numbered_register (feature
, tdesc_data_loc
, i
,
1126 /* - Ignore errors in extension registers - they are optional.
1127 - Ignore missing ILINK because it doesn't make sense for Linux.
1128 - Ignore missing ILINK2 when architecture is ARCompact, because it
1129 doesn't make sense for Linux targets.
1131 In theory those optional registers should be in separate features, but
1132 that would create numerous but tiny features, which looks like an
1133 overengineering of a rather simple task. */
1134 if (!valid_p
&& (i
<= ARC_SP_REGNUM
|| i
== ARC_BLINK_REGNUM
1135 || i
== ARC_LP_COUNT_REGNUM
|| i
== ARC_PCL_REGNUM
1136 || (i
== ARC_R30_REGNUM
&& is_arcv2
)))
1138 arc_print (_("Error: Cannot find required register `%s' in "
1139 "feature `%s'.\n"), core_regs
[i
], core_feature_name
);
1140 tdesc_data_cleanup (tdesc_data_loc
);
1145 /* Mandatory AUX registeres are intentionally few and are common between
1146 ARCompact and ARC v2, so same code can be used for both. */
1147 feature
= tdesc_find_feature (tdesc_loc
, aux_minimal_feature_name
);
1148 if (feature
== NULL
)
1150 arc_print (_("Error: Cannot find required feature `%s' in supplied "
1151 "target description.\n"), aux_minimal_feature_name
);
1152 tdesc_data_cleanup (tdesc_data_loc
);
1156 for (int i
= ARC_FIRST_AUX_REGNUM
; i
<= ARC_LAST_AUX_REGNUM
; i
++)
1158 const char *name
= aux_minimal_register_names
[i
- ARC_FIRST_AUX_REGNUM
];
1159 valid_p
= tdesc_numbered_register (feature
, tdesc_data_loc
, i
, name
);
1162 arc_print (_("Error: Cannot find required register `%s' "
1163 "in feature `%s'.\n"),
1164 name
, tdesc_feature_name (feature
));
1165 tdesc_data_cleanup (tdesc_data_loc
);
1171 *tdesc_data
= tdesc_data_loc
;
1176 /* Implement the "init" gdbarch method. */
1178 static struct gdbarch
*
1179 arc_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1181 const struct target_desc
*tdesc
;
1182 struct tdesc_arch_data
*tdesc_data
;
1185 debug_printf ("arc: Architecture initialization.\n");
1187 if (!arc_tdesc_init (info
, &tdesc
, &tdesc_data
))
1190 /* Allocate the ARC-private target-dependent information structure, and the
1191 GDB target-independent information structure. */
1192 struct gdbarch_tdep
*tdep
= XCNEW (struct gdbarch_tdep
);
1193 tdep
->jb_pc
= -1; /* No longjmp support by default. */
1194 struct gdbarch
*gdbarch
= gdbarch_alloc (&info
, tdep
);
1197 set_gdbarch_short_bit (gdbarch
, 16);
1198 set_gdbarch_int_bit (gdbarch
, 32);
1199 set_gdbarch_long_bit (gdbarch
, 32);
1200 set_gdbarch_long_long_bit (gdbarch
, 64);
1201 set_gdbarch_long_long_align_bit (gdbarch
, 32);
1202 set_gdbarch_float_bit (gdbarch
, 32);
1203 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
1204 set_gdbarch_double_bit (gdbarch
, 64);
1205 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
1206 set_gdbarch_ptr_bit (gdbarch
, 32);
1207 set_gdbarch_addr_bit (gdbarch
, 32);
1208 set_gdbarch_char_signed (gdbarch
, 0);
1210 set_gdbarch_write_pc (gdbarch
, arc_write_pc
);
1212 set_gdbarch_virtual_frame_pointer (gdbarch
, arc_virtual_frame_pointer
);
1214 /* tdesc_use_registers expects gdbarch_num_regs to return number of registers
1215 parsed by gdbarch_init, and then it will add all of the remaining
1216 registers and will increase number of registers. */
1217 set_gdbarch_num_regs (gdbarch
, ARC_LAST_REGNUM
+ 1);
1218 set_gdbarch_num_pseudo_regs (gdbarch
, 0);
1219 set_gdbarch_sp_regnum (gdbarch
, ARC_SP_REGNUM
);
1220 set_gdbarch_pc_regnum (gdbarch
, ARC_PC_REGNUM
);
1221 set_gdbarch_ps_regnum (gdbarch
, ARC_STATUS32_REGNUM
);
1222 set_gdbarch_fp0_regnum (gdbarch
, -1); /* No FPU registers. */
1224 set_gdbarch_dummy_id (gdbarch
, arc_dummy_id
);
1225 set_gdbarch_push_dummy_call (gdbarch
, arc_push_dummy_call
);
1226 set_gdbarch_push_dummy_code (gdbarch
, arc_push_dummy_code
);
1228 set_gdbarch_cannot_fetch_register (gdbarch
, arc_cannot_fetch_register
);
1229 set_gdbarch_cannot_store_register (gdbarch
, arc_cannot_store_register
);
1231 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
1233 set_gdbarch_return_value (gdbarch
, arc_return_value
);
1235 set_gdbarch_skip_prologue (gdbarch
, arc_skip_prologue
);
1236 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1238 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, arc_breakpoint_kind_from_pc
);
1239 set_gdbarch_sw_breakpoint_from_kind (gdbarch
, arc_sw_breakpoint_from_kind
);
1241 /* On ARC 600 BRK_S instruction advances PC, unlike other ARC cores. */
1242 if (!arc_mach_is_arc600 (gdbarch
))
1243 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
1245 set_gdbarch_decr_pc_after_break (gdbarch
, 2);
1247 set_gdbarch_unwind_pc (gdbarch
, arc_unwind_pc
);
1248 set_gdbarch_unwind_sp (gdbarch
, arc_unwind_sp
);
1250 set_gdbarch_frame_align (gdbarch
, arc_frame_align
);
1252 set_gdbarch_print_insn (gdbarch
, arc_delayed_print_insn
);
1254 set_gdbarch_cannot_step_breakpoint (gdbarch
, 1);
1256 /* "nonsteppable" watchpoint means that watchpoint triggers before
1257 instruction is committed, therefore it is required to remove watchpoint
1258 to step though instruction that triggers it. ARC watchpoints trigger
1259 only after instruction is committed, thus there is no need to remove
1260 them. In fact on ARC watchpoint for memory writes may trigger with more
1261 significant delay, like one or two instructions, depending on type of
1262 memory where write is performed (CCM or external) and next instruction
1263 after the memory write. */
1264 set_gdbarch_have_nonsteppable_watchpoint (gdbarch
, 0);
1266 /* This doesn't include possible long-immediate value. */
1267 set_gdbarch_max_insn_length (gdbarch
, 4);
1269 /* Frame unwinders and sniffers. */
1270 dwarf2_frame_set_init_reg (gdbarch
, arc_dwarf2_frame_init_reg
);
1271 dwarf2_append_unwinders (gdbarch
);
1272 frame_unwind_append_unwinder (gdbarch
, &arc_frame_unwind
);
1273 frame_base_set_default (gdbarch
, &arc_normal_base
);
1275 /* Setup stuff specific to a particular environment (baremetal or Linux).
1276 It can override functions set earlier. */
1277 gdbarch_init_osabi (info
, gdbarch
);
1279 if (tdep
->jb_pc
>= 0)
1280 set_gdbarch_get_longjmp_target (gdbarch
, arc_get_longjmp_target
);
1282 tdesc_use_registers (gdbarch
, tdesc
, tdesc_data
);
1287 /* Implement the "dump_tdep" gdbarch method. */
1290 arc_dump_tdep (struct gdbarch
*gdbarch
, struct ui_file
*file
)
1292 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1294 fprintf_unfiltered (file
, "arc_dump_tdep: jb_pc = %i\n", tdep
->jb_pc
);
1297 /* Suppress warning from -Wmissing-prototypes. */
1298 extern initialize_file_ftype _initialize_arc_tdep
;
1301 _initialize_arc_tdep (void)
1303 gdbarch_register (bfd_arch_arc
, arc_gdbarch_init
, arc_dump_tdep
);
1305 initialize_tdesc_arc_v2 ();
1306 initialize_tdesc_arc_arcompact ();
1308 /* Register ARC-specific commands with gdb. */
1310 /* Debug internals for ARC GDB. */
1311 add_setshow_zinteger_cmd ("arc", class_maintenance
,
1313 _("Set ARC specific debugging."),
1314 _("Show ARC specific debugging."),
1315 _("Non-zero enables ARC specific debugging."),
1316 NULL
, NULL
, &setdebuglist
, &showdebuglist
);