gdb/arch/arm.c

   1 /* Common target dependent code for GDB on ARM systems.
   2
   3    Copyright (C) 1988-2015 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #include "common-defs.h"
  21 #include "arm.h"
  22
  23 /* See arm.h.  */
  24
  25 int
  26 thumb_insn_size (unsigned short inst1)
  27 {
  28   if ((inst1 & 0xe000) == 0xe000 && (inst1 & 0x1800) != 0)
  29     return 4;
  30   else
  31     return 2;
  32 }
  33
  34 /* See arm.h.  */
  35
  36 int
  37 bitcount (unsigned long val)
  38 {
  39   int nbits;
  40   for (nbits = 0; val != 0; nbits++)
  41     val &= val - 1;             /* Delete rightmost 1-bit in val.  */
  42   return nbits;
  43 }
  44
  45 /* See arm.h.  */
  46
  47 int
  48 condition_true (unsigned long cond, unsigned long status_reg)
  49 {
  50   if (cond == INST_AL || cond == INST_NV)
  51     return 1;
  52
  53   switch (cond)
  54     {
  55     case INST_EQ:
  56       return ((status_reg & FLAG_Z) != 0);
  57     case INST_NE:
  58       return ((status_reg & FLAG_Z) == 0);
  59     case INST_CS:
  60       return ((status_reg & FLAG_C) != 0);
  61     case INST_CC:
  62       return ((status_reg & FLAG_C) == 0);
  63     case INST_MI:
  64       return ((status_reg & FLAG_N) != 0);
  65     case INST_PL:
  66       return ((status_reg & FLAG_N) == 0);
  67     case INST_VS:
  68       return ((status_reg & FLAG_V) != 0);
  69     case INST_VC:
  70       return ((status_reg & FLAG_V) == 0);
  71     case INST_HI:
  72       return ((status_reg & (FLAG_C | FLAG_Z)) == FLAG_C);
  73     case INST_LS:
  74       return ((status_reg & (FLAG_C | FLAG_Z)) != FLAG_C);
  75     case INST_GE:
  76       return (((status_reg & FLAG_N) == 0) == ((status_reg & FLAG_V) == 0));
  77     case INST_LT:
  78       return (((status_reg & FLAG_N) == 0) != ((status_reg & FLAG_V) == 0));
  79     case INST_GT:
  80       return (((status_reg & FLAG_Z) == 0)
  81               && (((status_reg & FLAG_N) == 0)
  82                   == ((status_reg & FLAG_V) == 0)));
  83     case INST_LE:
  84       return (((status_reg & FLAG_Z) != 0)
  85               || (((status_reg & FLAG_N) == 0)
  86                   != ((status_reg & FLAG_V) == 0)));
  87     }
  88   return 1;
  89 }