gdb/arm-linux-nat.c

   1 /* GNU/Linux on ARM native support.
   2    Copyright (C) 1999-2019 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "defs.h"
  20
  21 /* Standard C includes.  */
  22 #include <elf/common.h>
  23 #include <sys/procfs.h>
  24 #include <sys/user.h>
  25 #include <sys/utsname.h>
  26
  27 /* Local non-gdb includes.  */
  28 #include "aarch32-linux-nat.h"
  29 #include "arm-linux-tdep.h"
  30 #include "arm-tdep.h"
  31 #include "auxv.h"
  32 #include "gdbcore.h"
  33 #include "gdbthread.h"
  34 #include "inferior.h"
  35 #include "linux-nat.h"
  36 #include "linux-tdep.h"
  37 #include "nat/gdb_ptrace.h"
  38 #include "nat/linux-ptrace.h"
  39 #include "observable.h"
  40 #include "regcache.h"
  41 #include "target-descriptions.h"
  42 #include "target.h"
  43
  44 /* Prototypes for supply_gregset etc.  */
  45 #include "gregset.h"
  46
  47 /* Defines ps_err_e, struct ps_prochandle.  */
  48 #include "gdb_proc_service.h"
  49
  50 #ifndef PTRACE_GET_THREAD_AREA
  51 #define PTRACE_GET_THREAD_AREA 22
  52 #endif
  53
  54 #ifndef PTRACE_GETWMMXREGS
  55 #define PTRACE_GETWMMXREGS 18
  56 #define PTRACE_SETWMMXREGS 19
  57 #endif
  58
  59 #ifndef PTRACE_GETVFPREGS
  60 #define PTRACE_GETVFPREGS 27
  61 #define PTRACE_SETVFPREGS 28
  62 #endif
  63
  64 #ifndef PTRACE_GETHBPREGS
  65 #define PTRACE_GETHBPREGS 29
  66 #define PTRACE_SETHBPREGS 30
  67 #endif
  68
  69 extern int arm_apcs_32;
  70
  71 class arm_linux_nat_target final : public linux_nat_target
  72 {
  73 public:
  74   /* Add our register access methods.  */
  75   void fetch_registers (struct regcache *, int) override;
  76   void store_registers (struct regcache *, int) override;
  77
  78   /* Add our hardware breakpoint and watchpoint implementation.  */
  79   int can_use_hw_breakpoint (enum bptype, int, int) override;
  80
  81   int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  82
  83   int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  84
  85   int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
  86
  87   int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  88                          struct expression *) override;
  89
  90   int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  91                          struct expression *) override;
  92   bool stopped_by_watchpoint () override;
  93
  94   bool stopped_data_address (CORE_ADDR *) override;
  95
  96   bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
  97
  98   const struct target_desc *read_description () override;
  99
 100   /* Override linux_nat_target low methods.  */
 101
 102   /* Handle thread creation and exit.  */
 103   void low_new_thread (struct lwp_info *lp) override;
 104   void low_delete_thread (struct arch_lwp_info *lp) override;
 105   void low_prepare_to_resume (struct lwp_info *lp) override;
 106
 107   /* Handle process creation and exit.  */
 108   void low_new_fork (struct lwp_info *parent, pid_t child_pid) override;
 109   void low_forget_process (pid_t pid) override;
 110 };
 111
 112 static arm_linux_nat_target the_arm_linux_nat_target;
 113
 114 /* Get the whole floating point state of the process and store it
 115    into regcache.  */
 116
 117 static void
 118 fetch_fpregs (struct regcache *regcache)
 119 {
 120   int ret, regno, tid;
 121   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 122
 123   /* Get the thread id for the ptrace call.  */
 124   tid = regcache->ptid ().lwp ();
 125
 126   /* Read the floating point state.  */
 127   if (have_ptrace_getregset == TRIBOOL_TRUE)
 128     {
 129       struct iovec iov;
 130
 131       iov.iov_base = &fp;
 132       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 133
 134       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
 135     }
 136   else
 137     ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 138
 139   if (ret < 0)
 140     perror_with_name (_("Unable to fetch the floating point registers."));
 141
 142   /* Fetch fpsr.  */
 143   regcache->raw_supply (ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 144
 145   /* Fetch the floating point registers.  */
 146   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 147     supply_nwfpe_register (regcache, regno, fp);
 148 }
 149
 150 /* Save the whole floating point state of the process using
 151    the contents from regcache.  */
 152
 153 static void
 154 store_fpregs (const struct regcache *regcache)
 155 {
 156   int ret, regno, tid;
 157   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 158
 159   /* Get the thread id for the ptrace call.  */
 160   tid = regcache->ptid ().lwp ();
 161
 162   /* Read the floating point state.  */
 163   if (have_ptrace_getregset == TRIBOOL_TRUE)
 164     {
 165       elf_fpregset_t fpregs;
 166       struct iovec iov;
 167
 168       iov.iov_base = &fpregs;
 169       iov.iov_len = sizeof (fpregs);
 170
 171       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
 172     }
 173   else
 174     ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 175
 176   if (ret < 0)
 177     perror_with_name (_("Unable to fetch the floating point registers."));
 178
 179   /* Store fpsr.  */
 180   if (REG_VALID == regcache->get_register_status (ARM_FPS_REGNUM))
 181     regcache->raw_collect (ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 182
 183   /* Store the floating point registers.  */
 184   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 185     if (REG_VALID == regcache->get_register_status (regno))
 186       collect_nwfpe_register (regcache, regno, fp);
 187
 188   if (have_ptrace_getregset == TRIBOOL_TRUE)
 189     {
 190       struct iovec iov;
 191
 192       iov.iov_base = &fp;
 193       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 194
 195       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov);
 196     }
 197   else
 198     ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
 199
 200   if (ret < 0)
 201     perror_with_name (_("Unable to store floating point registers."));
 202 }
 203
 204 /* Fetch all general registers of the process and store into
 205    regcache.  */
 206
 207 static void
 208 fetch_regs (struct regcache *regcache)
 209 {
 210   int ret, tid;
 211   elf_gregset_t regs;
 212
 213   /* Get the thread id for the ptrace call.  */
 214   tid = regcache->ptid ().lwp ();
 215
 216   if (have_ptrace_getregset == TRIBOOL_TRUE)
 217     {
 218       struct iovec iov;
 219
 220       iov.iov_base = &regs;
 221       iov.iov_len = sizeof (regs);
 222
 223       ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
 224     }
 225   else
 226     ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 227
 228   if (ret < 0)
 229     perror_with_name (_("Unable to fetch general registers."));
 230
 231   aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, arm_apcs_32);
 232 }
 233
 234 static void
 235 store_regs (const struct regcache *regcache)
 236 {
 237   int ret, tid;
 238   elf_gregset_t regs;
 239
 240   /* Get the thread id for the ptrace call.  */
 241   tid = regcache->ptid ().lwp ();
 242
 243   /* Fetch the general registers.  */
 244   if (have_ptrace_getregset == TRIBOOL_TRUE)
 245     {
 246       struct iovec iov;
 247
 248       iov.iov_base = &regs;
 249       iov.iov_len = sizeof (regs);
 250
 251       ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
 252     }
 253   else
 254     ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 255
 256   if (ret < 0)
 257     perror_with_name (_("Unable to fetch general registers."));
 258
 259   aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, arm_apcs_32);
 260
 261   if (have_ptrace_getregset == TRIBOOL_TRUE)
 262     {
 263       struct iovec iov;
 264
 265       iov.iov_base = &regs;
 266       iov.iov_len = sizeof (regs);
 267
 268       ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
 269     }
 270   else
 271     ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 272
 273   if (ret < 0)
 274     perror_with_name (_("Unable to store general registers."));
 275 }
 276
 277 /* Fetch all WMMX registers of the process and store into
 278    regcache.  */
 279
 280 #define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
 281
 282 static void
 283 fetch_wmmx_regs (struct regcache *regcache)
 284 {
 285   char regbuf[IWMMXT_REGS_SIZE];
 286   int ret, regno, tid;
 287
 288   /* Get the thread id for the ptrace call.  */
 289   tid = regcache->ptid ().lwp ();
 290
 291   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 292   if (ret < 0)
 293     perror_with_name (_("Unable to fetch WMMX registers."));
 294
 295   for (regno = 0; regno < 16; regno++)
 296     regcache->raw_supply (regno + ARM_WR0_REGNUM, &regbuf[regno * 8]);
 297
 298   for (regno = 0; regno < 2; regno++)
 299     regcache->raw_supply (regno + ARM_WCSSF_REGNUM,
 300                           &regbuf[16 * 8 + regno * 4]);
 301
 302   for (regno = 0; regno < 4; regno++)
 303     regcache->raw_supply (regno + ARM_WCGR0_REGNUM,
 304                           &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 305 }
 306
 307 static void
 308 store_wmmx_regs (const struct regcache *regcache)
 309 {
 310   char regbuf[IWMMXT_REGS_SIZE];
 311   int ret, regno, tid;
 312
 313   /* Get the thread id for the ptrace call.  */
 314   tid = regcache->ptid ().lwp ();
 315
 316   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 317   if (ret < 0)
 318     perror_with_name (_("Unable to fetch WMMX registers."));
 319
 320   for (regno = 0; regno < 16; regno++)
 321     if (REG_VALID == regcache->get_register_status (regno + ARM_WR0_REGNUM))
 322       regcache->raw_collect (regno + ARM_WR0_REGNUM, &regbuf[regno * 8]);
 323
 324   for (regno = 0; regno < 2; regno++)
 325     if (REG_VALID == regcache->get_register_status (regno + ARM_WCSSF_REGNUM))
 326       regcache->raw_collect (regno + ARM_WCSSF_REGNUM,
 327                              &regbuf[16 * 8 + regno * 4]);
 328
 329   for (regno = 0; regno < 4; regno++)
 330     if (REG_VALID == regcache->get_register_status (regno + ARM_WCGR0_REGNUM))
 331       regcache->raw_collect (regno + ARM_WCGR0_REGNUM,
 332                              &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 333
 334   ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
 335
 336   if (ret < 0)
 337     perror_with_name (_("Unable to store WMMX registers."));
 338 }
 339
 340 static void
 341 fetch_vfp_regs (struct regcache *regcache)
 342 {
 343   gdb_byte regbuf[VFP_REGS_SIZE];
 344   int ret, tid;
 345   struct gdbarch *gdbarch = regcache->arch ();
 346   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 347
 348   /* Get the thread id for the ptrace call.  */
 349   tid = regcache->ptid ().lwp ();
 350
 351   if (have_ptrace_getregset == TRIBOOL_TRUE)
 352     {
 353       struct iovec iov;
 354
 355       iov.iov_base = regbuf;
 356       iov.iov_len = VFP_REGS_SIZE;
 357       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
 358     }
 359   else
 360     ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 361
 362   if (ret < 0)
 363     perror_with_name (_("Unable to fetch VFP registers."));
 364
 365   aarch32_vfp_regcache_supply (regcache, regbuf,
 366                                tdep->vfp_register_count);
 367 }
 368
 369 static void
 370 store_vfp_regs (const struct regcache *regcache)
 371 {
 372   gdb_byte regbuf[VFP_REGS_SIZE];
 373   int ret, tid;
 374   struct gdbarch *gdbarch = regcache->arch ();
 375   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 376
 377   /* Get the thread id for the ptrace call.  */
 378   tid = regcache->ptid ().lwp ();
 379
 380   if (have_ptrace_getregset == TRIBOOL_TRUE)
 381     {
 382       struct iovec iov;
 383
 384       iov.iov_base = regbuf;
 385       iov.iov_len = VFP_REGS_SIZE;
 386       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
 387     }
 388   else
 389     ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 390
 391   if (ret < 0)
 392     perror_with_name (_("Unable to fetch VFP registers (for update)."));
 393
 394   aarch32_vfp_regcache_collect (regcache, regbuf,
 395                                 tdep->vfp_register_count);
 396
 397   if (have_ptrace_getregset == TRIBOOL_TRUE)
 398     {
 399       struct iovec iov;
 400
 401       iov.iov_base = regbuf;
 402       iov.iov_len = VFP_REGS_SIZE;
 403       ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov);
 404     }
 405   else
 406     ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
 407
 408   if (ret < 0)
 409     perror_with_name (_("Unable to store VFP registers."));
 410 }
 411
 412 /* Fetch registers from the child process.  Fetch all registers if
 413    regno == -1, otherwise fetch all general registers or all floating
 414    point registers depending upon the value of regno.  */
 415
 416 void
 417 arm_linux_nat_target::fetch_registers (struct regcache *regcache, int regno)
 418 {
 419   struct gdbarch *gdbarch = regcache->arch ();
 420   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 421
 422   if (-1 == regno)
 423     {
 424       fetch_regs (regcache);
 425       if (tdep->have_wmmx_registers)
 426         fetch_wmmx_regs (regcache);
 427       if (tdep->vfp_register_count > 0)
 428         fetch_vfp_regs (regcache);
 429       if (tdep->have_fpa_registers)
 430         fetch_fpregs (regcache);
 431     }
 432   else
 433     {
 434       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 435         fetch_regs (regcache);
 436       else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
 437         fetch_fpregs (regcache);
 438       else if (tdep->have_wmmx_registers
 439                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 440         fetch_wmmx_regs (regcache);
 441       else if (tdep->vfp_register_count > 0
 442                && regno >= ARM_D0_REGNUM
 443                && (regno < ARM_D0_REGNUM + tdep->vfp_register_count
 444                    || regno == ARM_FPSCR_REGNUM))
 445         fetch_vfp_regs (regcache);
 446     }
 447 }
 448
 449 /* Store registers back into the inferior.  Store all registers if
 450    regno == -1, otherwise store all general registers or all floating
 451    point registers depending upon the value of regno.  */
 452
 453 void
 454 arm_linux_nat_target::store_registers (struct regcache *regcache, int regno)
 455 {
 456   struct gdbarch *gdbarch = regcache->arch ();
 457   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 458
 459   if (-1 == regno)
 460     {
 461       store_regs (regcache);
 462       if (tdep->have_wmmx_registers)
 463         store_wmmx_regs (regcache);
 464       if (tdep->vfp_register_count > 0)
 465         store_vfp_regs (regcache);
 466       if (tdep->have_fpa_registers)
 467         store_fpregs (regcache);
 468     }
 469   else
 470     {
 471       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 472         store_regs (regcache);
 473       else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
 474         store_fpregs (regcache);
 475       else if (tdep->have_wmmx_registers
 476                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 477         store_wmmx_regs (regcache);
 478       else if (tdep->vfp_register_count > 0
 479                && regno >= ARM_D0_REGNUM
 480                && (regno < ARM_D0_REGNUM + tdep->vfp_register_count
 481                    || regno == ARM_FPSCR_REGNUM))
 482         store_vfp_regs (regcache);
 483     }
 484 }
 485
 486 /* Wrapper functions for the standard regset handling, used by
 487    thread debugging.  */
 488
 489 void
 490 fill_gregset (const struct regcache *regcache,
 491               gdb_gregset_t *gregsetp, int regno)
 492 {
 493   arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0);
 494 }
 495
 496 void
 497 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 498 {
 499   arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0);
 500 }
 501
 502 void
 503 fill_fpregset (const struct regcache *regcache,
 504                gdb_fpregset_t *fpregsetp, int regno)
 505 {
 506   arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0);
 507 }
 508
 509 /* Fill GDB's register array with the floating-point register values
 510    in *fpregsetp.  */
 511
 512 void
 513 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 514 {
 515   arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0);
 516 }
 517
 518 /* Fetch the thread-local storage pointer for libthread_db.  */
 519
 520 ps_err_e
 521 ps_get_thread_area (struct ps_prochandle *ph,
 522                     lwpid_t lwpid, int idx, void **base)
 523 {
 524   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 525     return PS_ERR;
 526
 527   /* IDX is the bias from the thread pointer to the beginning of the
 528      thread descriptor.  It has to be subtracted due to implementation
 529      quirks in libthread_db.  */
 530   *base = (void *) ((char *)*base - idx);
 531
 532   return PS_OK;
 533 }
 534
 535 const struct target_desc *
 536 arm_linux_nat_target::read_description ()
 537 {
 538   CORE_ADDR arm_hwcap = linux_get_hwcap (this);
 539
 540   if (have_ptrace_getregset == TRIBOOL_UNKNOWN)
 541     {
 542       elf_gregset_t gpregs;
 543       struct iovec iov;
 544       int tid = inferior_ptid.lwp ();
 545
 546       iov.iov_base = &gpregs;
 547       iov.iov_len = sizeof (gpregs);
 548
 549       /* Check if PTRACE_GETREGSET works.  */
 550       if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0)
 551         have_ptrace_getregset = TRIBOOL_FALSE;
 552       else
 553         have_ptrace_getregset = TRIBOOL_TRUE;
 554     }
 555
 556   if (arm_hwcap & HWCAP_IWMMXT)
 557     return tdesc_arm_with_iwmmxt;
 558
 559   if (arm_hwcap & HWCAP_VFP)
 560     {
 561       int pid;
 562       char *buf;
 563       const struct target_desc * result = NULL;
 564
 565       /* NEON implies VFPv3-D32 or no-VFP unit.  Say that we only support
 566          Neon with VFPv3-D32.  */
 567       if (arm_hwcap & HWCAP_NEON)
 568         result = tdesc_arm_with_neon;
 569       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 570         result = tdesc_arm_with_vfpv3;
 571       else
 572         result = tdesc_arm_with_vfpv2;
 573
 574       /* Now make sure that the kernel supports reading these
 575          registers.  Support was added in 2.6.30.  */
 576       pid = inferior_ptid.lwp ();
 577       errno = 0;
 578       buf = (char *) alloca (VFP_REGS_SIZE);
 579       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 580           && errno == EIO)
 581         result = NULL;
 582
 583       return result;
 584     }
 585
 586   return this->beneath ()->read_description ();
 587 }
 588
 589 /* Information describing the hardware breakpoint capabilities.  */
 590 struct arm_linux_hwbp_cap
 591 {
 592   gdb_byte arch;
 593   gdb_byte max_wp_length;
 594   gdb_byte wp_count;
 595   gdb_byte bp_count;
 596 };
 597
 598 /* Since we cannot dynamically allocate subfields of arm_linux_process_info,
 599    assume a maximum number of supported break-/watchpoints.  */
 600 #define MAX_BPTS 16
 601 #define MAX_WPTS 16
 602
 603 /* Get hold of the Hardware Breakpoint information for the target we are
 604    attached to.  Returns NULL if the kernel doesn't support Hardware
 605    breakpoints at all, or a pointer to the information structure.  */
 606 static const struct arm_linux_hwbp_cap *
 607 arm_linux_get_hwbp_cap (void)
 608 {
 609   /* The info structure we return.  */
 610   static struct arm_linux_hwbp_cap info;
 611
 612   /* Is INFO in a good state?  -1 means that no attempt has been made to
 613      initialize INFO; 0 means an attempt has been made, but it failed; 1
 614      means INFO is in an initialized state.  */
 615   static int available = -1;
 616
 617   if (available == -1)
 618     {
 619       int tid;
 620       unsigned int val;
 621
 622       tid = inferior_ptid.lwp ();
 623       if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
 624         available = 0;
 625       else
 626         {
 627           info.arch = (gdb_byte)((val >> 24) & 0xff);
 628           info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
 629           info.wp_count = (gdb_byte)((val >> 8) & 0xff);
 630           info.bp_count = (gdb_byte)(val & 0xff);
 631
 632       if (info.wp_count > MAX_WPTS)
 633         {
 634           warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
 635                       supports %d"), MAX_WPTS, info.wp_count);
 636           info.wp_count = MAX_WPTS;
 637         }
 638
 639       if (info.bp_count > MAX_BPTS)
 640         {
 641           warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
 642                       supports %d"), MAX_BPTS, info.bp_count);
 643           info.bp_count = MAX_BPTS;
 644         }
 645           available = (info.arch != 0);
 646         }
 647     }
 648
 649   return available == 1 ? &info : NULL;
 650 }
 651
 652 /* How many hardware breakpoints are available?  */
 653 static int
 654 arm_linux_get_hw_breakpoint_count (void)
 655 {
 656   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 657   return cap != NULL ? cap->bp_count : 0;
 658 }
 659
 660 /* How many hardware watchpoints are available?  */
 661 static int
 662 arm_linux_get_hw_watchpoint_count (void)
 663 {
 664   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 665   return cap != NULL ? cap->wp_count : 0;
 666 }
 667
 668 /* Have we got a free break-/watch-point available for use?  Returns -1 if
 669    there is not an appropriate resource available, otherwise returns 1.  */
 670 int
 671 arm_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
 672                                              int cnt, int ot)
 673 {
 674   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 675       || type == bp_access_watchpoint || type == bp_watchpoint)
 676     {
 677       int count = arm_linux_get_hw_watchpoint_count ();
 678
 679       if (count == 0)
 680         return 0;
 681       else if (cnt + ot > count)
 682         return -1;
 683     }
 684   else if (type == bp_hardware_breakpoint)
 685     {
 686       int count = arm_linux_get_hw_breakpoint_count ();
 687
 688       if (count == 0)
 689         return 0;
 690       else if (cnt > count)
 691         return -1;
 692     }
 693   else
 694     gdb_assert (FALSE);
 695
 696   return 1;
 697 }
 698
 699 /* Enum describing the different types of ARM hardware break-/watch-points.  */
 700 typedef enum
 701 {
 702   arm_hwbp_break = 0,
 703   arm_hwbp_load = 1,
 704   arm_hwbp_store = 2,
 705   arm_hwbp_access = 3
 706 } arm_hwbp_type;
 707
 708 /* Type describing an ARM Hardware Breakpoint Control register value.  */
 709 typedef unsigned int arm_hwbp_control_t;
 710
 711 /* Structure used to keep track of hardware break-/watch-points.  */
 712 struct arm_linux_hw_breakpoint
 713 {
 714   /* Address to break on, or being watched.  */
 715   unsigned int address;
 716   /* Control register for break-/watch- point.  */
 717   arm_hwbp_control_t control;
 718 };
 719
 720 /* Structure containing arrays of per process hardware break-/watchpoints
 721    for caching address and control information.
 722
 723    The Linux ptrace interface to hardware break-/watch-points presents the
 724    values in a vector centred around 0 (which is used fo generic information).
 725    Positive indicies refer to breakpoint addresses/control registers, negative
 726    indices to watchpoint addresses/control registers.
 727
 728    The Linux vector is indexed as follows:
 729       -((i << 1) + 2): Control register for watchpoint i.
 730       -((i << 1) + 1): Address register for watchpoint i.
 731                     0: Information register.
 732        ((i << 1) + 1): Address register for breakpoint i.
 733        ((i << 1) + 2): Control register for breakpoint i.
 734
 735    This structure is used as a per-thread cache of the state stored by the
 736    kernel, so that we don't need to keep calling into the kernel to find a
 737    free breakpoint.
 738
 739    We treat break-/watch-points with their enable bit clear as being deleted.
 740    */
 741 struct arm_linux_debug_reg_state
 742 {
 743   /* Hardware breakpoints for this process.  */
 744   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
 745   /* Hardware watchpoints for this process.  */
 746   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
 747 };
 748
 749 /* Per-process arch-specific data we want to keep.  */
 750 struct arm_linux_process_info
 751 {
 752   /* Linked list.  */
 753   struct arm_linux_process_info *next;
 754   /* The process identifier.  */
 755   pid_t pid;
 756   /* Hardware break-/watchpoints state information.  */
 757   struct arm_linux_debug_reg_state state;
 758
 759 };
 760
 761 /* Per-thread arch-specific data we want to keep.  */
 762 struct arch_lwp_info
 763 {
 764   /* Non-zero if our copy differs from what's recorded in the thread.  */
 765   char bpts_changed[MAX_BPTS];
 766   char wpts_changed[MAX_WPTS];
 767 };
 768
 769 static struct arm_linux_process_info *arm_linux_process_list = NULL;
 770
 771 /* Find process data for process PID.  */
 772
 773 static struct arm_linux_process_info *
 774 arm_linux_find_process_pid (pid_t pid)
 775 {
 776   struct arm_linux_process_info *proc;
 777
 778   for (proc = arm_linux_process_list; proc; proc = proc->next)
 779     if (proc->pid == pid)
 780       return proc;
 781
 782   return NULL;
 783 }
 784
 785 /* Add process data for process PID.  Returns newly allocated info
 786    object.  */
 787
 788 static struct arm_linux_process_info *
 789 arm_linux_add_process (pid_t pid)
 790 {
 791   struct arm_linux_process_info *proc;
 792
 793   proc = XCNEW (struct arm_linux_process_info);
 794   proc->pid = pid;
 795
 796   proc->next = arm_linux_process_list;
 797   arm_linux_process_list = proc;
 798
 799   return proc;
 800 }
 801
 802 /* Get data specific info for process PID, creating it if necessary.
 803    Never returns NULL.  */
 804
 805 static struct arm_linux_process_info *
 806 arm_linux_process_info_get (pid_t pid)
 807 {
 808   struct arm_linux_process_info *proc;
 809
 810   proc = arm_linux_find_process_pid (pid);
 811   if (proc == NULL)
 812     proc = arm_linux_add_process (pid);
 813
 814   return proc;
 815 }
 816
 817 /* Called whenever GDB is no longer debugging process PID.  It deletes
 818    data structures that keep track of debug register state.  */
 819
 820 void
 821 arm_linux_nat_target::low_forget_process (pid_t pid)
 822 {
 823   struct arm_linux_process_info *proc, **proc_link;
 824
 825   proc = arm_linux_process_list;
 826   proc_link = &arm_linux_process_list;
 827
 828   while (proc != NULL)
 829     {
 830       if (proc->pid == pid)
 831     {
 832       *proc_link = proc->next;
 833
 834       xfree (proc);
 835       return;
 836     }
 837
 838       proc_link = &proc->next;
 839       proc = *proc_link;
 840     }
 841 }
 842
 843 /* Get hardware break-/watchpoint state for process PID.  */
 844
 845 static struct arm_linux_debug_reg_state *
 846 arm_linux_get_debug_reg_state (pid_t pid)
 847 {
 848   return &arm_linux_process_info_get (pid)->state;
 849 }
 850
 851 /* Initialize an ARM hardware break-/watch-point control register value.
 852    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
 853    type of break-/watch-point; ENABLE indicates whether the point is enabled.
 854    */
 855 static arm_hwbp_control_t
 856 arm_hwbp_control_initialize (unsigned byte_address_select,
 857                              arm_hwbp_type hwbp_type,
 858                              int enable)
 859 {
 860   gdb_assert ((byte_address_select & ~0xffU) == 0);
 861   gdb_assert (hwbp_type != arm_hwbp_break
 862               || ((byte_address_select & 0xfU) != 0));
 863
 864   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
 865 }
 866
 867 /* Does the breakpoint control value CONTROL have the enable bit set?  */
 868 static int
 869 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
 870 {
 871   return control & 0x1;
 872 }
 873
 874 /* Change a breakpoint control word so that it is in the disabled state.  */
 875 static arm_hwbp_control_t
 876 arm_hwbp_control_disable (arm_hwbp_control_t control)
 877 {
 878   return control & ~0x1;
 879 }
 880
 881 /* Initialise the hardware breakpoint structure P.  The breakpoint will be
 882    enabled, and will point to the placed address of BP_TGT.  */
 883 static void
 884 arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
 885                                     struct bp_target_info *bp_tgt,
 886                                     struct arm_linux_hw_breakpoint *p)
 887 {
 888   unsigned mask;
 889   CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address;
 890
 891   /* We have to create a mask for the control register which says which bits
 892      of the word pointed to by address to break on.  */
 893   if (arm_pc_is_thumb (gdbarch, address))
 894     {
 895       mask = 0x3;
 896       address &= ~1;
 897     }
 898   else
 899     {
 900       mask = 0xf;
 901       address &= ~3;
 902     }
 903
 904   p->address = (unsigned int) address;
 905   p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
 906 }
 907
 908 /* Get the ARM hardware breakpoint type from the TYPE value we're
 909    given when asked to set a watchpoint.  */
 910 static arm_hwbp_type
 911 arm_linux_get_hwbp_type (enum target_hw_bp_type type)
 912 {
 913   if (type == hw_read)
 914     return arm_hwbp_load;
 915   else if (type == hw_write)
 916     return arm_hwbp_store;
 917   else
 918     return arm_hwbp_access;
 919 }
 920
 921 /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
 922    to LEN.  The type of watchpoint is given in RW.  */
 923 static void
 924 arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len,
 925                                     enum target_hw_bp_type type,
 926                                     struct arm_linux_hw_breakpoint *p)
 927 {
 928   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 929   unsigned mask;
 930
 931   gdb_assert (cap != NULL);
 932   gdb_assert (cap->max_wp_length != 0);
 933
 934   mask = (1 << len) - 1;
 935
 936   p->address = (unsigned int) addr;
 937   p->control = arm_hwbp_control_initialize (mask,
 938                                             arm_linux_get_hwbp_type (type), 1);
 939 }
 940
 941 /* Are two break-/watch-points equal?  */
 942 static int
 943 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
 944                                const struct arm_linux_hw_breakpoint *p2)
 945 {
 946   return p1->address == p2->address && p1->control == p2->control;
 947 }
 948
 949 /* Callback to mark a watch-/breakpoint to be updated in all threads of
 950    the current process.  */
 951
 952 static int
 953 update_registers_callback (struct lwp_info *lwp, int watch, int index)
 954 {
 955   if (lwp->arch_private == NULL)
 956     lwp->arch_private = XCNEW (struct arch_lwp_info);
 957
 958   /* The actual update is done later just before resuming the lwp,
 959      we just mark that the registers need updating.  */
 960   if (watch)
 961     lwp->arch_private->wpts_changed[index] = 1;
 962   else
 963     lwp->arch_private->bpts_changed[index] = 1;
 964
 965   /* If the lwp isn't stopped, force it to momentarily pause, so
 966      we can update its breakpoint registers.  */
 967   if (!lwp->stopped)
 968     linux_stop_lwp (lwp);
 969
 970   return 0;
 971 }
 972
 973 /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
 974    =1) BPT for thread TID.  */
 975 static void
 976 arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
 977                                  int watchpoint)
 978 {
 979   int pid;
 980   ptid_t pid_ptid;
 981   gdb_byte count, i;
 982   struct arm_linux_hw_breakpoint* bpts;
 983
 984   pid = inferior_ptid.pid ();
 985   pid_ptid = ptid_t (pid);
 986
 987   if (watchpoint)
 988     {
 989       count = arm_linux_get_hw_watchpoint_count ();
 990       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
 991     }
 992   else
 993     {
 994       count = arm_linux_get_hw_breakpoint_count ();
 995       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
 996     }
 997
 998   for (i = 0; i < count; ++i)
 999     if (!arm_hwbp_control_is_enabled (bpts[i].control))
1000       {
1001         bpts[i] = *bpt;
1002         iterate_over_lwps (pid_ptid,
1003                            [=] (struct lwp_info *info)
1004                            {
1005                              return update_registers_callback (info, watchpoint,
1006                                                                i);
1007                            });
1008         break;
1009       }
1010
1011   gdb_assert (i != count);
1012 }
1013
1014 /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
1015    (WATCHPOINT = 1) BPT for thread TID.  */
1016 static void
1017 arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
1018                                  int watchpoint)
1019 {
1020   int pid;
1021   gdb_byte count, i;
1022   ptid_t pid_ptid;
1023   struct arm_linux_hw_breakpoint* bpts;
1024
1025   pid = inferior_ptid.pid ();
1026   pid_ptid = ptid_t (pid);
1027
1028   if (watchpoint)
1029     {
1030       count = arm_linux_get_hw_watchpoint_count ();
1031       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1032     }
1033   else
1034     {
1035       count = arm_linux_get_hw_breakpoint_count ();
1036       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1037     }
1038
1039   for (i = 0; i < count; ++i)
1040     if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
1041       {
1042         bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
1043         iterate_over_lwps (pid_ptid,
1044                            [=] (struct lwp_info *info)
1045                            {
1046                              return update_registers_callback (info, watchpoint,
1047                                                                i);
1048                            });
1049         break;
1050       }
1051
1052   gdb_assert (i != count);
1053 }
1054
1055 /* Insert a Hardware breakpoint.  */
1056 int
1057 arm_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
1058                                             struct bp_target_info *bp_tgt)
1059 {
1060   struct arm_linux_hw_breakpoint p;
1061
1062   if (arm_linux_get_hw_breakpoint_count () == 0)
1063     return -1;
1064
1065   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1066
1067   arm_linux_insert_hw_breakpoint1 (&p, 0);
1068
1069   return 0;
1070 }
1071
1072 /* Remove a hardware breakpoint.  */
1073 int
1074 arm_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
1075                                             struct bp_target_info *bp_tgt)
1076 {
1077   struct arm_linux_hw_breakpoint p;
1078
1079   if (arm_linux_get_hw_breakpoint_count () == 0)
1080     return -1;
1081
1082   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1083
1084   arm_linux_remove_hw_breakpoint1 (&p, 0);
1085
1086   return 0;
1087 }
1088
1089 /* Are we able to use a hardware watchpoint for the LEN bytes starting at
1090    ADDR?  */
1091 int
1092 arm_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
1093 {
1094   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1095   CORE_ADDR max_wp_length, aligned_addr;
1096
1097   /* Can not set watchpoints for zero or negative lengths.  */
1098   if (len <= 0)
1099     return 0;
1100
1101   /* Need to be able to use the ptrace interface.  */
1102   if (cap == NULL || cap->wp_count == 0)
1103     return 0;
1104
1105   /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1106      range covered by a watchpoint.  */
1107   max_wp_length = (CORE_ADDR)cap->max_wp_length;
1108   aligned_addr = addr & ~(max_wp_length - 1);
1109
1110   if (aligned_addr + max_wp_length < addr + len)
1111     return 0;
1112
1113   /* The current ptrace interface can only handle watchpoints that are a
1114      power of 2.  */
1115   if ((len & (len - 1)) != 0)
1116     return 0;
1117
1118   /* All tests passed so we must be able to set a watchpoint.  */
1119   return 1;
1120 }
1121
1122 /* Insert a Hardware breakpoint.  */
1123 int
1124 arm_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
1125                                          enum target_hw_bp_type rw,
1126                                          struct expression *cond)
1127 {
1128   struct arm_linux_hw_breakpoint p;
1129
1130   if (arm_linux_get_hw_watchpoint_count () == 0)
1131     return -1;
1132
1133   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1134
1135   arm_linux_insert_hw_breakpoint1 (&p, 1);
1136
1137   return 0;
1138 }
1139
1140 /* Remove a hardware breakpoint.  */
1141 int
1142 arm_linux_nat_target::remove_watchpoint (CORE_ADDR addr,
1143                                          int len, enum target_hw_bp_type rw,
1144                                          struct expression *cond)
1145 {
1146   struct arm_linux_hw_breakpoint p;
1147
1148   if (arm_linux_get_hw_watchpoint_count () == 0)
1149     return -1;
1150
1151   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1152
1153   arm_linux_remove_hw_breakpoint1 (&p, 1);
1154
1155   return 0;
1156 }
1157
1158 /* What was the data address the target was stopped on accessing.  */
1159 bool
1160 arm_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p)
1161 {
1162   siginfo_t siginfo;
1163   int slot;
1164
1165   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
1166     return false;
1167
1168   /* This must be a hardware breakpoint.  */
1169   if (siginfo.si_signo != SIGTRAP
1170       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1171     return false;
1172
1173   /* We must be able to set hardware watchpoints.  */
1174   if (arm_linux_get_hw_watchpoint_count () == 0)
1175     return 0;
1176
1177   slot = siginfo.si_errno;
1178
1179   /* If we are in a positive slot then we're looking at a breakpoint and not
1180      a watchpoint.  */
1181   if (slot >= 0)
1182     return false;
1183
1184   *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
1185   return true;
1186 }
1187
1188 /* Has the target been stopped by hitting a watchpoint?  */
1189 bool
1190 arm_linux_nat_target::stopped_by_watchpoint ()
1191 {
1192   CORE_ADDR addr;
1193   return stopped_data_address (&addr);
1194 }
1195
1196 bool
1197 arm_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr,
1198                                                     CORE_ADDR start,
1199                                                     int length)
1200 {
1201   return start <= addr && start + length - 1 >= addr;
1202 }
1203
1204 /* Handle thread creation.  We need to copy the breakpoints and watchpoints
1205    in the parent thread to the child thread.  */
1206 void
1207 arm_linux_nat_target::low_new_thread (struct lwp_info *lp)
1208 {
1209   int i;
1210   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
1211
1212   /* Mark that all the hardware breakpoint/watchpoint register pairs
1213      for this thread need to be initialized.  */
1214
1215   for (i = 0; i < MAX_BPTS; i++)
1216     {
1217       info->bpts_changed[i] = 1;
1218       info->wpts_changed[i] = 1;
1219     }
1220
1221   lp->arch_private = info;
1222 }
1223
1224 /* Function to call when a thread is being deleted.  */
1225
1226 void
1227 arm_linux_nat_target::low_delete_thread (struct arch_lwp_info *arch_lwp)
1228 {
1229   xfree (arch_lwp);
1230 }
1231
1232 /* Called when resuming a thread.
1233    The hardware debug registers are updated when there is any change.  */
1234
1235 void
1236 arm_linux_nat_target::low_prepare_to_resume (struct lwp_info *lwp)
1237 {
1238   int pid, i;
1239   struct arm_linux_hw_breakpoint *bpts, *wpts;
1240   struct arch_lwp_info *arm_lwp_info = lwp->arch_private;
1241
1242   pid = lwp->ptid.lwp ();
1243   bpts = arm_linux_get_debug_reg_state (lwp->ptid.pid ())->bpts;
1244   wpts = arm_linux_get_debug_reg_state (lwp->ptid.pid ())->wpts;
1245
1246   /* NULL means this is the main thread still going through the shell,
1247      or, no watchpoint has been set yet.  In that case, there's
1248      nothing to do.  */
1249   if (arm_lwp_info == NULL)
1250     return;
1251
1252   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
1253     if (arm_lwp_info->bpts_changed[i])
1254       {
1255         errno = 0;
1256         if (arm_hwbp_control_is_enabled (bpts[i].control))
1257           if (ptrace (PTRACE_SETHBPREGS, pid,
1258               (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
1259             perror_with_name (_("Unexpected error setting breakpoint"));
1260
1261         if (bpts[i].control != 0)
1262           if (ptrace (PTRACE_SETHBPREGS, pid,
1263               (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
1264             perror_with_name (_("Unexpected error setting breakpoint"));
1265
1266         arm_lwp_info->bpts_changed[i] = 0;
1267       }
1268
1269   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
1270     if (arm_lwp_info->wpts_changed[i])
1271       {
1272         errno = 0;
1273         if (arm_hwbp_control_is_enabled (wpts[i].control))
1274           if (ptrace (PTRACE_SETHBPREGS, pid,
1275               (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
1276             perror_with_name (_("Unexpected error setting watchpoint"));
1277
1278         if (wpts[i].control != 0)
1279           if (ptrace (PTRACE_SETHBPREGS, pid,
1280               (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
1281             perror_with_name (_("Unexpected error setting watchpoint"));
1282
1283         arm_lwp_info->wpts_changed[i] = 0;
1284       }
1285 }
1286
1287 /* linux_nat_new_fork hook.  */
1288
1289 void
1290 arm_linux_nat_target::low_new_fork (struct lwp_info *parent, pid_t child_pid)
1291 {
1292   pid_t parent_pid;
1293   struct arm_linux_debug_reg_state *parent_state;
1294   struct arm_linux_debug_reg_state *child_state;
1295
1296   /* NULL means no watchpoint has ever been set in the parent.  In
1297      that case, there's nothing to do.  */
1298   if (parent->arch_private == NULL)
1299     return;
1300
1301   /* GDB core assumes the child inherits the watchpoints/hw
1302      breakpoints of the parent, and will remove them all from the
1303      forked off process.  Copy the debug registers mirrors into the
1304      new process so that all breakpoints and watchpoints can be
1305      removed together.  */
1306
1307   parent_pid = parent->ptid.pid ();
1308   parent_state = arm_linux_get_debug_reg_state (parent_pid);
1309   child_state = arm_linux_get_debug_reg_state (child_pid);
1310   *child_state = *parent_state;
1311 }
1312
1313 void
1314 _initialize_arm_linux_nat (void)
1315 {
1316   /* Register the target.  */
1317   linux_target = &the_arm_linux_nat_target;
1318   add_inf_child_target (&the_arm_linux_nat_target);
1319 }