gdb/arm-linux-nat.c

   1 /* GNU/Linux on ARM native support.
   2    Copyright (C) 1999-2015 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "defs.h"
  20 #include "inferior.h"
  21 #include "gdbcore.h"
  22 #include "regcache.h"
  23 #include "target.h"
  24 #include "linux-nat.h"
  25 #include "target-descriptions.h"
  26 #include "auxv.h"
  27 #include "observer.h"
  28 #include "gdbthread.h"
  29
  30 #include "arm-tdep.h"
  31 #include "arm-linux-tdep.h"
  32
  33 #include <elf/common.h>
  34 #include <sys/user.h>
  35 #include <sys/ptrace.h>
  36 #include <sys/utsname.h>
  37 #include <sys/procfs.h>
  38
  39 /* Prototypes for supply_gregset etc.  */
  40 #include "gregset.h"
  41
  42 /* Defines ps_err_e, struct ps_prochandle.  */
  43 #include "gdb_proc_service.h"
  44
  45 #ifndef PTRACE_GET_THREAD_AREA
  46 #define PTRACE_GET_THREAD_AREA 22
  47 #endif
  48
  49 #ifndef PTRACE_GETWMMXREGS
  50 #define PTRACE_GETWMMXREGS 18
  51 #define PTRACE_SETWMMXREGS 19
  52 #endif
  53
  54 #ifndef PTRACE_GETVFPREGS
  55 #define PTRACE_GETVFPREGS 27
  56 #define PTRACE_SETVFPREGS 28
  57 #endif
  58
  59 #ifndef PTRACE_GETHBPREGS
  60 #define PTRACE_GETHBPREGS 29
  61 #define PTRACE_SETHBPREGS 30
  62 #endif
  63
  64 extern int arm_apcs_32;
  65
  66 /* On GNU/Linux, threads are implemented as pseudo-processes, in which
  67    case we may be tracing more than one process at a time.  In that
  68    case, inferior_ptid will contain the main process ID and the
  69    individual thread (process) ID.  get_thread_id () is used to get
  70    the thread id if it's available, and the process id otherwise.  */
  71
  72 static int
  73 get_thread_id (ptid_t ptid)
  74 {
  75   int tid = ptid_get_lwp (ptid);
  76   if (0 == tid)
  77     tid = ptid_get_pid (ptid);
  78   return tid;
  79 }
  80
  81 #define GET_THREAD_ID(PTID)     get_thread_id (PTID)
  82
  83 /* Get the value of a particular register from the floating point
  84    state of the process and store it into regcache.  */
  85
  86 static void
  87 fetch_fpregister (struct regcache *regcache, int regno)
  88 {
  89   int ret, tid;
  90   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
  91
  92   /* Get the thread id for the ptrace call.  */
  93   tid = GET_THREAD_ID (inferior_ptid);
  94
  95   /* Read the floating point state.  */
  96   ret = ptrace (PT_GETFPREGS, tid, 0, fp);
  97   if (ret < 0)
  98     {
  99       warning (_("Unable to fetch floating point register."));
 100       return;
 101     }
 102
 103   /* Fetch fpsr.  */
 104   if (ARM_FPS_REGNUM == regno)
 105     regcache_raw_supply (regcache, ARM_FPS_REGNUM,
 106                          fp + NWFPE_FPSR_OFFSET);
 107
 108   /* Fetch the floating point register.  */
 109   if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
 110     supply_nwfpe_register (regcache, regno, fp);
 111 }
 112
 113 /* Get the whole floating point state of the process and store it
 114    into regcache.  */
 115
 116 static void
 117 fetch_fpregs (struct regcache *regcache)
 118 {
 119   int ret, regno, tid;
 120   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 121
 122   /* Get the thread id for the ptrace call.  */
 123   tid = GET_THREAD_ID (inferior_ptid);
 124
 125   /* Read the floating point state.  */
 126   ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 127   if (ret < 0)
 128     {
 129       warning (_("Unable to fetch the floating point registers."));
 130       return;
 131     }
 132
 133   /* Fetch fpsr.  */
 134   regcache_raw_supply (regcache, ARM_FPS_REGNUM,
 135                        fp + NWFPE_FPSR_OFFSET);
 136
 137   /* Fetch the floating point registers.  */
 138   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 139     supply_nwfpe_register (regcache, regno, fp);
 140 }
 141
 142 /* Save a particular register into the floating point state of the
 143    process using the contents from regcache.  */
 144
 145 static void
 146 store_fpregister (const struct regcache *regcache, int regno)
 147 {
 148   int ret, tid;
 149   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 150
 151   /* Get the thread id for the ptrace call.  */
 152   tid = GET_THREAD_ID (inferior_ptid);
 153
 154   /* Read the floating point state.  */
 155   ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 156   if (ret < 0)
 157     {
 158       warning (_("Unable to fetch the floating point registers."));
 159       return;
 160     }
 161
 162   /* Store fpsr.  */
 163   if (ARM_FPS_REGNUM == regno
 164       && REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
 165     regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 166
 167   /* Store the floating point register.  */
 168   if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
 169     collect_nwfpe_register (regcache, regno, fp);
 170
 171   ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
 172   if (ret < 0)
 173     {
 174       warning (_("Unable to store floating point register."));
 175       return;
 176     }
 177 }
 178
 179 /* Save the whole floating point state of the process using
 180    the contents from regcache.  */
 181
 182 static void
 183 store_fpregs (const struct regcache *regcache)
 184 {
 185   int ret, regno, tid;
 186   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 187
 188   /* Get the thread id for the ptrace call.  */
 189   tid = GET_THREAD_ID (inferior_ptid);
 190
 191   /* Read the floating point state.  */
 192   ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 193   if (ret < 0)
 194     {
 195       warning (_("Unable to fetch the floating point registers."));
 196       return;
 197     }
 198
 199   /* Store fpsr.  */
 200   if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
 201     regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 202
 203   /* Store the floating point registers.  */
 204   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 205     if (REG_VALID == regcache_register_status (regcache, regno))
 206       collect_nwfpe_register (regcache, regno, fp);
 207
 208   ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
 209   if (ret < 0)
 210     {
 211       warning (_("Unable to store floating point registers."));
 212       return;
 213     }
 214 }
 215
 216 /* Fetch a general register of the process and store into
 217    regcache.  */
 218
 219 static void
 220 fetch_register (struct regcache *regcache, int regno)
 221 {
 222   int ret, tid;
 223   elf_gregset_t regs;
 224
 225   /* Get the thread id for the ptrace call.  */
 226   tid = GET_THREAD_ID (inferior_ptid);
 227
 228   ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 229   if (ret < 0)
 230     {
 231       warning (_("Unable to fetch general register."));
 232       return;
 233     }
 234
 235   if (regno >= ARM_A1_REGNUM && regno < ARM_PC_REGNUM)
 236     regcache_raw_supply (regcache, regno, (char *) &regs[regno]);
 237
 238   if (ARM_PS_REGNUM == regno)
 239     {
 240       if (arm_apcs_32)
 241         regcache_raw_supply (regcache, ARM_PS_REGNUM,
 242                              (char *) &regs[ARM_CPSR_GREGNUM]);
 243       else
 244         regcache_raw_supply (regcache, ARM_PS_REGNUM,
 245                              (char *) &regs[ARM_PC_REGNUM]);
 246     }
 247
 248   if (ARM_PC_REGNUM == regno)
 249     {
 250       regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
 251                               (get_regcache_arch (regcache),
 252                                regs[ARM_PC_REGNUM]);
 253       regcache_raw_supply (regcache, ARM_PC_REGNUM,
 254                            (char *) &regs[ARM_PC_REGNUM]);
 255     }
 256 }
 257
 258 /* Fetch all general registers of the process and store into
 259    regcache.  */
 260
 261 static void
 262 fetch_regs (struct regcache *regcache)
 263 {
 264   int ret, regno, tid;
 265   elf_gregset_t regs;
 266
 267   /* Get the thread id for the ptrace call.  */
 268   tid = GET_THREAD_ID (inferior_ptid);
 269
 270   ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 271   if (ret < 0)
 272     {
 273       warning (_("Unable to fetch general registers."));
 274       return;
 275     }
 276
 277   for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
 278     regcache_raw_supply (regcache, regno, (char *) &regs[regno]);
 279
 280   if (arm_apcs_32)
 281     regcache_raw_supply (regcache, ARM_PS_REGNUM,
 282                          (char *) &regs[ARM_CPSR_GREGNUM]);
 283   else
 284     regcache_raw_supply (regcache, ARM_PS_REGNUM,
 285                          (char *) &regs[ARM_PC_REGNUM]);
 286
 287   regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
 288                           (get_regcache_arch (regcache), regs[ARM_PC_REGNUM]);
 289   regcache_raw_supply (regcache, ARM_PC_REGNUM,
 290                        (char *) &regs[ARM_PC_REGNUM]);
 291 }
 292
 293 /* Store all general registers of the process from the values in
 294    regcache.  */
 295
 296 static void
 297 store_register (const struct regcache *regcache, int regno)
 298 {
 299   int ret, tid;
 300   elf_gregset_t regs;
 301
 302   if (REG_VALID != regcache_register_status (regcache, regno))
 303     return;
 304
 305   /* Get the thread id for the ptrace call.  */
 306   tid = GET_THREAD_ID (inferior_ptid);
 307
 308   /* Get the general registers from the process.  */
 309   ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 310   if (ret < 0)
 311     {
 312       warning (_("Unable to fetch general registers."));
 313       return;
 314     }
 315
 316   if (regno >= ARM_A1_REGNUM && regno <= ARM_PC_REGNUM)
 317     regcache_raw_collect (regcache, regno, (char *) &regs[regno]);
 318   else if (arm_apcs_32 && regno == ARM_PS_REGNUM)
 319     regcache_raw_collect (regcache, regno,
 320                          (char *) &regs[ARM_CPSR_GREGNUM]);
 321   else if (!arm_apcs_32 && regno == ARM_PS_REGNUM)
 322     regcache_raw_collect (regcache, ARM_PC_REGNUM,
 323                          (char *) &regs[ARM_PC_REGNUM]);
 324
 325   ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 326   if (ret < 0)
 327     {
 328       warning (_("Unable to store general register."));
 329       return;
 330     }
 331 }
 332
 333 static void
 334 store_regs (const struct regcache *regcache)
 335 {
 336   int ret, regno, tid;
 337   elf_gregset_t regs;
 338
 339   /* Get the thread id for the ptrace call.  */
 340   tid = GET_THREAD_ID (inferior_ptid);
 341
 342   /* Fetch the general registers.  */
 343   ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 344   if (ret < 0)
 345     {
 346       warning (_("Unable to fetch general registers."));
 347       return;
 348     }
 349
 350   for (regno = ARM_A1_REGNUM; regno <= ARM_PC_REGNUM; regno++)
 351     {
 352       if (REG_VALID == regcache_register_status (regcache, regno))
 353         regcache_raw_collect (regcache, regno, (char *) &regs[regno]);
 354     }
 355
 356   if (arm_apcs_32 && REG_VALID == regcache_register_status (regcache, ARM_PS_REGNUM))
 357     regcache_raw_collect (regcache, ARM_PS_REGNUM,
 358                          (char *) &regs[ARM_CPSR_GREGNUM]);
 359
 360   ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 361
 362   if (ret < 0)
 363     {
 364       warning (_("Unable to store general registers."));
 365       return;
 366     }
 367 }
 368
 369 /* Fetch all WMMX registers of the process and store into
 370    regcache.  */
 371
 372 #define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
 373
 374 static void
 375 fetch_wmmx_regs (struct regcache *regcache)
 376 {
 377   char regbuf[IWMMXT_REGS_SIZE];
 378   int ret, regno, tid;
 379
 380   /* Get the thread id for the ptrace call.  */
 381   tid = GET_THREAD_ID (inferior_ptid);
 382
 383   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 384   if (ret < 0)
 385     {
 386       warning (_("Unable to fetch WMMX registers."));
 387       return;
 388     }
 389
 390   for (regno = 0; regno < 16; regno++)
 391     regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM,
 392                          &regbuf[regno * 8]);
 393
 394   for (regno = 0; regno < 2; regno++)
 395     regcache_raw_supply (regcache, regno + ARM_WCSSF_REGNUM,
 396                          &regbuf[16 * 8 + regno * 4]);
 397
 398   for (regno = 0; regno < 4; regno++)
 399     regcache_raw_supply (regcache, regno + ARM_WCGR0_REGNUM,
 400                          &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 401 }
 402
 403 static void
 404 store_wmmx_regs (const struct regcache *regcache)
 405 {
 406   char regbuf[IWMMXT_REGS_SIZE];
 407   int ret, regno, tid;
 408
 409   /* Get the thread id for the ptrace call.  */
 410   tid = GET_THREAD_ID (inferior_ptid);
 411
 412   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 413   if (ret < 0)
 414     {
 415       warning (_("Unable to fetch WMMX registers."));
 416       return;
 417     }
 418
 419   for (regno = 0; regno < 16; regno++)
 420     if (REG_VALID == regcache_register_status (regcache,
 421                                                regno + ARM_WR0_REGNUM))
 422       regcache_raw_collect (regcache, regno + ARM_WR0_REGNUM,
 423                             &regbuf[regno * 8]);
 424
 425   for (regno = 0; regno < 2; regno++)
 426     if (REG_VALID == regcache_register_status (regcache,
 427                                                regno + ARM_WCSSF_REGNUM))
 428       regcache_raw_collect (regcache, regno + ARM_WCSSF_REGNUM,
 429                             &regbuf[16 * 8 + regno * 4]);
 430
 431   for (regno = 0; regno < 4; regno++)
 432     if (REG_VALID == regcache_register_status (regcache,
 433                                                regno + ARM_WCGR0_REGNUM))
 434       regcache_raw_collect (regcache, regno + ARM_WCGR0_REGNUM,
 435                             &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 436
 437   ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
 438
 439   if (ret < 0)
 440     {
 441       warning (_("Unable to store WMMX registers."));
 442       return;
 443     }
 444 }
 445
 446 /* Fetch and store VFP Registers.  The kernel object has space for 32
 447    64-bit registers, and the FPSCR.  This is even when on a VFPv2 or
 448    VFPv3D16 target.  */
 449 #define VFP_REGS_SIZE (32 * 8 + 4)
 450
 451 static void
 452 fetch_vfp_regs (struct regcache *regcache)
 453 {
 454   char regbuf[VFP_REGS_SIZE];
 455   int ret, regno, tid;
 456   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 457   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 458
 459   /* Get the thread id for the ptrace call.  */
 460   tid = GET_THREAD_ID (inferior_ptid);
 461
 462   ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 463   if (ret < 0)
 464     {
 465       warning (_("Unable to fetch VFP registers."));
 466       return;
 467     }
 468
 469   for (regno = 0; regno < tdep->vfp_register_count; regno++)
 470     regcache_raw_supply (regcache, regno + ARM_D0_REGNUM,
 471                          (char *) regbuf + regno * 8);
 472
 473   regcache_raw_supply (regcache, ARM_FPSCR_REGNUM,
 474                        (char *) regbuf + 32 * 8);
 475 }
 476
 477 static void
 478 store_vfp_regs (const struct regcache *regcache)
 479 {
 480   char regbuf[VFP_REGS_SIZE];
 481   int ret, regno, tid;
 482   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 483   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 484
 485   /* Get the thread id for the ptrace call.  */
 486   tid = GET_THREAD_ID (inferior_ptid);
 487
 488   ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 489   if (ret < 0)
 490     {
 491       warning (_("Unable to fetch VFP registers (for update)."));
 492       return;
 493     }
 494
 495   for (regno = 0; regno < tdep->vfp_register_count; regno++)
 496     regcache_raw_collect (regcache, regno + ARM_D0_REGNUM,
 497                           (char *) regbuf + regno * 8);
 498
 499   regcache_raw_collect (regcache, ARM_FPSCR_REGNUM,
 500                         (char *) regbuf + 32 * 8);
 501
 502   ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
 503
 504   if (ret < 0)
 505     {
 506       warning (_("Unable to store VFP registers."));
 507       return;
 508     }
 509 }
 510
 511 /* Fetch registers from the child process.  Fetch all registers if
 512    regno == -1, otherwise fetch all general registers or all floating
 513    point registers depending upon the value of regno.  */
 514
 515 static void
 516 arm_linux_fetch_inferior_registers (struct target_ops *ops,
 517                                     struct regcache *regcache, int regno)
 518 {
 519   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 520   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 521
 522   if (-1 == regno)
 523     {
 524       fetch_regs (regcache);
 525       fetch_fpregs (regcache);
 526       if (tdep->have_wmmx_registers)
 527         fetch_wmmx_regs (regcache);
 528       if (tdep->vfp_register_count > 0)
 529         fetch_vfp_regs (regcache);
 530     }
 531   else
 532     {
 533       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 534         fetch_register (regcache, regno);
 535       else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
 536         fetch_fpregister (regcache, regno);
 537       else if (tdep->have_wmmx_registers
 538                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 539         fetch_wmmx_regs (regcache);
 540       else if (tdep->vfp_register_count > 0
 541                && regno >= ARM_D0_REGNUM
 542                && regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
 543         fetch_vfp_regs (regcache);
 544     }
 545 }
 546
 547 /* Store registers back into the inferior.  Store all registers if
 548    regno == -1, otherwise store all general registers or all floating
 549    point registers depending upon the value of regno.  */
 550
 551 static void
 552 arm_linux_store_inferior_registers (struct target_ops *ops,
 553                                     struct regcache *regcache, int regno)
 554 {
 555   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 556   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 557
 558   if (-1 == regno)
 559     {
 560       store_regs (regcache);
 561       store_fpregs (regcache);
 562       if (tdep->have_wmmx_registers)
 563         store_wmmx_regs (regcache);
 564       if (tdep->vfp_register_count > 0)
 565         store_vfp_regs (regcache);
 566     }
 567   else
 568     {
 569       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 570         store_register (regcache, regno);
 571       else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
 572         store_fpregister (regcache, regno);
 573       else if (tdep->have_wmmx_registers
 574                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 575         store_wmmx_regs (regcache);
 576       else if (tdep->vfp_register_count > 0
 577                && regno >= ARM_D0_REGNUM
 578                && regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
 579         store_vfp_regs (regcache);
 580     }
 581 }
 582
 583 /* Wrapper functions for the standard regset handling, used by
 584    thread debugging.  */
 585
 586 void
 587 fill_gregset (const struct regcache *regcache,
 588               gdb_gregset_t *gregsetp, int regno)
 589 {
 590   arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0);
 591 }
 592
 593 void
 594 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 595 {
 596   arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0);
 597 }
 598
 599 void
 600 fill_fpregset (const struct regcache *regcache,
 601                gdb_fpregset_t *fpregsetp, int regno)
 602 {
 603   arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0);
 604 }
 605
 606 /* Fill GDB's register array with the floating-point register values
 607    in *fpregsetp.  */
 608
 609 void
 610 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 611 {
 612   arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0);
 613 }
 614
 615 /* Fetch the thread-local storage pointer for libthread_db.  */
 616
 617 ps_err_e
 618 ps_get_thread_area (const struct ps_prochandle *ph,
 619                     lwpid_t lwpid, int idx, void **base)
 620 {
 621   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 622     return PS_ERR;
 623
 624   /* IDX is the bias from the thread pointer to the beginning of the
 625      thread descriptor.  It has to be subtracted due to implementation
 626      quirks in libthread_db.  */
 627   *base = (void *) ((char *)*base - idx);
 628
 629   return PS_OK;
 630 }
 631
 632 static const struct target_desc *
 633 arm_linux_read_description (struct target_ops *ops)
 634 {
 635   CORE_ADDR arm_hwcap = 0;
 636
 637   if (have_ptrace_getregset == -1)
 638     {
 639       elf_gregset_t gpregs;
 640       struct iovec iov;
 641       int tid = GET_THREAD_ID (inferior_ptid);
 642
 643       iov.iov_base = &gpregs;
 644       iov.iov_len = sizeof (gpregs);
 645
 646       /* Check if PTRACE_GETREGSET works.  */
 647       if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0)
 648         have_ptrace_getregset = 0;
 649       else
 650         have_ptrace_getregset = 1;
 651     }
 652
 653   if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1)
 654     {
 655       return ops->beneath->to_read_description (ops->beneath);
 656     }
 657
 658   if (arm_hwcap & HWCAP_IWMMXT)
 659     return tdesc_arm_with_iwmmxt;
 660
 661   if (arm_hwcap & HWCAP_VFP)
 662     {
 663       int pid;
 664       char *buf;
 665       const struct target_desc * result = NULL;
 666
 667       /* NEON implies VFPv3-D32 or no-VFP unit.  Say that we only support
 668          Neon with VFPv3-D32.  */
 669       if (arm_hwcap & HWCAP_NEON)
 670         result = tdesc_arm_with_neon;
 671       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 672         result = tdesc_arm_with_vfpv3;
 673       else
 674         result = tdesc_arm_with_vfpv2;
 675
 676       /* Now make sure that the kernel supports reading these
 677          registers.  Support was added in 2.6.30.  */
 678       pid = ptid_get_lwp (inferior_ptid);
 679       errno = 0;
 680       buf = alloca (VFP_REGS_SIZE);
 681       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 682           && errno == EIO)
 683         result = NULL;
 684
 685       return result;
 686     }
 687
 688   return ops->beneath->to_read_description (ops->beneath);
 689 }
 690
 691 /* Information describing the hardware breakpoint capabilities.  */
 692 struct arm_linux_hwbp_cap
 693 {
 694   gdb_byte arch;
 695   gdb_byte max_wp_length;
 696   gdb_byte wp_count;
 697   gdb_byte bp_count;
 698 };
 699
 700 /* Since we cannot dynamically allocate subfields of arm_linux_process_info,
 701    assume a maximum number of supported break-/watchpoints.  */
 702 #define MAX_BPTS 16
 703 #define MAX_WPTS 16
 704
 705 /* Get hold of the Hardware Breakpoint information for the target we are
 706    attached to.  Returns NULL if the kernel doesn't support Hardware
 707    breakpoints at all, or a pointer to the information structure.  */
 708 static const struct arm_linux_hwbp_cap *
 709 arm_linux_get_hwbp_cap (void)
 710 {
 711   /* The info structure we return.  */
 712   static struct arm_linux_hwbp_cap info;
 713
 714   /* Is INFO in a good state?  -1 means that no attempt has been made to
 715      initialize INFO; 0 means an attempt has been made, but it failed; 1
 716      means INFO is in an initialized state.  */
 717   static int available = -1;
 718
 719   if (available == -1)
 720     {
 721       int tid;
 722       unsigned int val;
 723
 724       tid = GET_THREAD_ID (inferior_ptid);
 725       if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
 726         available = 0;
 727       else
 728         {
 729           info.arch = (gdb_byte)((val >> 24) & 0xff);
 730           info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
 731           info.wp_count = (gdb_byte)((val >> 8) & 0xff);
 732           info.bp_count = (gdb_byte)(val & 0xff);
 733
 734       if (info.wp_count > MAX_WPTS)
 735         {
 736           warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
 737                       supports %d"), MAX_WPTS, info.wp_count);
 738           info.wp_count = MAX_WPTS;
 739         }
 740
 741       if (info.bp_count > MAX_BPTS)
 742         {
 743           warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
 744                       supports %d"), MAX_BPTS, info.bp_count);
 745           info.bp_count = MAX_BPTS;
 746         }
 747           available = (info.arch != 0);
 748         }
 749     }
 750
 751   return available == 1 ? &info : NULL;
 752 }
 753
 754 /* How many hardware breakpoints are available?  */
 755 static int
 756 arm_linux_get_hw_breakpoint_count (void)
 757 {
 758   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 759   return cap != NULL ? cap->bp_count : 0;
 760 }
 761
 762 /* How many hardware watchpoints are available?  */
 763 static int
 764 arm_linux_get_hw_watchpoint_count (void)
 765 {
 766   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 767   return cap != NULL ? cap->wp_count : 0;
 768 }
 769
 770 /* Have we got a free break-/watch-point available for use?  Returns -1 if
 771    there is not an appropriate resource available, otherwise returns 1.  */
 772 static int
 773 arm_linux_can_use_hw_breakpoint (struct target_ops *self,
 774                                  int type, int cnt, int ot)
 775 {
 776   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 777       || type == bp_access_watchpoint || type == bp_watchpoint)
 778     {
 779       int count = arm_linux_get_hw_watchpoint_count ();
 780
 781       if (count == 0)
 782         return 0;
 783       else if (cnt + ot > count)
 784         return -1;
 785     }
 786   else if (type == bp_hardware_breakpoint)
 787     {
 788       int count = arm_linux_get_hw_breakpoint_count ();
 789
 790       if (count == 0)
 791         return 0;
 792       else if (cnt > count)
 793         return -1;
 794     }
 795   else
 796     gdb_assert (FALSE);
 797
 798   return 1;
 799 }
 800
 801 /* Enum describing the different types of ARM hardware break-/watch-points.  */
 802 typedef enum
 803 {
 804   arm_hwbp_break = 0,
 805   arm_hwbp_load = 1,
 806   arm_hwbp_store = 2,
 807   arm_hwbp_access = 3
 808 } arm_hwbp_type;
 809
 810 /* Type describing an ARM Hardware Breakpoint Control register value.  */
 811 typedef unsigned int arm_hwbp_control_t;
 812
 813 /* Structure used to keep track of hardware break-/watch-points.  */
 814 struct arm_linux_hw_breakpoint
 815 {
 816   /* Address to break on, or being watched.  */
 817   unsigned int address;
 818   /* Control register for break-/watch- point.  */
 819   arm_hwbp_control_t control;
 820 };
 821
 822 /* Structure containing arrays of per process hardware break-/watchpoints
 823    for caching address and control information.
 824
 825    The Linux ptrace interface to hardware break-/watch-points presents the
 826    values in a vector centred around 0 (which is used fo generic information).
 827    Positive indicies refer to breakpoint addresses/control registers, negative
 828    indices to watchpoint addresses/control registers.
 829
 830    The Linux vector is indexed as follows:
 831       -((i << 1) + 2): Control register for watchpoint i.
 832       -((i << 1) + 1): Address register for watchpoint i.
 833                     0: Information register.
 834        ((i << 1) + 1): Address register for breakpoint i.
 835        ((i << 1) + 2): Control register for breakpoint i.
 836
 837    This structure is used as a per-thread cache of the state stored by the
 838    kernel, so that we don't need to keep calling into the kernel to find a
 839    free breakpoint.
 840
 841    We treat break-/watch-points with their enable bit clear as being deleted.
 842    */
 843 struct arm_linux_debug_reg_state
 844 {
 845   /* Hardware breakpoints for this process.  */
 846   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
 847   /* Hardware watchpoints for this process.  */
 848   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
 849 };
 850
 851 /* Per-process arch-specific data we want to keep.  */
 852 struct arm_linux_process_info
 853 {
 854   /* Linked list.  */
 855   struct arm_linux_process_info *next;
 856   /* The process identifier.  */
 857   pid_t pid;
 858   /* Hardware break-/watchpoints state information.  */
 859   struct arm_linux_debug_reg_state state;
 860
 861 };
 862
 863 /* Per-thread arch-specific data we want to keep.  */
 864 struct arch_lwp_info
 865 {
 866   /* Non-zero if our copy differs from what's recorded in the thread.  */
 867   char bpts_changed[MAX_BPTS];
 868   char wpts_changed[MAX_WPTS];
 869 };
 870
 871 static struct arm_linux_process_info *arm_linux_process_list = NULL;
 872
 873 /* Find process data for process PID.  */
 874
 875 static struct arm_linux_process_info *
 876 arm_linux_find_process_pid (pid_t pid)
 877 {
 878   struct arm_linux_process_info *proc;
 879
 880   for (proc = arm_linux_process_list; proc; proc = proc->next)
 881     if (proc->pid == pid)
 882       return proc;
 883
 884   return NULL;
 885 }
 886
 887 /* Add process data for process PID.  Returns newly allocated info
 888    object.  */
 889
 890 static struct arm_linux_process_info *
 891 arm_linux_add_process (pid_t pid)
 892 {
 893   struct arm_linux_process_info *proc;
 894
 895   proc = xcalloc (1, sizeof (*proc));
 896   proc->pid = pid;
 897
 898   proc->next = arm_linux_process_list;
 899   arm_linux_process_list = proc;
 900
 901   return proc;
 902 }
 903
 904 /* Get data specific info for process PID, creating it if necessary.
 905    Never returns NULL.  */
 906
 907 static struct arm_linux_process_info *
 908 arm_linux_process_info_get (pid_t pid)
 909 {
 910   struct arm_linux_process_info *proc;
 911
 912   proc = arm_linux_find_process_pid (pid);
 913   if (proc == NULL)
 914     proc = arm_linux_add_process (pid);
 915
 916   return proc;
 917 }
 918
 919 /* Called whenever GDB is no longer debugging process PID.  It deletes
 920    data structures that keep track of debug register state.  */
 921
 922 static void
 923 arm_linux_forget_process (pid_t pid)
 924 {
 925   struct arm_linux_process_info *proc, **proc_link;
 926
 927   proc = arm_linux_process_list;
 928   proc_link = &arm_linux_process_list;
 929
 930   while (proc != NULL)
 931     {
 932       if (proc->pid == pid)
 933     {
 934       *proc_link = proc->next;
 935
 936       xfree (proc);
 937       return;
 938     }
 939
 940       proc_link = &proc->next;
 941       proc = *proc_link;
 942     }
 943 }
 944
 945 /* Get hardware break-/watchpoint state for process PID.  */
 946
 947 static struct arm_linux_debug_reg_state *
 948 arm_linux_get_debug_reg_state (pid_t pid)
 949 {
 950   return &arm_linux_process_info_get (pid)->state;
 951 }
 952
 953 /* Initialize an ARM hardware break-/watch-point control register value.
 954    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
 955    type of break-/watch-point; ENABLE indicates whether the point is enabled.
 956    */
 957 static arm_hwbp_control_t
 958 arm_hwbp_control_initialize (unsigned byte_address_select,
 959                              arm_hwbp_type hwbp_type,
 960                              int enable)
 961 {
 962   gdb_assert ((byte_address_select & ~0xffU) == 0);
 963   gdb_assert (hwbp_type != arm_hwbp_break
 964               || ((byte_address_select & 0xfU) != 0));
 965
 966   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
 967 }
 968
 969 /* Does the breakpoint control value CONTROL have the enable bit set?  */
 970 static int
 971 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
 972 {
 973   return control & 0x1;
 974 }
 975
 976 /* Change a breakpoint control word so that it is in the disabled state.  */
 977 static arm_hwbp_control_t
 978 arm_hwbp_control_disable (arm_hwbp_control_t control)
 979 {
 980   return control & ~0x1;
 981 }
 982
 983 /* Initialise the hardware breakpoint structure P.  The breakpoint will be
 984    enabled, and will point to the placed address of BP_TGT.  */
 985 static void
 986 arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
 987                                     struct bp_target_info *bp_tgt,
 988                                     struct arm_linux_hw_breakpoint *p)
 989 {
 990   unsigned mask;
 991   CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address;
 992
 993   /* We have to create a mask for the control register which says which bits
 994      of the word pointed to by address to break on.  */
 995   if (arm_pc_is_thumb (gdbarch, address))
 996     {
 997       mask = 0x3;
 998       address &= ~1;
 999     }
1000   else
1001     {
1002       mask = 0xf;
1003       address &= ~3;
1004     }
1005
1006   p->address = (unsigned int) address;
1007   p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
1008 }
1009
1010 /* Get the ARM hardware breakpoint type from the RW value we're given when
1011    asked to set a watchpoint.  */
1012 static arm_hwbp_type
1013 arm_linux_get_hwbp_type (int rw)
1014 {
1015   if (rw == hw_read)
1016     return arm_hwbp_load;
1017   else if (rw == hw_write)
1018     return arm_hwbp_store;
1019   else
1020     return arm_hwbp_access;
1021 }
1022
1023 /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
1024    to LEN.  The type of watchpoint is given in RW.  */
1025 static void
1026 arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len, int rw,
1027                                     struct arm_linux_hw_breakpoint *p)
1028 {
1029   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1030   unsigned mask;
1031
1032   gdb_assert (cap != NULL);
1033   gdb_assert (cap->max_wp_length != 0);
1034
1035   mask = (1 << len) - 1;
1036
1037   p->address = (unsigned int) addr;
1038   p->control = arm_hwbp_control_initialize (mask,
1039                                             arm_linux_get_hwbp_type (rw), 1);
1040 }
1041
1042 /* Are two break-/watch-points equal?  */
1043 static int
1044 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
1045                                const struct arm_linux_hw_breakpoint *p2)
1046 {
1047   return p1->address == p2->address && p1->control == p2->control;
1048 }
1049
1050 /* Callback to mark a watch-/breakpoint to be updated in all threads of
1051    the current process.  */
1052
1053 struct update_registers_data
1054 {
1055   int watch;
1056   int index;
1057 };
1058
1059 static int
1060 update_registers_callback (struct lwp_info *lwp, void *arg)
1061 {
1062   struct update_registers_data *data = (struct update_registers_data *) arg;
1063
1064   if (lwp->arch_private == NULL)
1065     lwp->arch_private = XCNEW (struct arch_lwp_info);
1066
1067   /* The actual update is done later just before resuming the lwp,
1068      we just mark that the registers need updating.  */
1069   if (data->watch)
1070     lwp->arch_private->wpts_changed[data->index] = 1;
1071   else
1072     lwp->arch_private->bpts_changed[data->index] = 1;
1073
1074   /* If the lwp isn't stopped, force it to momentarily pause, so
1075      we can update its breakpoint registers.  */
1076   if (!lwp->stopped)
1077     linux_stop_lwp (lwp);
1078
1079   return 0;
1080 }
1081
1082 /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
1083    =1) BPT for thread TID.  */
1084 static void
1085 arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
1086                                  int watchpoint)
1087 {
1088   int pid;
1089   ptid_t pid_ptid;
1090   gdb_byte count, i;
1091   struct arm_linux_hw_breakpoint* bpts;
1092   struct update_registers_data data;
1093
1094   pid = ptid_get_pid (inferior_ptid);
1095   pid_ptid = pid_to_ptid (pid);
1096
1097   if (watchpoint)
1098     {
1099       count = arm_linux_get_hw_watchpoint_count ();
1100       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1101     }
1102   else
1103     {
1104       count = arm_linux_get_hw_breakpoint_count ();
1105       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1106     }
1107
1108   for (i = 0; i < count; ++i)
1109     if (!arm_hwbp_control_is_enabled (bpts[i].control))
1110       {
1111         data.watch = watchpoint;
1112         data.index = i;
1113         bpts[i] = *bpt;
1114         iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1115         break;
1116       }
1117
1118   gdb_assert (i != count);
1119 }
1120
1121 /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
1122    (WATCHPOINT = 1) BPT for thread TID.  */
1123 static void
1124 arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
1125                                  int watchpoint)
1126 {
1127   int pid;
1128   gdb_byte count, i;
1129   ptid_t pid_ptid;
1130   struct arm_linux_hw_breakpoint* bpts;
1131   struct update_registers_data data;
1132
1133   pid = ptid_get_pid (inferior_ptid);
1134   pid_ptid = pid_to_ptid (pid);
1135
1136   if (watchpoint)
1137     {
1138       count = arm_linux_get_hw_watchpoint_count ();
1139       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1140     }
1141   else
1142     {
1143       count = arm_linux_get_hw_breakpoint_count ();
1144       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1145     }
1146
1147   for (i = 0; i < count; ++i)
1148     if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
1149       {
1150         data.watch = watchpoint;
1151         data.index = i;
1152         bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
1153         iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1154         break;
1155       }
1156
1157   gdb_assert (i != count);
1158 }
1159
1160 /* Insert a Hardware breakpoint.  */
1161 static int
1162 arm_linux_insert_hw_breakpoint (struct target_ops *self,
1163                                 struct gdbarch *gdbarch,
1164                                 struct bp_target_info *bp_tgt)
1165 {
1166   struct lwp_info *lp;
1167   struct arm_linux_hw_breakpoint p;
1168
1169   if (arm_linux_get_hw_breakpoint_count () == 0)
1170     return -1;
1171
1172   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1173
1174   arm_linux_insert_hw_breakpoint1 (&p, 0);
1175
1176   return 0;
1177 }
1178
1179 /* Remove a hardware breakpoint.  */
1180 static int
1181 arm_linux_remove_hw_breakpoint (struct target_ops *self,
1182                                 struct gdbarch *gdbarch,
1183                                 struct bp_target_info *bp_tgt)
1184 {
1185   struct lwp_info *lp;
1186   struct arm_linux_hw_breakpoint p;
1187
1188   if (arm_linux_get_hw_breakpoint_count () == 0)
1189     return -1;
1190
1191   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1192
1193   arm_linux_remove_hw_breakpoint1 (&p, 0);
1194
1195   return 0;
1196 }
1197
1198 /* Are we able to use a hardware watchpoint for the LEN bytes starting at
1199    ADDR?  */
1200 static int
1201 arm_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
1202                                        CORE_ADDR addr, int len)
1203 {
1204   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1205   CORE_ADDR max_wp_length, aligned_addr;
1206
1207   /* Can not set watchpoints for zero or negative lengths.  */
1208   if (len <= 0)
1209     return 0;
1210
1211   /* Need to be able to use the ptrace interface.  */
1212   if (cap == NULL || cap->wp_count == 0)
1213     return 0;
1214
1215   /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1216      range covered by a watchpoint.  */
1217   max_wp_length = (CORE_ADDR)cap->max_wp_length;
1218   aligned_addr = addr & ~(max_wp_length - 1);
1219
1220   if (aligned_addr + max_wp_length < addr + len)
1221     return 0;
1222
1223   /* The current ptrace interface can only handle watchpoints that are a
1224      power of 2.  */
1225   if ((len & (len - 1)) != 0)
1226     return 0;
1227
1228   /* All tests passed so we must be able to set a watchpoint.  */
1229   return 1;
1230 }
1231
1232 /* Insert a Hardware breakpoint.  */
1233 static int
1234 arm_linux_insert_watchpoint (struct target_ops *self,
1235                              CORE_ADDR addr, int len, int rw,
1236                              struct expression *cond)
1237 {
1238   struct lwp_info *lp;
1239   struct arm_linux_hw_breakpoint p;
1240
1241   if (arm_linux_get_hw_watchpoint_count () == 0)
1242     return -1;
1243
1244   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1245
1246   arm_linux_insert_hw_breakpoint1 (&p, 1);
1247
1248   return 0;
1249 }
1250
1251 /* Remove a hardware breakpoint.  */
1252 static int
1253 arm_linux_remove_watchpoint (struct target_ops *self,
1254                              CORE_ADDR addr, int len, int rw,
1255                              struct expression *cond)
1256 {
1257   struct lwp_info *lp;
1258   struct arm_linux_hw_breakpoint p;
1259
1260   if (arm_linux_get_hw_watchpoint_count () == 0)
1261     return -1;
1262
1263   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1264
1265   arm_linux_remove_hw_breakpoint1 (&p, 1);
1266
1267   return 0;
1268 }
1269
1270 /* What was the data address the target was stopped on accessing.  */
1271 static int
1272 arm_linux_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
1273 {
1274   siginfo_t siginfo;
1275   int slot;
1276
1277   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
1278     return 0;
1279
1280   /* This must be a hardware breakpoint.  */
1281   if (siginfo.si_signo != SIGTRAP
1282       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1283     return 0;
1284
1285   /* We must be able to set hardware watchpoints.  */
1286   if (arm_linux_get_hw_watchpoint_count () == 0)
1287     return 0;
1288
1289   slot = siginfo.si_errno;
1290
1291   /* If we are in a positive slot then we're looking at a breakpoint and not
1292      a watchpoint.  */
1293   if (slot >= 0)
1294     return 0;
1295
1296   *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
1297   return 1;
1298 }
1299
1300 /* Has the target been stopped by hitting a watchpoint?  */
1301 static int
1302 arm_linux_stopped_by_watchpoint (struct target_ops *ops)
1303 {
1304   CORE_ADDR addr;
1305   return arm_linux_stopped_data_address (ops, &addr);
1306 }
1307
1308 static int
1309 arm_linux_watchpoint_addr_within_range (struct target_ops *target,
1310                                         CORE_ADDR addr,
1311                                         CORE_ADDR start, int length)
1312 {
1313   return start <= addr && start + length - 1 >= addr;
1314 }
1315
1316 /* Handle thread creation.  We need to copy the breakpoints and watchpoints
1317    in the parent thread to the child thread.  */
1318 static void
1319 arm_linux_new_thread (struct lwp_info *lp)
1320 {
1321   int i;
1322   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
1323
1324   /* Mark that all the hardware breakpoint/watchpoint register pairs
1325      for this thread need to be initialized.  */
1326
1327   for (i = 0; i < MAX_BPTS; i++)
1328     {
1329       info->bpts_changed[i] = 1;
1330       info->wpts_changed[i] = 1;
1331     }
1332
1333   lp->arch_private = info;
1334 }
1335
1336 /* Called when resuming a thread.
1337    The hardware debug registers are updated when there is any change.  */
1338
1339 static void
1340 arm_linux_prepare_to_resume (struct lwp_info *lwp)
1341 {
1342   int pid, i;
1343   struct arm_linux_hw_breakpoint *bpts, *wpts;
1344   struct arch_lwp_info *arm_lwp_info = lwp->arch_private;
1345
1346   pid = ptid_get_lwp (lwp->ptid);
1347   bpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->bpts;
1348   wpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->wpts;
1349
1350   /* NULL means this is the main thread still going through the shell,
1351      or, no watchpoint has been set yet.  In that case, there's
1352      nothing to do.  */
1353   if (arm_lwp_info == NULL)
1354     return;
1355
1356   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
1357     if (arm_lwp_info->bpts_changed[i])
1358       {
1359         errno = 0;
1360         if (arm_hwbp_control_is_enabled (bpts[i].control))
1361           if (ptrace (PTRACE_SETHBPREGS, pid,
1362               (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
1363             perror_with_name (_("Unexpected error setting breakpoint"));
1364
1365         if (bpts[i].control != 0)
1366           if (ptrace (PTRACE_SETHBPREGS, pid,
1367               (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
1368             perror_with_name (_("Unexpected error setting breakpoint"));
1369
1370         arm_lwp_info->bpts_changed[i] = 0;
1371       }
1372
1373   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
1374     if (arm_lwp_info->wpts_changed[i])
1375       {
1376         errno = 0;
1377         if (arm_hwbp_control_is_enabled (wpts[i].control))
1378           if (ptrace (PTRACE_SETHBPREGS, pid,
1379               (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
1380             perror_with_name (_("Unexpected error setting watchpoint"));
1381
1382         if (wpts[i].control != 0)
1383           if (ptrace (PTRACE_SETHBPREGS, pid,
1384               (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
1385             perror_with_name (_("Unexpected error setting watchpoint"));
1386
1387         arm_lwp_info->wpts_changed[i] = 0;
1388       }
1389 }
1390
1391 /* linux_nat_new_fork hook.  */
1392
1393 static void
1394 arm_linux_new_fork (struct lwp_info *parent, pid_t child_pid)
1395 {
1396   pid_t parent_pid;
1397   struct arm_linux_debug_reg_state *parent_state;
1398   struct arm_linux_debug_reg_state *child_state;
1399
1400   /* NULL means no watchpoint has ever been set in the parent.  In
1401      that case, there's nothing to do.  */
1402   if (parent->arch_private == NULL)
1403     return;
1404
1405   /* GDB core assumes the child inherits the watchpoints/hw
1406      breakpoints of the parent, and will remove them all from the
1407      forked off process.  Copy the debug registers mirrors into the
1408      new process so that all breakpoints and watchpoints can be
1409      removed together.  */
1410
1411   parent_pid = ptid_get_pid (parent->ptid);
1412   parent_state = arm_linux_get_debug_reg_state (parent_pid);
1413   child_state = arm_linux_get_debug_reg_state (child_pid);
1414   *child_state = *parent_state;
1415 }
1416
1417 void _initialize_arm_linux_nat (void);
1418
1419 void
1420 _initialize_arm_linux_nat (void)
1421 {
1422   struct target_ops *t;
1423
1424   /* Fill in the generic GNU/Linux methods.  */
1425   t = linux_target ();
1426
1427   /* Add our register access methods.  */
1428   t->to_fetch_registers = arm_linux_fetch_inferior_registers;
1429   t->to_store_registers = arm_linux_store_inferior_registers;
1430
1431   /* Add our hardware breakpoint and watchpoint implementation.  */
1432   t->to_can_use_hw_breakpoint = arm_linux_can_use_hw_breakpoint;
1433   t->to_insert_hw_breakpoint = arm_linux_insert_hw_breakpoint;
1434   t->to_remove_hw_breakpoint = arm_linux_remove_hw_breakpoint;
1435   t->to_region_ok_for_hw_watchpoint = arm_linux_region_ok_for_hw_watchpoint;
1436   t->to_insert_watchpoint = arm_linux_insert_watchpoint;
1437   t->to_remove_watchpoint = arm_linux_remove_watchpoint;
1438   t->to_stopped_by_watchpoint = arm_linux_stopped_by_watchpoint;
1439   t->to_stopped_data_address = arm_linux_stopped_data_address;
1440   t->to_watchpoint_addr_within_range = arm_linux_watchpoint_addr_within_range;
1441
1442   t->to_read_description = arm_linux_read_description;
1443
1444   /* Register the target.  */
1445   linux_nat_add_target (t);
1446
1447   /* Handle thread creation and exit.  */
1448   linux_nat_set_new_thread (t, arm_linux_new_thread);
1449   linux_nat_set_prepare_to_resume (t, arm_linux_prepare_to_resume);
1450
1451   /* Handle process creation and exit.  */
1452   linux_nat_set_new_fork (t, arm_linux_new_fork);
1453   linux_nat_set_forget_process (t, arm_linux_forget_process);
1454 }