1 /* Target-dependent code for the Acorn Risc Machine (ARM).
2 Copyright (C) 1988, 1989, 1991, 1992, 1993, 1995-1999
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
27 #include "gdb_string.h"
28 #include "coff/internal.h" /* Internal format of COFF symbols in BFD */
31 The following macros are actually wrong. Neither arm nor thumb can
32 or should set the lsb on addr.
33 The thumb addresses are mod 2, so (addr & 2) would be a good heuristic
34 to use when checking for thumb (see arm_pc_is_thumb() below).
35 Unfortunately, something else depends on these (incorrect) macros, so
36 fixing them actually breaks gdb. I didn't have time to investigate. Z.R.
38 /* Thumb function addresses are odd (bit 0 is set). Here are some
39 macros to test, set, or clear bit 0 of addresses. */
40 #define IS_THUMB_ADDR(addr) ((addr) & 1)
41 #define MAKE_THUMB_ADDR(addr) ((addr) | 1)
42 #define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
44 /* Macros to round N up or down to the next A boundary; A must be
46 #define ROUND_DOWN(n,a) ((n) & ~((a) - 1))
47 #define ROUND_UP(n,a) (((n) + (a) - 1) & ~((a) - 1))
49 /* Should call_function allocate stack space for a struct return? */
50 /* The system C compiler uses a similar structure return convention to gcc */
52 arm_use_struct_convention (gcc_p
, type
)
56 return (TYPE_LENGTH (type
) > 4);
60 arm_frame_chain_valid (chain
, thisframe
)
62 struct frame_info
*thisframe
;
64 #define LOWEST_PC 0x20 /* the first 0x20 bytes are the trap vectors. */
65 return (chain
!= 0 && (FRAME_SAVED_PC (thisframe
) >= LOWEST_PC
));
68 /* Set to true if the 32-bit mode is in use. */
72 /* Flag set by arm_fix_call_dummy that tells whether the target function
73 is a Thumb function. This flag is checked by arm_push_arguments.
74 FIXME: Change the PUSH_ARGUMENTS macro (and its use in valops.c) to
75 pass the function address as an additional parameter. */
77 static int target_is_thumb
;
79 /* Flag set by arm_fix_call_dummy that tells whether the calling function
80 is a Thumb function. This flag is checked by arm_pc_is_thumb
81 and arm_call_dummy_breakpoint_offset. */
83 static int caller_is_thumb
;
85 /* Tell if the program counter value in MEMADDR is in a Thumb function. */
88 arm_pc_is_thumb (memaddr
)
91 struct minimal_symbol
* sym
;
94 /* If bit 0 of the address is set, assume this is a Thumb address. */
95 if (IS_THUMB_ADDR (memaddr
))
98 /* Thumb function have a "special" bit set in minimal symbols */
99 sym
= lookup_minimal_symbol_by_pc (memaddr
);
102 return (MSYMBOL_IS_SPECIAL(sym
));
108 /* Tell if the program counter value in MEMADDR is in a call dummy that
109 is being called from a Thumb function. */
112 arm_pc_is_thumb_dummy (memaddr
)
115 CORE_ADDR sp
= read_sp();
117 if (PC_IN_CALL_DUMMY (memaddr
, sp
, sp
+64))
118 return caller_is_thumb
;
124 arm_addr_bits_remove (val
)
127 if (arm_pc_is_thumb (val
))
128 return (val
& (arm_apcs_32
? 0xfffffffe : 0x03fffffe));
130 return (val
& (arm_apcs_32
? 0xfffffffc : 0x03fffffc));
134 arm_saved_pc_after_call (frame
)
135 struct frame_info
*frame
;
137 return ADDR_BITS_REMOVE (read_register (LR_REGNUM
));
141 arm_frameless_function_invocation (fi
)
142 struct frame_info
*fi
;
145 CORE_ADDR func_start
, after_prologue
;
146 func_start
= (get_pc_function_start ((fi
)->pc
) + FUNCTION_START_OFFSET
);
147 after_prologue
= func_start
;
148 SKIP_PROLOGUE (after_prologue
);
149 frameless
= (after_prologue
== func_start
);
153 /* A typical Thumb prologue looks like this:
157 Sometimes the latter instruction may be replaced by:
162 thumb_skip_prologue (pc
)
165 CORE_ADDR current_pc
;
167 for (current_pc
= pc
; current_pc
< pc
+ 20; current_pc
+= 2)
169 unsigned short insn
= read_memory_unsigned_integer (current_pc
, 2);
171 if ( (insn
& 0xfe00) != 0xb400 /* push {..., r7, lr} */
172 && (insn
& 0xff00) != 0xb000 /* add sp, #simm */
173 && (insn
& 0xff00) != 0xaf00 /* add r7, sp, #imm */
174 && insn
!= 0x466f /* mov r7, sp */
175 && (insn
& 0xffc0) != 0x4640) /* mov r0-r7, r8-r15 */
182 /* APCS (ARM procedure call standard) defines the following prologue:
185 [stmfd sp!, {a1,a2,a3,a4}]
186 stmfd sp!, {...,fp,ip,lr,pc}
187 [stfe f7, [sp, #-12]!]
188 [stfe f6, [sp, #-12]!]
189 [stfe f5, [sp, #-12]!]
190 [stfe f4, [sp, #-12]!]
191 sub fp, ip, #nn // nn == 20 or 4 depending on second ins
195 arm_skip_prologue (pc
)
200 CORE_ADDR func_addr
, func_end
;
201 struct symtab_and_line sal
;
203 /* See what the symbol table says. */
204 if (find_pc_partial_function (pc
, NULL
, & func_addr
, & func_end
))
206 sal
= find_pc_line (func_addr
, 0);
207 if (sal
.line
!= 0 && sal
.end
< func_end
)
211 /* Check if this is Thumb code. */
212 if (arm_pc_is_thumb (pc
))
213 return thumb_skip_prologue (pc
);
215 /* Can't find the prologue end in the symbol table, try it the hard way
216 by disassembling the instructions. */
218 inst
= read_memory_integer (skip_pc
, 4);
219 if (inst
!= 0xe1a0c00d) /* mov ip, sp */
223 inst
= read_memory_integer (skip_pc
, 4);
224 if ((inst
& 0xfffffff0) == 0xe92d0000) /* stmfd sp!,{a1,a2,a3,a4} */
227 inst
= read_memory_integer (skip_pc
, 4);
230 if ((inst
& 0xfffff800) != 0xe92dd800) /* stmfd sp!,{...,fp,ip,lr,pc} */
234 inst
= read_memory_integer (skip_pc
, 4);
236 /* Any insns after this point may float into the code, if it makes
237 for better instruction scheduling, so we skip them only if
238 we find them, but still consdier the function to be frame-ful */
240 /* We may have either one sfmfd instruction here, or several stfe insns,
241 depending on the version of floating point code we support. */
242 if ((inst
& 0xffbf0fff) == 0xec2d0200) /* sfmfd fn, <cnt>, [sp]! */
245 inst
= read_memory_integer (skip_pc
, 4);
249 while ((inst
& 0xffff8fff) == 0xed6d0103) /* stfe fn, [sp, #-12]! */
252 inst
= read_memory_integer (skip_pc
, 4);
256 if ((inst
& 0xfffff000) == 0xe24cb000) /* sub fp, ip, #nn */
264 /* Function: thumb_scan_prologue (helper function for arm_scan_prologue)
265 This function decodes a Thumb function prologue to determine:
266 1) the size of the stack frame
267 2) which registers are saved on it
268 3) the offsets of saved regs
269 4) the offset from the stack pointer to the frame pointer
270 This information is stored in the "extra" fields of the frame_info.
272 A typical Thumb function prologue might look like this:
276 Which would create this stack frame (offsets relative to FP)
277 old SP -> 24 stack parameters
280 R7 -> 0 local variables (16 bytes)
281 SP -> -12 additional stack space (12 bytes)
282 The frame size would thus be 36 bytes, and the frame offset would be
283 12 bytes. The frame register is R7. */
286 thumb_scan_prologue (fi
)
287 struct frame_info
* fi
;
289 CORE_ADDR prologue_start
;
290 CORE_ADDR prologue_end
;
291 CORE_ADDR current_pc
;
292 int saved_reg
[16]; /* which register has been copied to register n? */
295 if (find_pc_partial_function (fi
->pc
, NULL
, & prologue_start
, & prologue_end
))
297 struct symtab_and_line sal
= find_pc_line (prologue_start
, 0);
299 if (sal
.line
== 0) /* no line info, use current PC */
300 prologue_end
= fi
->pc
;
301 else if (sal
.end
< prologue_end
) /* next line begins after fn end */
302 prologue_end
= sal
.end
; /* (probably means no prologue) */
305 prologue_end
= prologue_start
+ 40; /* We're in the boondocks: allow for */
306 /* 16 pushes, an add, and "mv fp,sp" */
308 prologue_end
= min (prologue_end
, fi
->pc
);
310 /* Initialize the saved register map. When register H is copied to
311 register L, we will put H in saved_reg[L]. */
312 for (i
= 0; i
< 16; i
++)
315 /* Search the prologue looking for instructions that set up the
316 frame pointer, adjust the stack pointer, and save registers. */
319 for (current_pc
= prologue_start
; current_pc
< prologue_end
; current_pc
+= 2)
325 insn
= read_memory_unsigned_integer (current_pc
, 2);
327 if ((insn
& 0xfe00) == 0xb400) /* push { rlist } */
329 /* Bits 0-7 contain a mask for registers R0-R7. Bit 8 says
330 whether to save LR (R14). */
331 int mask
= (insn
& 0xff) | ((insn
& 0x100) << 6);
333 /* Calculate offsets of saved R0-R7 and LR. */
334 for (regno
= LR_REGNUM
; regno
>= 0; regno
--)
335 if (mask
& (1 << regno
))
338 fi
->fsr
.regs
[saved_reg
[regno
]] = -(fi
->framesize
);
339 saved_reg
[regno
] = regno
; /* reset saved register map */
342 else if ((insn
& 0xff00) == 0xb000) /* add sp, #simm */
344 offset
= (insn
& 0x7f) << 2; /* get scaled offset */
345 if (insn
& 0x80) /* is it signed? */
347 fi
->framesize
-= offset
;
349 else if ((insn
& 0xff00) == 0xaf00) /* add r7, sp, #imm */
351 fi
->framereg
= THUMB_FP_REGNUM
;
352 fi
->frameoffset
= (insn
& 0xff) << 2; /* get scaled offset */
354 else if (insn
== 0x466f) /* mov r7, sp */
356 fi
->framereg
= THUMB_FP_REGNUM
;
358 saved_reg
[THUMB_FP_REGNUM
] = SP_REGNUM
;
360 else if ((insn
& 0xffc0) == 0x4640) /* mov r0-r7, r8-r15 */
362 int lo_reg
= insn
& 7; /* dest. register (r0-r7) */
363 int hi_reg
= ((insn
>> 3) & 7) + 8; /* source register (r8-15) */
364 saved_reg
[lo_reg
] = hi_reg
; /* remember hi reg was saved */
367 break; /* anything else isn't prologue */
371 /* Function: check_prologue_cache
372 Check if prologue for this frame's PC has already been scanned.
373 If it has, copy the relevant information about that prologue and
374 return non-zero. Otherwise do not copy anything and return zero.
376 The information saved in the cache includes:
377 * the frame register number;
378 * the size of the stack frame;
379 * the offsets of saved regs (relative to the old SP); and
380 * the offset from the stack pointer to the frame pointer
382 The cache contains only one entry, since this is adequate
383 for the typical sequence of prologue scan requests we get.
384 When performing a backtrace, GDB will usually ask to scan
385 the same function twice in a row (once to get the frame chain,
386 and once to fill in the extra frame information).
389 static struct frame_info prologue_cache
;
392 check_prologue_cache (fi
)
393 struct frame_info
* fi
;
397 if (fi
->pc
== prologue_cache
.pc
)
399 fi
->framereg
= prologue_cache
.framereg
;
400 fi
->framesize
= prologue_cache
.framesize
;
401 fi
->frameoffset
= prologue_cache
.frameoffset
;
402 for (i
= 0; i
<= NUM_REGS
; i
++)
403 fi
->fsr
.regs
[i
] = prologue_cache
.fsr
.regs
[i
];
411 /* Function: save_prologue_cache
412 Copy the prologue information from fi to the prologue cache.
416 save_prologue_cache (fi
)
417 struct frame_info
* fi
;
421 prologue_cache
.pc
= fi
->pc
;
422 prologue_cache
.framereg
= fi
->framereg
;
423 prologue_cache
.framesize
= fi
->framesize
;
424 prologue_cache
.frameoffset
= fi
->frameoffset
;
426 for (i
= 0; i
<= NUM_REGS
; i
++)
427 prologue_cache
.fsr
.regs
[i
] = fi
->fsr
.regs
[i
];
431 /* Function: arm_scan_prologue
432 This function decodes an ARM function prologue to determine:
433 1) the size of the stack frame
434 2) which registers are saved on it
435 3) the offsets of saved regs
436 4) the offset from the stack pointer to the frame pointer
437 This information is stored in the "extra" fields of the frame_info.
439 A typical Arm function prologue might look like this:
441 stmfd sp!, {fp, ip, lr, pc}
444 Which would create this stack frame (offsets relative to FP):
445 IP -> 4 (caller's stack)
446 FP -> 0 PC (points to address of stmfd instruction + 12 in callee)
447 -4 LR (return address in caller)
448 -8 IP (copy of caller's SP)
450 SP -> -28 Local variables
451 The frame size would thus be 32 bytes, and the frame offset would be
455 arm_scan_prologue (fi
)
456 struct frame_info
* fi
;
458 int regno
, sp_offset
, fp_offset
;
459 CORE_ADDR prologue_start
, prologue_end
, current_pc
;
461 /* Check if this function is already in the cache of frame information. */
462 if (check_prologue_cache (fi
))
465 /* Assume there is no frame until proven otherwise. */
466 fi
->framereg
= SP_REGNUM
;
470 /* Check for Thumb prologue. */
471 if (arm_pc_is_thumb (fi
->pc
))
473 thumb_scan_prologue (fi
);
474 save_prologue_cache (fi
);
478 /* Find the function prologue. If we can't find the function in
479 the symbol table, peek in the stack frame to find the PC. */
480 if (find_pc_partial_function (fi
->pc
, NULL
, &prologue_start
, &prologue_end
))
482 /* Assume the prologue is everything between the first instruction
483 in the function and the first source line. */
484 struct symtab_and_line sal
= find_pc_line (prologue_start
, 0);
486 if (sal
.line
== 0) /* no line info, use current PC */
487 prologue_end
= fi
->pc
;
488 else if (sal
.end
< prologue_end
) /* next line begins after fn end */
489 prologue_end
= sal
.end
; /* (probably means no prologue) */
493 /* Get address of the stmfd in the prologue of the callee; the saved
494 PC is the address of the stmfd + 12. */
495 prologue_start
= ADDR_BITS_REMOVE(read_memory_integer (fi
->frame
, 4)) - 12;
496 prologue_end
= prologue_start
+ 40; /* FIXME: should be big enough */
499 /* Now search the prologue looking for instructions that set up the
500 frame pointer, adjust the stack pointer, and save registers. */
502 sp_offset
= fp_offset
= 0;
503 for (current_pc
= prologue_start
; current_pc
< prologue_end
; current_pc
+= 4)
505 unsigned int insn
= read_memory_unsigned_integer (current_pc
, 4);
507 if ((insn
& 0xffff0000) == 0xe92d0000) /* stmfd sp!, {..., r7, lr} */
509 int mask
= insn
& 0xffff;
511 /* Calculate offsets of saved registers. */
512 for (regno
= PC_REGNUM
; regno
>= 0; regno
--)
513 if (mask
& (1 << regno
))
516 fi
->fsr
.regs
[regno
] = sp_offset
;
519 else if ((insn
& 0xfffff000) == 0xe24cb000) /* sub fp, ip #n */
521 unsigned imm
= insn
& 0xff; /* immediate value */
522 unsigned rot
= (insn
& 0xf00) >> 7; /* rotate amount */
523 imm
= (imm
>> rot
) | (imm
<< (32-rot
));
525 fi
->framereg
= FP_REGNUM
;
527 else if ((insn
& 0xfffff000) == 0xe24dd000) /* sub sp, sp #n */
529 unsigned imm
= insn
& 0xff; /* immediate value */
530 unsigned rot
= (insn
& 0xf00) >> 7; /* rotate amount */
531 imm
= (imm
>> rot
) | (imm
<< (32-rot
));
534 else if ((insn
& 0xffff7fff) == 0xed6d0103) /* stfe f?, [sp, -#c]! */
537 regno
= F0_REGNUM
+ ((insn
>> 12) & 0x07);
538 fi
->fsr
.regs
[regno
] = sp_offset
;
540 else if (insn
== 0xe1a0c00d) /* mov ip, sp */
543 break; /* not a recognized prologue instruction */
546 /* The frame size is just the negative of the offset (from the original SP)
547 of the last thing thing we pushed on the stack. The frame offset is
548 [new FP] - [new SP]. */
549 fi
->framesize
= -sp_offset
;
550 fi
->frameoffset
= fp_offset
- sp_offset
;
552 save_prologue_cache (fi
);
556 /* Function: find_callers_reg
557 Find REGNUM on the stack. Otherwise, it's in an active register. One thing
558 we might want to do here is to check REGNUM against the clobber mask, and
559 somehow flag it as invalid if it isn't saved on the stack somewhere. This
560 would provide a graceful failure mode when trying to get the value of
561 caller-saves registers for an inner frame. */
564 arm_find_callers_reg (fi
, regnum
)
565 struct frame_info
* fi
;
568 for (; fi
; fi
= fi
->next
)
570 #if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
571 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
572 return generic_read_register_dummy (fi
->pc
, fi
->frame
, regnum
);
575 if (fi
->fsr
.regs
[regnum
] != 0)
576 return read_memory_integer (fi
->fsr
.regs
[regnum
],
577 REGISTER_RAW_SIZE(regnum
));
578 return read_register (regnum
);
582 /* Function: frame_chain
583 Given a GDB frame, determine the address of the calling function's frame.
584 This will be used to create a new GDB frame struct, and then
585 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
586 For ARM, we save the frame size when we initialize the frame_info.
588 The original definition of this function was a macro in tm-arm.h:
589 { In the case of the ARM, the frame's nominal address is the FP value,
590 and 12 bytes before comes the saved previous FP value as a 4-byte word. }
592 #define FRAME_CHAIN(thisframe) \
593 ((thisframe)->pc >= LOWEST_PC ? \
594 read_memory_integer ((thisframe)->frame - 12, 4) :\
600 struct frame_info
* fi
;
602 #if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
603 CORE_ADDR fn_start
, callers_pc
, fp
;
605 /* is this a dummy frame? */
606 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
607 return fi
->frame
; /* dummy frame same as caller's frame */
609 /* is caller-of-this a dummy frame? */
610 callers_pc
= FRAME_SAVED_PC(fi
); /* find out who called us: */
611 fp
= arm_find_callers_reg (fi
, FP_REGNUM
);
612 if (PC_IN_CALL_DUMMY (callers_pc
, fp
, fp
))
613 return fp
; /* dummy frame's frame may bear no relation to ours */
615 if (find_pc_partial_function (fi
->pc
, 0, &fn_start
, 0))
616 if (fn_start
== entry_point_address ())
617 return 0; /* in _start fn, don't chain further */
619 CORE_ADDR caller_pc
, fn_start
;
620 struct frame_info caller_fi
;
621 int framereg
= fi
->framereg
;
623 if (fi
->pc
< LOWEST_PC
)
626 /* If the caller is the startup code, we're at the end of the chain. */
627 caller_pc
= FRAME_SAVED_PC (fi
);
628 if (find_pc_partial_function (caller_pc
, 0, &fn_start
, 0))
629 if (fn_start
== entry_point_address ())
632 /* If the caller is Thumb and the caller is ARM, or vice versa,
633 the frame register of the caller is different from ours.
634 So we must scan the prologue of the caller to determine its
635 frame register number. */
636 if (arm_pc_is_thumb (caller_pc
) != arm_pc_is_thumb (fi
->pc
))
638 memset (& caller_fi
, 0, sizeof (caller_fi
));
639 caller_fi
.pc
= caller_pc
;
640 arm_scan_prologue (& caller_fi
);
641 framereg
= caller_fi
.framereg
;
644 /* If the caller used a frame register, return its value.
645 Otherwise, return the caller's stack pointer. */
646 if (framereg
== FP_REGNUM
|| framereg
== THUMB_FP_REGNUM
)
647 return arm_find_callers_reg (fi
, framereg
);
649 return fi
->frame
+ fi
->framesize
;
652 /* Function: init_extra_frame_info
653 This function actually figures out the frame address for a given pc and
654 sp. This is tricky because we sometimes don't use an explicit
655 frame pointer, and the previous stack pointer isn't necessarily recorded
656 on the stack. The only reliable way to get this info is to
657 examine the prologue. */
660 arm_init_extra_frame_info (fi
)
661 struct frame_info
* fi
;
666 fi
->pc
= FRAME_SAVED_PC (fi
->next
);
668 memset (fi
->fsr
.regs
, '\000', sizeof fi
->fsr
.regs
);
670 #if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
671 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
673 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
674 by assuming it's always FP. */
675 fi
->frame
= generic_read_register_dummy (fi
->pc
, fi
->frame
, SP_REGNUM
);
683 arm_scan_prologue (fi
);
685 if (!fi
->next
) /* this is the innermost frame? */
686 fi
->frame
= read_register (fi
->framereg
);
687 else /* not the innermost frame */
688 /* If we have an FP, the callee saved it. */
689 if (fi
->framereg
== FP_REGNUM
|| fi
->framereg
== THUMB_FP_REGNUM
)
690 if (fi
->next
->fsr
.regs
[fi
->framereg
] != 0)
691 fi
->frame
= read_memory_integer (fi
->next
->fsr
.regs
[fi
->framereg
],
694 /* Calculate actual addresses of saved registers using offsets determined
695 by arm_scan_prologue. */
696 for (reg
= 0; reg
< NUM_REGS
; reg
++)
697 if (fi
->fsr
.regs
[reg
] != 0)
698 fi
->fsr
.regs
[reg
] += fi
->frame
+ fi
->framesize
- fi
->frameoffset
;
703 /* Function: frame_saved_pc
704 Find the caller of this frame. We do this by seeing if LR_REGNUM is saved
705 in the stack anywhere, otherwise we get it from the registers.
707 The old definition of this function was a macro:
708 #define FRAME_SAVED_PC(FRAME) \
709 ADDR_BITS_REMOVE (read_memory_integer ((FRAME)->frame - 4, 4))
713 arm_frame_saved_pc (fi
)
714 struct frame_info
* fi
;
716 #if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
717 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
718 return generic_read_register_dummy (fi
->pc
, fi
->frame
, PC_REGNUM
);
722 CORE_ADDR pc
= arm_find_callers_reg (fi
, LR_REGNUM
);
723 return IS_THUMB_ADDR (pc
) ? UNMAKE_THUMB_ADDR (pc
) : pc
;
728 /* Return the frame address. On ARM, it is R11; on Thumb it is R7.
729 Examine the Program Status Register to decide which state we're in. */
732 arm_target_read_fp ()
734 if (read_register (PS_REGNUM
) & 0x20) /* Bit 5 is Thumb state bit */
735 return read_register (THUMB_FP_REGNUM
); /* R7 if Thumb */
737 return read_register (FP_REGNUM
); /* R11 if ARM */
741 /* Calculate the frame offsets of the saved registers (ARM version). */
743 arm_frame_find_saved_regs (fi
, regaddr
)
744 struct frame_info
*fi
;
745 struct frame_saved_regs
*regaddr
;
747 memcpy (regaddr
, &fi
->fsr
, sizeof (struct frame_saved_regs
));
752 arm_push_dummy_frame ()
754 CORE_ADDR old_sp
= read_register (SP_REGNUM
);
755 CORE_ADDR sp
= old_sp
;
756 CORE_ADDR fp
, prologue_start
;
759 /* Push the two dummy prologue instructions in reverse order,
760 so that they'll be in the correct low-to-high order in memory. */
762 sp
= push_word (sp
, 0xe24cb004);
763 /* stmdb sp!, {r0-r10, fp, ip, lr, pc} */
764 prologue_start
= sp
= push_word (sp
, 0xe92ddfff);
766 /* push a pointer to the dummy prologue + 12, because when
767 stm instruction stores the PC, it stores the address of the stm
768 instruction itself plus 12. */
769 fp
= sp
= push_word (sp
, prologue_start
+ 12);
770 sp
= push_word (sp
, read_register (PC_REGNUM
)); /* FIXME: was PS_REGNUM */
771 sp
= push_word (sp
, old_sp
);
772 sp
= push_word (sp
, read_register (FP_REGNUM
));
774 for (regnum
= 10; regnum
>= 0; regnum
--)
775 sp
= push_word (sp
, read_register (regnum
));
777 write_register (FP_REGNUM
, fp
);
778 write_register (THUMB_FP_REGNUM
, fp
);
779 write_register (SP_REGNUM
, sp
);
782 /* Fix up the call dummy, based on whether the processor is currently
783 in Thumb or ARM mode, and whether the target function is Thumb
784 or ARM. There are three different situations requiring three
787 * ARM calling ARM: uses the call dummy in tm-arm.h, which has already
788 been copied into the dummy parameter to this function.
789 * ARM calling Thumb: uses the call dummy in tm-arm.h, but with the
790 "mov pc,r4" instruction patched to be a "bx r4" instead.
791 * Thumb calling anything: uses the Thumb dummy defined below, which
792 works for calling both ARM and Thumb functions.
794 All three call dummies expect to receive the target function address
795 in R4, with the low bit set if it's a Thumb function.
799 arm_fix_call_dummy (dummy
, pc
, fun
, nargs
, args
, type
, gcc_p
)
808 static short thumb_dummy
[4] =
810 0xf000, 0xf801, /* bl label */
812 0x4720, /* label: bx r4 */
814 static unsigned long arm_bx_r4
= 0xe12fff14; /* bx r4 instruction */
816 /* Set flag indicating whether the current PC is in a Thumb function. */
817 caller_is_thumb
= arm_pc_is_thumb (read_pc());
819 /* If the target function is Thumb, set the low bit of the function address.
820 And if the CPU is currently in ARM mode, patch the second instruction
821 of call dummy to use a BX instruction to switch to Thumb mode. */
822 target_is_thumb
= arm_pc_is_thumb (fun
);
826 if (!caller_is_thumb
)
827 store_unsigned_integer (dummy
+ 4, sizeof (arm_bx_r4
), arm_bx_r4
);
830 /* If the CPU is currently in Thumb mode, use the Thumb call dummy
831 instead of the ARM one that's already been copied. This will
832 work for both Thumb and ARM target functions. */
837 int len
= sizeof (thumb_dummy
) / sizeof (thumb_dummy
[0]);
839 for (i
= 0; i
< len
; i
++)
841 store_unsigned_integer (p
, sizeof (thumb_dummy
[0]), thumb_dummy
[i
]);
842 p
+= sizeof (thumb_dummy
[0]);
846 /* Put the target address in r4; the call dummy will copy this to the PC. */
847 write_register (4, fun
);
851 /* Return the offset in the call dummy of the instruction that needs
852 to have a breakpoint placed on it. This is the offset of the 'swi 24'
853 instruction, which is no longer actually used, but simply acts
854 as a place-holder now.
856 This implements the CALL_DUMMY_BREAK_OFFSET macro.
860 arm_call_dummy_breakpoint_offset ()
870 arm_push_arguments(nargs
, args
, sp
, struct_return
, struct_addr
)
875 CORE_ADDR struct_addr
;
886 struct stack_arg
*stack_args
=
887 (struct stack_arg
*)alloca (nargs
* sizeof (struct stack_arg
));
891 /* Initialize the integer and float register pointers. */
893 float_argreg
= F0_REGNUM
;
895 /* the struct_return pointer occupies the first parameter-passing reg */
897 write_register (argreg
++, struct_addr
);
899 /* The offset onto the stack at which we will start copying parameters
900 (after the registers are used up) begins at 16 in the old ABI.
901 This leaves room for the "home" area for register parameters. */
902 stack_offset
= REGISTER_SIZE
* 4;
904 /* Process args from left to right. Store as many as allowed in
905 registers, save the rest to be pushed on the stack */
906 for(argnum
= 0; argnum
< nargs
; argnum
++)
909 value_ptr arg
= args
[argnum
];
910 struct type
* arg_type
= check_typedef (VALUE_TYPE (arg
));
911 struct type
* target_type
= TYPE_TARGET_TYPE (arg_type
);
912 int len
= TYPE_LENGTH (arg_type
);
913 enum type_code typecode
= TYPE_CODE (arg_type
);
917 val
= (char *) VALUE_CONTENTS (arg
);
919 /* If the argument is a pointer to a function, and it's a Thumb
920 function, set the low bit of the pointer. */
921 if (typecode
== TYPE_CODE_PTR
922 && target_type
!= NULL
923 && TYPE_CODE (target_type
) == TYPE_CODE_FUNC
)
925 regval
= extract_address (val
, len
);
926 if (arm_pc_is_thumb (regval
))
927 store_address (val
, len
, MAKE_THUMB_ADDR (regval
));
930 #define MAPCS_FLOAT 0 /* --mapcs-float not implemented by the compiler yet */
932 /* Up to four floating point arguments can be passed in floating
933 point registers on ARM (not on Thumb). */
934 if (typecode
== TYPE_CODE_FLT
935 && float_argreg
<= ARM_LAST_FP_ARG_REGNUM
938 /* This is a floating point value that fits entirely
939 in a single register. */
940 regval
= extract_address (val
, len
);
941 write_register (float_argreg
++, regval
);
946 /* Copy the argument to general registers or the stack in
947 register-sized pieces. Large arguments are split between
948 registers and stack. */
951 if (argreg
<= ARM_LAST_ARG_REGNUM
)
953 int partial_len
= len
< REGISTER_SIZE
? len
: REGISTER_SIZE
;
954 regval
= extract_address (val
, partial_len
);
956 /* It's a simple argument being passed in a general
958 write_register (argreg
, regval
);
965 /* keep for later pushing */
966 stack_args
[nstack_args
].val
= val
;
967 stack_args
[nstack_args
++].len
= len
;
973 /* now do the real stack pushing, process args right to left */
976 sp
-= stack_args
[nstack_args
].len
;
977 write_memory(sp
, stack_args
[nstack_args
].val
,
978 stack_args
[nstack_args
].len
);
981 /* Return adjusted stack pointer. */
988 struct frame_info
*frame
= get_current_frame();
992 old_SP
= read_register (frame
->framereg
);
993 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
994 if (frame
->fsr
.regs
[regnum
] != 0)
995 write_register (regnum
,
996 read_memory_integer (frame
->fsr
.regs
[regnum
], 4));
998 write_register (PC_REGNUM
, FRAME_SAVED_PC (frame
));
999 write_register (SP_REGNUM
, old_SP
);
1001 flush_cached_frames ();
1005 print_fpu_flags (flags
)
1008 if (flags
& (1 << 0)) fputs ("IVO ", stdout
);
1009 if (flags
& (1 << 1)) fputs ("DVZ ", stdout
);
1010 if (flags
& (1 << 2)) fputs ("OFL ", stdout
);
1011 if (flags
& (1 << 3)) fputs ("UFL ", stdout
);
1012 if (flags
& (1 << 4)) fputs ("INX ", stdout
);
1019 register unsigned long status
= read_register (FPS_REGNUM
);
1022 type
= (status
>> 24) & 127;
1023 printf ("%s FPU type %d\n",
1024 (status
& (1<<31)) ? "Hardware" : "Software",
1026 fputs ("mask: ", stdout
);
1027 print_fpu_flags (status
>> 16);
1028 fputs ("flags: ", stdout
);
1029 print_fpu_flags (status
);
1032 static char *original_register_names
[] =
1033 { "a1", "a2", "a3", "a4", /* 0 1 2 3 */
1034 "v1", "v2", "v3", "v4", /* 4 5 6 7 */
1035 "v5", "v6", "sl", "fp", /* 8 9 10 11 */
1036 "ip", "sp", "lr", "pc", /* 12 13 14 15 */
1037 "f0", "f1", "f2", "f3", /* 16 17 18 19 */
1038 "f4", "f5", "f6", "f7", /* 20 21 22 23 */
1039 "fps","ps" } /* 24 25 */;
1041 /* These names are the ones which gcc emits, and
1042 I find them less confusing. Toggle between them
1043 using the `othernames' command. */
1044 static char *additional_register_names
[] =
1045 { "r0", "r1", "r2", "r3", /* 0 1 2 3 */
1046 "r4", "r5", "r6", "r7", /* 4 5 6 7 */
1047 "r8", "r9", "sl", "fp", /* 8 9 10 11 */
1048 "ip", "sp", "lr", "pc", /* 12 13 14 15 */
1049 "f0", "f1", "f2", "f3", /* 16 17 18 19 */
1050 "f4", "f5", "f6", "f7", /* 20 21 22 23 */
1051 "fps","ps" } /* 24 25 */;
1053 char **arm_register_names
= original_register_names
;
1060 arm_register_names
= (toggle
1061 ? additional_register_names
1062 : original_register_names
);
1066 /* FIXME: Fill in with the 'right thing', see asm
1067 template in arm-convert.s */
1070 convert_from_extended (ptr
, dbl
)
1074 *dbl
= *(double*)ptr
;
1078 convert_to_extended (dbl
, ptr
)
1082 *(double*)ptr
= *dbl
;
1086 condition_true (cond
, status_reg
)
1088 unsigned long status_reg
;
1090 if (cond
== INST_AL
|| cond
== INST_NV
)
1096 return ((status_reg
& FLAG_Z
) != 0);
1098 return ((status_reg
& FLAG_Z
) == 0);
1100 return ((status_reg
& FLAG_C
) != 0);
1102 return ((status_reg
& FLAG_C
) == 0);
1104 return ((status_reg
& FLAG_N
) != 0);
1106 return ((status_reg
& FLAG_N
) == 0);
1108 return ((status_reg
& FLAG_V
) != 0);
1110 return ((status_reg
& FLAG_V
) == 0);
1112 return ((status_reg
& (FLAG_C
| FLAG_Z
)) == FLAG_C
);
1114 return ((status_reg
& (FLAG_C
| FLAG_Z
)) != FLAG_C
);
1116 return (((status_reg
& FLAG_N
) == 0) == ((status_reg
& FLAG_V
) == 0));
1118 return (((status_reg
& FLAG_N
) == 0) != ((status_reg
& FLAG_V
) == 0));
1120 return (((status_reg
& FLAG_Z
) == 0) &&
1121 (((status_reg
& FLAG_N
) == 0) == ((status_reg
& FLAG_V
) == 0)));
1123 return (((status_reg
& FLAG_Z
) != 0) ||
1124 (((status_reg
& FLAG_N
) == 0) != ((status_reg
& FLAG_V
) == 0)));
1129 #define submask(x) ((1L << ((x) + 1)) - 1)
1130 #define bit(obj,st) (((obj) >> (st)) & 1)
1131 #define bits(obj,st,fn) (((obj) >> (st)) & submask ((fn) - (st)))
1132 #define sbits(obj,st,fn) \
1133 ((long) (bits(obj,st,fn) | ((long) bit(obj,fn) * ~ submask (fn - st))))
1134 #define BranchDest(addr,instr) \
1135 ((CORE_ADDR) (((long) (addr)) + 8 + (sbits (instr, 0, 23) << 2)))
1138 static unsigned long
1139 shifted_reg_val (inst
, carry
, pc_val
, status_reg
)
1142 unsigned long pc_val
;
1143 unsigned long status_reg
;
1145 unsigned long res
, shift
;
1146 int rm
= bits (inst
, 0, 3);
1147 unsigned long shifttype
= bits (inst
, 5, 6);
1151 int rs
= bits (inst
, 8, 11);
1152 shift
= (rs
== 15 ? pc_val
+ 8 : read_register (rs
)) & 0xFF;
1155 shift
= bits (inst
, 7, 11);
1158 ? ((pc_val
| (ARM_PC_32
? 0 : status_reg
))
1159 + (bit (inst
, 4) ? 12 : 8))
1160 : read_register (rm
));
1165 res
= shift
>= 32 ? 0 : res
<< shift
;
1169 res
= shift
>= 32 ? 0 : res
>> shift
;
1173 if (shift
>= 32) shift
= 31;
1174 res
= ((res
& 0x80000000L
)
1175 ? ~((~res
) >> shift
) : res
>> shift
);
1178 case 3: /* ROR/RRX */
1181 res
= (res
>> 1) | (carry
? 0x80000000L
: 0);
1183 res
= (res
>> shift
) | (res
<< (32-shift
));
1187 return res
& 0xffffffff;
1191 /* Return number of 1-bits in VAL. */
1198 for (nbits
= 0; val
!= 0; nbits
++)
1199 val
&= val
- 1; /* delete rightmost 1-bit in val */
1205 thumb_get_next_pc (pc
)
1208 unsigned long pc_val
= ((unsigned long)pc
) + 4; /* PC after prefetch */
1209 unsigned short inst1
= read_memory_integer (pc
, 2);
1210 CORE_ADDR nextpc
= pc
+ 2; /* default is next instruction */
1211 unsigned long offset
;
1213 if ((inst1
& 0xff00) == 0xbd00) /* pop {rlist, pc} */
1217 /* Fetch the saved PC from the stack. It's stored above
1218 all of the other registers. */
1219 offset
= bitcount (bits (inst1
, 0, 7)) * REGISTER_SIZE
;
1220 sp
= read_register (SP_REGNUM
);
1221 nextpc
= (CORE_ADDR
) read_memory_integer (sp
+ offset
, 4);
1222 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1224 error ("Infinite loop detected");
1226 else if ((inst1
& 0xf000) == 0xd000) /* conditional branch */
1228 unsigned long status
= read_register (PS_REGNUM
);
1229 unsigned long cond
= bits (inst1
, 8, 11);
1230 if (cond
!= 0x0f && condition_true (cond
, status
)) /* 0x0f = SWI */
1231 nextpc
= pc_val
+ (sbits (inst1
, 0, 7) << 1);
1233 else if ((inst1
& 0xf800) == 0xe000) /* unconditional branch */
1235 nextpc
= pc_val
+ (sbits (inst1
, 0, 10) << 1);
1237 else if ((inst1
& 0xf800) == 0xf000) /* long branch with link */
1239 unsigned short inst2
= read_memory_integer (pc
+ 2, 2);
1240 offset
= (sbits (inst1
, 0, 10) << 12) + (bits (inst2
, 0, 10) << 1);
1241 nextpc
= pc_val
+ offset
;
1249 arm_get_next_pc (pc
)
1252 unsigned long pc_val
;
1253 unsigned long this_instr
;
1254 unsigned long status
;
1257 if (arm_pc_is_thumb (pc
))
1258 return thumb_get_next_pc (pc
);
1260 pc_val
= (unsigned long) pc
;
1261 this_instr
= read_memory_integer (pc
, 4);
1262 status
= read_register (PS_REGNUM
);
1263 nextpc
= (CORE_ADDR
) (pc_val
+ 4); /* Default case */
1265 if (condition_true (bits (this_instr
, 28, 31), status
))
1267 switch (bits (this_instr
, 24, 27))
1269 case 0x0: case 0x1: /* data processing */
1272 unsigned long operand1
, operand2
, result
= 0;
1276 if (bits (this_instr
, 12, 15) != 15)
1279 if (bits (this_instr
, 22, 25) == 0
1280 && bits (this_instr
, 4, 7) == 9) /* multiply */
1281 error ("Illegal update to pc in instruction");
1283 /* Multiply into PC */
1284 c
= (status
& FLAG_C
) ? 1 : 0;
1285 rn
= bits (this_instr
, 16, 19);
1286 operand1
= (rn
== 15) ? pc_val
+ 8 : read_register (rn
);
1288 if (bit (this_instr
, 25))
1290 unsigned long immval
= bits (this_instr
, 0, 7);
1291 unsigned long rotate
= 2 * bits (this_instr
, 8, 11);
1292 operand2
= ((immval
>> rotate
) | (immval
<< (32-rotate
)))
1295 else /* operand 2 is a shifted register */
1296 operand2
= shifted_reg_val (this_instr
, c
, pc_val
, status
);
1298 switch (bits (this_instr
, 21, 24))
1301 result
= operand1
& operand2
;
1305 result
= operand1
^ operand2
;
1309 result
= operand1
- operand2
;
1313 result
= operand2
- operand1
;
1317 result
= operand1
+ operand2
;
1321 result
= operand1
+ operand2
+ c
;
1325 result
= operand1
- operand2
+ c
;
1329 result
= operand2
- operand1
+ c
;
1332 case 0x8: case 0x9: case 0xa: case 0xb: /* tst, teq, cmp, cmn */
1333 result
= (unsigned long) nextpc
;
1337 result
= operand1
| operand2
;
1341 /* Always step into a function. */
1346 result
= operand1
& ~operand2
;
1353 nextpc
= (CORE_ADDR
) ADDR_BITS_REMOVE (result
);
1356 error ("Infinite loop detected");
1360 case 0x4: case 0x5: /* data transfer */
1362 if (bit (this_instr
, 20))
1365 if (bits (this_instr
, 12, 15) == 15)
1371 if (bit (this_instr
, 22))
1372 error ("Illegal update to pc in instruction");
1374 /* byte write to PC */
1375 rn
= bits (this_instr
, 16, 19);
1376 base
= (rn
== 15) ? pc_val
+ 8 : read_register (rn
);
1377 if (bit (this_instr
, 24))
1380 int c
= (status
& FLAG_C
) ? 1 : 0;
1381 unsigned long offset
=
1382 (bit (this_instr
, 25)
1383 ? shifted_reg_val (this_instr
, c
, pc_val
)
1384 : bits (this_instr
, 0, 11));
1386 if (bit (this_instr
, 23))
1391 nextpc
= (CORE_ADDR
) read_memory_integer ((CORE_ADDR
) base
,
1394 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1397 error ("Infinite loop detected");
1402 case 0x8: case 0x9: /* block transfer */
1403 if (bit (this_instr
, 20))
1406 if (bit (this_instr
, 15))
1411 if (bit (this_instr
, 23))
1414 unsigned long reglist
= bits (this_instr
, 0, 14);
1415 offset
= bitcount (reglist
) * 4;
1416 if (bit (this_instr
, 24)) /* pre */
1419 else if (bit (this_instr
, 24))
1423 unsigned long rn_val
=
1424 read_register (bits (this_instr
, 16, 19));
1426 (CORE_ADDR
) read_memory_integer ((CORE_ADDR
) (rn_val
1430 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1432 error ("Infinite loop detected");
1437 case 0xb: /* branch & link */
1438 case 0xa: /* branch */
1440 nextpc
= BranchDest (pc
, this_instr
);
1442 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1444 error ("Infinite loop detected");
1449 case 0xe: /* coproc ops */
1454 fprintf (stderr
, "Bad bit-field extraction\n");
1462 #include "bfd-in2.h"
1463 #include "libcoff.h"
1466 gdb_print_insn_arm (memaddr
, info
)
1468 disassemble_info
* info
;
1470 if (arm_pc_is_thumb (memaddr
))
1472 static asymbol
* asym
;
1473 static combined_entry_type ce
;
1474 static struct coff_symbol_struct csym
;
1475 static struct _bfd fake_bfd
;
1476 static bfd_target fake_target
;
1478 if (csym
.native
== NULL
)
1480 /* Create a fake symbol vector containing a Thumb symbol. This is
1481 solely so that the code in print_insn_little_arm() and
1482 print_insn_big_arm() in opcodes/arm-dis.c will detect the presence
1483 of a Thumb symbol and switch to decoding Thumb instructions. */
1485 fake_target
.flavour
= bfd_target_coff_flavour
;
1486 fake_bfd
.xvec
= & fake_target
;
1487 ce
.u
.syment
.n_sclass
= C_THUMBEXTFUNC
;
1489 csym
.symbol
.the_bfd
= & fake_bfd
;
1490 csym
.symbol
.name
= "fake";
1491 asym
= (asymbol
*) & csym
;
1494 memaddr
= UNMAKE_THUMB_ADDR (memaddr
);
1495 info
->symbols
= & asym
;
1498 info
->symbols
= NULL
;
1500 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
1501 return print_insn_big_arm (memaddr
, info
);
1503 return print_insn_little_arm (memaddr
, info
);
1506 /* Sequence of bytes for breakpoint instruction. */
1507 #define ARM_LE_BREAKPOINT {0xFE,0xDE,0xFF,0xE7} /* Recognized illegal opcodes */
1508 #define ARM_BE_BREAKPOINT {0xE7,0xFF,0xDE,0xFE}
1509 #define THUMB_LE_BREAKPOINT {0xfe,0xdf}
1510 #define THUMB_BE_BREAKPOINT {0xdf,0xfe}
1512 /* The following has been superseded by BREAKPOINT_FOR_PC, but
1513 is defined merely to keep mem-break.c happy. */
1514 #define LITTLE_BREAKPOINT ARM_LE_BREAKPOINT
1515 #define BIG_BREAKPOINT ARM_BE_BREAKPOINT
1517 /* This function implements the BREAKPOINT_FROM_PC macro. It uses the program
1518 counter value to determine whether a 16- or 32-bit breakpoint should be
1519 used. It returns a pointer to a string of bytes that encode a breakpoint
1520 instruction, stores the length of the string to *lenptr, and adjusts pc
1521 (if necessary) to point to the actual memory location where the
1522 breakpoint should be inserted. */
1525 arm_breakpoint_from_pc (pcptr
, lenptr
)
1529 if (arm_pc_is_thumb (*pcptr
) || arm_pc_is_thumb_dummy (*pcptr
))
1531 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
1533 static char thumb_breakpoint
[] = THUMB_BE_BREAKPOINT
;
1534 *pcptr
= UNMAKE_THUMB_ADDR (*pcptr
);
1535 *lenptr
= sizeof (thumb_breakpoint
);
1536 return thumb_breakpoint
;
1540 static char thumb_breakpoint
[] = THUMB_LE_BREAKPOINT
;
1541 *pcptr
= UNMAKE_THUMB_ADDR (*pcptr
);
1542 *lenptr
= sizeof (thumb_breakpoint
);
1543 return thumb_breakpoint
;
1548 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
1550 static char arm_breakpoint
[] = ARM_BE_BREAKPOINT
;
1551 *lenptr
= sizeof (arm_breakpoint
);
1552 return arm_breakpoint
;
1556 static char arm_breakpoint
[] = ARM_LE_BREAKPOINT
;
1557 *lenptr
= sizeof (arm_breakpoint
);
1558 return arm_breakpoint
;
1562 /* Return non-zero if the PC is inside a call thunk (aka stub or trampoline).
1563 This implements the IN_SOLIB_CALL_TRAMPOLINE macro. */
1566 arm_in_call_stub (pc
, name
)
1570 CORE_ADDR start_addr
;
1572 /* Find the starting address of the function containing the PC. If the
1573 caller didn't give us a name, look it up at the same time. */
1574 if (find_pc_partial_function (pc
, name
? NULL
: &name
, &start_addr
, NULL
) == 0)
1577 return strncmp (name
, "_call_via_r", 11) == 0;
1581 /* If PC is in a Thumb call or return stub, return the address of the target
1582 PC, which is in a register. The thunk functions are called _called_via_xx,
1583 where x is the register name. The possible names are r0-r9, sl, fp, ip,
1591 CORE_ADDR start_addr
;
1593 /* Find the starting address and name of the function containing the PC. */
1594 if (find_pc_partial_function (pc
, &name
, &start_addr
, NULL
) == 0)
1597 /* Call thunks always start with "_call_via_". */
1598 if (strncmp (name
, "_call_via_", 10) == 0)
1600 /* Use the name suffix to determine which register contains
1602 static char *table
[15] =
1603 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1604 "r8", "r9", "sl", "fp", "ip", "sp", "lr"
1608 for (regno
= 0; regno
<= 14; regno
++)
1609 if (strcmp (&name
[10], table
[regno
]) == 0)
1610 return read_register (regno
);
1612 return 0; /* not a stub */
1617 _initialize_arm_tdep ()
1619 tm_print_insn
= gdb_print_insn_arm
;
1621 add_com ("othernames", class_obscure
, arm_othernames
,
1622 "Switch to the other set of register names.");
1624 /* ??? Maybe this should be a boolean. */
1625 add_show_from_set (add_set_cmd ("apcs32", no_class
,
1626 var_zinteger
, (char *)&arm_apcs_32
,
1627 "Set usage of ARM 32-bit mode.\n", &setlist
),
1632 /* Test whether the coff symbol specific value corresponds to a Thumb function */
1634 coff_sym_is_thumb(int val
)
1636 return (val
== C_THUMBEXT
||
1637 val
== C_THUMBSTAT
||
1638 val
== C_THUMBEXTFUNC
||
1639 val
== C_THUMBSTATFUNC
||
1640 val
== C_THUMBLABEL
);