1 /* Common target dependent code for GDB on ARM systems.
2 Copyright 1988, 1989, 1991, 1992, 1993, 1995, 1996, 1998, 1999, 2000,
3 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #include <ctype.h> /* XXX for isupper () */
30 #include "gdb_string.h"
31 #include "dis-asm.h" /* For register flavors. */
35 #include "arch-utils.h"
36 #include "solib-svr4.h"
41 #include "coff/internal.h"
44 /* Each OS has a different mechanism for accessing the various
45 registers stored in the sigcontext structure.
47 SIGCONTEXT_REGISTER_ADDRESS should be defined to the name (or
48 function pointer) which may be used to determine the addresses
49 of the various saved registers in the sigcontext structure.
51 For the ARM target, there are three parameters to this function.
52 The first is the pc value of the frame under consideration, the
53 second the stack pointer of this frame, and the last is the
54 register number to fetch.
56 If the tm.h file does not define this macro, then it's assumed that
57 no mechanism is needed and we define SIGCONTEXT_REGISTER_ADDRESS to
60 When it comes time to multi-arching this code, see the identically
61 named machinery in ia64-tdep.c for an example of how it could be
62 done. It should not be necessary to modify the code below where
63 this macro is used. */
65 #ifdef SIGCONTEXT_REGISTER_ADDRESS
66 #ifndef SIGCONTEXT_REGISTER_ADDRESS_P
67 #define SIGCONTEXT_REGISTER_ADDRESS_P() 1
70 #define SIGCONTEXT_REGISTER_ADDRESS(SP,PC,REG) 0
71 #define SIGCONTEXT_REGISTER_ADDRESS_P() 0
74 /* Macros for setting and testing a bit in a minimal symbol that marks
75 it as Thumb function. The MSB of the minimal symbol's "info" field
76 is used for this purpose. This field is already being used to store
77 the symbol size, so the assumption is that the symbol size cannot
80 MSYMBOL_SET_SPECIAL Actually sets the "special" bit.
81 MSYMBOL_IS_SPECIAL Tests the "special" bit in a minimal symbol.
82 MSYMBOL_SIZE Returns the size of the minimal symbol,
83 i.e. the "info" field with the "special" bit
86 #define MSYMBOL_SET_SPECIAL(msym) \
87 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
90 #define MSYMBOL_IS_SPECIAL(msym) \
91 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
93 #define MSYMBOL_SIZE(msym) \
94 ((long) MSYMBOL_INFO (msym) & 0x7fffffff)
96 /* This table matches the indicees assigned to enum arm_abi. Keep
99 static const char * const arm_abi_names
[] =
102 "ARM EABI (version 1)",
103 "ARM EABI (version 2)",
113 /* Number of different reg name sets (options). */
114 static int num_flavor_options
;
116 /* We have more registers than the disassembler as gdb can print the value
117 of special registers as well.
118 The general register names are overwritten by whatever is being used by
119 the disassembler at the moment. We also adjust the case of cpsr and fps. */
121 /* Initial value: Register names used in ARM's ISA documentation. */
122 static char * arm_register_name_strings
[] =
123 {"r0", "r1", "r2", "r3", /* 0 1 2 3 */
124 "r4", "r5", "r6", "r7", /* 4 5 6 7 */
125 "r8", "r9", "r10", "r11", /* 8 9 10 11 */
126 "r12", "sp", "lr", "pc", /* 12 13 14 15 */
127 "f0", "f1", "f2", "f3", /* 16 17 18 19 */
128 "f4", "f5", "f6", "f7", /* 20 21 22 23 */
129 "fps", "cpsr" }; /* 24 25 */
130 static char **arm_register_names
= arm_register_name_strings
;
132 /* Valid register name flavors. */
133 static const char **valid_flavors
;
135 /* Disassembly flavor to use. Default to "std" register names. */
136 static const char *disassembly_flavor
;
137 static int current_option
; /* Index to that option in the opcodes table. */
139 /* This is used to keep the bfd arch_info in sync with the disassembly
141 static void set_disassembly_flavor_sfunc(char *, int,
142 struct cmd_list_element
*);
143 static void set_disassembly_flavor (void);
145 static void convert_from_extended (void *ptr
, void *dbl
);
147 /* Define other aspects of the stack frame. We keep the offsets of
148 all saved registers, 'cause we need 'em a lot! We also keep the
149 current size of the stack frame, and the offset of the frame
150 pointer from the stack pointer (for frameless functions, and when
151 we're still in the prologue of a function with a frame) */
153 struct frame_extra_info
160 /* Addresses for calling Thumb functions have the bit 0 set.
161 Here are some macros to test, set, or clear bit 0 of addresses. */
162 #define IS_THUMB_ADDR(addr) ((addr) & 1)
163 #define MAKE_THUMB_ADDR(addr) ((addr) | 1)
164 #define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
167 arm_frame_chain_valid (CORE_ADDR chain
, struct frame_info
*thisframe
)
169 return (chain
!= 0 && (FRAME_SAVED_PC (thisframe
) >= LOWEST_PC
));
172 /* Set to true if the 32-bit mode is in use. */
176 /* Flag set by arm_fix_call_dummy that tells whether the target
177 function is a Thumb function. This flag is checked by
178 arm_push_arguments. FIXME: Change the PUSH_ARGUMENTS macro (and
179 its use in valops.c) to pass the function address as an additional
182 static int target_is_thumb
;
184 /* Flag set by arm_fix_call_dummy that tells whether the calling
185 function is a Thumb function. This flag is checked by
186 arm_pc_is_thumb and arm_call_dummy_breakpoint_offset. */
188 static int caller_is_thumb
;
190 /* Determine if the program counter specified in MEMADDR is in a Thumb
194 arm_pc_is_thumb (CORE_ADDR memaddr
)
196 struct minimal_symbol
*sym
;
198 /* If bit 0 of the address is set, assume this is a Thumb address. */
199 if (IS_THUMB_ADDR (memaddr
))
202 /* Thumb functions have a "special" bit set in minimal symbols. */
203 sym
= lookup_minimal_symbol_by_pc (memaddr
);
206 return (MSYMBOL_IS_SPECIAL (sym
));
214 /* Determine if the program counter specified in MEMADDR is in a call
215 dummy being called from a Thumb function. */
218 arm_pc_is_thumb_dummy (CORE_ADDR memaddr
)
220 CORE_ADDR sp
= read_sp ();
222 /* FIXME: Until we switch for the new call dummy macros, this heuristic
223 is the best we can do. We are trying to determine if the pc is on
224 the stack, which (hopefully) will only happen in a call dummy.
225 We hope the current stack pointer is not so far alway from the dummy
226 frame location (true if we have not pushed large data structures or
227 gone too many levels deep) and that our 1024 is not enough to consider
228 code regions as part of the stack (true for most practical purposes) */
229 if (PC_IN_CALL_DUMMY (memaddr
, sp
, sp
+ 1024))
230 return caller_is_thumb
;
235 /* Remove useless bits from addresses in a running program. */
237 arm_addr_bits_remove (CORE_ADDR val
)
239 if (arm_pc_is_thumb (val
))
240 return (val
& (arm_apcs_32
? 0xfffffffe : 0x03fffffe));
242 return (val
& (arm_apcs_32
? 0xfffffffc : 0x03fffffc));
245 /* When reading symbols, we need to zap the low bit of the address,
246 which may be set to 1 for Thumb functions. */
248 arm_smash_text_address (CORE_ADDR val
)
253 /* Immediately after a function call, return the saved pc. Can't
254 always go through the frames for this because on some machines the
255 new frame is not set up until the new function executes some
259 arm_saved_pc_after_call (struct frame_info
*frame
)
261 return ADDR_BITS_REMOVE (read_register (ARM_LR_REGNUM
));
264 /* Determine whether the function invocation represented by FI has a
265 frame on the stack associated with it. If it does return zero,
266 otherwise return 1. */
269 arm_frameless_function_invocation (struct frame_info
*fi
)
271 CORE_ADDR func_start
, after_prologue
;
274 /* Sometimes we have functions that do a little setup (like saving the
275 vN registers with the stmdb instruction, but DO NOT set up a frame.
276 The symbol table will report this as a prologue. However, it is
277 important not to try to parse these partial frames as frames, or we
278 will get really confused.
280 So I will demand 3 instructions between the start & end of the
281 prologue before I call it a real prologue, i.e. at least
286 func_start
= (get_pc_function_start ((fi
)->pc
) + FUNCTION_START_OFFSET
);
287 after_prologue
= SKIP_PROLOGUE (func_start
);
289 /* There are some frameless functions whose first two instructions
290 follow the standard APCS form, in which case after_prologue will
291 be func_start + 8. */
293 frameless
= (after_prologue
< func_start
+ 12);
297 /* The address of the arguments in the frame. */
299 arm_frame_args_address (struct frame_info
*fi
)
304 /* The address of the local variables in the frame. */
306 arm_frame_locals_address (struct frame_info
*fi
)
311 /* The number of arguments being passed in the frame. */
313 arm_frame_num_args (struct frame_info
*fi
)
315 /* We have no way of knowing. */
319 /* A typical Thumb prologue looks like this:
323 Sometimes the latter instruction may be replaced by:
331 or, on tpcs, like this:
338 There is always one instruction of three classes:
343 When we have found at least one of each class we are done with the prolog.
344 Note that the "sub sp, #NN" before the push does not count.
348 thumb_skip_prologue (CORE_ADDR pc
, CORE_ADDR func_end
)
350 CORE_ADDR current_pc
;
351 int findmask
= 0; /* findmask:
352 bit 0 - push { rlist }
353 bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
354 bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
357 for (current_pc
= pc
; current_pc
+ 2 < func_end
&& current_pc
< pc
+ 40; current_pc
+= 2)
359 unsigned short insn
= read_memory_unsigned_integer (current_pc
, 2);
361 if ((insn
& 0xfe00) == 0xb400) /* push { rlist } */
363 findmask
|= 1; /* push found */
365 else if ((insn
& 0xff00) == 0xb000) /* add sp, #simm OR sub sp, #simm */
367 if ((findmask
& 1) == 0) /* before push ? */
370 findmask
|= 4; /* add/sub sp found */
372 else if ((insn
& 0xff00) == 0xaf00) /* add r7, sp, #imm */
374 findmask
|= 2; /* setting of r7 found */
376 else if (insn
== 0x466f) /* mov r7, sp */
378 findmask
|= 2; /* setting of r7 found */
380 else if (findmask
== (4+2+1))
382 break; /* We have found one of each type of prologue instruction */
385 continue; /* something in the prolog that we don't care about or some
386 instruction from outside the prolog scheduled here for optimization */
392 /* Advance the PC across any function entry prologue instructions to reach
395 The APCS (ARM Procedure Call Standard) defines the following
399 [stmfd sp!, {a1,a2,a3,a4}]
400 stmfd sp!, {...,fp,ip,lr,pc}
401 [stfe f7, [sp, #-12]!]
402 [stfe f6, [sp, #-12]!]
403 [stfe f5, [sp, #-12]!]
404 [stfe f4, [sp, #-12]!]
405 sub fp, ip, #nn @@ nn == 20 or 4 depending on second insn */
408 arm_skip_prologue (CORE_ADDR pc
)
412 CORE_ADDR func_addr
, func_end
;
414 struct symtab_and_line sal
;
416 /* See what the symbol table says. */
418 if (find_pc_partial_function (pc
, &func_name
, &func_addr
, &func_end
))
422 /* Found a function. */
423 sym
= lookup_symbol (func_name
, NULL
, VAR_NAMESPACE
, NULL
, NULL
);
424 if (sym
&& SYMBOL_LANGUAGE (sym
) != language_asm
)
426 /* Don't use this trick for assembly source files. */
427 sal
= find_pc_line (func_addr
, 0);
428 if ((sal
.line
!= 0) && (sal
.end
< func_end
))
433 /* Check if this is Thumb code. */
434 if (arm_pc_is_thumb (pc
))
435 return thumb_skip_prologue (pc
, func_end
);
437 /* Can't find the prologue end in the symbol table, try it the hard way
438 by disassembling the instructions. */
440 inst
= read_memory_integer (skip_pc
, 4);
441 if (inst
!= 0xe1a0c00d) /* mov ip, sp */
445 inst
= read_memory_integer (skip_pc
, 4);
446 if ((inst
& 0xfffffff0) == 0xe92d0000) /* stmfd sp!,{a1,a2,a3,a4} */
449 inst
= read_memory_integer (skip_pc
, 4);
452 if ((inst
& 0xfffff800) != 0xe92dd800) /* stmfd sp!,{...,fp,ip,lr,pc} */
456 inst
= read_memory_integer (skip_pc
, 4);
458 /* Any insns after this point may float into the code, if it makes
459 for better instruction scheduling, so we skip them only if we
460 find them, but still consdier the function to be frame-ful. */
462 /* We may have either one sfmfd instruction here, or several stfe
463 insns, depending on the version of floating point code we
465 if ((inst
& 0xffbf0fff) == 0xec2d0200) /* sfmfd fn, <cnt>, [sp]! */
468 inst
= read_memory_integer (skip_pc
, 4);
472 while ((inst
& 0xffff8fff) == 0xed6d0103) /* stfe fn, [sp, #-12]! */
475 inst
= read_memory_integer (skip_pc
, 4);
479 if ((inst
& 0xfffff000) == 0xe24cb000) /* sub fp, ip, #nn */
485 /* Function: thumb_scan_prologue (helper function for arm_scan_prologue)
486 This function decodes a Thumb function prologue to determine:
487 1) the size of the stack frame
488 2) which registers are saved on it
489 3) the offsets of saved regs
490 4) the offset from the stack pointer to the frame pointer
491 This information is stored in the "extra" fields of the frame_info.
493 A typical Thumb function prologue would create this stack frame
494 (offsets relative to FP)
495 old SP -> 24 stack parameters
498 R7 -> 0 local variables (16 bytes)
499 SP -> -12 additional stack space (12 bytes)
500 The frame size would thus be 36 bytes, and the frame offset would be
501 12 bytes. The frame register is R7.
503 The comments for thumb_skip_prolog() describe the algorithm we use to detect
504 the end of the prolog */
508 thumb_scan_prologue (struct frame_info
*fi
)
510 CORE_ADDR prologue_start
;
511 CORE_ADDR prologue_end
;
512 CORE_ADDR current_pc
;
513 int saved_reg
[16]; /* which register has been copied to register n? */
514 int findmask
= 0; /* findmask:
515 bit 0 - push { rlist }
516 bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
517 bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
521 if (find_pc_partial_function (fi
->pc
, NULL
, &prologue_start
, &prologue_end
))
523 struct symtab_and_line sal
= find_pc_line (prologue_start
, 0);
525 if (sal
.line
== 0) /* no line info, use current PC */
526 prologue_end
= fi
->pc
;
527 else if (sal
.end
< prologue_end
) /* next line begins after fn end */
528 prologue_end
= sal
.end
; /* (probably means no prologue) */
531 prologue_end
= prologue_start
+ 40; /* We're in the boondocks: allow for */
532 /* 16 pushes, an add, and "mv fp,sp" */
534 prologue_end
= min (prologue_end
, fi
->pc
);
536 /* Initialize the saved register map. When register H is copied to
537 register L, we will put H in saved_reg[L]. */
538 for (i
= 0; i
< 16; i
++)
541 /* Search the prologue looking for instructions that set up the
542 frame pointer, adjust the stack pointer, and save registers.
543 Do this until all basic prolog instructions are found. */
545 fi
->extra_info
->framesize
= 0;
546 for (current_pc
= prologue_start
;
547 (current_pc
< prologue_end
) && ((findmask
& 7) != 7);
554 insn
= read_memory_unsigned_integer (current_pc
, 2);
556 if ((insn
& 0xfe00) == 0xb400) /* push { rlist } */
559 findmask
|= 1; /* push found */
560 /* Bits 0-7 contain a mask for registers R0-R7. Bit 8 says
561 whether to save LR (R14). */
562 mask
= (insn
& 0xff) | ((insn
& 0x100) << 6);
564 /* Calculate offsets of saved R0-R7 and LR. */
565 for (regno
= ARM_LR_REGNUM
; regno
>= 0; regno
--)
566 if (mask
& (1 << regno
))
568 fi
->extra_info
->framesize
+= 4;
569 fi
->saved_regs
[saved_reg
[regno
]] =
570 -(fi
->extra_info
->framesize
);
571 saved_reg
[regno
] = regno
; /* reset saved register map */
574 else if ((insn
& 0xff00) == 0xb000) /* add sp, #simm OR sub sp, #simm */
576 if ((findmask
& 1) == 0) /* before push ? */
579 findmask
|= 4; /* add/sub sp found */
581 offset
= (insn
& 0x7f) << 2; /* get scaled offset */
582 if (insn
& 0x80) /* is it signed? (==subtracting) */
584 fi
->extra_info
->frameoffset
+= offset
;
587 fi
->extra_info
->framesize
-= offset
;
589 else if ((insn
& 0xff00) == 0xaf00) /* add r7, sp, #imm */
591 findmask
|= 2; /* setting of r7 found */
592 fi
->extra_info
->framereg
= THUMB_FP_REGNUM
;
593 /* get scaled offset */
594 fi
->extra_info
->frameoffset
= (insn
& 0xff) << 2;
596 else if (insn
== 0x466f) /* mov r7, sp */
598 findmask
|= 2; /* setting of r7 found */
599 fi
->extra_info
->framereg
= THUMB_FP_REGNUM
;
600 fi
->extra_info
->frameoffset
= 0;
601 saved_reg
[THUMB_FP_REGNUM
] = ARM_SP_REGNUM
;
603 else if ((insn
& 0xffc0) == 0x4640) /* mov r0-r7, r8-r15 */
605 int lo_reg
= insn
& 7; /* dest. register (r0-r7) */
606 int hi_reg
= ((insn
>> 3) & 7) + 8; /* source register (r8-15) */
607 saved_reg
[lo_reg
] = hi_reg
; /* remember hi reg was saved */
610 continue; /* something in the prolog that we don't care about or some
611 instruction from outside the prolog scheduled here for optimization */
615 /* Check if prologue for this frame's PC has already been scanned. If
616 it has, copy the relevant information about that prologue and
617 return non-zero. Otherwise do not copy anything and return zero.
619 The information saved in the cache includes:
620 * the frame register number;
621 * the size of the stack frame;
622 * the offsets of saved regs (relative to the old SP); and
623 * the offset from the stack pointer to the frame pointer
625 The cache contains only one entry, since this is adequate for the
626 typical sequence of prologue scan requests we get. When performing
627 a backtrace, GDB will usually ask to scan the same function twice
628 in a row (once to get the frame chain, and once to fill in the
629 extra frame information). */
631 static struct frame_info prologue_cache
;
634 check_prologue_cache (struct frame_info
*fi
)
638 if (fi
->pc
== prologue_cache
.pc
)
640 fi
->extra_info
->framereg
= prologue_cache
.extra_info
->framereg
;
641 fi
->extra_info
->framesize
= prologue_cache
.extra_info
->framesize
;
642 fi
->extra_info
->frameoffset
= prologue_cache
.extra_info
->frameoffset
;
643 for (i
= 0; i
< NUM_REGS
+ NUM_PSEUDO_REGS
; i
++)
644 fi
->saved_regs
[i
] = prologue_cache
.saved_regs
[i
];
652 /* Copy the prologue information from fi to the prologue cache. */
655 save_prologue_cache (struct frame_info
*fi
)
659 prologue_cache
.pc
= fi
->pc
;
660 prologue_cache
.extra_info
->framereg
= fi
->extra_info
->framereg
;
661 prologue_cache
.extra_info
->framesize
= fi
->extra_info
->framesize
;
662 prologue_cache
.extra_info
->frameoffset
= fi
->extra_info
->frameoffset
;
664 for (i
= 0; i
< NUM_REGS
+ NUM_PSEUDO_REGS
; i
++)
665 prologue_cache
.saved_regs
[i
] = fi
->saved_regs
[i
];
669 /* This function decodes an ARM function prologue to determine:
670 1) the size of the stack frame
671 2) which registers are saved on it
672 3) the offsets of saved regs
673 4) the offset from the stack pointer to the frame pointer
674 This information is stored in the "extra" fields of the frame_info.
676 There are two basic forms for the ARM prologue. The fixed argument
677 function call will look like:
680 stmfd sp!, {fp, ip, lr, pc}
684 Which would create this stack frame (offsets relative to FP):
685 IP -> 4 (caller's stack)
686 FP -> 0 PC (points to address of stmfd instruction + 8 in callee)
687 -4 LR (return address in caller)
688 -8 IP (copy of caller's SP)
690 SP -> -28 Local variables
692 The frame size would thus be 32 bytes, and the frame offset would be
693 28 bytes. The stmfd call can also save any of the vN registers it
694 plans to use, which increases the frame size accordingly.
696 Note: The stored PC is 8 off of the STMFD instruction that stored it
697 because the ARM Store instructions always store PC + 8 when you read
700 A variable argument function call will look like:
703 stmfd sp!, {a1, a2, a3, a4}
704 stmfd sp!, {fp, ip, lr, pc}
707 Which would create this stack frame (offsets relative to FP):
708 IP -> 20 (caller's stack)
713 FP -> 0 PC (points to address of stmfd instruction + 8 in callee)
714 -4 LR (return address in caller)
715 -8 IP (copy of caller's SP)
717 SP -> -28 Local variables
719 The frame size would thus be 48 bytes, and the frame offset would be
722 There is another potential complication, which is that the optimizer
723 will try to separate the store of fp in the "stmfd" instruction from
724 the "sub fp, ip, #NN" instruction. Almost anything can be there, so
725 we just key on the stmfd, and then scan for the "sub fp, ip, #NN"...
727 Also, note, the original version of the ARM toolchain claimed that there
730 instruction at the end of the prologue. I have never seen GCC produce
731 this, and the ARM docs don't mention it. We still test for it below in
737 arm_scan_prologue (struct frame_info
*fi
)
739 int regno
, sp_offset
, fp_offset
;
740 LONGEST return_value
;
741 CORE_ADDR prologue_start
, prologue_end
, current_pc
;
743 /* Check if this function is already in the cache of frame information. */
744 if (check_prologue_cache (fi
))
747 /* Assume there is no frame until proven otherwise. */
748 fi
->extra_info
->framereg
= ARM_SP_REGNUM
;
749 fi
->extra_info
->framesize
= 0;
750 fi
->extra_info
->frameoffset
= 0;
752 /* Check for Thumb prologue. */
753 if (arm_pc_is_thumb (fi
->pc
))
755 thumb_scan_prologue (fi
);
756 save_prologue_cache (fi
);
760 /* Find the function prologue. If we can't find the function in
761 the symbol table, peek in the stack frame to find the PC. */
762 if (find_pc_partial_function (fi
->pc
, NULL
, &prologue_start
, &prologue_end
))
764 /* One way to find the end of the prologue (which works well
765 for unoptimized code) is to do the following:
767 struct symtab_and_line sal = find_pc_line (prologue_start, 0);
770 prologue_end = fi->pc;
771 else if (sal.end < prologue_end)
772 prologue_end = sal.end;
774 This mechanism is very accurate so long as the optimizer
775 doesn't move any instructions from the function body into the
776 prologue. If this happens, sal.end will be the last
777 instruction in the first hunk of prologue code just before
778 the first instruction that the scheduler has moved from
779 the body to the prologue.
781 In order to make sure that we scan all of the prologue
782 instructions, we use a slightly less accurate mechanism which
783 may scan more than necessary. To help compensate for this
784 lack of accuracy, the prologue scanning loop below contains
785 several clauses which'll cause the loop to terminate early if
786 an implausible prologue instruction is encountered.
792 is a suitable endpoint since it accounts for the largest
793 possible prologue plus up to five instructions inserted by
796 if (prologue_end
> prologue_start
+ 64)
798 prologue_end
= prologue_start
+ 64; /* See above. */
803 /* Get address of the stmfd in the prologue of the callee; the saved
804 PC is the address of the stmfd + 8. */
805 if (!safe_read_memory_integer (fi
->frame
, 4, &return_value
))
809 prologue_start
= ADDR_BITS_REMOVE (return_value
) - 8;
810 prologue_end
= prologue_start
+ 64; /* See above. */
814 /* Now search the prologue looking for instructions that set up the
815 frame pointer, adjust the stack pointer, and save registers.
817 Be careful, however, and if it doesn't look like a prologue,
818 don't try to scan it. If, for instance, a frameless function
819 begins with stmfd sp!, then we will tell ourselves there is
820 a frame, which will confuse stack traceback, as well ad"finish"
821 and other operations that rely on a knowledge of the stack
824 In the APCS, the prologue should start with "mov ip, sp" so
825 if we don't see this as the first insn, we will stop. [Note:
826 This doesn't seem to be true any longer, so it's now an optional
827 part of the prologue. - Kevin Buettner, 2001-11-20] */
829 sp_offset
= fp_offset
= 0;
831 if (read_memory_unsigned_integer (prologue_start
, 4)
832 == 0xe1a0c00d) /* mov ip, sp */
833 current_pc
= prologue_start
+ 4;
835 current_pc
= prologue_start
;
837 for (; current_pc
< prologue_end
; current_pc
+= 4)
839 unsigned int insn
= read_memory_unsigned_integer (current_pc
, 4);
841 if ((insn
& 0xffff0000) == 0xe92d0000)
842 /* stmfd sp!, {..., fp, ip, lr, pc}
844 stmfd sp!, {a1, a2, a3, a4} */
846 int mask
= insn
& 0xffff;
848 /* Calculate offsets of saved registers. */
849 for (regno
= ARM_PC_REGNUM
; regno
>= 0; regno
--)
850 if (mask
& (1 << regno
))
853 fi
->saved_regs
[regno
] = sp_offset
;
856 else if ((insn
& 0xfffff000) == 0xe24cb000) /* sub fp, ip #n */
858 unsigned imm
= insn
& 0xff; /* immediate value */
859 unsigned rot
= (insn
& 0xf00) >> 7; /* rotate amount */
860 imm
= (imm
>> rot
) | (imm
<< (32 - rot
));
862 fi
->extra_info
->framereg
= ARM_FP_REGNUM
;
864 else if ((insn
& 0xfffff000) == 0xe24dd000) /* sub sp, sp #n */
866 unsigned imm
= insn
& 0xff; /* immediate value */
867 unsigned rot
= (insn
& 0xf00) >> 7; /* rotate amount */
868 imm
= (imm
>> rot
) | (imm
<< (32 - rot
));
871 else if ((insn
& 0xffff7fff) == 0xed6d0103) /* stfe f?, [sp, -#c]! */
874 regno
= ARM_F0_REGNUM
+ ((insn
>> 12) & 0x07);
875 fi
->saved_regs
[regno
] = sp_offset
;
877 else if ((insn
& 0xffbf0fff) == 0xec2d0200) /* sfmfd f0, 4, [sp!] */
880 unsigned int fp_start_reg
, fp_bound_reg
;
882 if ((insn
& 0x800) == 0x800) /* N0 is set */
884 if ((insn
& 0x40000) == 0x40000) /* N1 is set */
891 if ((insn
& 0x40000) == 0x40000) /* N1 is set */
897 fp_start_reg
= ARM_F0_REGNUM
+ ((insn
>> 12) & 0x7);
898 fp_bound_reg
= fp_start_reg
+ n_saved_fp_regs
;
899 for (; fp_start_reg
< fp_bound_reg
; fp_start_reg
++)
902 fi
->saved_regs
[fp_start_reg
++] = sp_offset
;
905 else if ((insn
& 0xf0000000) != 0xe0000000)
906 break; /* Condition not true, exit early */
907 else if ((insn
& 0xfe200000) == 0xe8200000) /* ldm? */
908 break; /* Don't scan past a block load */
910 /* The optimizer might shove anything into the prologue,
911 so we just skip what we don't recognize. */
915 /* The frame size is just the negative of the offset (from the original SP)
916 of the last thing thing we pushed on the stack. The frame offset is
917 [new FP] - [new SP]. */
918 fi
->extra_info
->framesize
= -sp_offset
;
919 if (fi
->extra_info
->framereg
== ARM_FP_REGNUM
)
920 fi
->extra_info
->frameoffset
= fp_offset
- sp_offset
;
922 fi
->extra_info
->frameoffset
= 0;
924 save_prologue_cache (fi
);
927 /* Find REGNUM on the stack. Otherwise, it's in an active register.
928 One thing we might want to do here is to check REGNUM against the
929 clobber mask, and somehow flag it as invalid if it isn't saved on
930 the stack somewhere. This would provide a graceful failure mode
931 when trying to get the value of caller-saves registers for an inner
935 arm_find_callers_reg (struct frame_info
*fi
, int regnum
)
937 for (; fi
; fi
= fi
->next
)
939 #if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
940 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
941 return generic_read_register_dummy (fi
->pc
, fi
->frame
, regnum
);
944 if (fi
->saved_regs
[regnum
] != 0)
945 return read_memory_integer (fi
->saved_regs
[regnum
],
946 REGISTER_RAW_SIZE (regnum
));
947 return read_register (regnum
);
949 /* Function: frame_chain Given a GDB frame, determine the address of
950 the calling function's frame. This will be used to create a new
951 GDB frame struct, and then INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC
952 will be called for the new frame. For ARM, we save the frame size
953 when we initialize the frame_info. */
956 arm_frame_chain (struct frame_info
*fi
)
958 #if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
959 CORE_ADDR fn_start
, callers_pc
, fp
;
961 /* is this a dummy frame? */
962 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
963 return fi
->frame
; /* dummy frame same as caller's frame */
965 /* is caller-of-this a dummy frame? */
966 callers_pc
= FRAME_SAVED_PC (fi
); /* find out who called us: */
967 fp
= arm_find_callers_reg (fi
, ARM_FP_REGNUM
);
968 if (PC_IN_CALL_DUMMY (callers_pc
, fp
, fp
))
969 return fp
; /* dummy frame's frame may bear no relation to ours */
971 if (find_pc_partial_function (fi
->pc
, 0, &fn_start
, 0))
972 if (fn_start
== entry_point_address ())
973 return 0; /* in _start fn, don't chain further */
975 CORE_ADDR caller_pc
, fn_start
;
976 int framereg
= fi
->extra_info
->framereg
;
978 if (fi
->pc
< LOWEST_PC
)
981 /* If the caller is the startup code, we're at the end of the chain. */
982 caller_pc
= FRAME_SAVED_PC (fi
);
983 if (find_pc_partial_function (caller_pc
, 0, &fn_start
, 0))
984 if (fn_start
== entry_point_address ())
987 /* If the caller is Thumb and the caller is ARM, or vice versa,
988 the frame register of the caller is different from ours.
989 So we must scan the prologue of the caller to determine its
990 frame register number. */
991 /* XXX Fixme, we should try to do this without creating a temporary
993 if (arm_pc_is_thumb (caller_pc
) != arm_pc_is_thumb (fi
->pc
))
995 struct frame_info caller_fi
;
996 struct cleanup
*old_chain
;
998 /* Create a temporary frame suitable for scanning the caller's
1000 memset (&caller_fi
, 0, sizeof (caller_fi
));
1001 caller_fi
.extra_info
= (struct frame_extra_info
*)
1002 xcalloc (1, sizeof (struct frame_extra_info
));
1003 old_chain
= make_cleanup (xfree
, caller_fi
.extra_info
);
1004 caller_fi
.saved_regs
= (CORE_ADDR
*)
1005 xcalloc (1, SIZEOF_FRAME_SAVED_REGS
);
1006 make_cleanup (xfree
, caller_fi
.saved_regs
);
1008 /* Now, scan the prologue and obtain the frame register. */
1009 caller_fi
.pc
= caller_pc
;
1010 arm_scan_prologue (&caller_fi
);
1011 framereg
= caller_fi
.extra_info
->framereg
;
1013 /* Deallocate the storage associated with the temporary frame
1015 do_cleanups (old_chain
);
1018 /* If the caller used a frame register, return its value.
1019 Otherwise, return the caller's stack pointer. */
1020 if (framereg
== ARM_FP_REGNUM
|| framereg
== THUMB_FP_REGNUM
)
1021 return arm_find_callers_reg (fi
, framereg
);
1023 return fi
->frame
+ fi
->extra_info
->framesize
;
1026 /* This function actually figures out the frame address for a given pc
1027 and sp. This is tricky because we sometimes don't use an explicit
1028 frame pointer, and the previous stack pointer isn't necessarily
1029 recorded on the stack. The only reliable way to get this info is
1030 to examine the prologue. FROMLEAF is a little confusing, it means
1031 this is the next frame up the chain AFTER a frameless function. If
1032 this is true, then the frame value for this frame is still in the
1036 arm_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1041 if (fi
->saved_regs
== NULL
)
1042 frame_saved_regs_zalloc (fi
);
1044 fi
->extra_info
= (struct frame_extra_info
*)
1045 frame_obstack_alloc (sizeof (struct frame_extra_info
));
1047 fi
->extra_info
->framesize
= 0;
1048 fi
->extra_info
->frameoffset
= 0;
1049 fi
->extra_info
->framereg
= 0;
1052 fi
->pc
= FRAME_SAVED_PC (fi
->next
);
1054 memset (fi
->saved_regs
, '\000', sizeof fi
->saved_regs
);
1056 #if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
1057 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1059 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
1060 by assuming it's always FP. */
1061 fi
->frame
= generic_read_register_dummy (fi
->pc
, fi
->frame
,
1063 fi
->extra_info
->framesize
= 0;
1064 fi
->extra_info
->frameoffset
= 0;
1070 /* Compute stack pointer for this frame. We use this value for both the
1071 sigtramp and call dummy cases. */
1075 sp
= (fi
->next
->frame
- fi
->next
->extra_info
->frameoffset
1076 + fi
->next
->extra_info
->framesize
);
1078 /* Determine whether or not we're in a sigtramp frame.
1079 Unfortunately, it isn't sufficient to test
1080 fi->signal_handler_caller because this value is sometimes set
1081 after invoking INIT_EXTRA_FRAME_INFO. So we test *both*
1082 fi->signal_handler_caller and IN_SIGTRAMP to determine if we need
1083 to use the sigcontext addresses for the saved registers.
1085 Note: If an ARM IN_SIGTRAMP method ever needs to compare against
1086 the name of the function, the code below will have to be changed
1087 to first fetch the name of the function and then pass this name
1090 if (SIGCONTEXT_REGISTER_ADDRESS_P ()
1091 && (fi
->signal_handler_caller
|| IN_SIGTRAMP (fi
->pc
, (char *)0)))
1093 for (reg
= 0; reg
< NUM_REGS
; reg
++)
1094 fi
->saved_regs
[reg
] = SIGCONTEXT_REGISTER_ADDRESS (sp
, fi
->pc
, reg
);
1096 /* FIXME: What about thumb mode? */
1097 fi
->extra_info
->framereg
= ARM_SP_REGNUM
;
1099 read_memory_integer (fi
->saved_regs
[fi
->extra_info
->framereg
],
1100 REGISTER_RAW_SIZE (fi
->extra_info
->framereg
));
1101 fi
->extra_info
->framesize
= 0;
1102 fi
->extra_info
->frameoffset
= 0;
1105 else if (PC_IN_CALL_DUMMY (fi
->pc
, sp
, fi
->frame
))
1108 CORE_ADDR callers_sp
;
1110 /* Set rp point at the high end of the saved registers. */
1111 rp
= fi
->frame
- REGISTER_SIZE
;
1113 /* Fill in addresses of saved registers. */
1114 fi
->saved_regs
[ARM_PS_REGNUM
] = rp
;
1115 rp
-= REGISTER_RAW_SIZE (ARM_PS_REGNUM
);
1116 for (reg
= ARM_PC_REGNUM
; reg
>= 0; reg
--)
1118 fi
->saved_regs
[reg
] = rp
;
1119 rp
-= REGISTER_RAW_SIZE (reg
);
1122 callers_sp
= read_memory_integer (fi
->saved_regs
[ARM_SP_REGNUM
],
1123 REGISTER_RAW_SIZE (ARM_SP_REGNUM
));
1124 fi
->extra_info
->framereg
= ARM_FP_REGNUM
;
1125 fi
->extra_info
->framesize
= callers_sp
- sp
;
1126 fi
->extra_info
->frameoffset
= fi
->frame
- sp
;
1130 arm_scan_prologue (fi
);
1133 /* this is the innermost frame? */
1134 fi
->frame
= read_register (fi
->extra_info
->framereg
);
1135 else if (fi
->extra_info
->framereg
== ARM_FP_REGNUM
1136 || fi
->extra_info
->framereg
== THUMB_FP_REGNUM
)
1138 /* not the innermost frame */
1139 /* If we have an FP, the callee saved it. */
1140 if (fi
->next
->saved_regs
[fi
->extra_info
->framereg
] != 0)
1142 read_memory_integer (fi
->next
1143 ->saved_regs
[fi
->extra_info
->framereg
], 4);
1145 /* If we were called by a frameless fn. then our frame is
1146 still in the frame pointer register on the board... */
1147 fi
->frame
= read_fp ();
1150 /* Calculate actual addresses of saved registers using offsets
1151 determined by arm_scan_prologue. */
1152 for (reg
= 0; reg
< NUM_REGS
; reg
++)
1153 if (fi
->saved_regs
[reg
] != 0)
1154 fi
->saved_regs
[reg
] += (fi
->frame
+ fi
->extra_info
->framesize
1155 - fi
->extra_info
->frameoffset
);
1160 /* Find the caller of this frame. We do this by seeing if ARM_LR_REGNUM
1161 is saved in the stack anywhere, otherwise we get it from the
1164 The old definition of this function was a macro:
1165 #define FRAME_SAVED_PC(FRAME) \
1166 ADDR_BITS_REMOVE (read_memory_integer ((FRAME)->frame - 4, 4)) */
1169 arm_frame_saved_pc (struct frame_info
*fi
)
1171 #if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
1172 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1173 return generic_read_register_dummy (fi
->pc
, fi
->frame
, ARM_PC_REGNUM
);
1176 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
- fi
->extra_info
->frameoffset
,
1179 return read_memory_integer (fi
->saved_regs
[ARM_PC_REGNUM
],
1180 REGISTER_RAW_SIZE (ARM_PC_REGNUM
));
1184 CORE_ADDR pc
= arm_find_callers_reg (fi
, ARM_LR_REGNUM
);
1185 return IS_THUMB_ADDR (pc
) ? UNMAKE_THUMB_ADDR (pc
) : pc
;
1189 /* Return the frame address. On ARM, it is R11; on Thumb it is R7.
1190 Examine the Program Status Register to decide which state we're in. */
1195 if (read_register (ARM_PS_REGNUM
) & 0x20) /* Bit 5 is Thumb state bit */
1196 return read_register (THUMB_FP_REGNUM
); /* R7 if Thumb */
1198 return read_register (ARM_FP_REGNUM
); /* R11 if ARM */
1201 /* Store into a struct frame_saved_regs the addresses of the saved
1202 registers of frame described by FRAME_INFO. This includes special
1203 registers such as PC and FP saved in special ways in the stack
1204 frame. SP is even more special: the address we return for it IS
1205 the sp for the next frame. */
1208 arm_frame_init_saved_regs (struct frame_info
*fip
)
1211 if (fip
->saved_regs
)
1214 arm_init_extra_frame_info (0, fip
);
1217 /* Push an empty stack frame, to record the current PC, etc. */
1220 arm_push_dummy_frame (void)
1222 CORE_ADDR old_sp
= read_register (ARM_SP_REGNUM
);
1223 CORE_ADDR sp
= old_sp
;
1224 CORE_ADDR fp
, prologue_start
;
1227 /* Push the two dummy prologue instructions in reverse order,
1228 so that they'll be in the correct low-to-high order in memory. */
1229 /* sub fp, ip, #4 */
1230 sp
= push_word (sp
, 0xe24cb004);
1231 /* stmdb sp!, {r0-r10, fp, ip, lr, pc} */
1232 prologue_start
= sp
= push_word (sp
, 0xe92ddfff);
1234 /* Push a pointer to the dummy prologue + 12, because when stm
1235 instruction stores the PC, it stores the address of the stm
1236 instruction itself plus 12. */
1237 fp
= sp
= push_word (sp
, prologue_start
+ 12);
1239 /* Push the processor status. */
1240 sp
= push_word (sp
, read_register (ARM_PS_REGNUM
));
1242 /* Push all 16 registers starting with r15. */
1243 for (regnum
= ARM_PC_REGNUM
; regnum
>= 0; regnum
--)
1244 sp
= push_word (sp
, read_register (regnum
));
1246 /* Update fp (for both Thumb and ARM) and sp. */
1247 write_register (ARM_FP_REGNUM
, fp
);
1248 write_register (THUMB_FP_REGNUM
, fp
);
1249 write_register (ARM_SP_REGNUM
, sp
);
1252 /* CALL_DUMMY_WORDS:
1253 This sequence of words is the instructions
1259 Note this is 12 bytes. */
1261 static LONGEST arm_call_dummy_words
[] =
1263 0xe1a0e00f, 0xe1a0f004, 0xe7ffdefe
1266 /* Fix up the call dummy, based on whether the processor is currently
1267 in Thumb or ARM mode, and whether the target function is Thumb or
1268 ARM. There are three different situations requiring three
1271 * ARM calling ARM: uses the call dummy in tm-arm.h, which has already
1272 been copied into the dummy parameter to this function.
1273 * ARM calling Thumb: uses the call dummy in tm-arm.h, but with the
1274 "mov pc,r4" instruction patched to be a "bx r4" instead.
1275 * Thumb calling anything: uses the Thumb dummy defined below, which
1276 works for calling both ARM and Thumb functions.
1278 All three call dummies expect to receive the target function
1279 address in R4, with the low bit set if it's a Thumb function. */
1282 arm_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
, int nargs
,
1283 struct value
**args
, struct type
*type
, int gcc_p
)
1285 static short thumb_dummy
[4] =
1287 0xf000, 0xf801, /* bl label */
1288 0xdf18, /* swi 24 */
1289 0x4720, /* label: bx r4 */
1291 static unsigned long arm_bx_r4
= 0xe12fff14; /* bx r4 instruction */
1293 /* Set flag indicating whether the current PC is in a Thumb function. */
1294 caller_is_thumb
= arm_pc_is_thumb (read_pc ());
1296 /* If the target function is Thumb, set the low bit of the function
1297 address. And if the CPU is currently in ARM mode, patch the
1298 second instruction of call dummy to use a BX instruction to
1299 switch to Thumb mode. */
1300 target_is_thumb
= arm_pc_is_thumb (fun
);
1301 if (target_is_thumb
)
1304 if (!caller_is_thumb
)
1305 store_unsigned_integer (dummy
+ 4, sizeof (arm_bx_r4
), arm_bx_r4
);
1308 /* If the CPU is currently in Thumb mode, use the Thumb call dummy
1309 instead of the ARM one that's already been copied. This will
1310 work for both Thumb and ARM target functions. */
1311 if (caller_is_thumb
)
1315 int len
= sizeof (thumb_dummy
) / sizeof (thumb_dummy
[0]);
1317 for (i
= 0; i
< len
; i
++)
1319 store_unsigned_integer (p
, sizeof (thumb_dummy
[0]), thumb_dummy
[i
]);
1320 p
+= sizeof (thumb_dummy
[0]);
1324 /* Put the target address in r4; the call dummy will copy this to
1326 write_register (4, fun
);
1329 /* Return the offset in the call dummy of the instruction that needs
1330 to have a breakpoint placed on it. This is the offset of the 'swi
1331 24' instruction, which is no longer actually used, but simply acts
1332 as a place-holder now.
1334 This implements the CALL_DUMMY_BREAK_OFFSET macro. */
1337 arm_call_dummy_breakpoint_offset (void)
1339 if (caller_is_thumb
)
1347 This function does not support passing parameters using the FPA
1348 variant of the APCS. It passes any floating point arguments in the
1349 general registers and/or on the stack. */
1352 arm_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1353 int struct_return
, CORE_ADDR struct_addr
)
1356 int argnum
, argreg
, nstack_size
;
1358 /* Walk through the list of args and determine how large a temporary
1359 stack is required. Need to take care here as structs may be
1360 passed on the stack, and we have to to push them. */
1361 nstack_size
= -4 * REGISTER_SIZE
; /* Some arguments go into A1-A4. */
1362 if (struct_return
) /* The struct address goes in A1. */
1363 nstack_size
+= REGISTER_SIZE
;
1365 /* Walk through the arguments and add their size to nstack_size. */
1366 for (argnum
= 0; argnum
< nargs
; argnum
++)
1369 struct type
*arg_type
;
1371 arg_type
= check_typedef (VALUE_TYPE (args
[argnum
]));
1372 len
= TYPE_LENGTH (arg_type
);
1377 /* Allocate room on the stack, and initialize our stack frame
1380 if (nstack_size
> 0)
1386 /* Initialize the integer argument register pointer. */
1387 argreg
= ARM_A1_REGNUM
;
1389 /* The struct_return pointer occupies the first parameter passing
1392 write_register (argreg
++, struct_addr
);
1394 /* Process arguments from left to right. Store as many as allowed
1395 in the parameter passing registers (A1-A4), and save the rest on
1396 the temporary stack. */
1397 for (argnum
= 0; argnum
< nargs
; argnum
++)
1402 enum type_code typecode
;
1403 struct type
*arg_type
, *target_type
;
1405 arg_type
= check_typedef (VALUE_TYPE (args
[argnum
]));
1406 target_type
= TYPE_TARGET_TYPE (arg_type
);
1407 len
= TYPE_LENGTH (arg_type
);
1408 typecode
= TYPE_CODE (arg_type
);
1409 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
1412 /* I don't know why this code was disable. The only logical use
1413 for a function pointer is to call that function, so setting
1414 the mode bit is perfectly fine. FN */
1415 /* If the argument is a pointer to a function, and it is a Thumb
1416 function, set the low bit of the pointer. */
1417 if (TYPE_CODE_PTR
== typecode
1418 && NULL
!= target_type
1419 && TYPE_CODE_FUNC
== TYPE_CODE (target_type
))
1421 CORE_ADDR regval
= extract_address (val
, len
);
1422 if (arm_pc_is_thumb (regval
))
1423 store_address (val
, len
, MAKE_THUMB_ADDR (regval
));
1426 /* Copy the argument to general registers or the stack in
1427 register-sized pieces. Large arguments are split between
1428 registers and stack. */
1431 int partial_len
= len
< REGISTER_SIZE
? len
: REGISTER_SIZE
;
1433 if (argreg
<= ARM_LAST_ARG_REGNUM
)
1435 /* It's an argument being passed in a general register. */
1436 regval
= extract_address (val
, partial_len
);
1437 write_register (argreg
++, regval
);
1441 /* Push the arguments onto the stack. */
1442 write_memory ((CORE_ADDR
) fp
, val
, REGISTER_SIZE
);
1443 fp
+= REGISTER_SIZE
;
1451 /* Return adjusted stack pointer. */
1455 /* Pop the current frame. So long as the frame info has been initialized
1456 properly (see arm_init_extra_frame_info), this code works for dummy frames
1457 as well as regular frames. I.e, there's no need to have a special case
1458 for dummy frames. */
1460 arm_pop_frame (void)
1463 struct frame_info
*frame
= get_current_frame ();
1464 CORE_ADDR old_SP
= (frame
->frame
- frame
->extra_info
->frameoffset
1465 + frame
->extra_info
->framesize
);
1467 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
1468 if (frame
->saved_regs
[regnum
] != 0)
1469 write_register (regnum
,
1470 read_memory_integer (frame
->saved_regs
[regnum
],
1471 REGISTER_RAW_SIZE (regnum
)));
1473 write_register (ARM_PC_REGNUM
, FRAME_SAVED_PC (frame
));
1474 write_register (ARM_SP_REGNUM
, old_SP
);
1476 flush_cached_frames ();
1480 print_fpu_flags (int flags
)
1482 if (flags
& (1 << 0))
1483 fputs ("IVO ", stdout
);
1484 if (flags
& (1 << 1))
1485 fputs ("DVZ ", stdout
);
1486 if (flags
& (1 << 2))
1487 fputs ("OFL ", stdout
);
1488 if (flags
& (1 << 3))
1489 fputs ("UFL ", stdout
);
1490 if (flags
& (1 << 4))
1491 fputs ("INX ", stdout
);
1495 /* Print interesting information about the floating point processor
1496 (if present) or emulator. */
1498 arm_print_float_info (void)
1500 register unsigned long status
= read_register (ARM_FPS_REGNUM
);
1503 type
= (status
>> 24) & 127;
1504 printf ("%s FPU type %d\n",
1505 (status
& (1 << 31)) ? "Hardware" : "Software",
1507 fputs ("mask: ", stdout
);
1508 print_fpu_flags (status
>> 16);
1509 fputs ("flags: ", stdout
);
1510 print_fpu_flags (status
);
1513 /* Return the GDB type object for the "standard" data type of data in
1516 static struct type
*
1517 arm_register_type (int regnum
)
1519 if (regnum
>= ARM_F0_REGNUM
&& regnum
< ARM_F0_REGNUM
+ NUM_FREGS
)
1521 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1522 return builtin_type_arm_ext_big
;
1524 return builtin_type_arm_ext_littlebyte_bigword
;
1527 return builtin_type_int32
;
1530 /* Index within `registers' of the first byte of the space for
1534 arm_register_byte (int regnum
)
1536 if (regnum
< ARM_F0_REGNUM
)
1537 return regnum
* INT_REGISTER_RAW_SIZE
;
1538 else if (regnum
< ARM_PS_REGNUM
)
1539 return (NUM_GREGS
* INT_REGISTER_RAW_SIZE
1540 + (regnum
- ARM_F0_REGNUM
) * FP_REGISTER_RAW_SIZE
);
1542 return (NUM_GREGS
* INT_REGISTER_RAW_SIZE
1543 + NUM_FREGS
* FP_REGISTER_RAW_SIZE
1544 + (regnum
- ARM_FPS_REGNUM
) * STATUS_REGISTER_SIZE
);
1547 /* Number of bytes of storage in the actual machine representation for
1548 register N. All registers are 4 bytes, except fp0 - fp7, which are
1549 12 bytes in length. */
1552 arm_register_raw_size (int regnum
)
1554 if (regnum
< ARM_F0_REGNUM
)
1555 return INT_REGISTER_RAW_SIZE
;
1556 else if (regnum
< ARM_FPS_REGNUM
)
1557 return FP_REGISTER_RAW_SIZE
;
1559 return STATUS_REGISTER_SIZE
;
1562 /* Number of bytes of storage in a program's representation
1565 arm_register_virtual_size (int regnum
)
1567 if (regnum
< ARM_F0_REGNUM
)
1568 return INT_REGISTER_VIRTUAL_SIZE
;
1569 else if (regnum
< ARM_FPS_REGNUM
)
1570 return FP_REGISTER_VIRTUAL_SIZE
;
1572 return STATUS_REGISTER_SIZE
;
1576 /* NOTE: cagney/2001-08-20: Both convert_from_extended() and
1577 convert_to_extended() use floatformat_arm_ext_littlebyte_bigword.
1578 It is thought that this is is the floating-point register format on
1579 little-endian systems. */
1582 convert_from_extended (void *ptr
, void *dbl
)
1585 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1586 floatformat_to_doublest (&floatformat_arm_ext_big
, ptr
, &d
);
1588 floatformat_to_doublest (&floatformat_arm_ext_littlebyte_bigword
,
1590 floatformat_from_doublest (TARGET_DOUBLE_FORMAT
, &d
, dbl
);
1594 convert_to_extended (void *dbl
, void *ptr
)
1597 floatformat_to_doublest (TARGET_DOUBLE_FORMAT
, ptr
, &d
);
1598 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1599 floatformat_from_doublest (&floatformat_arm_ext_big
, &d
, dbl
);
1601 floatformat_from_doublest (&floatformat_arm_ext_littlebyte_bigword
,
1606 condition_true (unsigned long cond
, unsigned long status_reg
)
1608 if (cond
== INST_AL
|| cond
== INST_NV
)
1614 return ((status_reg
& FLAG_Z
) != 0);
1616 return ((status_reg
& FLAG_Z
) == 0);
1618 return ((status_reg
& FLAG_C
) != 0);
1620 return ((status_reg
& FLAG_C
) == 0);
1622 return ((status_reg
& FLAG_N
) != 0);
1624 return ((status_reg
& FLAG_N
) == 0);
1626 return ((status_reg
& FLAG_V
) != 0);
1628 return ((status_reg
& FLAG_V
) == 0);
1630 return ((status_reg
& (FLAG_C
| FLAG_Z
)) == FLAG_C
);
1632 return ((status_reg
& (FLAG_C
| FLAG_Z
)) != FLAG_C
);
1634 return (((status_reg
& FLAG_N
) == 0) == ((status_reg
& FLAG_V
) == 0));
1636 return (((status_reg
& FLAG_N
) == 0) != ((status_reg
& FLAG_V
) == 0));
1638 return (((status_reg
& FLAG_Z
) == 0) &&
1639 (((status_reg
& FLAG_N
) == 0) == ((status_reg
& FLAG_V
) == 0)));
1641 return (((status_reg
& FLAG_Z
) != 0) ||
1642 (((status_reg
& FLAG_N
) == 0) != ((status_reg
& FLAG_V
) == 0)));
1647 /* Support routines for single stepping. Calculate the next PC value. */
1648 #define submask(x) ((1L << ((x) + 1)) - 1)
1649 #define bit(obj,st) (((obj) >> (st)) & 1)
1650 #define bits(obj,st,fn) (((obj) >> (st)) & submask ((fn) - (st)))
1651 #define sbits(obj,st,fn) \
1652 ((long) (bits(obj,st,fn) | ((long) bit(obj,fn) * ~ submask (fn - st))))
1653 #define BranchDest(addr,instr) \
1654 ((CORE_ADDR) (((long) (addr)) + 8 + (sbits (instr, 0, 23) << 2)))
1657 static unsigned long
1658 shifted_reg_val (unsigned long inst
, int carry
, unsigned long pc_val
,
1659 unsigned long status_reg
)
1661 unsigned long res
, shift
;
1662 int rm
= bits (inst
, 0, 3);
1663 unsigned long shifttype
= bits (inst
, 5, 6);
1667 int rs
= bits (inst
, 8, 11);
1668 shift
= (rs
== 15 ? pc_val
+ 8 : read_register (rs
)) & 0xFF;
1671 shift
= bits (inst
, 7, 11);
1674 ? ((pc_val
| (ARM_PC_32
? 0 : status_reg
))
1675 + (bit (inst
, 4) ? 12 : 8))
1676 : read_register (rm
));
1681 res
= shift
>= 32 ? 0 : res
<< shift
;
1685 res
= shift
>= 32 ? 0 : res
>> shift
;
1691 res
= ((res
& 0x80000000L
)
1692 ? ~((~res
) >> shift
) : res
>> shift
);
1695 case 3: /* ROR/RRX */
1698 res
= (res
>> 1) | (carry
? 0x80000000L
: 0);
1700 res
= (res
>> shift
) | (res
<< (32 - shift
));
1704 return res
& 0xffffffff;
1707 /* Return number of 1-bits in VAL. */
1710 bitcount (unsigned long val
)
1713 for (nbits
= 0; val
!= 0; nbits
++)
1714 val
&= val
- 1; /* delete rightmost 1-bit in val */
1719 thumb_get_next_pc (CORE_ADDR pc
)
1721 unsigned long pc_val
= ((unsigned long) pc
) + 4; /* PC after prefetch */
1722 unsigned short inst1
= read_memory_integer (pc
, 2);
1723 CORE_ADDR nextpc
= pc
+ 2; /* default is next instruction */
1724 unsigned long offset
;
1726 if ((inst1
& 0xff00) == 0xbd00) /* pop {rlist, pc} */
1730 /* Fetch the saved PC from the stack. It's stored above
1731 all of the other registers. */
1732 offset
= bitcount (bits (inst1
, 0, 7)) * REGISTER_SIZE
;
1733 sp
= read_register (ARM_SP_REGNUM
);
1734 nextpc
= (CORE_ADDR
) read_memory_integer (sp
+ offset
, 4);
1735 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1737 error ("Infinite loop detected");
1739 else if ((inst1
& 0xf000) == 0xd000) /* conditional branch */
1741 unsigned long status
= read_register (ARM_PS_REGNUM
);
1742 unsigned long cond
= bits (inst1
, 8, 11);
1743 if (cond
!= 0x0f && condition_true (cond
, status
)) /* 0x0f = SWI */
1744 nextpc
= pc_val
+ (sbits (inst1
, 0, 7) << 1);
1746 else if ((inst1
& 0xf800) == 0xe000) /* unconditional branch */
1748 nextpc
= pc_val
+ (sbits (inst1
, 0, 10) << 1);
1750 else if ((inst1
& 0xf800) == 0xf000) /* long branch with link */
1752 unsigned short inst2
= read_memory_integer (pc
+ 2, 2);
1753 offset
= (sbits (inst1
, 0, 10) << 12) + (bits (inst2
, 0, 10) << 1);
1754 nextpc
= pc_val
+ offset
;
1761 arm_get_next_pc (CORE_ADDR pc
)
1763 unsigned long pc_val
;
1764 unsigned long this_instr
;
1765 unsigned long status
;
1768 if (arm_pc_is_thumb (pc
))
1769 return thumb_get_next_pc (pc
);
1771 pc_val
= (unsigned long) pc
;
1772 this_instr
= read_memory_integer (pc
, 4);
1773 status
= read_register (ARM_PS_REGNUM
);
1774 nextpc
= (CORE_ADDR
) (pc_val
+ 4); /* Default case */
1776 if (condition_true (bits (this_instr
, 28, 31), status
))
1778 switch (bits (this_instr
, 24, 27))
1781 case 0x1: /* data processing */
1785 unsigned long operand1
, operand2
, result
= 0;
1789 if (bits (this_instr
, 12, 15) != 15)
1792 if (bits (this_instr
, 22, 25) == 0
1793 && bits (this_instr
, 4, 7) == 9) /* multiply */
1794 error ("Illegal update to pc in instruction");
1796 /* Multiply into PC */
1797 c
= (status
& FLAG_C
) ? 1 : 0;
1798 rn
= bits (this_instr
, 16, 19);
1799 operand1
= (rn
== 15) ? pc_val
+ 8 : read_register (rn
);
1801 if (bit (this_instr
, 25))
1803 unsigned long immval
= bits (this_instr
, 0, 7);
1804 unsigned long rotate
= 2 * bits (this_instr
, 8, 11);
1805 operand2
= ((immval
>> rotate
) | (immval
<< (32 - rotate
)))
1808 else /* operand 2 is a shifted register */
1809 operand2
= shifted_reg_val (this_instr
, c
, pc_val
, status
);
1811 switch (bits (this_instr
, 21, 24))
1814 result
= operand1
& operand2
;
1818 result
= operand1
^ operand2
;
1822 result
= operand1
- operand2
;
1826 result
= operand2
- operand1
;
1830 result
= operand1
+ operand2
;
1834 result
= operand1
+ operand2
+ c
;
1838 result
= operand1
- operand2
+ c
;
1842 result
= operand2
- operand1
+ c
;
1848 case 0xb: /* tst, teq, cmp, cmn */
1849 result
= (unsigned long) nextpc
;
1853 result
= operand1
| operand2
;
1857 /* Always step into a function. */
1862 result
= operand1
& ~operand2
;
1869 nextpc
= (CORE_ADDR
) ADDR_BITS_REMOVE (result
);
1872 error ("Infinite loop detected");
1877 case 0x5: /* data transfer */
1880 if (bit (this_instr
, 20))
1883 if (bits (this_instr
, 12, 15) == 15)
1889 if (bit (this_instr
, 22))
1890 error ("Illegal update to pc in instruction");
1892 /* byte write to PC */
1893 rn
= bits (this_instr
, 16, 19);
1894 base
= (rn
== 15) ? pc_val
+ 8 : read_register (rn
);
1895 if (bit (this_instr
, 24))
1898 int c
= (status
& FLAG_C
) ? 1 : 0;
1899 unsigned long offset
=
1900 (bit (this_instr
, 25)
1901 ? shifted_reg_val (this_instr
, c
, pc_val
, status
)
1902 : bits (this_instr
, 0, 11));
1904 if (bit (this_instr
, 23))
1909 nextpc
= (CORE_ADDR
) read_memory_integer ((CORE_ADDR
) base
,
1912 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1915 error ("Infinite loop detected");
1921 case 0x9: /* block transfer */
1922 if (bit (this_instr
, 20))
1925 if (bit (this_instr
, 15))
1930 if (bit (this_instr
, 23))
1933 unsigned long reglist
= bits (this_instr
, 0, 14);
1934 offset
= bitcount (reglist
) * 4;
1935 if (bit (this_instr
, 24)) /* pre */
1938 else if (bit (this_instr
, 24))
1942 unsigned long rn_val
=
1943 read_register (bits (this_instr
, 16, 19));
1945 (CORE_ADDR
) read_memory_integer ((CORE_ADDR
) (rn_val
1949 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1951 error ("Infinite loop detected");
1956 case 0xb: /* branch & link */
1957 case 0xa: /* branch */
1959 nextpc
= BranchDest (pc
, this_instr
);
1961 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1963 error ("Infinite loop detected");
1969 case 0xe: /* coproc ops */
1974 fprintf_filtered (gdb_stderr
, "Bad bit-field extraction\n");
1982 /* single_step() is called just before we want to resume the inferior,
1983 if we want to single-step it but there is no hardware or kernel
1984 single-step support. We find the target of the coming instruction
1987 single_step is also called just after the inferior stops. If we had
1988 set up a simulated single-step, we undo our damage. */
1991 arm_software_single_step (enum target_signal sig
, int insert_bpt
)
1993 static int next_pc
; /* State between setting and unsetting. */
1994 static char break_mem
[BREAKPOINT_MAX
]; /* Temporary storage for mem@bpt */
1998 next_pc
= arm_get_next_pc (read_register (ARM_PC_REGNUM
));
1999 target_insert_breakpoint (next_pc
, break_mem
);
2002 target_remove_breakpoint (next_pc
, break_mem
);
2005 #include "bfd-in2.h"
2006 #include "libcoff.h"
2009 gdb_print_insn_arm (bfd_vma memaddr
, disassemble_info
*info
)
2011 if (arm_pc_is_thumb (memaddr
))
2013 static asymbol
*asym
;
2014 static combined_entry_type ce
;
2015 static struct coff_symbol_struct csym
;
2016 static struct _bfd fake_bfd
;
2017 static bfd_target fake_target
;
2019 if (csym
.native
== NULL
)
2021 /* Create a fake symbol vector containing a Thumb symbol. This is
2022 solely so that the code in print_insn_little_arm() and
2023 print_insn_big_arm() in opcodes/arm-dis.c will detect the presence
2024 of a Thumb symbol and switch to decoding Thumb instructions. */
2026 fake_target
.flavour
= bfd_target_coff_flavour
;
2027 fake_bfd
.xvec
= &fake_target
;
2028 ce
.u
.syment
.n_sclass
= C_THUMBEXTFUNC
;
2030 csym
.symbol
.the_bfd
= &fake_bfd
;
2031 csym
.symbol
.name
= "fake";
2032 asym
= (asymbol
*) & csym
;
2035 memaddr
= UNMAKE_THUMB_ADDR (memaddr
);
2036 info
->symbols
= &asym
;
2039 info
->symbols
= NULL
;
2041 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2042 return print_insn_big_arm (memaddr
, info
);
2044 return print_insn_little_arm (memaddr
, info
);
2047 /* Determine the type and size of breakpoint to insert at PCPTR. Uses
2048 the program counter value to determine whether a 16-bit or 32-bit
2049 breakpoint should be used. It returns a pointer to a string of
2050 bytes that encode a breakpoint instruction, stores the length of
2051 the string to *lenptr, and adjusts the program counter (if
2052 necessary) to point to the actual memory location where the
2053 breakpoint should be inserted. */
2055 /* XXX ??? from old tm-arm.h: if we're using RDP, then we're inserting
2056 breakpoints and storing their handles instread of what was in
2057 memory. It is nice that this is the same size as a handle -
2058 otherwise remote-rdp will have to change. */
2061 arm_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
2063 if (arm_pc_is_thumb (*pcptr
) || arm_pc_is_thumb_dummy (*pcptr
))
2065 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2067 static char thumb_breakpoint
[] = THUMB_BE_BREAKPOINT
;
2068 *pcptr
= UNMAKE_THUMB_ADDR (*pcptr
);
2069 *lenptr
= sizeof (thumb_breakpoint
);
2070 return thumb_breakpoint
;
2074 static char thumb_breakpoint
[] = THUMB_LE_BREAKPOINT
;
2075 *pcptr
= UNMAKE_THUMB_ADDR (*pcptr
);
2076 *lenptr
= sizeof (thumb_breakpoint
);
2077 return thumb_breakpoint
;
2082 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2084 static char arm_breakpoint
[] = ARM_BE_BREAKPOINT
;
2085 *lenptr
= sizeof (arm_breakpoint
);
2086 return arm_breakpoint
;
2090 static char arm_breakpoint
[] = ARM_LE_BREAKPOINT
;
2091 *lenptr
= sizeof (arm_breakpoint
);
2092 return arm_breakpoint
;
2097 /* Extract from an array REGBUF containing the (raw) register state a
2098 function return value of type TYPE, and copy that, in virtual
2099 format, into VALBUF. */
2102 arm_extract_return_value (struct type
*type
,
2103 char regbuf
[REGISTER_BYTES
],
2106 if (TYPE_CODE_FLT
== TYPE_CODE (type
))
2107 convert_from_extended (®buf
[REGISTER_BYTE (ARM_F0_REGNUM
)], valbuf
);
2109 memcpy (valbuf
, ®buf
[REGISTER_BYTE (ARM_A1_REGNUM
)],
2110 TYPE_LENGTH (type
));
2113 /* Extract from an array REGBUF containing the (raw) register state
2114 the address in which a function should return its structure value. */
2117 arm_extract_struct_value_address (char *regbuf
)
2119 return extract_address (regbuf
, REGISTER_RAW_SIZE(ARM_A1_REGNUM
));
2122 /* Will a function return an aggregate type in memory or in a
2123 register? Return 0 if an aggregate type can be returned in a
2124 register, 1 if it must be returned in memory. */
2127 arm_use_struct_convention (int gcc_p
, struct type
*type
)
2130 register enum type_code code
;
2132 /* In the ARM ABI, "integer" like aggregate types are returned in
2133 registers. For an aggregate type to be integer like, its size
2134 must be less than or equal to REGISTER_SIZE and the offset of
2135 each addressable subfield must be zero. Note that bit fields are
2136 not addressable, and all addressable subfields of unions always
2137 start at offset zero.
2139 This function is based on the behaviour of GCC 2.95.1.
2140 See: gcc/arm.c: arm_return_in_memory() for details.
2142 Note: All versions of GCC before GCC 2.95.2 do not set up the
2143 parameters correctly for a function returning the following
2144 structure: struct { float f;}; This should be returned in memory,
2145 not a register. Richard Earnshaw sent me a patch, but I do not
2146 know of any way to detect if a function like the above has been
2147 compiled with the correct calling convention. */
2149 /* All aggregate types that won't fit in a register must be returned
2151 if (TYPE_LENGTH (type
) > REGISTER_SIZE
)
2156 /* The only aggregate types that can be returned in a register are
2157 structs and unions. Arrays must be returned in memory. */
2158 code
= TYPE_CODE (type
);
2159 if ((TYPE_CODE_STRUCT
!= code
) && (TYPE_CODE_UNION
!= code
))
2164 /* Assume all other aggregate types can be returned in a register.
2165 Run a check for structures, unions and arrays. */
2168 if ((TYPE_CODE_STRUCT
== code
) || (TYPE_CODE_UNION
== code
))
2171 /* Need to check if this struct/union is "integer" like. For
2172 this to be true, its size must be less than or equal to
2173 REGISTER_SIZE and the offset of each addressable subfield
2174 must be zero. Note that bit fields are not addressable, and
2175 unions always start at offset zero. If any of the subfields
2176 is a floating point type, the struct/union cannot be an
2179 /* For each field in the object, check:
2180 1) Is it FP? --> yes, nRc = 1;
2181 2) Is it addressable (bitpos != 0) and
2182 not packed (bitsize == 0)?
2186 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
2188 enum type_code field_type_code
;
2189 field_type_code
= TYPE_CODE (TYPE_FIELD_TYPE (type
, i
));
2191 /* Is it a floating point type field? */
2192 if (field_type_code
== TYPE_CODE_FLT
)
2198 /* If bitpos != 0, then we have to care about it. */
2199 if (TYPE_FIELD_BITPOS (type
, i
) != 0)
2201 /* Bitfields are not addressable. If the field bitsize is
2202 zero, then the field is not packed. Hence it cannot be
2203 a bitfield or any other packed type. */
2204 if (TYPE_FIELD_BITSIZE (type
, i
) == 0)
2216 /* Write into appropriate registers a function return value of type
2217 TYPE, given in virtual format. */
2220 arm_store_return_value (struct type
*type
, char *valbuf
)
2222 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2224 char buf
[MAX_REGISTER_RAW_SIZE
];
2226 convert_to_extended (valbuf
, buf
);
2227 /* XXX Is this correct for soft-float? */
2228 write_register_bytes (REGISTER_BYTE (ARM_F0_REGNUM
), buf
,
2229 MAX_REGISTER_RAW_SIZE
);
2232 write_register_bytes (0, valbuf
, TYPE_LENGTH (type
));
2235 /* Store the address of the place in which to copy the structure the
2236 subroutine will return. This is called from call_function. */
2239 arm_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2241 write_register (ARM_A1_REGNUM
, addr
);
2244 /* Return non-zero if the PC is inside a thumb call thunk. */
2247 arm_in_call_stub (CORE_ADDR pc
, char *name
)
2249 CORE_ADDR start_addr
;
2251 /* Find the starting address of the function containing the PC. If
2252 the caller didn't give us a name, look it up at the same time. */
2253 if (find_pc_partial_function (pc
, name
? NULL
: &name
, &start_addr
, NULL
) == 0)
2256 return strncmp (name
, "_call_via_r", 11) == 0;
2259 /* If PC is in a Thumb call or return stub, return the address of the
2260 target PC, which is in a register. The thunk functions are called
2261 _called_via_xx, where x is the register name. The possible names
2262 are r0-r9, sl, fp, ip, sp, and lr. */
2265 arm_skip_stub (CORE_ADDR pc
)
2268 CORE_ADDR start_addr
;
2270 /* Find the starting address and name of the function containing the PC. */
2271 if (find_pc_partial_function (pc
, &name
, &start_addr
, NULL
) == 0)
2274 /* Call thunks always start with "_call_via_". */
2275 if (strncmp (name
, "_call_via_", 10) == 0)
2277 /* Use the name suffix to determine which register contains the
2279 static char *table
[15] =
2280 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2281 "r8", "r9", "sl", "fp", "ip", "sp", "lr"
2285 for (regno
= 0; regno
<= 14; regno
++)
2286 if (strcmp (&name
[10], table
[regno
]) == 0)
2287 return read_register (regno
);
2290 return 0; /* not a stub */
2293 /* If the user changes the register disassembly flavor used for info register
2294 and other commands, we have to also switch the flavor used in opcodes
2295 for disassembly output.
2296 This function is run in the set disassembly_flavor command, and does that. */
2299 set_disassembly_flavor_sfunc (char *args
, int from_tty
,
2300 struct cmd_list_element
*c
)
2302 set_disassembly_flavor ();
2305 /* Return the ARM register name corresponding to register I. */
2307 arm_register_name (int i
)
2309 return arm_register_names
[i
];
2313 set_disassembly_flavor (void)
2315 const char *setname
, *setdesc
, **regnames
;
2318 /* Find the flavor that the user wants in the opcodes table. */
2320 numregs
= get_arm_regnames (current
, &setname
, &setdesc
, ®names
);
2321 while ((disassembly_flavor
!= setname
)
2322 && (current
< num_flavor_options
))
2323 get_arm_regnames (++current
, &setname
, &setdesc
, ®names
);
2324 current_option
= current
;
2326 /* Fill our copy. */
2327 for (j
= 0; j
< numregs
; j
++)
2328 arm_register_names
[j
] = (char *) regnames
[j
];
2331 if (isupper (*regnames
[ARM_PC_REGNUM
]))
2333 arm_register_names
[ARM_FPS_REGNUM
] = "FPS";
2334 arm_register_names
[ARM_PS_REGNUM
] = "CPSR";
2338 arm_register_names
[ARM_FPS_REGNUM
] = "fps";
2339 arm_register_names
[ARM_PS_REGNUM
] = "cpsr";
2342 /* Synchronize the disassembler. */
2343 set_arm_regname_option (current
);
2346 /* arm_othernames implements the "othernames" command. This is kind
2347 of hacky, and I prefer the set-show disassembly-flavor which is
2348 also used for the x86 gdb. I will keep this around, however, in
2349 case anyone is actually using it. */
2352 arm_othernames (char *names
, int n
)
2354 /* Circle through the various flavors. */
2355 current_option
= (current_option
+ 1) % num_flavor_options
;
2357 disassembly_flavor
= valid_flavors
[current_option
];
2358 set_disassembly_flavor ();
2361 /* Fetch, and possibly build, an appropriate link_map_offsets structure
2362 for ARM linux targets using the struct offsets defined in <link.h>.
2363 Note, however, that link.h is not actually referred to in this file.
2364 Instead, the relevant structs offsets were obtained from examining
2365 link.h. (We can't refer to link.h from this file because the host
2366 system won't necessarily have it, or if it does, the structs which
2367 it defines will refer to the host system, not the target.) */
2369 struct link_map_offsets
*
2370 arm_linux_svr4_fetch_link_map_offsets (void)
2372 static struct link_map_offsets lmo
;
2373 static struct link_map_offsets
*lmp
= 0;
2379 lmo
.r_debug_size
= 8; /* Actual size is 20, but this is all we
2382 lmo
.r_map_offset
= 4;
2385 lmo
.link_map_size
= 20; /* Actual size is 552, but this is all we
2388 lmo
.l_addr_offset
= 0;
2389 lmo
.l_addr_size
= 4;
2391 lmo
.l_name_offset
= 4;
2392 lmo
.l_name_size
= 4;
2394 lmo
.l_next_offset
= 12;
2395 lmo
.l_next_size
= 4;
2397 lmo
.l_prev_offset
= 16;
2398 lmo
.l_prev_size
= 4;
2404 /* Test whether the coff symbol specific value corresponds to a Thumb
2408 coff_sym_is_thumb (int val
)
2410 return (val
== C_THUMBEXT
||
2411 val
== C_THUMBSTAT
||
2412 val
== C_THUMBEXTFUNC
||
2413 val
== C_THUMBSTATFUNC
||
2414 val
== C_THUMBLABEL
);
2417 /* arm_coff_make_msymbol_special()
2418 arm_elf_make_msymbol_special()
2420 These functions test whether the COFF or ELF symbol corresponds to
2421 an address in thumb code, and set a "special" bit in a minimal
2422 symbol to indicate that it does. */
2425 arm_elf_make_msymbol_special(asymbol
*sym
, struct minimal_symbol
*msym
)
2427 /* Thumb symbols are of type STT_LOPROC, (synonymous with
2429 if (ELF_ST_TYPE (((elf_symbol_type
*)sym
)->internal_elf_sym
.st_info
)
2431 MSYMBOL_SET_SPECIAL (msym
);
2435 arm_coff_make_msymbol_special(int val
, struct minimal_symbol
*msym
)
2437 if (coff_sym_is_thumb (val
))
2438 MSYMBOL_SET_SPECIAL (msym
);
2443 process_note_abi_tag_sections (bfd
*abfd
, asection
*sect
, void *obj
)
2445 enum arm_abi
*os_ident_ptr
= obj
;
2447 unsigned int sectsize
;
2449 name
= bfd_get_section_name (abfd
, sect
);
2450 sectsize
= bfd_section_size (abfd
, sect
);
2452 if (strcmp (name
, ".note.ABI-tag") == 0 && sectsize
> 0)
2454 unsigned int name_length
, data_length
, note_type
;
2457 /* If the section is larger than this, it's probably not what we are
2462 note
= alloca (sectsize
);
2464 bfd_get_section_contents (abfd
, sect
, note
,
2465 (file_ptr
) 0, (bfd_size_type
) sectsize
);
2467 name_length
= bfd_h_get_32 (abfd
, note
);
2468 data_length
= bfd_h_get_32 (abfd
, note
+ 4);
2469 note_type
= bfd_h_get_32 (abfd
, note
+ 8);
2471 if (name_length
== 4 && data_length
== 16 && note_type
== 1
2472 && strcmp (note
+ 12, "GNU") == 0)
2474 int os_number
= bfd_h_get_32 (abfd
, note
+ 16);
2476 /* The case numbers are from abi-tags in glibc */
2480 *os_ident_ptr
= ARM_ABI_LINUX
;
2485 (__FILE__
, __LINE__
,
2486 "process_note_abi_sections: Hurd objects not supported");
2491 (__FILE__
, __LINE__
,
2492 "process_note_abi_sections: Solaris objects not supported");
2497 (__FILE__
, __LINE__
,
2498 "process_note_abi_sections: unknown OS number %d",
2504 /* NetBSD uses a similar trick. */
2505 else if (strcmp (name
, ".note.netbsd.ident") == 0 && sectsize
> 0)
2507 unsigned int name_length
, desc_length
, note_type
;
2510 /* If the section is larger than this, it's probably not what we are
2515 note
= alloca (sectsize
);
2517 bfd_get_section_contents (abfd
, sect
, note
,
2518 (file_ptr
) 0, (bfd_size_type
) sectsize
);
2520 name_length
= bfd_h_get_32 (abfd
, note
);
2521 desc_length
= bfd_h_get_32 (abfd
, note
+ 4);
2522 note_type
= bfd_h_get_32 (abfd
, note
+ 8);
2524 if (name_length
== 7 && desc_length
== 4 && note_type
== 1
2525 && strcmp (note
+ 12, "NetBSD") == 0)
2526 /* XXX Should we check the version here?
2527 Probably not necessary yet. */
2528 *os_ident_ptr
= ARM_ABI_NETBSD_ELF
;
2532 /* Return one of the ELFOSABI_ constants for BFDs representing ELF
2533 executables. If it's not an ELF executable or if the OS/ABI couldn't
2534 be determined, simply return -1. */
2537 get_elfosabi (bfd
*abfd
)
2540 enum arm_abi arm_abi
= ARM_ABI_UNKNOWN
;
2542 elfosabi
= elf_elfheader (abfd
)->e_ident
[EI_OSABI
];
2544 /* When elfosabi is 0 (ELFOSABI_NONE), this is supposed to indicate
2545 that we're on a SYSV system. However, GNU/Linux uses a note section
2546 to record OS/ABI info, but leaves e_ident[EI_OSABI] zero. So we
2547 have to check the note sections too.
2549 GNU/ARM tools set the EI_OSABI field to ELFOSABI_ARM, so handle that
2551 if (elfosabi
== 0 || elfosabi
== ELFOSABI_ARM
)
2553 bfd_map_over_sections (abfd
,
2554 process_note_abi_tag_sections
,
2558 if (arm_abi
!= ARM_ABI_UNKNOWN
)
2564 /* Existing ARM Tools don't set this field, so look at the EI_FLAGS
2565 field for more information. */
2567 switch (EF_ARM_EABI_VERSION(elf_elfheader(abfd
)->e_flags
))
2569 case EF_ARM_EABI_VER1
:
2570 return ARM_ABI_EABI_V1
;
2572 case EF_ARM_EABI_VER2
:
2573 return ARM_ABI_EABI_V2
;
2575 case EF_ARM_EABI_UNKNOWN
:
2576 /* Assume GNU tools. */
2577 return ARM_ABI_APCS
;
2580 internal_error (__FILE__
, __LINE__
,
2581 "get_elfosabi: Unknown ARM EABI version 0x%lx",
2582 EF_ARM_EABI_VERSION(elf_elfheader(abfd
)->e_flags
));
2587 case ELFOSABI_NETBSD
:
2588 return ARM_ABI_NETBSD_ELF
;
2590 case ELFOSABI_FREEBSD
:
2591 return ARM_ABI_FREEBSD
;
2593 case ELFOSABI_LINUX
:
2594 return ARM_ABI_LINUX
;
2597 /* Assume GNU tools with the old APCS abi. */
2598 return ARM_ABI_APCS
;
2603 return ARM_ABI_UNKNOWN
;
2606 struct arm_abi_handler
2608 struct arm_abi_handler
*next
;
2610 void (*init_abi
)(struct gdbarch_info
, struct gdbarch
*);
2613 struct arm_abi_handler
*arm_abi_handler_list
= NULL
;
2616 arm_gdbarch_register_os_abi (enum arm_abi abi
,
2617 void (*init_abi
)(struct gdbarch_info
,
2620 struct arm_abi_handler
**handler_p
;
2622 for (handler_p
= &arm_abi_handler_list
; *handler_p
!= NULL
;
2623 handler_p
= &(*handler_p
)->next
)
2625 if ((*handler_p
)->abi
== abi
)
2628 (__FILE__
, __LINE__
,
2629 "arm_gdbarch_register_os_abi: A handler for this ABI variant (%d)"
2630 " has already been registered", (int)abi
);
2631 /* If user wants to continue, override previous definition. */
2632 (*handler_p
)->init_abi
= init_abi
;
2638 = (struct arm_abi_handler
*) xmalloc (sizeof (struct arm_abi_handler
));
2639 (*handler_p
)->next
= NULL
;
2640 (*handler_p
)->abi
= abi
;
2641 (*handler_p
)->init_abi
= init_abi
;
2644 /* Initialize the current architecture based on INFO. If possible, re-use an
2645 architecture from ARCHES, which is a list of architectures already created
2646 during this debugging session.
2648 Called e.g. at program startup, when reading a core file, and when reading
2651 static struct gdbarch
*
2652 arm_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2654 struct gdbarch_tdep
*tdep
;
2655 struct gdbarch
*gdbarch
;
2656 enum arm_abi arm_abi
= ARM_ABI_UNKNOWN
;
2657 struct arm_abi_handler
*abi_handler
;
2659 /* Try to deterimine the ABI of the object we are loading. */
2661 if (info
.abfd
!= NULL
)
2663 switch (bfd_get_flavour (info
.abfd
))
2665 case bfd_target_elf_flavour
:
2666 arm_abi
= get_elfosabi (info
.abfd
);
2669 case bfd_target_aout_flavour
:
2670 if (strcmp (bfd_get_target(info
.abfd
), "a.out-arm-netbsd") == 0)
2671 arm_abi
= ARM_ABI_NETBSD_AOUT
;
2673 /* Assume it's an old APCS-style ABI. */
2674 arm_abi
= ARM_ABI_APCS
;
2677 case bfd_target_coff_flavour
:
2678 /* Assume it's an old APCS-style ABI. */
2680 arm_abi
= ARM_ABI_APCS
;
2684 /* Not sure what to do here, leave the ABI as unknown. */
2689 /* Find a candidate among extant architectures. */
2690 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2692 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2694 /* Make sure the ABI selection matches. */
2695 tdep
= gdbarch_tdep (arches
->gdbarch
);
2696 if (tdep
&& tdep
->arm_abi
== arm_abi
)
2697 return arches
->gdbarch
;
2700 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2701 gdbarch
= gdbarch_alloc (&info
, tdep
);
2703 tdep
->arm_abi
= arm_abi
;
2704 if (arm_abi
< ARM_ABI_INVALID
)
2705 tdep
->abi_name
= arm_abi_names
[arm_abi
];
2708 internal_error (__FILE__
, __LINE__
, "Invalid setting of arm_abi %d",
2710 tdep
->abi_name
= "<invalid>";
2713 /* Floating point sizes and format. */
2714 switch (info
.byte_order
)
2716 case BFD_ENDIAN_BIG
:
2717 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_big
);
2718 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_double_big
);
2719 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_big
);
2722 case BFD_ENDIAN_LITTLE
:
2723 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_little
);
2724 set_gdbarch_double_format (gdbarch
,
2725 &floatformat_ieee_double_littlebyte_bigword
);
2726 set_gdbarch_long_double_format (gdbarch
,
2727 &floatformat_ieee_double_littlebyte_bigword
);
2731 internal_error (__FILE__
, __LINE__
,
2732 "arm_gdbarch_init: bad byte order for float format");
2735 tdep
->lowest_pc
= 0x20;
2737 set_gdbarch_use_generic_dummy_frames (gdbarch
, 0);
2739 /* Call dummy code. */
2740 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
2741 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
2742 set_gdbarch_call_dummy_p (gdbarch
, 1);
2743 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
2745 set_gdbarch_call_dummy_words (gdbarch
, arm_call_dummy_words
);
2746 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (arm_call_dummy_words
));
2747 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
2749 set_gdbarch_fix_call_dummy (gdbarch
, arm_fix_call_dummy
);
2751 set_gdbarch_pc_in_call_dummy (gdbarch
, pc_in_call_dummy_on_stack
);
2753 set_gdbarch_get_saved_register (gdbarch
, generic_get_saved_register
);
2754 set_gdbarch_push_arguments (gdbarch
, arm_push_arguments
);
2756 /* Frame handling. */
2757 set_gdbarch_frame_chain_valid (gdbarch
, arm_frame_chain_valid
);
2758 set_gdbarch_init_extra_frame_info (gdbarch
, arm_init_extra_frame_info
);
2759 set_gdbarch_read_fp (gdbarch
, arm_read_fp
);
2760 set_gdbarch_frame_chain (gdbarch
, arm_frame_chain
);
2761 set_gdbarch_frameless_function_invocation
2762 (gdbarch
, arm_frameless_function_invocation
);
2763 set_gdbarch_frame_saved_pc (gdbarch
, arm_frame_saved_pc
);
2764 set_gdbarch_frame_args_address (gdbarch
, arm_frame_args_address
);
2765 set_gdbarch_frame_locals_address (gdbarch
, arm_frame_locals_address
);
2766 set_gdbarch_frame_num_args (gdbarch
, arm_frame_num_args
);
2767 set_gdbarch_frame_args_skip (gdbarch
, 0);
2768 set_gdbarch_frame_init_saved_regs (gdbarch
, arm_frame_init_saved_regs
);
2769 set_gdbarch_push_dummy_frame (gdbarch
, arm_push_dummy_frame
);
2770 set_gdbarch_pop_frame (gdbarch
, arm_pop_frame
);
2772 /* Address manipulation. */
2773 set_gdbarch_smash_text_address (gdbarch
, arm_smash_text_address
);
2774 set_gdbarch_addr_bits_remove (gdbarch
, arm_addr_bits_remove
);
2776 /* Offset from address of function to start of its code. */
2777 set_gdbarch_function_start_offset (gdbarch
, 0);
2779 /* Advance PC across function entry code. */
2780 set_gdbarch_skip_prologue (gdbarch
, arm_skip_prologue
);
2782 /* Get the PC when a frame might not be available. */
2783 set_gdbarch_saved_pc_after_call (gdbarch
, arm_saved_pc_after_call
);
2785 /* The stack grows downward. */
2786 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2788 /* Breakpoint manipulation. */
2789 set_gdbarch_breakpoint_from_pc (gdbarch
, arm_breakpoint_from_pc
);
2790 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2792 /* Information about registers, etc. */
2793 set_gdbarch_print_float_info (gdbarch
, arm_print_float_info
);
2794 set_gdbarch_fp_regnum (gdbarch
, ARM_FP_REGNUM
); /* ??? */
2795 set_gdbarch_sp_regnum (gdbarch
, ARM_SP_REGNUM
);
2796 set_gdbarch_pc_regnum (gdbarch
, ARM_PC_REGNUM
);
2797 set_gdbarch_register_byte (gdbarch
, arm_register_byte
);
2798 set_gdbarch_register_bytes (gdbarch
,
2799 (NUM_GREGS
* INT_REGISTER_RAW_SIZE
2800 + NUM_FREGS
* FP_REGISTER_RAW_SIZE
2801 + NUM_SREGS
* STATUS_REGISTER_SIZE
));
2802 set_gdbarch_num_regs (gdbarch
, NUM_GREGS
+ NUM_FREGS
+ NUM_SREGS
);
2803 set_gdbarch_register_raw_size (gdbarch
, arm_register_raw_size
);
2804 set_gdbarch_register_virtual_size (gdbarch
, arm_register_virtual_size
);
2805 set_gdbarch_max_register_raw_size (gdbarch
, FP_REGISTER_RAW_SIZE
);
2806 set_gdbarch_max_register_virtual_size (gdbarch
, FP_REGISTER_VIRTUAL_SIZE
);
2807 set_gdbarch_register_virtual_type (gdbarch
, arm_register_type
);
2809 /* Integer registers are 4 bytes. */
2810 set_gdbarch_register_size (gdbarch
, 4);
2811 set_gdbarch_register_name (gdbarch
, arm_register_name
);
2813 /* Returning results. */
2814 set_gdbarch_extract_return_value (gdbarch
, arm_extract_return_value
);
2815 set_gdbarch_store_return_value (gdbarch
, arm_store_return_value
);
2816 set_gdbarch_store_struct_return (gdbarch
, arm_store_struct_return
);
2817 set_gdbarch_use_struct_convention (gdbarch
, arm_use_struct_convention
);
2818 set_gdbarch_extract_struct_value_address (gdbarch
,
2819 arm_extract_struct_value_address
);
2821 /* Single stepping. */
2822 /* XXX For an RDI target we should ask the target if it can single-step. */
2823 set_gdbarch_software_single_step (gdbarch
, arm_software_single_step
);
2825 /* Minsymbol frobbing. */
2826 set_gdbarch_elf_make_msymbol_special (gdbarch
, arm_elf_make_msymbol_special
);
2827 set_gdbarch_coff_make_msymbol_special (gdbarch
,
2828 arm_coff_make_msymbol_special
);
2830 /* Hook in the ABI-specific overrides, if they have been registered. */
2831 if (arm_abi
== ARM_ABI_UNKNOWN
)
2834 (gdb_stderr
, "GDB doesn't recognize the ABI of the inferior. "
2835 "Attempting to continue with the default ARM settings");
2839 for (abi_handler
= arm_abi_handler_list
; abi_handler
!= NULL
;
2840 abi_handler
= abi_handler
->next
)
2841 if (abi_handler
->abi
== arm_abi
)
2845 abi_handler
->init_abi (info
, gdbarch
);
2848 /* We assume that if GDB_MULTI_ARCH is less than
2849 GDB_MULTI_ARCH_TM that an ABI variant can be supported by
2850 overriding definitions in this file. */
2851 if (GDB_MULTI_ARCH
> GDB_MULTI_ARCH_PARTIAL
)
2854 "A handler for the ABI variant \"%s\" is not built into this "
2855 "configuration of GDB. "
2856 "Attempting to continue with the default ARM settings",
2857 arm_abi_names
[arm_abi
]);
2861 /* Now we have tuned the configuration, set a few final things,
2862 based on what the OS ABI has told us. */
2864 /* We can't use SIZEOF_FRAME_SAVED_REGS here, since that still
2865 references the old architecture vector, not the one we are
2867 if (prologue_cache
.saved_regs
!= NULL
)
2868 xfree (prologue_cache
.saved_regs
);
2870 prologue_cache
.saved_regs
= (CORE_ADDR
*)
2871 xcalloc (1, (sizeof (CORE_ADDR
)
2872 * (gdbarch_num_regs (gdbarch
) + NUM_PSEUDO_REGS
)));
2878 arm_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2880 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2885 if (tdep
->abi_name
!= NULL
)
2886 fprintf_unfiltered (file
, "arm_dump_tdep: ABI = %s\n", tdep
->abi_name
);
2888 internal_error (__FILE__
, __LINE__
,
2889 "arm_dump_tdep: illegal setting of tdep->arm_abi (%d)",
2890 (int) tdep
->arm_abi
);
2892 fprintf_unfiltered (file
, "arm_dump_tdep: Lowest pc = 0x%lx",
2893 (unsigned long) tdep
->lowest_pc
);
2897 arm_init_abi_eabi_v1 (struct gdbarch_info info
,
2898 struct gdbarch
*gdbarch
)
2904 arm_init_abi_eabi_v2 (struct gdbarch_info info
,
2905 struct gdbarch
*gdbarch
)
2911 arm_init_abi_apcs (struct gdbarch_info info
,
2912 struct gdbarch
*gdbarch
)
2918 _initialize_arm_tdep (void)
2920 struct ui_file
*stb
;
2922 struct cmd_list_element
*new_cmd
;
2923 const char *setname
;
2924 const char *setdesc
;
2925 const char **regnames
;
2927 static char *helptext
;
2930 gdbarch_register (bfd_arch_arm
, arm_gdbarch_init
, arm_dump_tdep
);
2932 /* Register some ABI variants for embedded systems. */
2933 arm_gdbarch_register_os_abi (ARM_ABI_EABI_V1
, arm_init_abi_eabi_v1
);
2934 arm_gdbarch_register_os_abi (ARM_ABI_EABI_V2
, arm_init_abi_eabi_v2
);
2935 arm_gdbarch_register_os_abi (ARM_ABI_APCS
, arm_init_abi_apcs
);
2937 tm_print_insn
= gdb_print_insn_arm
;
2939 /* Get the number of possible sets of register names defined in opcodes. */
2940 num_flavor_options
= get_arm_regname_num_options ();
2942 /* Sync the opcode insn printer with our register viewer: */
2943 parse_arm_disassembler_option ("reg-names-std");
2945 /* Begin creating the help text. */
2946 stb
= mem_fileopen ();
2947 fprintf_unfiltered (stb
, "Set the disassembly flavor.\n\
2948 The valid values are:\n");
2950 /* Initialize the array that will be passed to add_set_enum_cmd(). */
2951 valid_flavors
= xmalloc ((num_flavor_options
+ 1) * sizeof (char *));
2952 for (i
= 0; i
< num_flavor_options
; i
++)
2954 numregs
= get_arm_regnames (i
, &setname
, &setdesc
, ®names
);
2955 valid_flavors
[i
] = setname
;
2956 fprintf_unfiltered (stb
, "%s - %s\n", setname
,
2958 /* Copy the default names (if found) and synchronize disassembler. */
2959 if (!strcmp (setname
, "std"))
2961 disassembly_flavor
= setname
;
2963 for (j
= 0; j
< numregs
; j
++)
2964 arm_register_names
[j
] = (char *) regnames
[j
];
2965 set_arm_regname_option (i
);
2968 /* Mark the end of valid options. */
2969 valid_flavors
[num_flavor_options
] = NULL
;
2971 /* Finish the creation of the help text. */
2972 fprintf_unfiltered (stb
, "The default is \"std\".");
2973 helptext
= ui_file_xstrdup (stb
, &length
);
2974 ui_file_delete (stb
);
2976 /* Add the disassembly-flavor command */
2977 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
2979 &disassembly_flavor
,
2982 set_cmd_sfunc (new_cmd
, set_disassembly_flavor_sfunc
);
2983 add_show_from_set (new_cmd
, &showlist
);
2985 /* ??? Maybe this should be a boolean. */
2986 add_show_from_set (add_set_cmd ("apcs32", no_class
,
2987 var_zinteger
, (char *) &arm_apcs_32
,
2988 "Set usage of ARM 32-bit mode.\n", &setlist
),
2991 /* Add the deprecated "othernames" command */
2993 add_com ("othernames", class_obscure
, arm_othernames
,
2994 "Switch to the next set of register names.");
2996 /* Fill in the prologue_cache fields. */
2997 prologue_cache
.saved_regs
= NULL
;
2998 prologue_cache
.extra_info
= (struct frame_extra_info
*)
2999 xcalloc (1, sizeof (struct frame_extra_info
));