1 /* Common target dependent code for GDB on ARM systems.
2 Copyright (C) 2002, 2003 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street, Fifth Floor,
19 Boston, MA 02110-1301, USA. */
21 /* Forward declarations. */
24 /* Register numbers of various important registers. Note that some of
25 these values are "real" register numbers, and correspond to the
26 general registers of the machine, and some are "phony" register
27 numbers which are too large to be actual register numbers as far as
28 the user is concerned but do serve to get the desired values when
29 passed to read_register. */
32 ARM_A1_REGNUM
= 0, /* first integer-like argument */
33 ARM_A4_REGNUM
= 3, /* last integer-like argument */
35 ARM_SP_REGNUM
= 13, /* Contains address of top of stack */
36 ARM_LR_REGNUM
= 14, /* address to return to from a function call */
37 ARM_PC_REGNUM
= 15, /* Contains program counter */
38 ARM_F0_REGNUM
= 16, /* first floating point register */
39 ARM_F3_REGNUM
= 19, /* last floating point argument register */
40 ARM_F7_REGNUM
= 23, /* last floating point register */
41 ARM_FPS_REGNUM
= 24, /* floating point status register */
42 ARM_PS_REGNUM
= 25, /* Contains processor status */
43 ARM_FP_REGNUM
= 11, /* Frame register in ARM code, if used. */
44 THUMB_FP_REGNUM
= 7, /* Frame register in Thumb code, if used. */
46 ARM_LAST_ARG_REGNUM
= ARM_A4_REGNUM
,
47 ARM_NUM_FP_ARG_REGS
= 4,
48 ARM_LAST_FP_ARG_REGNUM
= ARM_F3_REGNUM
51 /* Size of integer registers. */
52 #define INT_REGISTER_SIZE 4
54 /* Say how long FP registers are. Used for documentation purposes and
55 code readability in this header. IEEE extended doubles are 80
56 bits. DWORD aligned they use 96 bits. */
57 #define FP_REGISTER_SIZE 12
59 /* Status registers are the same size as general purpose registers.
60 Used for documentation purposes and code readability in this
62 #define STATUS_REGISTER_SIZE 4
64 /* Number of machine registers. The only define actually required
65 is NUM_REGS. The other definitions are used for documentation
66 purposes and code readability. */
67 /* For 26 bit ARM code, a fake copy of the PC is placed in register 25 (PS)
68 (and called PS for processor status) so the status bits can be cleared
69 from the PC (register 15). For 32 bit ARM code, a copy of CPSR is placed
71 #define NUM_FREGS 8 /* Number of floating point registers. */
72 #define NUM_SREGS 2 /* Number of status registers. */
73 #define NUM_GREGS 16 /* Number of general purpose registers. */
76 /* Instruction condition field values. */
94 #define FLAG_N 0x80000000
95 #define FLAG_Z 0x40000000
96 #define FLAG_C 0x20000000
97 #define FLAG_V 0x10000000
99 /* Type of floating-point code in use by inferior. There are really 3 models
100 that are traditionally supported (plus the endianness issue), but gcc can
101 only generate 2 of those. The third is APCS_FLOAT, where arguments to
102 functions are passed in floating-point registers.
104 In addition to the traditional models, VFP adds two more.
106 If you update this enum, don't forget to update fp_model_strings in
111 ARM_FLOAT_AUTO
, /* Automatic detection. Do not set in tdep. */
112 ARM_FLOAT_SOFT_FPA
, /* Traditional soft-float (mixed-endian on LE ARM). */
113 ARM_FLOAT_FPA
, /* FPA co-processor. GCC calling convention. */
114 ARM_FLOAT_SOFT_VFP
, /* Soft-float with pure-endian doubles. */
115 ARM_FLOAT_VFP
, /* Full VFP calling convention. */
116 ARM_FLOAT_LAST
/* Keep at end. */
119 /* ABI used by the inferior. */
128 /* Target-dependent structure in gdbarch. */
131 /* The ABI for this architecture. It should never be set to
133 enum arm_abi_kind arm_abi
;
135 enum arm_float_model fp_model
; /* Floating point calling conventions. */
137 CORE_ADDR lowest_pc
; /* Lowest address at which instructions
140 const char *arm_breakpoint
; /* Breakpoint pattern for an ARM insn. */
141 int arm_breakpoint_size
; /* And its size. */
142 const char *thumb_breakpoint
; /* Breakpoint pattern for an ARM insn. */
143 int thumb_breakpoint_size
; /* And its size. */
145 int jb_pc
; /* Offset to PC value in jump buffer.
146 If this is negative, longjmp support
148 size_t jb_elt_size
; /* And the size of each entry in the buf. */
150 /* Cached core file helpers. */
151 struct regset
*gregset
, *fpregset
;
155 #define LOWEST_PC (gdbarch_tdep (current_gdbarch)->lowest_pc)
158 /* Prototypes for internal interfaces needed by more than one MD file. */
159 int arm_pc_is_thumb_dummy (CORE_ADDR
);
161 int arm_pc_is_thumb (CORE_ADDR
);
163 CORE_ADDR
thumb_get_next_pc (CORE_ADDR
);
165 CORE_ADDR
arm_get_next_pc (CORE_ADDR
);
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