gdb/config/arm/tm-linux.h

   1 /* Target definitions for GNU/Linux on ARM, for GDB.
   2    Copyright 1999, 2000 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 2 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program; if not, write to the Free Software
  18    Foundation, Inc., 59 Temple Place - Suite 330,
  19    Boston, MA 02111-1307, USA.  */
  20
  21 #ifndef TM_ARMLINUX_H
  22 #define TM_ARMLINUX_H
  23
  24 /* Include the common ARM target definitions.  */
  25 #include "arm/tm-arm.h"
  26
  27 #include "tm-linux.h"
  28
  29 /* Target byte order on ARM Linux is little endian and not selectable.  */
  30 #undef TARGET_BYTE_ORDER_SELECTABLE_P
  31 #define TARGET_BYTE_ORDER_SELECTABLE_P  0
  32
  33 /* Under ARM Linux the traditional way of performing a breakpoint is to
  34    execute a particular software interrupt, rather than use a particular
  35    undefined instruction to provoke a trap.  Upon exection of the software
  36    interrupt the kernel stops the inferior with a SIGTRAP, and wakes the
  37    debugger.  Since ARM Linux is little endian, and doesn't support Thumb
  38    at the moment we redefined ARM_LE_BREAKPOINT to use the correct software
  39    interrupt.  */
  40 #undef ARM_LE_BREAKPOINT
  41 #define ARM_LE_BREAKPOINT       {0x01,0x00,0x9f,0xef}
  42
  43 /* This sequence of words used in the CALL_DUMMY are the following
  44    instructions:
  45
  46    mov  lr, pc
  47    mov  pc, r4
  48    swi  bkpt_swi
  49
  50    Note this is 12 bytes.  */
  51
  52 #undef CALL_DUMMY
  53 #define CALL_DUMMY {0xe1a0e00f, 0xe1a0f004, 0xef9f001}
  54
  55 /* Extract from an array REGBUF containing the (raw) register state
  56    a function return value of type TYPE, and copy that, in virtual format,
  57    into VALBUF.  */
  58 extern void arm_linux_extract_return_value (struct type *, char[], char *);
  59 #undef EXTRACT_RETURN_VALUE
  60 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
  61         arm_linux_extract_return_value ((TYPE), (REGBUF), (VALBUF))
  62
  63 /* Things needed for making the inferior call functions.
  64
  65    FIXME:  This and arm_push_arguments should be merged.  However this
  66            function breaks on a little endian host, big endian target
  67            using the COFF file format.  ELF is ok.
  68
  69            ScottB.  */
  70
  71 #undef PUSH_ARGUMENTS
  72 #define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
  73      sp = arm_linux_push_arguments ((nargs), (args), (sp), (struct_return), \
  74                                     (struct_addr))
  75 extern CORE_ADDR arm_linux_push_arguments (int, struct value **, CORE_ADDR,
  76                                            int, CORE_ADDR);
  77
  78 /* The first page is not writeable in ARM Linux.  */
  79 #undef LOWEST_PC
  80 #define LOWEST_PC       0x8000
  81
  82 /* Define NO_SINGLE_STEP if ptrace(PT_STEP,...) fails to function correctly
  83    on ARM Linux.  This is the case on 2.0.x kernels, 2.1.x kernels and some
  84    2.2.x kernels.  This will include the implementation of single_step()
  85    in armlinux-tdep.c.  See armlinux-ss.c for more details. */
  86 /* #define NO_SINGLE_STEP       1 */
  87
  88 /* Offset to saved PC in sigcontext structure, from <asm/sigcontext.h> */
  89 #define SIGCONTEXT_PC_OFFSET    (sizeof(unsigned long) * 18)
  90
  91 /* Figure out where the longjmp will land.  The code expects that longjmp
  92    has just been entered and the code had not altered the registers, so
  93    the arguments are are still in r0-r1.  r0 points at the jmp_buf structure
  94    from which the target pc (JB_PC) is extracted.  This pc value is copied
  95    into ADDR.  This routine returns true on success */
  96 extern int arm_get_longjmp_target (CORE_ADDR *);
  97 #define GET_LONGJMP_TARGET(addr)        arm_get_longjmp_target (addr)
  98
  99 /* On ARM Linux, each call to a library routine goes through a small piece
 100    of trampoline code in the ".plt" section.  The  wait_for_inferior()
 101    routine uses this macro to detect when we have stepped into one of
 102    these fragments.  We do not use lookup_solib_trampoline_symbol_by_pc,
 103    because we cannot always find the shared library trampoline symbols.  */
 104 extern int in_plt_section (CORE_ADDR, char *);
 105 #define IN_SOLIB_CALL_TRAMPOLINE(pc, name) in_plt_section((pc), (name))
 106
 107 /* On ARM Linux, a call to a library routine does not have to go through
 108    any trampoline code.  */
 109 #define IN_SOLIB_RETURN_TRAMPOLINE(pc, name)    0
 110
 111 /* If PC is in a shared library trampoline code, return the PC
 112    where the function itself actually starts.  If not, return 0.  */
 113 extern CORE_ADDR find_solib_trampoline_target (CORE_ADDR pc);
 114 #define SKIP_TRAMPOLINE_CODE(pc)  find_solib_trampoline_target (pc)
 115
 116 /* When we call a function in a shared library, and the PLT sends us
 117    into the dynamic linker to find the function's real address, we
 118    need to skip over the dynamic linker call.  This function decides
 119    when to skip, and where to skip to.  See the comments for
 120    SKIP_SOLIB_RESOLVER at the top of infrun.c.  */
 121 extern CORE_ADDR arm_linux_skip_solib_resolver (CORE_ADDR pc);
 122 #define SKIP_SOLIB_RESOLVER arm_linux_skip_solib_resolver
 123
 124 /* When we call a function in a shared library, and the PLT sends us
 125    into the dynamic linker to find the function's real address, we
 126    need to skip over the dynamic linker call.  This function decides
 127    when to skip, and where to skip to.  See the comments for
 128    SKIP_SOLIB_RESOLVER at the top of infrun.c.  */
 129 #if 0
 130 #undef IN_SOLIB_DYNSYM_RESOLVE_CODE
 131 extern CORE_ADDR arm_in_solib_dynsym_resolve_code (CORE_ADDR pc, char *name);
 132 #define IN_SOLIB_DYNSYM_RESOLVE_CODE  arm_in_solib_dynsym_resolve_code
 133 /* ScottB: Current definition is
 134 extern CORE_ADDR in_svr4_dynsym_resolve_code (CORE_ADDR pc, char *name);
 135 #define IN_SOLIB_DYNSYM_RESOLVE_CODE  in_svr4_dynsym_resolve_code */
 136 #endif
 137
 138 /* When the ARM Linux kernel invokes a signal handler, the return
 139    address points at a special instruction which'll trap back into
 140    the kernel.  These definitions are used to identify this bit of
 141    code as a signal trampoline in order to support backtracing
 142    through calls to signal handlers. */
 143
 144 int arm_linux_in_sigtramp (CORE_ADDR pc, char *name);
 145 #define IN_SIGTRAMP(pc, name) arm_linux_in_sigtramp (pc, name)
 146
 147 /* Each OS has different mechanisms for accessing the various
 148    registers stored in the sigcontext structure.  These definitions
 149    provide a mechanism by which the generic code in arm-tdep.c can
 150    find the addresses at which various registers are saved at in the
 151    sigcontext structure.  If SIGCONTEXT_REGISTER_ADDRESS is not
 152    defined, arm-tdep.c will define it to be 0.  (See ia64-tdep.c and
 153    ia64-linux-tdep.c to see what a similar mechanism looks like when
 154    multi-arched.) */
 155
 156 extern CORE_ADDR arm_linux_sigcontext_register_address (CORE_ADDR, CORE_ADDR,
 157                                                         int);
 158 #define SIGCONTEXT_REGISTER_ADDRESS arm_linux_sigcontext_register_address
 159
 160 #endif /* TM_ARMLINUX_H */