1 /* Native definitions for Intel x86 running DJGPP.
2 Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 #include "i386/nm-i386v.h"
25 #define TARGET_HAS_HARDWARE_WATCHPOINTS
27 /* Returns the number of hardware watchpoints of type TYPE that we can
28 set. Value is positive if we can set CNT watchpoints, zero if
29 setting watchpoints of type TYPE is not supported, and negative if
30 CNT is more than the maximum number of watchpoints of type TYPE
31 that we can support. TYPE is one of bp_hardware_watchpoint,
32 bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
33 CNT is the number of such watchpoints used so far (including this
34 one). OTHERTYPE is non-zero if other types of watchpoints are
37 We always return 1 here because we don't have enough information
38 about possible overlap of addresses that they want to watch. As
39 an extreme example, consider the case where all the watchpoints
40 watch the same address and the same region length: then we can
41 handle a virtually unlimited number of watchpoints, due to debug
42 register sharing implemented via reference counts in go32-nat.c. */
44 #define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) 1
46 /* Returns non-zero if we can use hardware watchpoints to watch a region
47 whose address is ADDR and whose length is LEN. */
49 #define TARGET_REGION_OK_FOR_HW_WATCHPOINT(addr,len) \
50 go32_region_ok_for_watchpoint(addr,len)
51 extern int go32_region_ok_for_watchpoint (CORE_ADDR
, int);
53 /* After a watchpoint trap, the PC points to the instruction after the
54 one that caused the trap. Therefore we don't need to step over it.
55 But we do need to reset the status register to avoid another trap. */
57 #define HAVE_CONTINUABLE_WATCHPOINT
59 #define STOPPED_BY_WATCHPOINT(W) \
60 go32_stopped_by_watchpoint (inferior_pid, 0)
62 #define target_stopped_data_address() \
63 go32_stopped_by_watchpoint (inferior_pid, 1)
64 extern CORE_ADDR
go32_stopped_by_watchpoint (int, int);
66 /* Use these macros for watchpoint insertion/removal. */
68 #define target_insert_watchpoint(addr, len, type) \
69 go32_insert_watchpoint (inferior_pid, addr, len, type)
70 extern int go32_insert_watchpoint (int, CORE_ADDR
, int, int);
72 #define target_remove_watchpoint(addr, len, type) \
73 go32_remove_watchpoint (inferior_pid, addr, len, type)
74 extern int go32_remove_watchpoint (int, CORE_ADDR
, int, int);
76 #define target_insert_hw_breakpoint(addr, shadow) \
77 go32_insert_hw_breakpoint(addr, shadow)
78 extern int go32_insert_hw_breakpoint (CORE_ADDR
, void *);
80 #define target_remove_hw_breakpoint(addr, shadow) \
81 go32_remove_hw_breakpoint(addr, shadow)
82 extern int go32_remove_hw_breakpoint (CORE_ADDR
, void *);
84 #define DECR_PC_AFTER_HW_BREAK 0
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