gdb/config/m88k/tm-m88k.h

   1 /* Target machine description for generic Motorola 88000, for GDB.
   2    Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1993
   3    Free Software Foundation, Inc.
   4
   5 This file is part of GDB.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 2 of the License, or
  10 (at your option) any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this program; if not, write to the Free Software
  19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  20
  21 /* g++ support is not yet included.  */
  22
  23 /* Define the bit, byte, and word ordering of the machine.  */
  24 #define TARGET_BYTE_ORDER BIG_ENDIAN
  25
  26 /* We cache information about saved registers in the frame structure,
  27    to save us from having to re-scan function prologues every time
  28    a register in a non-current frame is accessed.  */
  29
  30 #define EXTRA_FRAME_INFO        \
  31         struct frame_saved_regs *fsr;   \
  32         CORE_ADDR locals_pointer;       \
  33         CORE_ADDR args_pointer;
  34
  35 /* Zero the frame_saved_regs pointer when the frame is initialized,
  36    so that FRAME_FIND_SAVED_REGS () will know to allocate and
  37    initialize a frame_saved_regs struct the first time it is called.
  38    Set the arg_pointer to -1, which is not valid; 0 and other values
  39    indicate real, cached values.  */
  40
  41 #define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
  42         init_extra_frame_info (fromleaf, fi)
  43 extern void init_extra_frame_info ();
  44
  45 #define IEEE_FLOAT
  46
  47 /* Offset from address of function to start of its code.
  48    Zero on most machines.  */
  49
  50 #define FUNCTION_START_OFFSET 0
  51
  52 /* Advance PC across any function entry prologue instructions
  53    to reach some "real" code.  */
  54
  55 #define SKIP_PROLOGUE(frompc)   \
  56         { (frompc) = skip_prologue (frompc); }
  57 extern CORE_ADDR skip_prologue ();
  58
  59 /* The m88k kernel aligns all instructions on 4-byte boundaries.  The
  60    kernel also uses the least significant two bits for its own hocus
  61    pocus.  When gdb receives an address from the kernel, it needs to
  62    preserve those right-most two bits, but gdb also needs to be careful
  63    to realize that those two bits are not really a part of the address
  64    of an instruction.  Shrug.  */
  65
  66 #define ADDR_BITS_REMOVE(addr) ((addr) & ~3)
  67
  68 /* Immediately after a function call, return the saved pc.
  69    Can't always go through the frames for this because on some machines
  70    the new frame is not set up until the new function executes
  71    some instructions.  */
  72
  73 #define SAVED_PC_AFTER_CALL(frame) \
  74   (ADDR_BITS_REMOVE (read_register (SRP_REGNUM)))
  75
  76 /* Stack grows downward.  */
  77
  78 #define INNER_THAN <
  79
  80 /* Sequence of bytes for breakpoint instruction.  */
  81
  82 /* instruction 0xF000D1FF is 'tb0 0,r0,511'
  83    If Bit bit 0 of r0 is clear (always true),
  84    initiate exception processing (trap).
  85  */
  86 #define BREAKPOINT {0xF0, 0x00, 0xD1, 0xFF}
  87
  88 /* Amount PC must be decremented by after a breakpoint.
  89    This is often the number of bytes in BREAKPOINT
  90    but not always.  */
  91
  92 #define DECR_PC_AFTER_BREAK 0
  93
  94 /* Nonzero if instruction at PC is a return instruction.  */
  95 /* 'jmp r1' or 'jmp.n r1' is used to return from a subroutine. */
  96
  97 #define ABOUT_TO_RETURN(pc) (read_memory_integer (pc, 2) == 0xF800)
  98
  99 /* Say how long (ordinary) registers are.  This is a piece of bogosity
 100    used in push_word and a few other places; REGISTER_RAW_SIZE is the
 101    real way to know how big a register is.  */
 102
 103 #define REGISTER_SIZE 4
 104
 105 /* Number of machine registers */
 106
 107 #define GP_REGS (38)
 108 #define FP_REGS (32)
 109 #define NUM_REGS (GP_REGS + FP_REGS)
 110
 111 /* Initializer for an array of names of registers.
 112    There should be NUM_REGS strings in this initializer.  */
 113
 114 #define REGISTER_NAMES {\
 115                           "r0",\
 116                           "r1",\
 117                           "r2",\
 118                           "r3",\
 119                           "r4",\
 120                           "r5",\
 121                           "r6",\
 122                           "r7",\
 123                           "r8",\
 124                           "r9",\
 125                           "r10",\
 126                           "r11",\
 127                           "r12",\
 128                           "r13",\
 129                           "r14",\
 130                           "r15",\
 131                           "r16",\
 132                           "r17",\
 133                           "r18",\
 134                           "r19",\
 135                           "r20",\
 136                           "r21",\
 137                           "r22",\
 138                           "r23",\
 139                           "r24",\
 140                           "r25",\
 141                           "r26",\
 142                           "r27",\
 143                           "r28",\
 144                           "r29",\
 145                           "r30",\
 146                           "r31",\
 147                           "psr",\
 148                           "fpsr",\
 149                           "fpcr",\
 150                           "sxip",\
 151                           "snip",\
 152                           "sfip",\
 153                           "x0",\
 154                           "x1",\
 155                           "x2",\
 156                           "x3",\
 157                           "x4",\
 158                           "x5",\
 159                           "x6",\
 160                           "x7",\
 161                           "x8",\
 162                           "x9",\
 163                           "x10",\
 164                           "x11",\
 165                           "x12",\
 166                           "x13",\
 167                           "x14",\
 168                           "x15",\
 169                           "x16",\
 170                           "x17",\
 171                           "x18",\
 172                           "x19",\
 173                           "x20",\
 174                           "x21",\
 175                           "x22",\
 176                           "x23",\
 177                           "x24",\
 178                           "x25",\
 179                           "x26",\
 180                           "x27",\
 181                           "x28",\
 182                           "x29",\
 183                           "x30",\
 184                           "x31",\
 185                           "vbr",\
 186                           "dmt0",\
 187                           "dmd0",\
 188                           "dma0",\
 189                           "dmt1",\
 190                           "dmd1",\
 191                           "dma1",\
 192                           "dmt2",\
 193                           "dmd2",\
 194                           "dma2",\
 195                           "sr0",\
 196                           "sr1",\
 197                           "sr2",\
 198                           "sr3",\
 199                           "fpecr",\
 200                           "fphs1",\
 201                           "fpls1",\
 202                           "fphs2",\
 203                           "fpls2",\
 204                           "fppt",\
 205                           "fprh",\
 206                           "fprl",\
 207                           "fpit",\
 208                           "fpsr",\
 209                           "fpcr",\
 210                       }
 211
 212
 213 /* Register numbers of various important registers.
 214    Note that some of these values are "real" register numbers,
 215    and correspond to the general registers of the machine,
 216    and some are "phony" register numbers which are too large
 217    to be actual register numbers as far as the user is concerned
 218    but do serve to get the desired values when passed to read_register.  */
 219
 220 #define R0_REGNUM 0             /* Contains the constant zero */
 221 #define SRP_REGNUM 1            /* Contains subroutine return pointer */
 222 #define RV_REGNUM 2             /* Contains simple return values */
 223 #define SRA_REGNUM 12           /* Contains address of struct return values */
 224 #define SP_REGNUM 31            /* Contains address of top of stack */
 225
 226 /* Instruction pointer notes...
 227
 228    On the m88100:
 229
 230    * cr04 = sxip.  On exception, contains the excepting pc (probably).
 231    On rte, is ignored.
 232
 233    * cr05 = snip.  On exception, contains the NPC (next pc).  On rte,
 234    pc is loaded from here.
 235
 236    * cr06 = sfip.  On exception, contains the NNPC (next next pc).  On
 237    rte, the NPC is loaded from here.
 238
 239    * lower two bits of each are flag bits.  Bit 1 is V means address
 240    is valid.  If address is not valid, bit 0 is ignored.  Otherwise,
 241    bit 0 is E and asks for an exception to be taken if this
 242    instruction is executed.
 243
 244    On the m88110:
 245
 246    * cr04 = exip.  On exception, contains the address of the excepting
 247    pc (always).  On rte, pc is loaded from here.  Bit 0, aka the D
 248    bit, is a flag saying that the offending instruction was in a
 249    branch delay slot.  If set, then cr05 contains the NPC.
 250
 251    * cr05 = enip.  On exception, if the instruction pointed to by cr04
 252    was in a delay slot as indicated by the bit 0 of cr04, aka the D
 253    bit, the cr05 contains the NPC.  Otherwise ignored.
 254
 255    * cr06 is invalid  */
 256
 257 /* Note that the Harris Unix kernels emulate the m88100's behavior on
 258    the m88110.  */
 259
 260 #define SXIP_REGNUM 35          /* On m88100, Contains Shadow Execute
 261                                    Instruction Pointer.  */
 262 #define SNIP_REGNUM 36          /* On m88100, Contains Shadow Next
 263                                    Instruction Pointer.  */
 264 #define SFIP_REGNUM 37          /* On m88100, Contains Shadow Fetched
 265                                    Intruction pointer.  */
 266
 267 #define EXIP_REGNUM 35          /* On m88110, Contains Exception
 268                                    Executing Instruction Pointer.  */
 269 #define ENIP_REGNUM 36          /* On m88110, Contains the Exception
 270                                    Next Instruction Pointer.  */
 271
 272 #define PC_REGNUM SXIP_REGNUM   /* Program Counter */
 273 #define NPC_REGNUM SNIP_REGNUM  /* Next Program Counter */
 274 #define NNPC_REGNUM SFIP_REGNUM /* Next Next Program Counter */
 275
 276 #define PSR_REGNUM 32           /* Processor Status Register */
 277 #define FPSR_REGNUM 33          /* Floating Point Status Register */
 278 #define FPCR_REGNUM 34          /* Floating Point Control Register */
 279 #define XFP_REGNUM 38           /* First Extended Float Register */
 280 #define X0_REGNUM XFP_REGNUM    /* Which also contains the constant zero */
 281
 282 /* This is rather a confusing lie.  Our m88k port using a stack pointer value
 283    for the frame address.  Hence, the frame address and the frame pointer are
 284    only indirectly related.  The value of this macro is the register number
 285    fetched by the machine "independent" portions of gdb when they want to know
 286    about a frame address.  Thus, we lie here and claim that FP_REGNUM is
 287    SP_REGNUM.  */
 288 #define FP_REGNUM SP_REGNUM     /* Reg fetched to locate frame when pgm stops */
 289 #define ACTUAL_FP_REGNUM 30
 290
 291 /* PSR status bit definitions.  */
 292
 293 #define PSR_MODE                0x80000000
 294 #define PSR_BYTE_ORDER          0x40000000
 295 #define PSR_SERIAL_MODE         0x20000000
 296 #define PSR_CARRY               0x10000000
 297 #define PSR_SFU_DISABLE         0x000003f0
 298 #define PSR_SFU1_DISABLE        0x00000008
 299 #define PSR_MXM                 0x00000004
 300 #define PSR_IND                 0x00000002
 301 #define PSR_SFRZ                0x00000001
 302
 303
 304
 305 /* The following two comments come from the days prior to the m88110
 306    port.  The m88110 handles the instruction pointers differently.  I
 307    do not know what any m88110 kernels do as the m88110 port I'm
 308    working with is for an embedded system.  rich@cygnus.com
 309    13-sept-93.  */
 310
 311 /* BCS requires that the SXIP_REGNUM (or PC_REGNUM) contain the
 312    address of the next instr to be executed when a breakpoint occurs.
 313    Because the kernel gets the next instr (SNIP_REGNUM), the instr in
 314    SNIP needs to be put back into SFIP, and the instr in SXIP should
 315    be shifted to SNIP */
 316
 317 /* Are you sitting down?  It turns out that the 88K BCS (binary
 318    compatibility standard) folks originally felt that the debugger
 319    should be responsible for backing up the IPs, not the kernel (as is
 320    usually done).  Well, they have reversed their decision, and in
 321    future releases our kernel will be handling the backing up of the
 322    IPs.  So, eventually, we won't need to do the SHIFT_INST_REGS
 323    stuff.  But, for now, since there are 88K systems out there that do
 324    need the debugger to do the IP shifting, and since there will be
 325    systems where the kernel does the shifting, the code is a little
 326    more complex than perhaps it needs to be (we still go inside
 327    SHIFT_INST_REGS, and if the shifting hasn't occurred then gdb goes
 328    ahead and shifts).  */
 329
 330 extern int target_is_m88110;
 331 #define SHIFT_INST_REGS() \
 332 if (!target_is_m88110) \
 333 { \
 334     CORE_ADDR pc = read_register (PC_REGNUM); \
 335     CORE_ADDR npc = read_register (NPC_REGNUM); \
 336     if (pc != npc) \
 337     { \
 338         write_register (NNPC_REGNUM, npc); \
 339         write_register (NPC_REGNUM, pc); \
 340     } \
 341 }
 342
 343     /* Storing the following registers is a no-op. */
 344 #define CANNOT_STORE_REGISTER(regno)    (((regno) == R0_REGNUM) \
 345                                          || ((regno) == X0_REGNUM))
 346
 347   /* Number of bytes of storage in the actual machine representation
 348      for register N.  On the m88k,  the general purpose registers are 4
 349      bytes and the 88110 extended registers are 10 bytes. */
 350
 351 #define REGISTER_RAW_SIZE(N) ((N) < XFP_REGNUM ? 4 : 10)
 352
 353   /* Total amount of space needed to store our copies of the machine's
 354      register state, the array `registers'.  */
 355
 356 #define REGISTER_BYTES ((GP_REGS * REGISTER_RAW_SIZE(0)) \
 357                         + (FP_REGS * REGISTER_RAW_SIZE(XFP_REGNUM)))
 358
 359   /* Index within `registers' of the first byte of the space for
 360      register N.  */
 361
 362 #define REGISTER_BYTE(N) (((N) * REGISTER_RAW_SIZE(0)) \
 363                           + ((N) >= XFP_REGNUM \
 364                              ? (((N) - XFP_REGNUM) \
 365                                 * REGISTER_RAW_SIZE(XFP_REGNUM)) \
 366                              : 0))
 367
 368   /* Number of bytes of storage in the program's representation for
 369      register N.  On the m88k, all registers are 4 bytes excepting the
 370      m88110 extended registers which are 8 byte doubles. */
 371
 372 #define REGISTER_VIRTUAL_SIZE(N) ((N) < XFP_REGNUM ? 4 : 8)
 373
 374   /* Largest value REGISTER_RAW_SIZE can have.  */
 375
 376 #define MAX_REGISTER_RAW_SIZE (REGISTER_RAW_SIZE(XFP_REGNUM))
 377
 378   /* Largest value REGISTER_VIRTUAL_SIZE can have.
 379      Are FPS1, FPS2, FPR "virtual" regisers? */
 380
 381 #define MAX_REGISTER_VIRTUAL_SIZE (REGISTER_RAW_SIZE(XFP_REGNUM))
 382
 383   /* Nonzero if register N requires conversion
 384      from raw format to virtual format.  */
 385
 386 #define REGISTER_CONVERTIBLE(N) ((N) >= XFP_REGNUM)
 387
 388 #include "floatformat.h"
 389
 390 /* Convert data from raw format for register REGNUM in buffer FROM
 391    to virtual format with type TYPE in buffer TO.  */
 392
 393 #define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
 394 { \
 395   double val; \
 396   floatformat_to_double (&floatformat_m88110_ext, (FROM), &val); \
 397   store_floating ((TO), TYPE_LENGTH (TYPE), val); \
 398 }
 399
 400 /* Convert data from virtual format with type TYPE in buffer FROM
 401    to raw format for register REGNUM in buffer TO.  */
 402
 403 #define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO)    \
 404 { \
 405   double val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \
 406   floatformat_from_double (&floatformat_m88110_ext, &val, (TO)); \
 407 }
 408
 409 /* Return the GDB type object for the "standard" data type
 410    of data in register N.  */
 411
 412 #define REGISTER_VIRTUAL_TYPE(N) \
 413 ((N) >= XFP_REGNUM \
 414  ? builtin_type_double \
 415  : ((N) == PC_REGNUM || (N) == FP_REGNUM || (N) == SP_REGNUM \
 416     ? lookup_pointer_type (builtin_type_void) : builtin_type_int))
 417
 418 /* The 88k call/return conventions call for "small" values to be returned
 419    into consecutive registers starting from r2.  */
 420
 421 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
 422   memcpy ((VALBUF), &(((char *)REGBUF)[REGISTER_BYTE(RV_REGNUM)]), TYPE_LENGTH (TYPE))
 423
 424 #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF))
 425
 426 /* Write into appropriate registers a function return value
 427    of type TYPE, given in virtual format.  */
 428
 429 #define STORE_RETURN_VALUE(TYPE,VALBUF) \
 430   write_register_bytes (2*REGISTER_RAW_SIZE(0), (VALBUF), TYPE_LENGTH (TYPE))
 431
 432 /* In COFF, if PCC says a parameter is a short or a char, do not
 433    change it to int (it seems the convention is to change it). */
 434
 435 #define BELIEVE_PCC_PROMOTION 1
 436
 437 /* Describe the pointer in each stack frame to the previous stack frame
 438    (its caller).  */
 439
 440 /* FRAME_CHAIN takes a frame's nominal address
 441    and produces the frame's chain-pointer.
 442
 443    However, if FRAME_CHAIN_VALID returns zero,
 444    it means the given frame is the outermost one and has no caller.  */
 445
 446 extern CORE_ADDR frame_chain ();
 447 extern int frame_chain_valid ();
 448 extern int frameless_function_invocation ();
 449
 450 #define FRAME_CHAIN(thisframe) \
 451         frame_chain (thisframe)
 452
 453 #define FRAMELESS_FUNCTION_INVOCATION(frame, fromleaf)  \
 454         fromleaf = frameless_function_invocation (frame)
 455
 456 /* Define other aspects of the stack frame.  */
 457
 458 #define FRAME_SAVED_PC(FRAME)   \
 459         frame_saved_pc (FRAME)
 460 extern CORE_ADDR frame_saved_pc ();
 461
 462 #define FRAME_ARGS_ADDRESS(fi)  \
 463         frame_args_address (fi)
 464 extern CORE_ADDR frame_args_address ();
 465
 466 #define FRAME_LOCALS_ADDRESS(fi) \
 467         frame_locals_address (fi)
 468 extern CORE_ADDR frame_locals_address ();
 469
 470 /* Return number of args passed to a frame.
 471    Can return -1, meaning no way to tell.  */
 472
 473 #define FRAME_NUM_ARGS(numargs, fi)  ((numargs) = -1)
 474
 475 /* Return number of bytes at start of arglist that are not really args.  */
 476
 477 #define FRAME_ARGS_SKIP 0
 478
 479 /* Put here the code to store, into a struct frame_saved_regs,
 480    the addresses of the saved registers of frame described by FRAME_INFO.
 481    This includes special registers such as pc and fp saved in special
 482    ways in the stack frame.  sp is even more special:
 483    the address we return for it IS the sp for the next frame.  */
 484
 485 /* On the 88k, parameter registers get stored into the so called "homing"
 486    area.  This *always* happens when you compiled with GCC and use -g.
 487    Also, (with GCC and -g) the saving of the parameter register values
 488    always happens right within the function prologue code, so these register
 489    values can generally be relied upon to be already copied into their
 490    respective homing slots by the time you will normally try to look at
 491    them (we hope).
 492
 493    Note that homing area stack slots are always at *positive* offsets from
 494    the frame pointer.  Thus, the homing area stack slots for the parameter
 495    registers (passed values) for a given function are actually part of the
 496    frame area of the caller.  This is unusual, but it should not present
 497    any special problems for GDB.
 498
 499    Note also that on the 88k, we are only interested in finding the
 500    registers that might have been saved in memory.  This is a subset of
 501    the whole set of registers because the standard calling sequence allows
 502    the called routine to clobber many registers.
 503
 504    We could manage to locate values for all of the so called "preserved"
 505    registers (some of which may get saved within any particular frame) but
 506    that would require decoding all of the tdesc information.  That would be
 507    nice information for GDB to have, but it is not strictly manditory if we
 508    can live without the ability to look at values within (or backup to)
 509    previous frames.
 510 */
 511
 512 struct frame_saved_regs;
 513 struct frame_info;
 514
 515 void frame_find_saved_regs PARAMS((struct frame_info *fi,
 516                                    struct frame_saved_regs *fsr));
 517
 518 #define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
 519         frame_find_saved_regs (frame_info, &frame_saved_regs)
 520
 521 \f
 522 #define POP_FRAME pop_frame ()
 523 extern void pop_frame ();
 524
 525 /* Call function stuff contributed by Kevin Buettner of Motorola.  */
 526
 527 #define CALL_DUMMY_LOCATION AFTER_TEXT_END
 528
 529 extern void m88k_push_dummy_frame();
 530 #define PUSH_DUMMY_FRAME        m88k_push_dummy_frame()
 531
 532 #define CALL_DUMMY {                            \
 533 0x67ff00c0,     /*   0:   subu  #sp,#sp,0xc0 */ \
 534 0x243f0004,     /*   4:   st    #r1,#sp,0x4 */ \
 535 0x245f0008,     /*   8:   st    #r2,#sp,0x8 */ \
 536 0x247f000c,     /*   c:   st    #r3,#sp,0xc */ \
 537 0x249f0010,     /*  10:   st    #r4,#sp,0x10 */ \
 538 0x24bf0014,     /*  14:   st    #r5,#sp,0x14 */ \
 539 0x24df0018,     /*  18:   st    #r6,#sp,0x18 */ \
 540 0x24ff001c,     /*  1c:   st    #r7,#sp,0x1c */ \
 541 0x251f0020,     /*  20:   st    #r8,#sp,0x20 */ \
 542 0x253f0024,     /*  24:   st    #r9,#sp,0x24 */ \
 543 0x255f0028,     /*  28:   st    #r10,#sp,0x28 */ \
 544 0x257f002c,     /*  2c:   st    #r11,#sp,0x2c */ \
 545 0x259f0030,     /*  30:   st    #r12,#sp,0x30 */ \
 546 0x25bf0034,     /*  34:   st    #r13,#sp,0x34 */ \
 547 0x25df0038,     /*  38:   st    #r14,#sp,0x38 */ \
 548 0x25ff003c,     /*  3c:   st    #r15,#sp,0x3c */ \
 549 0x261f0040,     /*  40:   st    #r16,#sp,0x40 */ \
 550 0x263f0044,     /*  44:   st    #r17,#sp,0x44 */ \
 551 0x265f0048,     /*  48:   st    #r18,#sp,0x48 */ \
 552 0x267f004c,     /*  4c:   st    #r19,#sp,0x4c */ \
 553 0x269f0050,     /*  50:   st    #r20,#sp,0x50 */ \
 554 0x26bf0054,     /*  54:   st    #r21,#sp,0x54 */ \
 555 0x26df0058,     /*  58:   st    #r22,#sp,0x58 */ \
 556 0x26ff005c,     /*  5c:   st    #r23,#sp,0x5c */ \
 557 0x271f0060,     /*  60:   st    #r24,#sp,0x60 */ \
 558 0x273f0064,     /*  64:   st    #r25,#sp,0x64 */ \
 559 0x275f0068,     /*  68:   st    #r26,#sp,0x68 */ \
 560 0x277f006c,     /*  6c:   st    #r27,#sp,0x6c */ \
 561 0x279f0070,     /*  70:   st    #r28,#sp,0x70 */ \
 562 0x27bf0074,     /*  74:   st    #r29,#sp,0x74 */ \
 563 0x27df0078,     /*  78:   st    #r30,#sp,0x78 */ \
 564 0x63df0000,     /*  7c:   addu  #r30,#sp,0x0 */ \
 565 0x145f0000,     /*  80:   ld    #r2,#sp,0x0 */ \
 566 0x147f0004,     /*  84:   ld    #r3,#sp,0x4 */ \
 567 0x149f0008,     /*  88:   ld    #r4,#sp,0x8 */ \
 568 0x14bf000c,     /*  8c:   ld    #r5,#sp,0xc */ \
 569 0x14df0010,     /*  90:   ld    #r6,#sp,0x10 */ \
 570 0x14ff0014,     /*  94:   ld    #r7,#sp,0x14 */ \
 571 0x151f0018,     /*  98:   ld    #r8,#sp,0x18 */ \
 572 0x153f001c,     /*  9c:   ld    #r9,#sp,0x1c */ \
 573 0x5c200000,     /*  a0:   or.u  #r1,#r0,0x0 */ \
 574 0x58210000,     /*  a4:   or    #r1,#r1,0x0 */ \
 575 0xf400c801,     /*  a8:   jsr   #r1 */ \
 576 0xf000d1ff      /*  ac:   tb0   0x0,#r0,0x1ff */ \
 577 }
 578
 579 #define CALL_DUMMY_START_OFFSET 0x80
 580 #define CALL_DUMMY_LENGTH 0xb0
 581
 582 /* FIXME: byteswapping.  */
 583 #define FIX_CALL_DUMMY(dummy, pc, fun, nargs, args, type, gcc_p)        \
 584 {                                                                       \
 585   *(unsigned long *)((char *) (dummy) + 0xa0) |=                        \
 586         (((unsigned long) (fun)) >> 16);                                \
 587   *(unsigned long *)((char *) (dummy) + 0xa4) |=                        \
 588         (((unsigned long) (fun)) & 0xffff);                             \
 589   pc = text_end;                                                        \
 590 }
 591
 592 #define STACK_ALIGN(addr) (((addr)+7) & -8)
 593
 594 #define STORE_STRUCT_RETURN(addr, sp) \
 595     write_register (SRA_REGNUM, (addr))
 596
 597 #define NEED_TEXT_START_END 1
 598
 599 /* According to the MC88100 RISC Microprocessor User's Manual, section
 600    6.4.3.1.2:
 601
 602         ... can be made to return to a particular instruction by placing a
 603         valid instruction address in the SNIP and the next sequential
 604         instruction address in the SFIP (with V bits set and E bits clear).
 605         The rte resumes execution at the instruction pointed to by the
 606         SNIP, then the SFIP.
 607
 608    The E bit is the least significant bit (bit 0).  The V (valid) bit is
 609    bit 1.  This is why we logical or 2 into the values we are writing
 610    below.  It turns out that SXIP plays no role when returning from an
 611    exception so nothing special has to be done with it.  We could even
 612    (presumably) give it a totally bogus value.
 613
 614    -- Kevin Buettner
 615 */
 616
 617 #define TARGET_WRITE_PC(val, pid) { \
 618   write_register_pid(SXIP_REGNUM, (long) val, pid); \
 619   write_register_pid(SNIP_REGNUM, (long) val | 2, pid); \
 620   write_register_pid(SFIP_REGNUM, ((long) val | 2) + 4, pid); \
 621 }