gdb/config/mips/tm-mips.h

   1 /* Definitions to make GDB run on a mips box under 4.3bsd.
   2    Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
   3    Contributed by Per Bothner (bothner@cs.wisc.edu) at U.Wisconsin
   4    and by Alessandro Forin (af@cs.cmu.edu) at CMU..
   5
   6 This file is part of GDB.
   7
   8 This program is free software; you can redistribute it and/or modify
   9 it under the terms of the GNU General Public License as published by
  10 the Free Software Foundation; either version 2 of the License, or
  11 (at your option) any later version.
  12
  13 This program is distributed in the hope that it will be useful,
  14 but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 GNU General Public License for more details.
  17
  18 You should have received a copy of the GNU General Public License
  19 along with this program; if not, write to the Free Software
  20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
  21
  22 #include <bfd.h>
  23 #include "coff/sym.h"           /* Needed for PDR below.  */
  24 #include "coff/symconst.h"
  25
  26 #if !defined (TARGET_BYTE_ORDER)
  27 #define TARGET_BYTE_ORDER LITTLE_ENDIAN
  28 #endif
  29
  30 /* Floating point is IEEE compliant */
  31 #define IEEE_FLOAT
  32
  33 /* Some MIPS boards are provided both with and without a floating
  34    point coprocessor; we provide a user settable variable to tell gdb
  35    whether there is one or not.  */
  36 extern int mips_fpu;
  37
  38 /* Offset from address of function to start of its code.
  39    Zero on most machines.  */
  40
  41 #define FUNCTION_START_OFFSET 0
  42
  43 /* Advance PC across any function entry prologue instructions
  44    to reach some "real" code.  */
  45
  46 #define SKIP_PROLOGUE(pc)       pc = mips_skip_prologue (pc, 0)
  47 extern CORE_ADDR mips_skip_prologue PARAMS ((CORE_ADDR addr, int lenient));
  48
  49 /* Immediately after a function call, return the saved pc.
  50    Can't always go through the frames for this because on some machines
  51    the new frame is not set up until the new function executes
  52    some instructions.  */
  53
  54 #define SAVED_PC_AFTER_CALL(frame)      read_register(RA_REGNUM)
  55
  56 /* Are we currently handling a signal */
  57
  58 #define IN_SIGTRAMP(pc, name)   in_sigtramp(pc, name)
  59
  60 /* Stack grows downward.  */
  61
  62 #define INNER_THAN <
  63
  64 #define BIG_ENDIAN 4321
  65 #if TARGET_BYTE_ORDER == BIG_ENDIAN
  66 #define BREAKPOINT {0, 0x5, 0, 0xd}
  67 #else
  68 #define BREAKPOINT {0xd, 0, 0x5, 0}
  69 #endif
  70
  71 /* Amount PC must be decremented by after a breakpoint.
  72    This is often the number of bytes in BREAKPOINT
  73    but not always.  */
  74
  75 #define DECR_PC_AFTER_BREAK 0
  76
  77 /* Nonzero if instruction at PC is a return instruction. "j ra" on mips. */
  78
  79 #define ABOUT_TO_RETURN(pc) (read_memory_integer (pc, 4) == 0x3e00008)
  80
  81 /* This is taken care of in print_floating [IEEE_FLOAT].  */
  82
  83 #define INVALID_FLOAT(p,l) 0
  84
  85 /* Say how long (all) registers are.  */
  86
  87 #define REGISTER_TYPE long
  88
  89 /* Number of machine registers */
  90
  91 #define NUM_REGS 80
  92
  93 /* Initializer for an array of names of registers.
  94    There should be NUM_REGS strings in this initializer.  */
  95
  96 #define REGISTER_NAMES  \
  97     {   "zero", "at",   "v0",   "v1",   "a0",   "a1",   "a2",   "a3", \
  98         "t0",   "t1",   "t2",   "t3",   "t4",   "t5",   "t6",   "t7", \
  99         "s0",   "s1",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7", \
 100         "t8",   "t9",   "k0",   "k1",   "gp",   "sp",   "s8",   "ra", \
 101         "sr",   "lo",   "hi",   "bad",  "cause","pc",    \
 102         "f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7", \
 103         "f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15", \
 104         "f16",  "f17",  "f18",  "f19",  "f20",  "f21",  "f22",  "f23",\
 105         "f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",\
 106         "fsr",  "fir",  "fp",   "inx",  "rand", "tlblo","ctxt", "tlbhi",\
 107         "epc",  "prid"\
 108     }
 109
 110 /* Register numbers of various important registers.
 111    Note that some of these values are "real" register numbers,
 112    and correspond to the general registers of the machine,
 113    and some are "phony" register numbers which are too large
 114    to be actual register numbers as far as the user is concerned
 115    but do serve to get the desired values when passed to read_register.  */
 116
 117 #define ZERO_REGNUM 0           /* read-only register, always 0 */
 118 #define V0_REGNUM 2             /* Function integer return value */
 119 #define A0_REGNUM 4             /* Loc of first arg during a subr call */
 120 #define SP_REGNUM 29            /* Contains address of top of stack */
 121 #define RA_REGNUM 31            /* Contains return address value */
 122 #define PS_REGNUM 32            /* Contains processor status */
 123 #define HI_REGNUM 34            /* Multiple/divide temp */
 124 #define LO_REGNUM 33            /* ... */
 125 #define BADVADDR_REGNUM 35      /* bad vaddr for addressing exception */
 126 #define CAUSE_REGNUM 36         /* describes last exception */
 127 #define PC_REGNUM 37            /* Contains program counter */
 128 #define FP0_REGNUM 38           /* Floating point register 0 (single float) */
 129 #define FCRCS_REGNUM 70         /* FP control/status */
 130 #define FCRIR_REGNUM 71         /* FP implementation/revision */
 131 #define FP_REGNUM 72            /* Pseudo register that contains true address of executing stack frame */
 132 #define FIRST_EMBED_REGNUM 73   /* First supervisor register for embedded use */
 133 #define LAST_EMBED_REGNUM 79    /* Last one */
 134
 135 /* Define DO_REGISTERS_INFO() to do machine-specific formatting
 136    of register dumps. */
 137
 138 #define DO_REGISTERS_INFO(_regnum, fp) mips_do_registers_info(_regnum, fp)
 139
 140 /* Total amount of space needed to store our copies of the machine's
 141    register state, the array `registers'.  */
 142 #define REGISTER_BYTES (NUM_REGS*4)
 143
 144 /* Index within `registers' of the first byte of the space for
 145    register N.  */
 146
 147 #define REGISTER_BYTE(N) ((N) * 4)
 148
 149 /* Number of bytes of storage in the actual machine representation
 150    for register N.  On mips, all regs are 4 bytes.  */
 151
 152 #define REGISTER_RAW_SIZE(N) 4
 153
 154 /* Number of bytes of storage in the program's representation
 155    for register N.  On mips, all regs are 4 bytes.  */
 156
 157 #define REGISTER_VIRTUAL_SIZE(N) 4
 158
 159 /* Largest value REGISTER_RAW_SIZE can have.  */
 160
 161 #define MAX_REGISTER_RAW_SIZE 8
 162
 163 /* Largest value REGISTER_VIRTUAL_SIZE can have.  */
 164
 165 #define MAX_REGISTER_VIRTUAL_SIZE 8
 166
 167 /* Return the GDB type object for the "standard" data type
 168    of data in register N.  */
 169
 170 #define REGISTER_VIRTUAL_TYPE(N) \
 171         (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32)  \
 172          ? builtin_type_float : builtin_type_int) \
 173
 174 #if HOST_BYTE_ORDER == BIG_ENDIAN
 175 /* All mips targets store doubles in a register pair with the least
 176    significant register in the lower numbered register.
 177    If the host is big endian, double register values need conversion between
 178    memory and register formats.  */
 179
 180 #define REGISTER_CONVERT_TO_TYPE(n, type, buffer)                       \
 181   do {if ((n) >= FP0_REGNUM && (n) < FP0_REGNUM + 32 &&                 \
 182           TYPE_CODE(type) == TYPE_CODE_FLT && TYPE_LENGTH(type) == 8) { \
 183         char __temp[4];                                                 \
 184         memcpy (__temp, ((char *)(buffer))+4, 4);                       \
 185         memcpy (((char *)(buffer))+4, (buffer), 4);                     \
 186         memcpy (((char *)(buffer)), __temp, 4); }} while (0)
 187
 188 #define REGISTER_CONVERT_FROM_TYPE(n, type, buffer)                     \
 189   do {if ((n) >= FP0_REGNUM && (n) < FP0_REGNUM + 32 &&                 \
 190           TYPE_CODE(type) == TYPE_CODE_FLT && TYPE_LENGTH(type) == 8) { \
 191         char __temp[4];                                                 \
 192         memcpy (__temp, ((char *)(buffer))+4, 4);                       \
 193         memcpy (((char *)(buffer))+4, (buffer), 4);                     \
 194         memcpy (((char *)(buffer)), __temp, 4); }} while (0)
 195 #endif
 196
 197 /* Store the address of the place in which to copy the structure the
 198    subroutine will return.  Handled by mips_push_arguments.  */
 199
 200 #define STORE_STRUCT_RETURN(addr, sp)   /**/
 201
 202 /* Extract from an array REGBUF containing the (raw) register state
 203    a function return value of type TYPE, and copy that, in virtual format,
 204    into VALBUF.  XXX floats */
 205
 206 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
 207   mips_extract_return_value(TYPE, REGBUF, VALBUF)
 208
 209 /* Write into appropriate registers a function return value
 210    of type TYPE, given in virtual format.  */
 211
 212 #define STORE_RETURN_VALUE(TYPE,VALBUF) \
 213   mips_store_return_value(TYPE, VALBUF)
 214
 215 /* Extract from an array REGBUF containing the (raw) register state
 216    the address in which a function should return its structure value,
 217    as a CORE_ADDR (or an expression that can be used as one).  */
 218 /* The address is passed in a0 upon entry to the function, but when
 219    the function exits, the compiler has copied the value to v0.  This
 220    convention is specified by the System V ABI, so I think we can rely
 221    on it.  */
 222
 223 #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
 224   (extract_address (REGBUF + REGISTER_BYTE (V0_REGNUM), \
 225                     REGISTER_RAW_SIZE (V0_REGNUM)))
 226
 227 /* Structures are returned by ref in extra arg0 */
 228 #define USE_STRUCT_CONVENTION(gcc_p, type)      1
 229
 230 \f
 231 /* Describe the pointer in each stack frame to the previous stack frame
 232    (its caller).  */
 233
 234 /* FRAME_CHAIN takes a frame's nominal address
 235    and produces the frame's chain-pointer. */
 236
 237 #define FRAME_CHAIN(thisframe) (FRAME_ADDR)mips_frame_chain(thisframe)
 238
 239 /* Define other aspects of the stack frame.  */
 240
 241
 242 /* A macro that tells us whether the function invocation represented
 243    by FI does not have a frame on the stack associated with it.  If it
 244    does not, FRAMELESS is set to 1, else 0.  */
 245 /* We handle this differently for mips, and maybe we should not */
 246
 247 #define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS)  {(FRAMELESS) = 0;}
 248
 249 /* Saved Pc.  */
 250
 251 #define FRAME_SAVED_PC(FRAME)   (mips_frame_saved_pc(FRAME))
 252
 253 #define FRAME_ARGS_ADDRESS(fi)  (fi)->frame
 254
 255 #define FRAME_LOCALS_ADDRESS(fi) (fi)->frame
 256
 257 /* Return number of args passed to a frame.
 258    Can return -1, meaning no way to tell.  */
 259
 260 #define FRAME_NUM_ARGS(num, fi) (num = mips_frame_num_args(fi))
 261
 262 /* Return number of bytes at start of arglist that are not really args.  */
 263
 264 #define FRAME_ARGS_SKIP 0
 265
 266 /* Put here the code to store, into a struct frame_saved_regs,
 267    the addresses of the saved registers of frame described by FRAME_INFO.
 268    This includes special registers such as pc and fp saved in special
 269    ways in the stack frame.  sp is even more special:
 270    the address we return for it IS the sp for the next frame.  */
 271
 272 #define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) ( \
 273   (frame_saved_regs) = *(frame_info)->saved_regs, \
 274   (frame_saved_regs).regs[SP_REGNUM] = (frame_info)->frame)
 275
 276 \f
 277 /* Things needed for making the inferior call functions.  */
 278
 279 /* Stack has strict alignment. However, use PUSH_ARGUMENTS
 280    to take care of it. */
 281 /*#define STACK_ALIGN(addr)     (((addr)+3)&~3)*/
 282
 283 #define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
 284     sp = mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
 285
 286 /* Push an empty stack frame, to record the current PC, etc.  */
 287
 288 #define PUSH_DUMMY_FRAME        mips_push_dummy_frame()
 289
 290 /* Discard from the stack the innermost frame, restoring all registers.  */
 291
 292 #define POP_FRAME               mips_pop_frame()
 293
 294 #define MK_OP(op,rs,rt,offset) (((op)<<26)|((rs)<<21)|((rt)<<16)|(offset))
 295 #define CALL_DUMMY_SIZE (16*4)
 296 #define Dest_Reg 2
 297 #define CALL_DUMMY {\
 298  MK_OP(0,RA_REGNUM,0,8),        /* jr $ra # Fake ABOUT_TO_RETURN ...*/\
 299  0,                             /* nop    #  ... to stop raw backtrace*/\
 300  0x27bd0000,                    /* addu sp,?0 # Pseudo prologue */\
 301 /* Start here: */\
 302  MK_OP(061,SP_REGNUM,12,0),     /* lwc1 $f12,0(sp) # Reload FP regs*/\
 303  MK_OP(061,SP_REGNUM,13,4),     /* lwc1 $f13,4(sp) */\
 304  MK_OP(061,SP_REGNUM,14,8),     /* lwc1 $f14,8(sp) */\
 305  MK_OP(061,SP_REGNUM,15,12),    /* lwc1 $f15,12(sp) */\
 306  MK_OP(043,SP_REGNUM,4,0),      /* lw $r4,0(sp) # Reload first 4 args*/\
 307  MK_OP(043,SP_REGNUM,5,4),      /* lw $r5,4(sp) */\
 308  MK_OP(043,SP_REGNUM,6,8),      /* lw $r6,8(sp) */\
 309  MK_OP(043,SP_REGNUM,7,12),     /* lw $r7,12(sp) */\
 310  (017<<26)| (Dest_Reg << 16),   /* lui $r31,<target upper 16 bits>*/\
 311  MK_OP(13,Dest_Reg,Dest_Reg,0), /* ori $r31,$r31,<lower 16 bits>*/ \
 312  (Dest_Reg<<21) | (31<<11) | 9, /* jalr $r31 */\
 313  MK_OP(043,SP_REGNUM,7,12),     /* lw $r7,12(sp) */\
 314  0x5000d,                       /* bpt */\
 315 }
 316
 317 #define CALL_DUMMY_START_OFFSET 12
 318
 319 /* Insert the specified number of args and function address
 320    into a call sequence of the above form stored at DUMMYNAME.  */
 321
 322 #if TARGET_BYTE_ORDER == BIG_ENDIAN
 323 /* For big endian mips machines the loading of FP values depends on whether
 324    they are single or double precision. */
 325 #define FIX_CALL_DUMMY(dummyname, start_sp, fun, nargs, args, rettype, gcc_p) \
 326   do {                                                                  \
 327     ((int*)(dummyname))[11] |= ((unsigned long)(fun)) >> 16;            \
 328     ((int*)(dummyname))[12] |= (unsigned short)(fun);                   \
 329     if (! mips_fpu) {                                                   \
 330       ((int *) (dummyname))[3] = 0; ((int *) (dummyname))[4] = 0;       \
 331       ((int *) (dummyname))[5] = 0; ((int *) (dummyname))[6] = 0;       \
 332     } else {                                                            \
 333       if (nargs > 0 &&                                                  \
 334           TYPE_CODE(VALUE_TYPE(args[0])) == TYPE_CODE_FLT &&            \
 335           TYPE_LENGTH(VALUE_TYPE(args[0])) == 8) {                      \
 336         ((int *) (dummyname))[3] = MK_OP(061,SP_REGNUM,12,4);           \
 337         ((int *) (dummyname))[4] = MK_OP(061,SP_REGNUM,13,0);           \
 338       }                                                                 \
 339       if (nargs > 1 &&                                                  \
 340           TYPE_CODE(VALUE_TYPE(args[1])) == TYPE_CODE_FLT &&            \
 341           TYPE_LENGTH(VALUE_TYPE(args[1])) == 8) {                      \
 342         ((int *) (dummyname))[5] = MK_OP(061,SP_REGNUM,14,12);          \
 343         ((int *) (dummyname))[6] = MK_OP(061,SP_REGNUM,15,8);           \
 344       }                                                                 \
 345     }                                                                   \
 346   } while (0)
 347 #else
 348 #define FIX_CALL_DUMMY(dummyname, start_sp, fun, nargs, args, rettype, gcc_p)\
 349   do \
 350     { \
 351       ((int*)(dummyname))[11] |= ((unsigned long)(fun)) >> 16; \
 352       ((int*)(dummyname))[12] |= (unsigned short)(fun); \
 353       if (! mips_fpu) \
 354         { \
 355           ((int *) (dummyname))[3] = 0; \
 356           ((int *) (dummyname))[4] = 0; \
 357           ((int *) (dummyname))[5] = 0; \
 358           ((int *) (dummyname))[6] = 0; \
 359         } \
 360     } \
 361   while (0)
 362 #endif
 363
 364 /* There's a mess in stack frame creation.  See comments in blockframe.c
 365    near reference to INIT_FRAME_PC_FIRST.  */
 366
 367 #define INIT_FRAME_PC(fromleaf, prev) /* nada */
 368
 369 #define INIT_FRAME_PC_FIRST(fromleaf, prev) \
 370   (prev)->pc = ((fromleaf) ? SAVED_PC_AFTER_CALL ((prev)->next) : \
 371               (prev)->next ? FRAME_SAVED_PC ((prev)->next) : read_pc ());
 372
 373 /* Special symbol found in blocks associated with routines.  We can hang
 374    mips_extra_func_info_t's off of this.  */
 375
 376 #define MIPS_EFI_SYMBOL_NAME "__GDB_EFI_INFO__"
 377
 378 /* Specific information about a procedure.
 379    This overlays the MIPS's PDR records,
 380    mipsread.c (ab)uses this to save memory */
 381
 382 typedef struct mips_extra_func_info {
 383         long    numargs;        /* number of args to procedure (was iopt) */
 384         PDR     pdr;            /* Procedure descriptor record */
 385 } *mips_extra_func_info_t;
 386
 387 #define EXTRA_FRAME_INFO \
 388   mips_extra_func_info_t proc_desc; \
 389   int num_args;\
 390   struct frame_saved_regs *saved_regs;
 391
 392 #define INIT_EXTRA_FRAME_INFO(fromleaf, fci) init_extra_frame_info(fci)
 393
 394 #define PRINT_EXTRA_FRAME_INFO(fi) \
 395   { \
 396     if (fi && fi->proc_desc && fi->proc_desc->pdr.framereg < NUM_REGS) \
 397       printf_filtered (" frame pointer is at %s+%d\n", \
 398                        reg_names[fi->proc_desc->pdr.framereg], \
 399                                  fi->proc_desc->pdr.frameoffset); \
 400   }
 401
 402 /* It takes two values to specify a frame on the MIPS.  Sigh.
 403
 404    In fact, at the moment, the *PC* is the primary value that sets up
 405    a frame.  The PC is looked up to see what function it's in; symbol
 406    information from that function tells us which register is the frame
 407    pointer base, and what offset from there is the "virtual frame pointer".
 408    (This is usually an offset from SP.)  FIXME -- this should be cleaned
 409    up so that the primary value is the SP, and the PC is used to disambiguate
 410    multiple functions with the same SP that are at different stack levels. */
 411
 412 #define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
 413 /* FIXME:  Depends on equivalence between FRAME and "struct frame_info *",
 414    and equivalence between CORE_ADDR and FRAME_ADDR. */
 415 extern struct frame_info *setup_arbitrary_frame PARAMS ((int, CORE_ADDR *));
 416
 417 /* Convert a dbx stab register number (from `r' declaration) to a gdb REGNUM */
 418
 419 #define STAB_REG_TO_REGNUM(num) ((num) < 32 ? (num) : (num)+FP0_REGNUM-38)
 420
 421 /* Convert a ecoff register number to a gdb REGNUM */
 422
 423 #define ECOFF_REG_TO_REGNUM(num) ((num) < 32 ? (num) : (num)+FP0_REGNUM-32)