* valops.c (call_function_by_hand): Handle aligning stacks that
[deliverable/binutils-gdb.git] / gdb / config / pa / tm-hppa.h
1 /* Parameters for execution on any Hewlett-Packard PA-RISC machine.
2 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1995
3 Free Software Foundation, Inc.
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
23
24 /* Forward declarations of some types we use in prototypes */
25
26 #ifdef __STDC__
27 struct frame_info;
28 struct frame_saved_regs;
29 struct value;
30 struct type;
31 struct inferior_status;
32 #endif
33
34 /* Target system byte order. */
35
36 #define TARGET_BYTE_ORDER BIG_ENDIAN
37
38 /* By default assume we don't have to worry about software floating point. */
39 #ifndef SOFT_FLOAT
40 #define SOFT_FLOAT 0
41 #endif
42
43 /* Get at various relevent fields of an instruction word. */
44
45 #define MASK_5 0x1f
46 #define MASK_11 0x7ff
47 #define MASK_14 0x3fff
48 #define MASK_21 0x1fffff
49
50 /* This macro gets bit fields using HP's numbering (MSB = 0) */
51
52 #define GET_FIELD(X, FROM, TO) \
53 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
54
55 /* Watch out for NaNs */
56
57 #define IEEE_FLOAT
58
59 /* On the PA, any pass-by-value structure > 8 bytes is actually
60 passed via a pointer regardless of its type or the compiler
61 used. */
62
63 #define REG_STRUCT_HAS_ADDR(gcc_p,type) \
64 (TYPE_LENGTH (type) > 8)
65
66 #define USE_STRUCT_CONVENTION(gcc_p,type) (TYPE_LENGTH (type) > 8)
67
68 /* Offset from address of function to start of its code.
69 Zero on most machines. */
70
71 #define FUNCTION_START_OFFSET 0
72
73 /* Advance PC across any function entry prologue instructions
74 to reach some "real" code. */
75
76 #define SKIP_PROLOGUE(pc) pc = skip_prologue (pc)
77 extern CORE_ADDR skip_prologue PARAMS ((CORE_ADDR));
78
79 /* If PC is in some function-call trampoline code, return the PC
80 where the function itself actually starts. If not, return NULL. */
81
82 #define SKIP_TRAMPOLINE_CODE(pc) skip_trampoline_code (pc, NULL)
83
84 /* Return non-zero if we are in an appropriate trampoline. */
85
86 #define IN_SOLIB_CALL_TRAMPOLINE(pc, name) \
87 in_solib_call_trampoline (pc, name)
88 extern int in_solib_call_trampoline PARAMS ((CORE_ADDR, char *));
89
90 #define IN_SOLIB_RETURN_TRAMPOLINE(pc, name) \
91 in_solib_return_trampoline (pc, name)
92 extern int in_solib_return_trampoline PARAMS ((CORE_ADDR, char *));
93
94 /* Immediately after a function call, return the saved pc.
95 Can't go through the frames for this because on some machines
96 the new frame is not set up until the new function executes
97 some instructions. */
98
99 #undef SAVED_PC_AFTER_CALL
100 #define SAVED_PC_AFTER_CALL(frame) saved_pc_after_call (frame)
101 extern CORE_ADDR saved_pc_after_call PARAMS ((struct frame_info *));
102
103 /* Stack grows upward */
104
105 #define INNER_THAN >
106
107 /* Sequence of bytes for breakpoint instruction. */
108
109 #define BREAKPOINT {0x00, 0x01, 0x00, 0x04}
110
111 /* Amount PC must be decremented by after a breakpoint.
112 This is often the number of bytes in BREAKPOINT
113 but not always.
114
115 Not on the PA-RISC */
116
117 #define DECR_PC_AFTER_BREAK 0
118
119 /* return instruction is bv r0(rp) or bv,n r0(rp)*/
120
121 #define ABOUT_TO_RETURN(pc) ((read_memory_integer (pc, 4) | 0x2) == 0xE840C002)
122
123 /* Say how long (ordinary) registers are. This is a piece of bogosity
124 used in push_word and a few other places; REGISTER_RAW_SIZE is the
125 real way to know how big a register is. */
126
127 #define REGISTER_SIZE 4
128
129 /* Number of machine registers */
130
131 #define NUM_REGS 128
132
133 /* Initializer for an array of names of registers.
134 There should be NUM_REGS strings in this initializer. */
135
136 #define REGISTER_NAMES \
137 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
138 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
139 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1", \
140 "sp", "r31", "sar", "pcoqh", "pcsqh", "pcoqt", "pcsqt", \
141 "eiem", "iir", "isr", "ior", "ipsw", "goto", "sr4", "sr0", "sr1", "sr2", \
142 "sr3", "sr5", "sr6", "sr7", "cr0", "cr8", "cr9", "ccr", "cr12", "cr13", \
143 "cr24", "cr25", "cr26", "mpsfu_high", "mpsfu_low", "mpsfu_ovflo", "pad", \
144 "fpsr", "fpe1", "fpe2", "fpe3", "fpe4", "fpe5", "fpe6", "fpe7", \
145 "fr4", "fr4R", "fr5", "fr5R", "fr6", "fr6R", "fr7", "fr7R", \
146 "fr8", "fr8R", "fr9", "fr9R", "fr10", "fr10R", "fr11", "fr11R", \
147 "fr12", "fr12R", "fr13", "fr13R", "fr14", "fr14R", "fr15", "fr15R", \
148 "fr16", "fr16R", "fr17", "fr17R", "fr18", "fr18R", "fr19", "fr19R", \
149 "fr20", "fr20R", "fr21", "fr21R", "fr22", "fr22R", "fr23", "fr23R", \
150 "fr24", "fr24R", "fr25", "fr25R", "fr26", "fr26R", "fr27", "fr27R", \
151 "fr28", "fr28R", "fr29", "fr29R", "fr30", "fr30R", "fr31", "fr31R"}
152
153 /* Register numbers of various important registers.
154 Note that some of these values are "real" register numbers,
155 and correspond to the general registers of the machine,
156 and some are "phony" register numbers which are too large
157 to be actual register numbers as far as the user is concerned
158 but do serve to get the desired values when passed to read_register. */
159
160 #define R0_REGNUM 0 /* Doesn't actually exist, used as base for
161 other r registers. */
162 #define FLAGS_REGNUM 0 /* Various status flags */
163 #define RP_REGNUM 2 /* return pointer */
164 #define FP_REGNUM 3 /* Contains address of executing stack */
165 /* frame */
166 #define SP_REGNUM 30 /* Contains address of top of stack */
167 #define SAR_REGNUM 32 /* Shift Amount Register */
168 #define IPSW_REGNUM 41 /* Interrupt Processor Status Word */
169 #define PCOQ_HEAD_REGNUM 33 /* instruction offset queue head */
170 #define PCSQ_HEAD_REGNUM 34 /* instruction space queue head */
171 #define PCOQ_TAIL_REGNUM 35 /* instruction offset queue tail */
172 #define PCSQ_TAIL_REGNUM 36 /* instruction space queue tail */
173 #define EIEM_REGNUM 37 /* External Interrupt Enable Mask */
174 #define IIR_REGNUM 38 /* Interrupt Instruction Register */
175 #define IOR_REGNUM 40 /* Interrupt Offset Register */
176 #define SR4_REGNUM 43 /* space register 4 */
177 #define RCR_REGNUM 51 /* Recover Counter (also known as cr0) */
178 #define CCR_REGNUM 54 /* Coprocessor Configuration Register */
179 #define TR0_REGNUM 57 /* Temporary Registers (cr24 -> cr31) */
180 #define FP0_REGNUM 64 /* floating point reg. 0 */
181 #define FP4_REGNUM 72
182
183 /* compatibility with the rest of gdb. */
184 #define PC_REGNUM PCOQ_HEAD_REGNUM
185 #define NPC_REGNUM PCOQ_TAIL_REGNUM
186
187 /*
188 * Processor Status Word Masks
189 */
190
191 #define PSW_T 0x01000000 /* Taken Branch Trap Enable */
192 #define PSW_H 0x00800000 /* Higher-Privilege Transfer Trap Enable */
193 #define PSW_L 0x00400000 /* Lower-Privilege Transfer Trap Enable */
194 #define PSW_N 0x00200000 /* PC Queue Front Instruction Nullified */
195 #define PSW_X 0x00100000 /* Data Memory Break Disable */
196 #define PSW_B 0x00080000 /* Taken Branch in Previous Cycle */
197 #define PSW_C 0x00040000 /* Code Address Translation Enable */
198 #define PSW_V 0x00020000 /* Divide Step Correction */
199 #define PSW_M 0x00010000 /* High-Priority Machine Check Disable */
200 #define PSW_CB 0x0000ff00 /* Carry/Borrow Bits */
201 #define PSW_R 0x00000010 /* Recovery Counter Enable */
202 #define PSW_Q 0x00000008 /* Interruption State Collection Enable */
203 #define PSW_P 0x00000004 /* Protection ID Validation Enable */
204 #define PSW_D 0x00000002 /* Data Address Translation Enable */
205 #define PSW_I 0x00000001 /* External, Power Failure, Low-Priority */
206 /* Machine Check Interruption Enable */
207
208 /* When fetching register values from an inferior or a core file,
209 clean them up using this macro. BUF is a char pointer to
210 the raw value of the register in the registers[] array. */
211
212 #define CLEAN_UP_REGISTER_VALUE(regno, buf) \
213 do { \
214 if ((regno) == PCOQ_HEAD_REGNUM || (regno) == PCOQ_TAIL_REGNUM) \
215 (buf)[3] &= ~0x3; \
216 } while (0)
217
218 /* Define DO_REGISTERS_INFO() to do machine-specific formatting
219 of register dumps. */
220
221 #define DO_REGISTERS_INFO(_regnum, fp) pa_do_registers_info (_regnum, fp)
222 extern void pa_do_registers_info PARAMS ((int, int));
223
224 /* PA specific macro to see if the current instruction is nullified. */
225 #ifndef INSTRUCTION_NULLIFIED
226 #define INSTRUCTION_NULLIFIED ((int)read_register (IPSW_REGNUM) & 0x00200000)
227 #endif
228
229 /* Number of bytes of storage in the actual machine representation
230 for register N. On the PA-RISC, all regs are 4 bytes, including
231 the FP registers (they're accessed as two 4 byte halves). */
232
233 #define REGISTER_RAW_SIZE(N) 4
234
235 /* Total amount of space needed to store our copies of the machine's
236 register state, the array `registers'. */
237 #define REGISTER_BYTES (NUM_REGS * 4)
238
239 /* Index within `registers' of the first byte of the space for
240 register N. */
241
242 #define REGISTER_BYTE(N) (N) * 4
243
244 /* Number of bytes of storage in the program's representation
245 for register N. */
246
247 #define REGISTER_VIRTUAL_SIZE(N) REGISTER_RAW_SIZE(N)
248
249 /* Largest value REGISTER_RAW_SIZE can have. */
250
251 #define MAX_REGISTER_RAW_SIZE 4
252
253 /* Largest value REGISTER_VIRTUAL_SIZE can have. */
254
255 #define MAX_REGISTER_VIRTUAL_SIZE 8
256
257 /* Return the GDB type object for the "standard" data type
258 of data in register N. */
259
260 #define REGISTER_VIRTUAL_TYPE(N) \
261 ((N) < FP4_REGNUM ? builtin_type_int : builtin_type_float)
262
263 /* Store the address of the place in which to copy the structure the
264 subroutine will return. This is called from call_function. */
265
266 #define STORE_STRUCT_RETURN(ADDR, SP) {write_register (28, (ADDR)); }
267
268 /* Extract from an array REGBUF containing the (raw) register state
269 a function return value of type TYPE, and copy that, in virtual format,
270 into VALBUF.
271
272 FIXME: Not sure what to do for soft float here. */
273
274 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
275 { \
276 if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
277 memcpy ((VALBUF), \
278 ((char *)(REGBUF)) + REGISTER_BYTE (FP4_REGNUM), \
279 TYPE_LENGTH (TYPE)); \
280 else \
281 memcpy ((VALBUF), \
282 (char *)(REGBUF) + REGISTER_BYTE (28) + \
283 (TYPE_LENGTH (TYPE) >= 4 ? 0 : 4 - TYPE_LENGTH (TYPE)), \
284 TYPE_LENGTH (TYPE)); \
285 }
286
287 /* Write into appropriate registers a function return value
288 of type TYPE, given in virtual format.
289
290 For software floating point the return value goes into the integer
291 registers. But we don't have any flag to key this on, so we always
292 store the value into the integer registers, and if it's a float value,
293 then we put it in the float registers too. */
294
295 #define STORE_RETURN_VALUE(TYPE,VALBUF) \
296 write_register_bytes (REGISTER_BYTE (28),(VALBUF), TYPE_LENGTH (TYPE)) ; \
297 if (!SOFT_FLOAT) \
298 write_register_bytes ((TYPE_CODE(TYPE) == TYPE_CODE_FLT \
299 ? REGISTER_BYTE (FP4_REGNUM) \
300 : REGISTER_BYTE (28)), \
301 (VALBUF), TYPE_LENGTH (TYPE))
302
303 /* Extract from an array REGBUF containing the (raw) register state
304 the address in which a function should return its structure value,
305 as a CORE_ADDR (or an expression that can be used as one). */
306
307 #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
308 (*(int *)((REGBUF) + REGISTER_BYTE (28)))
309
310 /*
311 * This macro defines the register numbers (from REGISTER_NAMES) that
312 * are effectively unavailable to the user through ptrace(). It allows
313 * us to include the whole register set in REGISTER_NAMES (inorder to
314 * better support remote debugging). If it is used in
315 * fetch/store_inferior_registers() gdb will not complain about I/O errors
316 * on fetching these registers. If all registers in REGISTER_NAMES
317 * are available, then return false (0).
318 */
319
320 #define CANNOT_STORE_REGISTER(regno) \
321 ((regno) == 0) || \
322 ((regno) == PCSQ_HEAD_REGNUM) || \
323 ((regno) >= PCSQ_TAIL_REGNUM && (regno) < IPSW_REGNUM) || \
324 ((regno) > IPSW_REGNUM && (regno) < FP4_REGNUM)
325
326 #define INIT_EXTRA_FRAME_INFO(fromleaf, frame) init_extra_frame_info (fromleaf, frame)
327 extern void init_extra_frame_info PARAMS ((int, struct frame_info *));
328
329 /* Describe the pointer in each stack frame to the previous stack frame
330 (its caller). */
331
332 /* FRAME_CHAIN takes a frame's nominal address
333 and produces the frame's chain-pointer.
334
335 FRAME_CHAIN_COMBINE takes the chain pointer and the frame's nominal address
336 and produces the nominal address of the caller frame.
337
338 However, if FRAME_CHAIN_VALID returns zero,
339 it means the given frame is the outermost one and has no caller.
340 In that case, FRAME_CHAIN_COMBINE is not used. */
341
342 /* In the case of the PA-RISC, the frame's nominal address
343 is the address of a 4-byte word containing the calling frame's
344 address (previous FP). */
345
346 #define FRAME_CHAIN(thisframe) frame_chain (thisframe)
347 extern CORE_ADDR frame_chain PARAMS ((struct frame_info *));
348
349 #define FRAME_CHAIN_VALID(chain, thisframe) \
350 frame_chain_valid (chain, thisframe)
351 extern int frame_chain_valid PARAMS ((CORE_ADDR, struct frame_info *));
352
353 #define FRAME_CHAIN_COMBINE(chain, thisframe) (chain)
354
355 /* Define other aspects of the stack frame. */
356
357 /* A macro that tells us whether the function invocation represented
358 by FI does not have a frame on the stack associated with it. If it
359 does not, FRAMELESS is set to 1, else 0. */
360 #define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
361 (FRAMELESS) = frameless_function_invocation(FI)
362 extern int frameless_function_invocation PARAMS ((struct frame_info *));
363
364 #define FRAME_SAVED_PC(FRAME) frame_saved_pc (FRAME)
365
366 #define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
367
368 #define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
369 /* Set VAL to the number of args passed to frame described by FI.
370 Can set VAL to -1, meaning no way to tell. */
371
372 /* We can't tell how many args there are
373 now that the C compiler delays popping them. */
374 #define FRAME_NUM_ARGS(val,fi) (val = -1)
375
376 /* Return number of bytes at start of arglist that are not really args. */
377
378 #define FRAME_ARGS_SKIP 0
379
380 #define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
381 hppa_frame_find_saved_regs (frame_info, &frame_saved_regs)
382 extern void
383 hppa_frame_find_saved_regs PARAMS ((struct frame_info *,
384 struct frame_saved_regs *));
385
386 \f
387 /* Things needed for making the inferior call functions. */
388
389 /* Push an empty stack frame, to record the current PC, etc. */
390
391 #define PUSH_DUMMY_FRAME push_dummy_frame (&inf_status)
392 extern void push_dummy_frame PARAMS ((struct inferior_status *));
393
394 /* Discard from the stack the innermost frame,
395 restoring all saved registers. */
396 #define POP_FRAME hppa_pop_frame ()
397 extern void hppa_pop_frame PARAMS ((void));
398
399 #define INSTRUCTION_SIZE 4
400
401 #ifndef PA_LEVEL_0
402
403 /* Non-level zero PA's have space registers (but they don't always have
404 floating-point, do they???? */
405
406 /* This sequence of words is the instructions
407
408 ; Call stack frame has already been built by gdb. Since we could be calling
409 ; a varargs function, and we do not have the benefit of a stub to put things in
410 ; the right place, we load the first 4 word of arguments into both the general
411 ; and fp registers.
412 call_dummy
413 ldw -36(sp), arg0
414 ldw -40(sp), arg1
415 ldw -44(sp), arg2
416 ldw -48(sp), arg3
417 ldo -36(sp), r1
418 fldws 0(0, r1), fr4
419 fldds -4(0, r1), fr5
420 fldws -8(0, r1), fr6
421 fldds -12(0, r1), fr7
422 ldil 0, r22 ; FUNC_LDIL_OFFSET must point here
423 ldo 0(r22), r22 ; FUNC_LDO_OFFSET must point here
424 ldsid (0,r22), r4
425 ldil 0, r1 ; SR4EXPORT_LDIL_OFFSET must point here
426 ldo 0(r1), r1 ; SR4EXPORT_LDO_OFFSET must point here
427 ldsid (0,r1), r20
428 combt,=,n r4, r20, text_space ; If target is in data space, do a
429 ble 0(sr5, r22) ; "normal" procedure call
430 copy r31, r2
431 break 4, 8
432 mtsp r21, sr0
433 ble,n 0(sr0, r22)
434 text_space ; Otherwise, go through _sr4export,
435 ble (sr4, r1) ; which will return back here.
436 stw r31,-24(r30)
437 break 4, 8
438 mtsp r21, sr0
439 ble,n 0(sr0, r22)
440 nop ; To avoid kernel bugs
441 nop ; and keep the dummy 8 byte aligned
442
443 The dummy decides if the target is in text space or data space. If
444 it's in data space, there's no problem because the target can
445 return back to the dummy. However, if the target is in text space,
446 the dummy calls the secret, undocumented routine _sr4export, which
447 calls a function in text space and can return to any space. Instead
448 of including fake instructions to represent saved registers, we
449 know that the frame is associated with the call dummy and treat it
450 specially.
451
452 The trailing NOPs are needed to avoid a bug in HPUX, BSD and OSF1
453 kernels. If the memory at the location pointed to by the PC is
454 0xffffffff then a ptrace step call will fail (even if the instruction
455 is nullified).
456
457 The code to pop a dummy frame single steps three instructions
458 starting with the last mtsp. This includes the nullified "instruction"
459 following the ble (which is uninitialized junk). If the
460 "instruction" following the last BLE is 0xffffffff, then the ptrace
461 will fail and the dummy frame is not correctly popped.
462
463 By placing a NOP in the delay slot of the BLE instruction we can be
464 sure that we never try to execute a 0xffffffff instruction and
465 avoid the kernel bug. The second NOP is needed to keep the call
466 dummy 8 byte aligned. */
467
468 /* Define offsets into the call dummy for the target function address */
469 #define FUNC_LDIL_OFFSET (INSTRUCTION_SIZE * 9)
470 #define FUNC_LDO_OFFSET (INSTRUCTION_SIZE * 10)
471
472 /* Define offsets into the call dummy for the _sr4export address */
473 #define SR4EXPORT_LDIL_OFFSET (INSTRUCTION_SIZE * 12)
474 #define SR4EXPORT_LDO_OFFSET (INSTRUCTION_SIZE * 13)
475
476 #define CALL_DUMMY {0x4BDA3FB9, 0x4BD93FB1, 0x4BD83FA9, 0x4BD73FA1,\
477 0x37C13FB9, 0x24201004, 0x2C391005, 0x24311006,\
478 0x2C291007, 0x22C00000, 0x36D60000, 0x02C010A4,\
479 0x20200000, 0x34210000, 0x002010b4, 0x82842022,\
480 0xe6c06000, 0x081f0242, 0x00010004, 0x00151820,\
481 0xe6c00002, 0xe4202000, 0x6bdf3fd1, 0x00010004,\
482 0x00151820, 0xe6c00002, 0x08000240, 0x08000240}
483
484 #define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 28)
485
486 #else /* defined PA_LEVEL_0 */
487
488 /* This is the call dummy for a level 0 PA. Level 0's don't have space
489 registers (or floating point??), so we skip all that inter-space call stuff,
490 and avoid touching the fp regs.
491
492 call_dummy
493
494 ldw -36(%sp), %arg0
495 ldw -40(%sp), %arg1
496 ldw -44(%sp), %arg2
497 ldw -48(%sp), %arg3
498 ldil 0, %r31 ; FUNC_LDIL_OFFSET must point here
499 ldo 0(%r31), %r31 ; FUNC_LDO_OFFSET must point here
500 ble 0(%sr0, %r31)
501 copy %r31, %r2
502 break 4, 8
503 nop ; restore_pc_queue expects these
504 bv,n 0(%r22) ; instructions to be here...
505 nop
506 */
507
508 /* Define offsets into the call dummy for the target function address */
509 #define FUNC_LDIL_OFFSET (INSTRUCTION_SIZE * 4)
510 #define FUNC_LDO_OFFSET (INSTRUCTION_SIZE * 5)
511
512 #define CALL_DUMMY {0x4bda3fb9, 0x4bd93fb1, 0x4bd83fa9, 0x4bd73fa1,\
513 0x23e00000, 0x37ff0000, 0xe7e00000, 0x081f0242,\
514 0x00010004, 0x08000240, 0xeac0c002, 0x08000240}
515
516 #define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 12)
517
518 #endif
519
520 #define CALL_DUMMY_START_OFFSET 0
521
522 /*
523 * Insert the specified number of args and function address
524 * into a call sequence of the above form stored at DUMMYNAME.
525 *
526 * On the hppa we need to call the stack dummy through $$dyncall.
527 * Therefore our version of FIX_CALL_DUMMY takes an extra argument,
528 * real_pc, which is the location where gdb should start up the
529 * inferior to do the function call.
530 */
531
532 #define FIX_CALL_DUMMY hppa_fix_call_dummy
533
534 extern CORE_ADDR
535 hppa_fix_call_dummy PARAMS ((char *, CORE_ADDR, CORE_ADDR, int,
536 struct value **, struct type *, int));
537
538 #define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
539 sp = hppa_push_arguments(nargs, args, sp, struct_return, struct_addr)
540 extern CORE_ADDR
541 hppa_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int,
542 CORE_ADDR));
543 \f
544 /* The low two bits of the PC on the PA contain the privilege level. Some
545 genius implementing a (non-GCC) compiler apparently decided this means
546 that "addresses" in a text section therefore include a privilege level,
547 and thus symbol tables should contain these bits. This seems like a
548 bonehead thing to do--anyway, it seems to work for our purposes to just
549 ignore those bits. */
550 #define SMASH_TEXT_ADDRESS(addr) ((addr) &= ~0x3)
551
552 #define GDB_TARGET_IS_HPPA
553
554 #define BELIEVE_PCC_PROMOTION 1
555
556 /*
557 * Unwind table and descriptor.
558 */
559
560 struct unwind_table_entry {
561 unsigned int region_start;
562 unsigned int region_end;
563
564 unsigned int Cannot_unwind : 1;
565 unsigned int Millicode : 1;
566 unsigned int Millicode_save_sr0 : 1;
567 unsigned int Region_description : 2;
568 unsigned int reserved1 : 1;
569 unsigned int Entry_SR : 1;
570 unsigned int Entry_FR : 4; /* number saved */
571 unsigned int Entry_GR : 5; /* number saved */
572 unsigned int Args_stored : 1;
573 unsigned int Variable_Frame : 1;
574 unsigned int Separate_Package_Body : 1;
575 unsigned int Frame_Extension_Millicode:1;
576 unsigned int Stack_Overflow_Check : 1;
577 unsigned int Two_Instruction_SP_Increment:1;
578 unsigned int Ada_Region : 1;
579 /* Use this field to store a stub unwind type. */
580 #define stub_type reserved2
581 unsigned int reserved2 : 4;
582 unsigned int Save_SP : 1;
583 unsigned int Save_RP : 1;
584 unsigned int Save_MRP_in_frame : 1;
585 unsigned int extn_ptr_defined : 1;
586 unsigned int Cleanup_defined : 1;
587
588 unsigned int MPE_XL_interrupt_marker: 1;
589 unsigned int HP_UX_interrupt_marker: 1;
590 unsigned int Large_frame : 1;
591 unsigned int reserved4 : 2;
592 unsigned int Total_frame_size : 27;
593 };
594
595 /* HP linkers also generate unwinds for various linker-generated stubs.
596 GDB reads in the stubs from the $UNWIND_END$ subspace, then
597 "converts" them into normal unwind entries using some of the reserved
598 fields to store the stub type. */
599
600 struct stub_unwind_entry
601 {
602 /* The offset within the executable for the associated stub. */
603 unsigned stub_offset;
604
605 /* The type of stub this unwind entry describes. */
606 char type;
607
608 /* Unknown. Not needed by GDB at this time. */
609 char prs_info;
610
611 /* Length (in instructions) of the associated stub. */
612 short stub_length;
613 };
614
615 /* Sizes (in bytes) of the native unwind entries. */
616 #define UNWIND_ENTRY_SIZE 16
617 #define STUB_UNWIND_ENTRY_SIZE 8
618
619 /* The gaps represent linker stubs used in MPE and space for future
620 expansion. */
621 enum unwind_stub_types
622 {
623 LONG_BRANCH = 1,
624 PARAMETER_RELOCATION = 2,
625 EXPORT = 10,
626 IMPORT = 11,
627 };
628
629
630 /* Info about the unwind table associated with an object file. This is hung
631 off of the objfile->obj_private pointer, and is allocated in the objfile's
632 psymbol obstack. This allows us to have unique unwind info for each
633 executable and shared library that we are debugging. */
634
635 struct obj_unwind_info {
636 struct unwind_table_entry *table; /* Pointer to unwind info */
637 struct unwind_table_entry *cache; /* Pointer to last entry we found */
638 int last; /* Index of last entry */
639 };
640
641 #define OBJ_UNWIND_INFO(obj) ((struct obj_unwind_info *)obj->obj_private)
642
643 extern CORE_ADDR target_read_pc PARAMS ((int));
644 extern void target_write_pc PARAMS ((CORE_ADDR, int));
645 extern CORE_ADDR skip_trampoline_code PARAMS ((CORE_ADDR, char *));
646
647 #define TARGET_READ_PC(pid) target_read_pc (pid)
648 #define TARGET_WRITE_PC(v,pid) target_write_pc (v,pid)
649
650 /* For a number of horrible reasons we may have to adjust the location
651 of variables on the stack. Ugh. */
652 #define HPREAD_ADJUST_STACK_ADDRESS(ADDR) hpread_adjust_stack_address(ADDR)
653
654 extern int hpread_adjust_stack_address PARAMS ((CORE_ADDR));
655
656 /* If the current gcc for for this target does not produce correct debugging
657 information for float parameters, both prototyped and unprototyped, then
658 define this macro. This forces gdb to always assume that floats are
659 passed as doubles and then converted in the callee.
660
661 For the pa, it appears that the debug info marks the parameters as
662 floats regardless of whether the function is prototyped, but the actual
663 values are passed as doubles for the non-prototyped case and floats for
664 the prototyped case. Thus we choose to make the non-prototyped case work
665 for C and break the prototyped case, since the non-prototyped case is
666 probably much more common. (FIXME). */
667
668 #define COERCE_FLOAT_TO_DOUBLE (current_language -> la_language == language_c)
669
670 #define STACK_ALIGN(ADDR) (((ADDR) + 7) & -8)
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