Ongoing multi-arch conversion for HP/UX.
[deliverable/binutils-gdb.git] / gdb / config / pa / tm-hppa64.h
1 /* Parameters for execution on any Hewlett-Packard PA-RISC machine.
2 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1995, 1999, 2000
3 Free Software Foundation, Inc.
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
23
24 /* PA 64-bit specific definitions. Override those which are in
25 tm-hppa.h */
26
27 /* jimb: this must go. I'm just using it to disable code I haven't
28 gotten working yet. */
29 #define GDB_TARGET_IS_HPPA_20W
30
31 /* FIXME: brobecker 2003-04-21: Although 32bit hppa is partially multiarched,
32 the conversion for hppa64 hasn't been completed yet. */
33 #define GDB_MULTI_ARCH 0
34
35 #include "pa/tm-hppah.h"
36
37 #define HPUX_1100 1
38
39 /* The low two bits of the IA are the privilege level of the instruction. */
40 #define ADDR_BITS_REMOVE(addr) ((CORE_ADDR)addr & (CORE_ADDR)~3)
41
42 /* Say how long (ordinary) registers are. This is used in
43 push_word and a few other places, but REGISTER_RAW_SIZE is
44 the real way to know how big a register is. */
45
46 #undef REGISTER_SIZE
47 #define REGISTER_SIZE 8
48
49 /* Number of bytes of storage in the actual machine representation
50 for register N. On the PA-RISC 2.0, all regs are 8 bytes, including
51 the FP registers (they're accessed as two 4 byte halves). */
52
53 #undef REGISTER_RAW_SIZE
54 #define REGISTER_RAW_SIZE(N) 8
55
56 /* Largest value REGISTER_RAW_SIZE can have. */
57
58 #undef DEPRECATED_MAX_REGISTER_RAW_SIZE
59 #define DEPRECATED_MAX_REGISTER_RAW_SIZE 8
60
61 /* Total amount of space needed to store our copies of the machine's
62 register state, the array `registers'. */
63
64 #undef REGISTER_BYTES
65 #define REGISTER_BYTES (NUM_REGS * 8)
66
67 /* Index within `registers' of the first byte of the space for
68 register N. */
69
70 #undef REGISTER_BYTE
71 #define REGISTER_BYTE(N) ((N) * 8)
72
73 #undef REGISTER_VIRTUAL_TYPE
74 #define REGISTER_VIRTUAL_TYPE(N) \
75 ((N) < FP4_REGNUM ? builtin_type_unsigned_long_long : builtin_type_double)
76
77
78 /* Number of machine registers */
79 #undef NUM_REGS
80 #define NUM_REGS 96
81
82 /* Initializer for an array of names of registers.
83 There should be NUM_REGS strings in this initializer.
84 They are in rows of eight entries */
85 #undef REGISTER_NAMES
86 #define REGISTER_NAMES \
87 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", \
88 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
89 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
90 "r24", "r25", "r26", "dp", "ret0", "ret1", "sp", "r31", \
91 "sar", "pcoqh", "pcsqh", "pcoqt", "pcsqt", "eiem", "iir", "isr", \
92 "ior", "ipsw", "goto", "sr4", "sr0", "sr1", "sr2", "sr3", \
93 "sr5", "sr6", "sr7", "cr0", "cr8", "cr9", "ccr", "cr12", \
94 "cr13", "cr24", "cr25", "cr26", "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",\
95 "fpsr", "fpe1", "fpe2", "fpe3", "fr4", "fr5", "fr6", "fr7", \
96 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", \
97 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23", \
98 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"}
99
100 #undef FP0_REGNUM
101 #undef FP4_REGNUM
102 #define FP0_REGNUM 64 /* floating point reg. 0 (fspr)*/
103 #define FP4_REGNUM 68
104
105 /* Redefine some target bit sizes from the default. */
106
107 /* Number of bits in a long or unsigned long for the target machine. */
108
109 #define TARGET_LONG_BIT 64
110
111 /* Number of bits in a long long or unsigned long long for the
112 target machine. */
113
114 #define TARGET_LONG_LONG_BIT 64
115
116 /* Number of bits in a pointer for the target machine */
117
118 #define TARGET_PTR_BIT 64
119
120 /* Argument Pointer Register */
121 #define AP_REGNUM 29
122
123 #define DP_REGNUM 27
124
125 #define FP5_REGNUM 70
126
127 #define SR5_REGNUM 48
128
129 /* We access locals from SP. This may not work for frames which call
130 alloca; for those, we may need to consult unwind tables.
131 jimb: FIXME. */
132 #undef FRAME_LOCALS_ADDRESS
133 #define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
134
135 /* For a number of horrible reasons we may have to adjust the location
136 of variables on the stack. Ugh. jimb: why? */
137 #define HPREAD_ADJUST_STACK_ADDRESS(ADDR) hpread_adjust_stack_address(ADDR)
138
139 extern int hpread_adjust_stack_address (CORE_ADDR);
140
141
142 /* jimb: omitted dynamic linking stuff here */
143
144 /* This sequence of words is the instructions
145
146 ; Call stack frame has already been built by gdb. Since we could be calling
147 ; a varargs function, and we do not have the benefit of a stub to put things in
148 ; the right place, we load the first 8 word of arguments into both the general
149 ; and fp registers.
150 call_dummy
151 nop
152 copy %r4,%r29
153 copy %r5,%r22
154 copy %r6,%r27
155 fldd -64(0,%r29),%fr4
156 fldd -56(0,%r29),%fr5
157 fldd -48(0,%r29),%fr6
158 fldd -40(0,%r29),%fr7
159 fldd -32(0,%r29),%fr8
160 fldd -24(0,%r29),%fr9
161 fldd -16(0,%r29),%fr10
162 fldd -8(0,%r29),%fr11
163 copy %r22,%r1
164 ldd -64(%r29), %r26
165 ldd -56(%r29), %r25
166 ldd -48(%r29), %r24
167 ldd -40(%r29), %r23
168 ldd -32(%r29), %r22
169 ldd -24(%r29), %r21
170 ldd -16(%r29), %r20
171 bve,l (%r1),%r2
172 ldd -8(%r29), %r19
173 break 4, 8
174 mtsp %r21, %sr0
175 ble 0(%sr0, %r22)
176 nop
177 */
178
179 /* Call dummys are sized and written out in word sized hunks. So we have
180 to pack the instructions into words. Ugh. */
181 #undef CALL_DUMMY
182 #define CALL_DUMMY {0x08000240349d0000LL, 0x34b6000034db0000LL, \
183 0x53a43f8353a53f93LL, 0x53a63fa353a73fb3LL,\
184 0x53a83fc353a93fd3LL, 0x2fa1100a2fb1100bLL,\
185 0x36c1000053ba3f81LL, 0x53b93f9153b83fa1LL,\
186 0x53b73fb153b63fc1LL, 0x53b53fd10fa110d4LL,\
187 0xe820f0000fb110d3LL, 0x0001000400151820LL,\
188 0xe6c0000008000240LL}
189
190 #define CALL_DUMMY_BREAKPOINT_OFFSET 22 * 4
191
192 /* CALL_DUMMY_LENGTH is computed based on the size of a word on the target
193 machine, not the size of an instruction. Since a word on this target
194 holds two instructions we have to divide the instruction size by two to
195 get the word size of the dummy. */
196 #undef CALL_DUMMY_LENGTH
197 #define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 26 / 2)
198
199 /* The PA64 ABI mandates a 16 byte stack alignment. */
200 #undef STACK_ALIGN
201 #define STACK_ALIGN(arg) ( ((arg)%16) ? (((arg)+15)&-16) : (arg))
202
203 /* The PA64 ABI reserves 64 bytes of stack space for outgoing register
204 parameters. */
205 #undef REG_PARM_STACK_SPACE
206 #define REG_PARM_STACK_SPACE 64
207
208 /* Use the 64-bit calling conventions designed for the PA2.0 in wide mode. */
209 #define PA20W_CALLING_CONVENTIONS
210
211 #undef FUNC_LDIL_OFFSET
212 #undef FUNC_LDO_OFFSET
213 #undef SR4EXPORT_LDIL_OFFSET
214 #undef SR4EXPORT_LDO_OFFSET
215
216 #undef REG_STRUCT_HAS_ADDR
217
218 #undef DEPRECATED_EXTRACT_RETURN_VALUE
219 /* RM: floats are returned in FR4R, doubles in FR4
220 * integral values are in r28, padded on the left
221 * aggregates less that 65 bits are in r28, right padded
222 * aggregates upto 128 bits are in r28 and r29, right padded
223 */
224 #define DEPRECATED_EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
225 { \
226 if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
227 memcpy ((VALBUF), \
228 ((char *)(REGBUF)) + REGISTER_BYTE (FP4_REGNUM) + \
229 (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
230 TYPE_LENGTH (TYPE)); \
231 else if (is_integral_type(TYPE) || SOFT_FLOAT) \
232 memcpy ((VALBUF), \
233 (char *)(REGBUF) + REGISTER_BYTE (28) + \
234 (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
235 TYPE_LENGTH (TYPE)); \
236 else if (TYPE_LENGTH (TYPE) <= 8) \
237 memcpy ((VALBUF), \
238 (char *)(REGBUF) + REGISTER_BYTE (28), \
239 TYPE_LENGTH (TYPE)); \
240 else if (TYPE_LENGTH (TYPE) <= 16) \
241 { \
242 memcpy ((VALBUF), \
243 (char *)(REGBUF) + REGISTER_BYTE (28), \
244 8); \
245 memcpy (((char *) VALBUF + 8), \
246 (char *)(REGBUF) + REGISTER_BYTE (29), \
247 TYPE_LENGTH (TYPE) - 8); \
248 } \
249 }
250
251 /* RM: struct upto 128 bits are returned in registers */
252 #undef USE_STRUCT_CONVENTION
253 #define USE_STRUCT_CONVENTION(gcc_p, value_type)\
254 (TYPE_LENGTH (value_type) > 16)
255
256 /* RM: for return command */
257 #undef DEPRECATED_STORE_RETURN_VALUE
258 #define DEPRECATED_STORE_RETURN_VALUE(TYPE,VALBUF) \
259 { \
260 if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
261 deprecated_write_register_bytes \
262 (REGISTER_BYTE (FP4_REGNUM) + \
263 (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
264 (VALBUF), \
265 TYPE_LENGTH (TYPE)); \
266 else if (is_integral_type(TYPE) || SOFT_FLOAT) \
267 deprecated_write_register_bytes \
268 (REGISTER_BYTE (28) + \
269 (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
270 (VALBUF), \
271 TYPE_LENGTH (TYPE)); \
272 else if (TYPE_LENGTH (TYPE) <= 8) \
273 deprecated_write_register_bytes \
274 ( REGISTER_BYTE (28), \
275 (VALBUF), \
276 TYPE_LENGTH (TYPE)); \
277 else if (TYPE_LENGTH (TYPE) <= 16) \
278 { \
279 deprecated_write_register_bytes \
280 (REGISTER_BYTE (28), \
281 (VALBUF), \
282 8); \
283 deprecated_write_register_bytes \
284 (REGISTER_BYTE (29), \
285 ((char *) VALBUF + 8), \
286 TYPE_LENGTH (TYPE) - 8); \
287 } \
288 }
289
290 /* RM: these are the PA64 equivalents of the macros in tm-hppah.h --
291 * see comments there. For PA64, the save_state structure is at an
292 * offset of 24 32-bit words from the sigcontext structure. The 64 bit
293 * general registers are at an offset of 640 bytes from the beginning of the
294 * save_state structure, and the floating pointer register are at an offset
295 * of 256 bytes from the beginning of the save_state structure.
296 */
297 #undef FRAME_SAVED_PC_IN_SIGTRAMP
298 #define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
299 { \
300 *(TMP) = read_memory_integer ((FRAME)->frame + (24 * 4) + 640 + (33 * 8), 8); \
301 }
302
303 #undef FRAME_BASE_BEFORE_SIGTRAMP
304 #define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
305 { \
306 *(TMP) = read_memory_integer ((FRAME)->frame + (24 * 4) + 640 + (30 * 8), 8); \
307 }
308
309 #undef FRAME_FIND_SAVED_REGS_IN_SIGTRAMP
310 #define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
311 { \
312 int i; \
313 CORE_ADDR TMP1, TMP2; \
314 TMP1 = (FRAME)->frame + (24 * 4) + 640; \
315 TMP2 = (FRAME)->frame + (24 * 4) + 256; \
316 for (i = 0; i < NUM_REGS; i++) \
317 { \
318 if (i == SP_REGNUM) \
319 (FSR)[SP_REGNUM] = read_memory_integer (TMP1 + SP_REGNUM * 8, 8); \
320 else if (i >= FP0_REGNUM) \
321 (FSR)[i] = TMP2 + (i - FP0_REGNUM) * 8; \
322 else \
323 (FSR)[i] = TMP1 + i * 8; \
324 } \
325 }
326
327 /* jimb: omitted purify call support */
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