gdb/config/sparc/tm-sp64.h

   1 /* Target machine sub-parameters for SPARC64, for GDB, the GNU debugger.
   2    This is included by other tm-*.h files to define SPARC cpu-related info.
   3    Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
   4    This is (obviously) based on the SPARC Vn (n<9) port.
   5    Contributed by Doug Evans (dje@cygnus.com).
   6
   7 This file is part of GDB.
   8
   9 This program is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2 of the License, or
  12 (at your option) any later version.
  13
  14 This program is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with this program; if not, write to the Free Software
  21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
  22
  23 #include "sparc/tm-sparc.h"
  24
  25 /* We have long longs.  */
  26 #define LONG_LONG
  27
  28 /* When passing a structure to a function, Sun cc passes the address
  29    in a register, not the structure itself.  It (under SunOS4) creates
  30    two symbols, so we get a LOC_ARG saying the address is on the stack
  31    (a lie, and a serious one since we don't know which register to
  32    use), and a LOC_REGISTER saying that the struct is in a register
  33    (sort of a lie, but fixable with REG_STRUCT_HAS_ADDR).  Gcc version
  34    two (as of 1.92) behaves like sun cc.  REG_STRUCT_HAS_ADDR is smart
  35    enough to distinguish between Sun cc, gcc version 1 and gcc version 2.
  36
  37    This still doesn't work if the argument is not one passed in a
  38    register (i.e. it's the 7th or later argument).  */
  39
  40 #undef  REG_STRUCT_HAS_ADDR
  41 #define REG_STRUCT_HAS_ADDR(gcc_p) (gcc_p != 1)
  42 #undef  STRUCT_ARG_SYM_GARBAGE
  43 #define STRUCT_ARG_SYM_GARBAGE(gcc_p) (gcc_p != 1)
  44
  45 /* Stack has strict alignment.  */
  46
  47 #undef  STACK_ALIGN
  48 #define STACK_ALIGN(ADDR) (((ADDR)+15)&-16)
  49
  50 /* Nonzero if instruction at PC is a return instruction.  */
  51 /* For SPARC, this is either a "jmpl %o7+8,%g0" or "jmpl %i7+8,%g0".
  52
  53    Note: this does not work for functions returning structures under SunOS.
  54    This should work for v9, however.  */
  55 #undef  ABOUT_TO_RETURN
  56 #define ABOUT_TO_RETURN(pc) \
  57   ((read_memory_integer (pc, 4)|0x00040000) == 0x81c7e008)
  58
  59 /* Say how long (ordinary) registers are.  */
  60
  61 #undef  REGISTER_TYPE
  62 #define REGISTER_TYPE long long
  63
  64 /* Number of machine registers */
  65
  66 #undef  NUM_REGS
  67 #define NUM_REGS 127
  68
  69 /* Initializer for an array of names of registers.
  70    There should be NUM_REGS strings in this initializer.  */
  71 /* Some of these registers are only accessible from priviledged mode.
  72    They are here for kernel debuggers, etc.  */
  73 /* FIXME: icc and xcc are currently considered separate registers.
  74    This may have to change and consider them as just one (ccr).
  75    Let's postpone this as long as we can.  */
  76 /* FIXME: fcc0-3 are currently separate, even though they are also part of
  77    fsr.  May have to remove them but let's postpone this as long as
  78    possible.  */
  79 /* FIXME: cle and tle are new registers that haven't entered the docs yet.
  80    They stand for "current little endian format" and "trap little endian
  81    format".  */
  82
  83 #undef  REGISTER_NAMES
  84 #define REGISTER_NAMES  \
  85 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",       \
  86   "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",       \
  87   "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",       \
  88   "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",       \
  89                                                                 \
  90   "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",               \
  91   "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",         \
  92   "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",       \
  93   "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",       \
  94   "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",       \
  95   "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",       \
  96                                                                 \
  97   "ccr", "y", "pc", "npc", "asi", "cle", "tle",                 \
  98   "fsr", "fprs", "ver", "tick", "pil", "pstate", "wstate",      \
  99   "tba", "tl", "tt", "tpc", "tnpc", "tstate",                   \
 100   "cwp", "cansave", "canrestore", "cleanwin", "otherwin",       \
 101   "asr16", "asr17", "asr18", "asr19", "asr20", "asr21",         \
 102   "asr22", "asr23", "asr24", "asr25", "asr26", "asr27",         \
 103   "asr28", "asr29", "asr30", "asr31",                           \
 104   /* These are here at the end to simplify removing them if we have to.  */ \
 105   "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3"                  \
 106 }
 107
 108 /* Register numbers of various important registers.
 109    Note that some of these values are "real" register numbers,
 110    and correspond to the general registers of the machine,
 111    and some are "phony" register numbers which are too large
 112    to be actual register numbers as far as the user is concerned
 113    but do serve to get the desired values when passed to read_register.  */
 114
 115 #if 0 /* defined in tm-sparc.h, replicated for doc purposes */
 116 #define G0_REGNUM 0             /* %g0 */
 117 #define G1_REGNUM 1             /* %g1 */
 118 #define O0_REGNUM 8             /* %o0 */
 119 #define SP_REGNUM 14            /* Contains address of top of stack, \
 120                                    which is also the bottom of the frame.  */
 121 #define RP_REGNUM 15            /* Contains return address value, *before* \
 122                                    any windows get switched.  */
 123 #define O7_REGNUM 15            /* Last local reg not saved on stack frame */
 124 #define L0_REGNUM 16            /* First local reg that's saved on stack frame
 125                                    rather than in machine registers */
 126 #define I0_REGNUM 24            /* %i0 */
 127 #define FP_REGNUM 30            /* Contains address of executing stack frame */
 128 #define I7_REGNUM 31            /* Last local reg saved on stack frame */
 129 #define FP0_REGNUM 32           /* Floating point register 0 */
 130 #endif
 131
 132 #define FP_MAX_REGNUM 80        /* 1 + last fp reg number */
 133
 134 /* #undef v8 misc. regs */
 135
 136 #undef Y_REGNUM
 137 #undef PS_REGNUM
 138 #undef WIM_REGNUM
 139 #undef TBR_REGNUM
 140 #undef PC_REGNUM
 141 #undef NPC_REGNUM
 142 #undef FPS_REGNUM
 143 #undef CPS_REGNUM
 144
 145 /* v9 misc. and priv. regs */
 146
 147 #define C0_REGNUM 80                            /* Start of control registers */
 148 #define CCR_REGNUM (C0_REGNUM + 0)              /* Condition Code Register (%xcc,%icc) */
 149 #define Y_REGNUM (C0_REGNUM + 1)                /* Temp register for multiplication, etc.  */
 150 #define PC_REGNUM (C0_REGNUM + 2)               /* floating point condition code reg 2 */
 151 #define NPC_REGNUM (C0_REGNUM + 3)              /* floating point condition code reg 2 */
 152 #define ASI_REGNUM (C0_REGNUM + 4)              /* Alternate Space Identifier */
 153 #define CLE_REGNUM (C0_REGNUM + 5)              /* Current Little Endian format */
 154 #define TLE_REGNUM (C0_REGNUM + 6)              /* Trap Little Endian format */
 155 #define FSR_REGNUM (C0_REGNUM + 7)              /* Floating Point State */
 156 #define FPRS_REGNUM (C0_REGNUM + 8)             /* Floating Point Registers State */
 157 #define VER_REGNUM (C0_REGNUM + 9)              /* Version register */
 158 #define TICK_REGNUM (C0_REGNUM + 10)            /* Tick register */
 159 #define PIL_REGNUM (C0_REGNUM + 11)             /* Processor Interrupt Level */
 160 #define PSTATE_REGNUM (C0_REGNUM + 12)          /* Processor State */
 161 #define WSTATE_REGNUM (C0_REGNUM + 13)          /* Window State */
 162 #define TBA_REGNUM (C0_REGNUM + 14)             /* floating point condition code reg 3 */
 163 #define TL_REGNUM (C0_REGNUM + 15)              /* Trap Level */
 164 #define TT_REGNUM (C0_REGNUM + 16)              /* Trap Type */
 165 #define TPC_REGNUM (C0_REGNUM + 17)             /* Trap pc */
 166 #define TNPC_REGNUM (C0_REGNUM + 18)            /* Trap npc */
 167 #define TSTATE_REGNUM (C0_REGNUM + 19)          /* Trap State */
 168 #define CWP_REGNUM (C0_REGNUM + 20)             /* Current Window Pointer */
 169 #define CANSAVE_REGNUM (C0_REGNUM + 21)         /* Savable Windows */
 170 #define CANRESTORE_REGNUM (C0_REGNUM + 22)      /* Restorable Windows */
 171 #define CLEANWIN_REGNUM (C0_REGNUM + 23)        /* Clean Windows */
 172 #define OTHERWIN_REGNUM (C0_REGNUM + 24)        /* Other Windows */
 173 #define ASR_REGNUM(n) (C0_REGNUM+(25-16)+(n))   /* Ancillary State Register
 174                                                    (n = 16...31) */
 175 #define ICC_REGNUM (C0_REGNUM + 41)             /* 32 bit condition codes */
 176 #define XCC_REGNUM (C0_REGNUM + 42)             /* 64 bit condition codes */
 177 #define FCC0_REGNUM (C0_REGNUM + 43)            /* floatpoint condition code reg 0 */
 178 #define FCC1_REGNUM (C0_REGNUM + 44)            /* floating point condition code reg 0 */
 179 #define FCC2_REGNUM (C0_REGNUM + 45)            /* floating point condition code reg 1 */
 180 #define FCC3_REGNUM (C0_REGNUM + 46)            /* floating point condition code reg 2 */
 181
 182 /* FIXME: PS_REGNUM is for a priviledged v8 register which doesn't exist
 183    in v9 (in the same form).  We use bits of sparc-tdep.c which requires
 184    PS_REGNUM.  So define it here to be an unused ASR reg so sparc-tdep.c will
 185    compile.  What we really want to do is put some conditionals in sparc-tdep.c
 186    (run time or compile time) or separate the v8 stuff out of sparc-tdep.c.  */
 187
 188 #define PS_REGNUM (ASR_REGNUM (31))
 189
 190 /* Total amount of space needed to store our copies of the machine's
 191    register state, the array `registers'.
 192    Some of the registers aren't 64 bits, but it's a lot simpler just to assume
 193    they all are (since most of them are).  */
 194 #undef  REGISTER_BYTES
 195 #define REGISTER_BYTES (32*8+32*8+47*8)
 196
 197 /* Index within `registers' of the first byte of the space for
 198    register N.  */
 199 #undef  REGISTER_BYTE
 200 #define REGISTER_BYTE(N) \
 201   ((N) < 32 ? (N)*8                             \
 202    : (N) < 64 ? 32*8 + ((N)-32)*4               \
 203    : (N) < C0_REGNUM ? 32*8 + 32*4 + ((N)-64)*8 \
 204    : 64*8 + ((N)-C0_REGNUM)*8)
 205
 206 /* Number of bytes of storage in the actual machine representation
 207    for register N.  */
 208
 209 #undef  REGISTER_RAW_SIZE
 210 #define REGISTER_RAW_SIZE(N) (8)
 211
 212 /* Number of bytes of storage in the program's representation
 213    for register N.  */
 214
 215 #undef  REGISTER_VIRTUAL_SIZE
 216 #define REGISTER_VIRTUAL_SIZE(N) (8)
 217
 218 /* Largest value REGISTER_RAW_SIZE can have.  */
 219 /* tm-sparc.h defines this as 8, but play it safe.  */
 220
 221 #undef  MAX_REGISTER_RAW_SIZE
 222 #define MAX_REGISTER_RAW_SIZE (8)
 223
 224 /* Largest value REGISTER_VIRTUAL_SIZE can have.  */
 225 /* tm-sparc.h defines this as 8, but play it safe.  */
 226
 227 #undef  MAX_REGISTER_VIRTUAL_SIZE
 228 #define MAX_REGISTER_VIRTUAL_SIZE (8)
 229
 230 /* Convert data from raw format for register REGNUM
 231    to virtual format for register REGNUM.  */
 232 /* ??? Remove when tm-sparc.h is fixed.  */
 233
 234 #undef  REGISTER_CONVERT_TO_VIRTUAL
 235 #define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,FROM,TO) \
 236 { memcpy ((TO), (FROM), REGISTER_RAW_SIZE (0)); }
 237
 238 /* Convert data from virtual format for register REGNUM
 239    to raw format for register REGNUM.  */
 240 /* ??? Remove when tm-sparc.h is fixed.  */
 241
 242 #undef  REGISTER_CONVERT_TO_RAW
 243 #define REGISTER_CONVERT_TO_RAW(REGNUM,FROM,TO) \
 244 { memcpy ((TO), (FROM), REGISTER_RAW_SIZE (0)); }
 245
 246 /* Return the GDB type object for the "standard" data type
 247    of data in register N.  */
 248
 249 #undef  REGISTER_VIRTUAL_TYPE
 250 #define REGISTER_VIRTUAL_TYPE(N) \
 251  ((N) < 32 ? builtin_type_long_long : (N) < 80 ? builtin_type_float : \
 252   builtin_type_long_long)
 253
 254 /* We try to support both 32 bit and 64 bit pointers.  */
 255 /* FIXME: This is important for the present.  Don't remove until things
 256    settle.  */
 257 extern int target_ptr_bit;
 258 #undef  TARGET_PTR_BIT
 259 #define TARGET_PTR_BIT target_ptr_bit
 260
 261 /* Store the address of the place in which to copy the structure the
 262    subroutine will return.  This is called from call_function. */
 263 /* FIXME: V9 uses %o0 for this.  */
 264
 265 #undef  STORE_STRUCT_RETURN
 266 #define STORE_STRUCT_RETURN(ADDR, SP) \
 267   { target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); }
 268
 269 /* Extract from an array REGBUF containing the (raw) register state
 270    a function return value of type TYPE, and copy that, in virtual format,
 271    into VALBUF.  */ /* FIXME */
 272
 273 #undef  EXTRACT_RETURN_VALUE
 274 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF)              \
 275   {                                                                        \
 276     if (TYPE_CODE (TYPE) == TYPE_CODE_FLT)                                 \
 277       {                                                                    \
 278         memcpy ((VALBUF), ((int *)(REGBUF))+FP0_REGNUM, TYPE_LENGTH(TYPE));\
 279       }                                                                    \
 280     else                                                                   \
 281       memcpy ((VALBUF),                                                    \
 282               (char *)(REGBUF) + 8 * 8 +                                   \
 283               (TYPE_LENGTH(TYPE) >= 8 ? 0 : 8 - TYPE_LENGTH(TYPE)),        \
 284               TYPE_LENGTH(TYPE));                                          \
 285   }
 286
 287 /* Extract from an array REGBUF containing the (raw) register state
 288    the address in which a function should return its structure value,
 289    as a CORE_ADDR (or an expression that can be used as one).  */
 290
 291 #undef  EXTRACT_STRUCT_VALUE_ADDRESS
 292 #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
 293   (sparc64_extract_struct_value_address (REGBUF))
 294
 295 extern CORE_ADDR
 296 sparc64_extract_struct_value_address PARAMS ((char [REGISTER_BYTES]));
 297
 298 /* Return number of bytes at start of arglist that are not really args.  */
 299
 300 #undef  FRAME_ARGS_SKIP
 301 #define FRAME_ARGS_SKIP 136
 302 \f
 303 /* Sparc has no reliable single step ptrace call */
 304
 305 #undef  NO_SINGLE_STEP
 306 #define NO_SINGLE_STEP 1
 307 extern void single_step ();
 308
 309 /* We need two arguments (in general) to the "info frame" command.
 310    Note that the definition of this macro implies that there exists a
 311    function "setup_arbitrary_frame" in sparc-tdep.c */
 312
 313 #undef  SETUP_ARBITRARY_FRAME           /*FIXME*/
 314 #undef  FRAME_SPECIFICATION_DYADIC
 315 #define FRAME_SPECIFICATION_DYADIC
 316
 317 /* To print every pair of float registers as a double, we use this hook.
 318    We also print the condition code registers in a readable format
 319    (FIXME: can expand this to all control regs).  */
 320
 321 #undef  PRINT_REGISTER_HOOK
 322 #define PRINT_REGISTER_HOOK(regno)      \
 323   sparc_print_register_hook (regno)
 324
 325 /* Offsets into jmp_buf.
 326    FIXME: This was borrowed from the v8 stuff and will probably have to change
 327    for v9.  */
 328
 329 #define JB_ELEMENT_SIZE 8       /* Size of each element in jmp_buf */
 330
 331 #define JB_ONSSTACK 0
 332 #define JB_SIGMASK 1
 333 #define JB_SP 2
 334 #define JB_PC 3
 335 #define JB_NPC 4
 336 #define JB_PSR 5
 337 #define JB_G1 6
 338 #define JB_O0 7
 339 #define JB_WBCNT 8
 340
 341 /* Figure out where the longjmp will land.  We expect that we have just entered
 342    longjmp and haven't yet setup the stack frame, so the args are still in the
 343    output regs.  %o0 (O0_REGNUM) points at the jmp_buf structure from which we
 344    extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
 345    This routine returns true on success */
 346
 347 extern int
 348 get_longjmp_target PARAMS ((CORE_ADDR *));
 349
 350 #define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)