gdb/config/sparc/tm-sparclet.h

   1 /* Target machine definitions for GDB for an embedded SPARC.
   2    Copyright 1996, 1997, 2000 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 2 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program; if not, write to the Free Software
  18    Foundation, Inc., 59 Temple Place - Suite 330,
  19    Boston, MA 02111-1307, USA.  */
  20
  21 #include "regcache.h"
  22
  23 #define TARGET_SPARCLET 1       /* Still needed for non-multi-arch case */
  24
  25 #include "sparc/tm-sparc.h"
  26
  27 /* Note: we are not defining GDB_MULTI_ARCH for the sparclet target
  28    at this time, because we have not figured out how to detect the
  29    sparclet target from the bfd structure.  */
  30
  31 /* Sparclet regs, for debugging purposes.  */
  32
  33 enum {
  34   CCSR_REGNUM   = 72,
  35   CCPR_REGNUM   = 73,
  36   CCCRCR_REGNUM = 74,
  37   CCOR_REGNUM   = 75,
  38   CCOBR_REGNUM  = 76,
  39   CCIBR_REGNUM  = 77,
  40   CCIR_REGNUM   = 78
  41 };
  42
  43 /* Select the sparclet disassembler.  Slightly different instruction set from
  44    the V8 sparc.  */
  45
  46 #undef TM_PRINT_INSN_MACH
  47 #define TM_PRINT_INSN_MACH bfd_mach_sparc_sparclet
  48
  49 /* overrides of tm-sparc.h */
  50
  51 #undef TARGET_BYTE_ORDER
  52
  53 /* Sequence of bytes for breakpoint instruction (ta 1). */
  54 #undef BREAKPOINT
  55 #define BIG_BREAKPOINT {0x91, 0xd0, 0x20, 0x01}
  56 #define LITTLE_BREAKPOINT {0x01, 0x20, 0xd0, 0x91}
  57
  58 #if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
  59 /*
  60  * The following defines must go away for MULTI_ARCH.
  61  */
  62
  63 #undef  NUM_REGS                /* formerly "72" */
  64 /*                WIN  FP   CPU  CCP  ASR  AWR  APSR */
  65 #define NUM_REGS (32 + 32 + 8  + 8  + 8/*+ 32 + 1*/)
  66
  67 #undef  REGISTER_BYTES          /* formerly "(32*4 + 32*4 + 8*4)" */
  68 #define REGISTER_BYTES (32*4 + 32*4 + 8*4 + 8*4 + 8*4/* + 32*4 + 1*4*/)
  69
  70 /* Initializer for an array of names of registers.
  71    There should be NUM_REGS strings in this initializer.  */
  72 /* Sparclet has no fp! */
  73 /* Compiler maps types for floats by number, so can't
  74    change the numbers here. */
  75
  76 #undef REGISTER_NAMES
  77 #define REGISTER_NAMES  \
  78 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",       \
  79   "o0", "o1", "o2", "o3", "o4", "o5", "o6", "o7",       \
  80   "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",       \
  81   "i0", "i1", "i2", "i3", "i4", "i5", "i6", "i7",       \
  82                                                         \
  83   "", "", "", "", "", "", "", "", /* no FPU regs */     \
  84   "", "", "", "", "", "", "", "",                       \
  85   "", "", "", "", "", "", "", "",                       \
  86   "", "", "", "", "", "", "", "",                       \
  87                                   /* no CPSR, FPSR */   \
  88   "y", "psr", "wim", "tbr", "pc", "npc", "", "",        \
  89                                                         \
  90   "ccsr", "ccpr", "cccrcr", "ccor", "ccobr", "ccibr", "ccir", "", \
  91                                                                   \
  92   /*       ASR15                 ASR19 (don't display them) */    \
  93   "asr1",  "", "asr17", "asr18", "", "asr20", "asr21", "asr22",   \
  94 /*                                                                        \
  95   "awr0",  "awr1",  "awr2",  "awr3",  "awr4",  "awr5",  "awr6",  "awr7",  \
  96   "awr8",  "awr9",  "awr10", "awr11", "awr12", "awr13", "awr14", "awr15", \
  97   "awr16", "awr17", "awr18", "awr19", "awr20", "awr21", "awr22", "awr23", \
  98   "awr24", "awr25", "awr26", "awr27", "awr28", "awr29", "awr30", "awr31", \
  99   "apsr",                                                                 \
 100  */                                                                       \
 101 }
 102
 103 /* Remove FP dependant code which was defined in tm-sparc.h */
 104 #undef  FP0_REGNUM              /* Floating point register 0 */
 105 #undef  FPS_REGNUM              /* Floating point status register */
 106 #undef  CPS_REGNUM              /* Coprocessor status register */
 107
 108 /* sparclet register numbers */
 109 #define CCSR_REGNUM 72
 110
 111 #undef DEPRECATED_EXTRACT_RETURN_VALUE
 112 #define DEPRECATED_EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF)            \
 113   {                                                                    \
 114     memcpy ((VALBUF),                                                  \
 115             (char *)(REGBUF) + REGISTER_RAW_SIZE (O0_REGNUM) * 8 +     \
 116             (TYPE_LENGTH(TYPE) >= REGISTER_RAW_SIZE (O0_REGNUM)        \
 117              ? 0 : REGISTER_RAW_SIZE (O0_REGNUM) - TYPE_LENGTH(TYPE)), \
 118             TYPE_LENGTH(TYPE));                                        \
 119   }
 120 #undef DEPRECATED_STORE_RETURN_VALUE
 121 #define DEPRECATED_STORE_RETURN_VALUE(TYPE,VALBUF) \
 122   {                                                                    \
 123     /* Other values are returned in register %o0.  */                  \
 124     write_register_bytes (REGISTER_BYTE (O0_REGNUM), (VALBUF),         \
 125                           TYPE_LENGTH (TYPE));                         \
 126   }
 127
 128 #endif /* GDB_MULTI_ARCH */
 129
 130 #undef PRINT_REGISTER_HOOK
 131 #define PRINT_REGISTER_HOOK(regno)
 132
 133 /* Offsets into jmp_buf.  Not defined by Sun, but at least documented in a
 134    comment in <machine/setjmp.h>! */
 135
 136 #define JB_ELEMENT_SIZE 4       /* Size of each element in jmp_buf */
 137
 138 #define JB_ONSSTACK 0
 139 #define JB_SIGMASK 1
 140 #define JB_SP 2
 141 #define JB_PC 3
 142 #define JB_NPC 4
 143 #define JB_PSR 5
 144 #define JB_G1 6
 145 #define JB_O0 7
 146 #define JB_WBCNT 8
 147
 148 /* Figure out where the longjmp will land.  We expect that we have just entered
 149    longjmp and haven't yet setup the stack frame, so the args are still in the
 150    output regs.  %o0 (O0_REGNUM) points at the jmp_buf structure from which we
 151    extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
 152    This routine returns true on success */
 153
 154 extern int get_longjmp_target (CORE_ADDR *);
 155
 156 #define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)