1 /* Target dependent code for CRIS, for GDB, the GNU debugger.
3 Copyright 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 Contributed by Axis Communications AB.
6 Written by Hendrik Ruijter, Stefan Andersson, and Orjan Friberg.
8 This file is part of GDB.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
26 #include "frame-unwind.h"
27 #include "frame-base.h"
28 #include "trad-frame.h"
29 #include "dwarf2-frame.h"
37 #include "opcode/cris.h"
38 #include "arch-utils.h"
40 #include "gdb_assert.h"
42 /* To get entry_point_address. */
45 #include "solib.h" /* Support for shared libraries. */
46 #include "solib-svr4.h" /* For struct link_map_offsets. */
47 #include "gdb_string.h"
53 /* There are no floating point registers. Used in gdbserver low-linux.c. */
56 /* There are 16 general registers. */
59 /* There are 16 special registers. */
63 /* Register numbers of various important registers.
64 CRIS_FP_REGNUM Contains address of executing stack frame.
65 STR_REGNUM Contains the address of structure return values.
66 RET_REGNUM Contains the return value when shorter than or equal to 32 bits
67 ARG1_REGNUM Contains the first parameter to a function.
68 ARG2_REGNUM Contains the second parameter to a function.
69 ARG3_REGNUM Contains the third parameter to a function.
70 ARG4_REGNUM Contains the fourth parameter to a function. Rest on stack.
71 SP_REGNUM Contains address of top of stack.
72 PC_REGNUM Contains address of next instruction.
73 SRP_REGNUM Subroutine return pointer register.
74 BRP_REGNUM Breakpoint return pointer register. */
78 /* Enums with respect to the general registers, valid for all
88 /* Enums with respect to the special registers, some of which may not be
89 applicable to all CRIS versions. */
107 extern const struct cris_spec_reg cris_spec_regs
[];
109 /* CRIS version, set via the user command 'set cris-version'. Affects
110 register names and sizes.*/
111 static int usr_cmd_cris_version
;
113 /* Indicates whether to trust the above variable. */
114 static int usr_cmd_cris_version_valid
= 0;
116 /* CRIS mode, set via the user command 'set cris-mode'. Affects availability
117 of some registers. */
118 static const char *usr_cmd_cris_mode
;
120 /* Indicates whether to trust the above variable. */
121 static int usr_cmd_cris_mode_valid
= 0;
123 static const char CRIS_MODE_USER
[] = "CRIS_MODE_USER";
124 static const char CRIS_MODE_SUPERVISOR
[] = "CRIS_MODE_SUPERVISOR";
125 static const char *cris_mode_enums
[] =
128 CRIS_MODE_SUPERVISOR
,
132 /* CRIS architecture specific information. */
136 const char *cris_mode
;
139 /* Functions for accessing target dependent data. */
144 return (gdbarch_tdep (current_gdbarch
)->cris_version
);
150 return (gdbarch_tdep (current_gdbarch
)->cris_mode
);
153 struct cris_unwind_cache
155 /* The previous frame's inner most stack address. Used as this
156 frame ID's stack_addr. */
158 /* The frame's base, optionally used by the high-level debug info. */
161 /* How far the SP and r8 (FP) have been offset from the start of
162 the stack frame (as defined by the previous frame's stack
168 /* From old frame_extra_info struct. */
172 /* Table indicating the location of each and every register. */
173 struct trad_frame_saved_reg
*saved_regs
;
176 /* The instruction environment needed to find single-step breakpoints. */
178 struct instruction_environment
180 unsigned long reg
[NUM_GENREGS
];
181 unsigned long preg
[NUM_SPECREGS
];
182 unsigned long branch_break_address
;
183 unsigned long delay_slot_pc
;
184 unsigned long prefix_value
;
189 int delay_slot_pc_active
;
191 int disable_interrupt
;
194 /* Save old breakpoints in order to restore the state before a single_step.
195 At most, two breakpoints will have to be remembered. */
197 char binsn_quantum
[BREAKPOINT_MAX
];
198 static binsn_quantum break_mem
[2];
199 static CORE_ADDR next_pc
= 0;
200 static CORE_ADDR branch_target_address
= 0;
201 static unsigned char branch_break_inserted
= 0;
203 /* Machine-dependencies in CRIS for opcodes. */
205 /* Instruction sizes. */
206 enum cris_instruction_sizes
213 /* Addressing modes. */
214 enum cris_addressing_modes
221 /* Prefix addressing modes. */
222 enum cris_prefix_addressing_modes
224 PREFIX_INDEX_MODE
= 2,
225 PREFIX_ASSIGN_MODE
= 3,
227 /* Handle immediate byte offset addressing mode prefix format. */
228 PREFIX_OFFSET_MODE
= 2
231 /* Masks for opcodes. */
232 enum cris_opcode_masks
234 BRANCH_SIGNED_SHORT_OFFSET_MASK
= 0x1,
235 SIGNED_EXTEND_BIT_MASK
= 0x2,
236 SIGNED_BYTE_MASK
= 0x80,
237 SIGNED_BYTE_EXTEND_MASK
= 0xFFFFFF00,
238 SIGNED_WORD_MASK
= 0x8000,
239 SIGNED_WORD_EXTEND_MASK
= 0xFFFF0000,
240 SIGNED_DWORD_MASK
= 0x80000000,
241 SIGNED_QUICK_VALUE_MASK
= 0x20,
242 SIGNED_QUICK_VALUE_EXTEND_MASK
= 0xFFFFFFC0
245 /* Functions for opcodes. The general form of the ETRAX 16-bit instruction:
253 cris_get_operand2 (unsigned short insn
)
255 return ((insn
& 0xF000) >> 12);
259 cris_get_mode (unsigned short insn
)
261 return ((insn
& 0x0C00) >> 10);
265 cris_get_opcode (unsigned short insn
)
267 return ((insn
& 0x03C0) >> 6);
271 cris_get_size (unsigned short insn
)
273 return ((insn
& 0x0030) >> 4);
277 cris_get_operand1 (unsigned short insn
)
279 return (insn
& 0x000F);
282 /* Additional functions in order to handle opcodes. */
285 cris_get_quick_value (unsigned short insn
)
287 return (insn
& 0x003F);
291 cris_get_bdap_quick_offset (unsigned short insn
)
293 return (insn
& 0x00FF);
297 cris_get_branch_short_offset (unsigned short insn
)
299 return (insn
& 0x00FF);
303 cris_get_asr_shift_steps (unsigned long value
)
305 return (value
& 0x3F);
309 cris_get_clear_size (unsigned short insn
)
311 return ((insn
) & 0xC000);
315 cris_is_signed_extend_bit_on (unsigned short insn
)
317 return (((insn
) & 0x20) == 0x20);
321 cris_is_xflag_bit_on (unsigned short insn
)
323 return (((insn
) & 0x1000) == 0x1000);
327 cris_set_size_to_dword (unsigned short *insn
)
334 cris_get_signed_offset (unsigned short insn
)
336 return ((signed char) (insn
& 0x00FF));
339 /* Calls an op function given the op-type, working on the insn and the
341 static void cris_gdb_func (enum cris_op_type
, unsigned short, inst_env_type
*);
343 static struct gdbarch
*cris_gdbarch_init (struct gdbarch_info
,
344 struct gdbarch_list
*);
346 static void cris_dump_tdep (struct gdbarch
*, struct ui_file
*);
348 static void cris_version_update (char *ignore_args
, int from_tty
,
349 struct cmd_list_element
*c
);
351 static void cris_mode_update (char *ignore_args
, int from_tty
,
352 struct cmd_list_element
*c
);
354 static CORE_ADDR
bfd_lookup_symbol (bfd
*, const char *);
356 static CORE_ADDR
cris_scan_prologue (CORE_ADDR pc
,
357 struct frame_info
*next_frame
,
358 struct cris_unwind_cache
*info
);
360 static CORE_ADDR
cris_unwind_pc (struct gdbarch
*gdbarch
,
361 struct frame_info
*next_frame
);
363 static CORE_ADDR
cris_unwind_sp (struct gdbarch
*gdbarch
,
364 struct frame_info
*next_frame
);
366 /* When arguments must be pushed onto the stack, they go on in reverse
367 order. The below implements a FILO (stack) to do this. */
369 /* Borrowed from d10v-tdep.c. */
374 struct stack_item
*prev
;
378 static struct stack_item
*
379 push_stack_item (struct stack_item
*prev
, void *contents
, int len
)
381 struct stack_item
*si
;
382 si
= xmalloc (sizeof (struct stack_item
));
383 si
->data
= xmalloc (len
);
386 memcpy (si
->data
, contents
, len
);
390 static struct stack_item
*
391 pop_stack_item (struct stack_item
*si
)
393 struct stack_item
*dead
= si
;
400 /* Put here the code to store, into fi->saved_regs, the addresses of
401 the saved registers of frame described by FRAME_INFO. This
402 includes special registers such as pc and fp saved in special ways
403 in the stack frame. sp is even more special: the address we return
404 for it IS the sp for the next frame. */
406 struct cris_unwind_cache
*
407 cris_frame_unwind_cache (struct frame_info
*next_frame
,
408 void **this_prologue_cache
)
411 struct cris_unwind_cache
*info
;
414 if ((*this_prologue_cache
))
415 return (*this_prologue_cache
);
417 info
= FRAME_OBSTACK_ZALLOC (struct cris_unwind_cache
);
418 (*this_prologue_cache
) = info
;
419 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
421 /* Zero all fields. */
427 info
->uses_frame
= 0;
429 info
->leaf_function
= 0;
431 /* Prologue analysis does the rest... */
432 cris_scan_prologue (frame_func_unwind (next_frame
), next_frame
, info
);
437 /* Given a GDB frame, determine the address of the calling function's
438 frame. This will be used to create a new GDB frame struct. */
441 cris_frame_this_id (struct frame_info
*next_frame
,
442 void **this_prologue_cache
,
443 struct frame_id
*this_id
)
445 struct cris_unwind_cache
*info
446 = cris_frame_unwind_cache (next_frame
, this_prologue_cache
);
451 /* The FUNC is easy. */
452 func
= frame_func_unwind (next_frame
);
454 /* Hopefully the prologue analysis either correctly determined the
455 frame's base (which is the SP from the previous frame), or set
456 that base to "NULL". */
457 base
= info
->prev_sp
;
461 id
= frame_id_build (base
, func
);
467 cris_frame_prev_register (struct frame_info
*next_frame
,
468 void **this_prologue_cache
,
469 int regnum
, int *optimizedp
,
470 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
471 int *realnump
, void *bufferp
)
473 struct cris_unwind_cache
*info
474 = cris_frame_unwind_cache (next_frame
, this_prologue_cache
);
475 trad_frame_prev_register (next_frame
, info
->saved_regs
, regnum
,
476 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
479 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
480 dummy frame. The frame ID's base needs to match the TOS value
481 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
484 static struct frame_id
485 cris_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
487 return frame_id_build (cris_unwind_sp (gdbarch
, next_frame
),
488 frame_pc_unwind (next_frame
));
492 cris_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
494 /* Align to the size of an instruction (so that they can safely be
495 pushed onto the stack). */
500 cris_push_dummy_code (struct gdbarch
*gdbarch
,
501 CORE_ADDR sp
, CORE_ADDR funaddr
, int using_gcc
,
502 struct value
**args
, int nargs
,
503 struct type
*value_type
,
504 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
)
506 /* Allocate space sufficient for a breakpoint. */
508 /* Store the address of that breakpoint */
510 /* CRIS always starts the call at the callee's entry point. */
516 cris_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
517 struct regcache
*regcache
, CORE_ADDR bp_addr
,
518 int nargs
, struct value
**args
, CORE_ADDR sp
,
519 int struct_return
, CORE_ADDR struct_addr
)
528 /* The function's arguments and memory allocated by gdb for the arguments to
529 point at reside in separate areas on the stack.
530 Both frame pointers grow toward higher addresses. */
534 struct stack_item
*si
= NULL
;
536 /* Push the return address. */
537 regcache_cooked_write_unsigned (regcache
, SRP_REGNUM
, bp_addr
);
539 /* Are we returning a value using a structure return or a normal value
540 return? struct_addr is the address of the reserved space for the return
541 structure to be written on the stack. */
544 regcache_cooked_write_unsigned (regcache
, STR_REGNUM
, struct_addr
);
547 /* Now load as many as possible of the first arguments into registers,
548 and push the rest onto the stack. */
549 argreg
= ARG1_REGNUM
;
552 for (argnum
= 0; argnum
< nargs
; argnum
++)
559 len
= TYPE_LENGTH (VALUE_TYPE (args
[argnum
]));
560 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
562 /* How may registers worth of storage do we need for this argument? */
563 reg_demand
= (len
/ 4) + (len
% 4 != 0 ? 1 : 0);
565 if (len
<= (2 * 4) && (argreg
+ reg_demand
- 1 <= ARG4_REGNUM
))
567 /* Data passed by value. Fits in available register(s). */
568 for (i
= 0; i
< reg_demand
; i
++)
570 regcache_cooked_write_unsigned (regcache
, argreg
,
571 *(unsigned long *) val
);
576 else if (len
<= (2 * 4) && argreg
<= ARG4_REGNUM
)
578 /* Data passed by value. Does not fit in available register(s).
579 Use the register(s) first, then the stack. */
580 for (i
= 0; i
< reg_demand
; i
++)
582 if (argreg
<= ARG4_REGNUM
)
584 regcache_cooked_write_unsigned (regcache
, argreg
,
585 *(unsigned long *) val
);
591 /* Push item for later so that pushed arguments
592 come in the right order. */
593 si
= push_stack_item (si
, val
, 4);
598 else if (len
> (2 * 4))
601 internal_error (__FILE__
, __LINE__
, "We don't do this");
605 /* Data passed by value. No available registers. Put it on
607 si
= push_stack_item (si
, val
, len
);
613 /* fp_arg must be word-aligned (i.e., don't += len) to match
614 the function prologue. */
615 sp
= (sp
- si
->len
) & ~3;
616 write_memory (sp
, si
->data
, si
->len
);
617 si
= pop_stack_item (si
);
620 /* Finally, update the SP register. */
621 regcache_cooked_write_unsigned (regcache
, SP_REGNUM
, sp
);
626 static const struct frame_unwind cris_frame_unwind
= {
629 cris_frame_prev_register
632 const struct frame_unwind
*
633 cris_frame_sniffer (struct frame_info
*next_frame
)
635 return &cris_frame_unwind
;
639 cris_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
641 struct cris_unwind_cache
*info
642 = cris_frame_unwind_cache (next_frame
, this_cache
);
646 static const struct frame_base cris_frame_base
= {
648 cris_frame_base_address
,
649 cris_frame_base_address
,
650 cris_frame_base_address
653 /* Frames information. The definition of the struct frame_info is
657 enum frame_type type;
661 If the compilation option -fno-omit-frame-pointer is present the
662 variable frame will be set to the content of R8 which is the frame
665 The variable pc contains the address where execution is performed
666 in the present frame. The innermost frame contains the current content
667 of the register PC. All other frames contain the content of the
668 register PC in the next frame.
670 The variable `type' indicates the frame's type: normal, SIGTRAMP
671 (associated with a signal handler), dummy (associated with a dummy
674 The variable return_pc contains the address where execution should be
675 resumed when the present frame has finished, the return address.
677 The variable leaf_function is 1 if the return address is in the register
678 SRP, and 0 if it is on the stack.
680 Prologue instructions C-code.
681 The prologue may consist of (-fno-omit-frame-pointer)
685 move.d sp,r8 move.d sp,r8
687 movem rY,[sp] movem rY,[sp]
688 move.S rZ,[r8-U] move.S rZ,[r8-U]
690 where 1 is a non-terminal function, and 2 is a leaf-function.
692 Note that this assumption is extremely brittle, and will break at the
693 slightest change in GCC's prologue.
695 If local variables are declared or register contents are saved on stack
696 the subq-instruction will be present with X as the number of bytes
697 needed for storage. The reshuffle with respect to r8 may be performed
698 with any size S (b, w, d) and any of the general registers Z={0..13}.
699 The offset U should be representable by a signed 8-bit value in all cases.
700 Thus, the prefix word is assumed to be immediate byte offset mode followed
701 by another word containing the instruction.
710 Prologue instructions C++-code.
711 Case 1) and 2) in the C-code may be followed by
717 move.S [r8+U],rZ ; P4
719 if any of the call parameters are stored. The host expects these
720 instructions to be executed in order to get the call parameters right. */
722 /* Examine the prologue of a function. The variable ip is the address of
723 the first instruction of the prologue. The variable limit is the address
724 of the first instruction after the prologue. The variable fi contains the
725 information in struct frame_info. The variable frameless_p controls whether
726 the entire prologue is examined (0) or just enough instructions to
727 determine that it is a prologue (1). */
730 cris_scan_prologue (CORE_ADDR pc
, struct frame_info
*next_frame
,
731 struct cris_unwind_cache
*info
)
733 /* Present instruction. */
736 /* Next instruction, lookahead. */
737 unsigned short insn_next
;
740 /* Is there a push fp? */
743 /* Number of byte on stack used for local variables and movem. */
746 /* Highest register number in a movem. */
749 /* move.d r<source_register>,rS */
750 short source_register
;
755 /* This frame is with respect to a leaf until a push srp is found. */
758 info
->leaf_function
= 1;
761 /* Assume nothing on stack. */
765 /* If we were called without a next_frame, that means we were called
766 from cris_skip_prologue which already tried to find the end of the
767 prologue through the symbol information. 64 instructions past current
768 pc is arbitrarily chosen, but at least it means we'll stop eventually. */
769 limit
= next_frame
? frame_pc_unwind (next_frame
) : pc
+ 64;
771 /* Find the prologue instructions. */
774 insn
= read_memory_unsigned_integer (pc
, 2);
778 /* push <reg> 32 bit instruction */
779 insn_next
= read_memory_unsigned_integer (pc
, 2);
781 regno
= cris_get_operand2 (insn_next
);
784 info
->sp_offset
+= 4;
786 /* This check, meant to recognize srp, used to be regno ==
787 (SRP_REGNUM - NUM_GENREGS), but that covers r11 also. */
788 if (insn_next
== 0xBE7E)
792 info
->leaf_function
= 0;
796 else if (insn
== 0x866E)
801 info
->uses_frame
= 1;
802 info
->r8_offset
= info
->sp_offset
;
806 else if (cris_get_operand2 (insn
) == SP_REGNUM
807 && cris_get_mode (insn
) == 0x0000
808 && cris_get_opcode (insn
) == 0x000A)
813 info
->sp_offset
+= cris_get_quick_value (insn
);
816 else if (cris_get_mode (insn
) == 0x0002
817 && cris_get_opcode (insn
) == 0x000F
818 && cris_get_size (insn
) == 0x0003
819 && cris_get_operand1 (insn
) == SP_REGNUM
)
821 /* movem r<regsave>,[sp] */
822 regsave
= cris_get_operand2 (insn
);
824 else if (cris_get_operand2 (insn
) == SP_REGNUM
825 && ((insn
& 0x0F00) >> 8) == 0x0001
826 && (cris_get_signed_offset (insn
) < 0))
828 /* Immediate byte offset addressing prefix word with sp as base
829 register. Used for CRIS v8 i.e. ETRAX 100 and newer if <val>
830 is between 64 and 128.
831 movem r<regsave>,[sp=sp-<val>] */
834 info
->sp_offset
+= -cris_get_signed_offset (insn
);
836 insn_next
= read_memory_unsigned_integer (pc
, 2);
838 if (cris_get_mode (insn_next
) == PREFIX_ASSIGN_MODE
839 && cris_get_opcode (insn_next
) == 0x000F
840 && cris_get_size (insn_next
) == 0x0003
841 && cris_get_operand1 (insn_next
) == SP_REGNUM
)
843 regsave
= cris_get_operand2 (insn_next
);
847 /* The prologue ended before the limit was reached. */
852 else if (cris_get_mode (insn
) == 0x0001
853 && cris_get_opcode (insn
) == 0x0009
854 && cris_get_size (insn
) == 0x0002)
856 /* move.d r<10..13>,r<0..15> */
857 source_register
= cris_get_operand1 (insn
);
859 /* FIXME? In the glibc solibs, the prologue might contain something
860 like (this example taken from relocate_doit):
863 which isn't covered by the source_register check below. Question
864 is whether to add a check for this combo, or make better use of
865 the limit variable instead. */
866 if (source_register
< ARG1_REGNUM
|| source_register
> ARG4_REGNUM
)
868 /* The prologue ended before the limit was reached. */
873 else if (cris_get_operand2 (insn
) == CRIS_FP_REGNUM
874 /* The size is a fixed-size. */
875 && ((insn
& 0x0F00) >> 8) == 0x0001
876 /* A negative offset. */
877 && (cris_get_signed_offset (insn
) < 0))
879 /* move.S rZ,[r8-U] (?) */
880 insn_next
= read_memory_unsigned_integer (pc
, 2);
882 regno
= cris_get_operand2 (insn_next
);
883 if ((regno
>= 0 && regno
< SP_REGNUM
)
884 && cris_get_mode (insn_next
) == PREFIX_OFFSET_MODE
885 && cris_get_opcode (insn_next
) == 0x000F)
887 /* move.S rZ,[r8-U] */
892 /* The prologue ended before the limit was reached. */
897 else if (cris_get_operand2 (insn
) == CRIS_FP_REGNUM
898 /* The size is a fixed-size. */
899 && ((insn
& 0x0F00) >> 8) == 0x0001
900 /* A positive offset. */
901 && (cris_get_signed_offset (insn
) > 0))
903 /* move.S [r8+U],rZ (?) */
904 insn_next
= read_memory_unsigned_integer (pc
, 2);
906 regno
= cris_get_operand2 (insn_next
);
907 if ((regno
>= 0 && regno
< SP_REGNUM
)
908 && cris_get_mode (insn_next
) == PREFIX_OFFSET_MODE
909 && cris_get_opcode (insn_next
) == 0x0009
910 && cris_get_operand1 (insn_next
) == regno
)
912 /* move.S [r8+U],rZ */
917 /* The prologue ended before the limit was reached. */
924 /* The prologue ended before the limit was reached. */
930 /* We only want to know the end of the prologue when next_frame and info
931 are NULL (called from cris_skip_prologue i.e.). */
932 if (next_frame
== NULL
&& info
== NULL
)
937 info
->size
= info
->sp_offset
;
939 /* Compute the previous frame's stack pointer (which is also the
940 frame's ID's stack address), and this frame's base pointer. */
941 if (info
->uses_frame
)
944 /* The SP was moved to the FP. This indicates that a new frame
945 was created. Get THIS frame's FP value by unwinding it from
947 frame_unwind_unsigned_register (next_frame
, CRIS_FP_REGNUM
,
949 info
->base
= this_base
;
950 /* The FP points at the last saved register. Adjust the FP back
951 to before the first saved register giving the SP. */
952 info
->prev_sp
= info
->base
+ info
->r8_offset
;
957 /* Assume that the FP is this frame's SP but with that pushed
958 stack space added back. */
959 frame_unwind_unsigned_register (next_frame
, SP_REGNUM
, &this_base
);
960 info
->base
= this_base
;
961 info
->prev_sp
= info
->base
+ info
->size
;
964 info
->saved_regs
[CRIS_FP_REGNUM
].addr
= info
->base
;
966 /* Calculate the addresses for the saved registers on the stack. */
967 /* FIXME: The address calculation should really be done on the fly while
968 we're analyzing the prologue (we only hold one regsave value as it is
970 val
= info
->sp_offset
;
972 for (regno
= regsave
; regno
>= 0; regno
--)
974 info
->saved_regs
[regno
].addr
= info
->base
+ info
->r8_offset
- val
;
978 /* The previous frame's SP needed to be computed. Save the computed
980 trad_frame_set_value (info
->saved_regs
, SP_REGNUM
, info
->prev_sp
);
982 if (!info
->leaf_function
)
984 /* SRP saved on the stack. */
985 info
->saved_regs
[SRP_REGNUM
].addr
= info
->base
+ 4;
988 /* The PC is found in SRP (the actual register or located on the stack). */
989 info
->saved_regs
[PC_REGNUM
] = info
->saved_regs
[SRP_REGNUM
];
994 /* Advance pc beyond any function entry prologue instructions at pc
995 to reach some "real" code. */
997 /* Given a PC value corresponding to the start of a function, return the PC
998 of the first instruction after the function prologue. */
1001 cris_skip_prologue (CORE_ADDR pc
)
1003 CORE_ADDR func_addr
, func_end
;
1004 struct symtab_and_line sal
;
1005 CORE_ADDR pc_after_prologue
;
1007 /* If we have line debugging information, then the end of the prologue
1008 should the first assembly instruction of the first source line. */
1009 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
1011 sal
= find_pc_line (func_addr
, 0);
1012 if (sal
.end
> 0 && sal
.end
< func_end
)
1016 pc_after_prologue
= cris_scan_prologue (pc
, NULL
, NULL
);
1017 return pc_after_prologue
;
1021 cris_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1024 frame_unwind_unsigned_register (next_frame
, PC_REGNUM
, &pc
);
1029 cris_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1032 frame_unwind_unsigned_register (next_frame
, SP_REGNUM
, &sp
);
1036 /* Use the program counter to determine the contents and size of a breakpoint
1037 instruction. It returns a pointer to a string of bytes that encode a
1038 breakpoint instruction, stores the length of the string to *lenptr, and
1039 adjusts pcptr (if necessary) to point to the actual memory location where
1040 the breakpoint should be inserted. */
1042 static const unsigned char *
1043 cris_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
1045 static unsigned char break_insn
[] = {0x38, 0xe9};
1051 /* Returns 1 if spec_reg is applicable to the current gdbarch's CRIS version,
1055 cris_spec_reg_applicable (struct cris_spec_reg spec_reg
)
1057 int version
= cris_version ();
1059 switch (spec_reg
.applicable_version
)
1061 case cris_ver_version_all
:
1063 case cris_ver_warning
:
1064 /* Indeterminate/obsolete. */
1067 /* Simulator only. */
1070 return (version
>= 0 && version
<= 3);
1072 return (version
>= 3);
1074 return (version
== 8 || version
== 9);
1076 return (version
>= 8);
1078 return (version
>= 10);
1080 /* Invalid cris version. */
1085 /* Returns the register size in unit byte. Returns 0 for an unimplemented
1086 register, -1 for an invalid register. */
1089 cris_register_size (int regno
)
1094 if (regno
>= 0 && regno
< NUM_GENREGS
)
1096 /* General registers (R0 - R15) are 32 bits. */
1099 else if (regno
>= NUM_GENREGS
&& regno
< NUM_REGS
)
1101 /* Special register (R16 - R31). cris_spec_regs is zero-based.
1102 Adjust regno accordingly. */
1103 spec_regno
= regno
- NUM_GENREGS
;
1105 /* The entries in cris_spec_regs are stored in register number order,
1106 which means we can shortcut into the array when searching it. */
1107 for (i
= spec_regno
; cris_spec_regs
[i
].name
!= NULL
; i
++)
1109 if (cris_spec_regs
[i
].number
== spec_regno
1110 && cris_spec_reg_applicable (cris_spec_regs
[i
]))
1111 /* Go with the first applicable register. */
1112 return cris_spec_regs
[i
].reg_size
;
1114 /* Special register not applicable to this CRIS version. */
1119 /* Invalid register. */
1124 /* Nonzero if regno should not be fetched from the target. This is the case
1125 for unimplemented (size 0) and non-existant registers. */
1128 cris_cannot_fetch_register (int regno
)
1130 return ((regno
< 0 || regno
>= NUM_REGS
)
1131 || (cris_register_size (regno
) == 0));
1134 /* Nonzero if regno should not be written to the target, for various
1138 cris_cannot_store_register (int regno
)
1140 /* There are three kinds of registers we refuse to write to.
1141 1. Those that not implemented.
1142 2. Those that are read-only (depends on the processor mode).
1143 3. Those registers to which a write has no effect.
1146 if (regno
< 0 || regno
>= NUM_REGS
|| cris_register_size (regno
) == 0)
1147 /* Not implemented. */
1150 else if (regno
== VR_REGNUM
)
1154 else if (regno
== P0_REGNUM
|| regno
== P4_REGNUM
|| regno
== P8_REGNUM
)
1155 /* Writing has no effect. */
1158 else if (cris_mode () == CRIS_MODE_USER
)
1160 if (regno
== IBR_REGNUM
|| regno
== BAR_REGNUM
|| regno
== BRP_REGNUM
1161 || regno
== IRP_REGNUM
)
1162 /* Read-only in user mode. */
1169 /* Returns the register offset for the first byte of register regno's space
1170 in the saved register state. Returns -1 for an invalid or unimplemented
1174 cris_register_offset (int regno
)
1180 if (regno
>= 0 && regno
< NUM_REGS
)
1182 /* FIXME: The offsets should be cached and calculated only once,
1183 when the architecture being debugged has changed. */
1184 for (i
= 0; i
< regno
; i
++)
1185 offset
+= cris_register_size (i
);
1191 /* Invalid register. */
1196 /* Return the GDB type (defined in gdbtypes.c) for the "standard" data type
1197 of data in register regno. */
1199 static struct type
*
1200 cris_register_virtual_type (int regno
)
1202 if (regno
== SP_REGNUM
|| regno
== PC_REGNUM
1203 || (regno
> P8_REGNUM
&& regno
< USP_REGNUM
))
1205 /* SP, PC, IBR, IRP, SRP, BAR, DCCR, BRP */
1206 return lookup_pointer_type (builtin_type_void
);
1208 else if (regno
== P8_REGNUM
|| regno
== USP_REGNUM
1209 || (regno
>= 0 && regno
< SP_REGNUM
))
1211 /* R0 - R13, P8, P15 */
1212 return builtin_type_unsigned_long
;
1214 else if (regno
> P3_REGNUM
&& regno
< P8_REGNUM
)
1216 /* P4, CCR, DCR0, DCR1 */
1217 return builtin_type_unsigned_short
;
1219 else if (regno
> PC_REGNUM
&& regno
< P4_REGNUM
)
1221 /* P0, P1, P2, P3 */
1222 return builtin_type_unsigned_char
;
1226 /* Invalid register. */
1227 return builtin_type_void
;
1231 /* Stores a function return value of type type, where valbuf is the address
1232 of the value to be stored. */
1234 /* In the CRIS ABI, R10 and R11 are used to store return values. */
1237 cris_store_return_value (struct type
*type
, struct regcache
*regcache
,
1241 int len
= TYPE_LENGTH (type
);
1245 /* Put the return value in R10. */
1246 val
= extract_unsigned_integer (valbuf
, len
);
1247 regcache_cooked_write_unsigned (regcache
, ARG1_REGNUM
, val
);
1251 /* Put the return value in R10 and R11. */
1252 val
= extract_unsigned_integer (valbuf
, 4);
1253 regcache_cooked_write_unsigned (regcache
, ARG1_REGNUM
, val
);
1254 val
= extract_unsigned_integer ((char *)valbuf
+ 4, len
- 4);
1255 regcache_cooked_write_unsigned (regcache
, ARG2_REGNUM
, val
);
1258 error ("cris_store_return_value: type length too large.");
1261 /* Return the name of register regno as a string. Return NULL for an invalid or
1262 unimplemented register. */
1265 cris_register_name (int regno
)
1267 static char *cris_genreg_names
[] =
1268 { "r0", "r1", "r2", "r3", \
1269 "r4", "r5", "r6", "r7", \
1270 "r8", "r9", "r10", "r11", \
1271 "r12", "r13", "sp", "pc" };
1276 if (regno
>= 0 && regno
< NUM_GENREGS
)
1278 /* General register. */
1279 return cris_genreg_names
[regno
];
1281 else if (regno
>= NUM_GENREGS
&& regno
< NUM_REGS
)
1283 /* Special register (R16 - R31). cris_spec_regs is zero-based.
1284 Adjust regno accordingly. */
1285 spec_regno
= regno
- NUM_GENREGS
;
1287 /* The entries in cris_spec_regs are stored in register number order,
1288 which means we can shortcut into the array when searching it. */
1289 for (i
= spec_regno
; cris_spec_regs
[i
].name
!= NULL
; i
++)
1291 if (cris_spec_regs
[i
].number
== spec_regno
1292 && cris_spec_reg_applicable (cris_spec_regs
[i
]))
1293 /* Go with the first applicable register. */
1294 return cris_spec_regs
[i
].name
;
1296 /* Special register not applicable to this CRIS version. */
1301 /* Invalid register. */
1307 cris_register_bytes_ok (long bytes
)
1309 return (bytes
== DEPRECATED_REGISTER_BYTES
);
1312 /* Extract from an array regbuf containing the raw register state a function
1313 return value of type type, and copy that, in virtual format, into
1316 /* In the CRIS ABI, R10 and R11 are used to store return values. */
1319 cris_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1323 int len
= TYPE_LENGTH (type
);
1327 /* Get the return value from R10. */
1328 regcache_cooked_read_unsigned (regcache
, ARG1_REGNUM
, &val
);
1329 store_unsigned_integer (valbuf
, len
, val
);
1333 /* Get the return value from R10 and R11. */
1334 regcache_cooked_read_unsigned (regcache
, ARG1_REGNUM
, &val
);
1335 store_unsigned_integer (valbuf
, 4, val
);
1336 regcache_cooked_read_unsigned (regcache
, ARG2_REGNUM
, &val
);
1337 store_unsigned_integer ((char *)valbuf
+ 4, len
- 4, val
);
1340 error ("cris_extract_return_value: type length too large");
1343 /* Returns 1 if the given type will be passed by pointer rather than
1346 /* In the CRIS ABI, arguments shorter than or equal to 64 bits are passed
1350 cris_reg_struct_has_addr (int gcc_p
, struct type
*type
)
1352 return (TYPE_LENGTH (type
) > 8);
1355 /* Calculates a value that measures how good inst_args constraints an
1356 instruction. It stems from cris_constraint, found in cris-dis.c. */
1359 constraint (unsigned int insn
, const signed char *inst_args
,
1360 inst_env_type
*inst_env
)
1365 const char *s
= inst_args
;
1371 if ((insn
& 0x30) == 0x30)
1376 /* A prefix operand. */
1377 if (inst_env
->prefix_found
)
1383 /* A "push" prefix. (This check was REMOVED by san 970921.) Check for
1384 valid "push" size. In case of special register, it may be != 4. */
1385 if (inst_env
->prefix_found
)
1391 retval
= (((insn
>> 0xC) & 0xF) == (insn
& 0xF));
1399 tmp
= (insn
>> 0xC) & 0xF;
1401 for (i
= 0; cris_spec_regs
[i
].name
!= NULL
; i
++)
1403 /* Since we match four bits, we will give a value of
1404 4 - 1 = 3 in a match. If there is a corresponding
1405 exact match of a special register in another pattern, it
1406 will get a value of 4, which will be higher. This should
1407 be correct in that an exact pattern would match better that
1409 Note that there is a reason for not returning zero; the
1410 pattern for "clear" is partly matched in the bit-pattern
1411 (the two lower bits must be zero), while the bit-pattern
1412 for a move from a special register is matched in the
1413 register constraint.
1414 This also means we will will have a race condition if
1415 there is a partly match in three bits in the bit pattern. */
1416 if (tmp
== cris_spec_regs
[i
].number
)
1423 if (cris_spec_regs
[i
].name
== NULL
)
1430 /* Returns the number of bits set in the variable value. */
1433 number_of_bits (unsigned int value
)
1435 int number_of_bits
= 0;
1439 number_of_bits
+= 1;
1440 value
&= (value
- 1);
1442 return number_of_bits
;
1445 /* Finds the address that should contain the single step breakpoint(s).
1446 It stems from code in cris-dis.c. */
1449 find_cris_op (unsigned short insn
, inst_env_type
*inst_env
)
1452 int max_level_of_match
= -1;
1453 int max_matched
= -1;
1456 for (i
= 0; cris_opcodes
[i
].name
!= NULL
; i
++)
1458 if (((cris_opcodes
[i
].match
& insn
) == cris_opcodes
[i
].match
)
1459 && ((cris_opcodes
[i
].lose
& insn
) == 0))
1461 level_of_match
= constraint (insn
, cris_opcodes
[i
].args
, inst_env
);
1462 if (level_of_match
>= 0)
1465 number_of_bits (cris_opcodes
[i
].match
| cris_opcodes
[i
].lose
);
1466 if (level_of_match
> max_level_of_match
)
1469 max_level_of_match
= level_of_match
;
1470 if (level_of_match
== 16)
1472 /* All bits matched, cannot find better. */
1482 /* Attempts to find single-step breakpoints. Returns -1 on failure which is
1483 actually an internal error. */
1486 find_step_target (inst_env_type
*inst_env
)
1490 unsigned short insn
;
1492 /* Create a local register image and set the initial state. */
1493 for (i
= 0; i
< NUM_GENREGS
; i
++)
1495 inst_env
->reg
[i
] = (unsigned long) read_register (i
);
1497 offset
= NUM_GENREGS
;
1498 for (i
= 0; i
< NUM_SPECREGS
; i
++)
1500 inst_env
->preg
[i
] = (unsigned long) read_register (offset
+ i
);
1502 inst_env
->branch_found
= 0;
1503 inst_env
->slot_needed
= 0;
1504 inst_env
->delay_slot_pc_active
= 0;
1505 inst_env
->prefix_found
= 0;
1506 inst_env
->invalid
= 0;
1507 inst_env
->xflag_found
= 0;
1508 inst_env
->disable_interrupt
= 0;
1510 /* Look for a step target. */
1513 /* Read an instruction from the client. */
1514 insn
= read_memory_unsigned_integer (inst_env
->reg
[PC_REGNUM
], 2);
1516 /* If the instruction is not in a delay slot the new content of the
1517 PC is [PC] + 2. If the instruction is in a delay slot it is not
1518 that simple. Since a instruction in a delay slot cannot change
1519 the content of the PC, it does not matter what value PC will have.
1520 Just make sure it is a valid instruction. */
1521 if (!inst_env
->delay_slot_pc_active
)
1523 inst_env
->reg
[PC_REGNUM
] += 2;
1527 inst_env
->delay_slot_pc_active
= 0;
1528 inst_env
->reg
[PC_REGNUM
] = inst_env
->delay_slot_pc
;
1530 /* Analyse the present instruction. */
1531 i
= find_cris_op (insn
, inst_env
);
1534 inst_env
->invalid
= 1;
1538 cris_gdb_func (cris_opcodes
[i
].op
, insn
, inst_env
);
1540 } while (!inst_env
->invalid
1541 && (inst_env
->prefix_found
|| inst_env
->xflag_found
1542 || inst_env
->slot_needed
));
1546 /* There is no hardware single-step support. The function find_step_target
1547 digs through the opcodes in order to find all possible targets.
1548 Either one ordinary target or two targets for branches may be found. */
1551 cris_software_single_step (enum target_signal ignore
, int insert_breakpoints
)
1553 inst_env_type inst_env
;
1555 if (insert_breakpoints
)
1557 /* Analyse the present instruction environment and insert
1559 int status
= find_step_target (&inst_env
);
1562 /* Could not find a target. FIXME: Should do something. */
1566 /* Insert at most two breakpoints. One for the next PC content
1567 and possibly another one for a branch, jump, etc. */
1568 next_pc
= (CORE_ADDR
) inst_env
.reg
[PC_REGNUM
];
1569 target_insert_breakpoint (next_pc
, break_mem
[0]);
1570 if (inst_env
.branch_found
1571 && (CORE_ADDR
) inst_env
.branch_break_address
!= next_pc
)
1573 branch_target_address
=
1574 (CORE_ADDR
) inst_env
.branch_break_address
;
1575 target_insert_breakpoint (branch_target_address
, break_mem
[1]);
1576 branch_break_inserted
= 1;
1582 /* Remove breakpoints. */
1583 target_remove_breakpoint (next_pc
, break_mem
[0]);
1584 if (branch_break_inserted
)
1586 target_remove_breakpoint (branch_target_address
, break_mem
[1]);
1587 branch_break_inserted
= 0;
1592 /* Calculates the prefix value for quick offset addressing mode. */
1595 quick_mode_bdap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1597 /* It's invalid to be in a delay slot. You can't have a prefix to this
1598 instruction (not 100% sure). */
1599 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1601 inst_env
->invalid
= 1;
1605 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand2 (inst
)];
1606 inst_env
->prefix_value
+= cris_get_bdap_quick_offset (inst
);
1608 /* A prefix doesn't change the xflag_found. But the rest of the flags
1610 inst_env
->slot_needed
= 0;
1611 inst_env
->prefix_found
= 1;
1614 /* Updates the autoincrement register. The size of the increment is derived
1615 from the size of the operation. The PC is always kept aligned on even
1619 process_autoincrement (int size
, unsigned short inst
, inst_env_type
*inst_env
)
1621 if (size
== INST_BYTE_SIZE
)
1623 inst_env
->reg
[cris_get_operand1 (inst
)] += 1;
1625 /* The PC must be word aligned, so increase the PC with one
1626 word even if the size is byte. */
1627 if (cris_get_operand1 (inst
) == REG_PC
)
1629 inst_env
->reg
[REG_PC
] += 1;
1632 else if (size
== INST_WORD_SIZE
)
1634 inst_env
->reg
[cris_get_operand1 (inst
)] += 2;
1636 else if (size
== INST_DWORD_SIZE
)
1638 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
1643 inst_env
->invalid
= 1;
1647 /* Just a forward declaration. */
1649 static unsigned long get_data_from_address (unsigned short *inst
,
1652 /* Calculates the prefix value for the general case of offset addressing
1656 bdap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1661 /* It's invalid to be in a delay slot. */
1662 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1664 inst_env
->invalid
= 1;
1668 /* The calculation of prefix_value used to be after process_autoincrement,
1669 but that fails for an instruction such as jsr [$r0+12] which is encoded
1670 as 5f0d 0c00 30b9 when compiled with -fpic. Since PC is operand1 it
1671 mustn't be incremented until we have read it and what it points at. */
1672 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand2 (inst
)];
1674 /* The offset is an indirection of the contents of the operand1 register. */
1675 inst_env
->prefix_value
+=
1676 get_data_from_address (&inst
, inst_env
->reg
[cris_get_operand1 (inst
)]);
1678 if (cris_get_mode (inst
) == AUTOINC_MODE
)
1680 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
1683 /* A prefix doesn't change the xflag_found. But the rest of the flags
1685 inst_env
->slot_needed
= 0;
1686 inst_env
->prefix_found
= 1;
1689 /* Calculates the prefix value for the index addressing mode. */
1692 biap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1694 /* It's invalid to be in a delay slot. I can't see that it's possible to
1695 have a prefix to this instruction. So I will treat this as invalid. */
1696 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1698 inst_env
->invalid
= 1;
1702 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand1 (inst
)];
1704 /* The offset is the operand2 value shifted the size of the instruction
1706 inst_env
->prefix_value
+=
1707 inst_env
->reg
[cris_get_operand2 (inst
)] << cris_get_size (inst
);
1709 /* If the PC is operand1 (base) the address used is the address after
1710 the main instruction, i.e. address + 2 (the PC is already compensated
1711 for the prefix operation). */
1712 if (cris_get_operand1 (inst
) == REG_PC
)
1714 inst_env
->prefix_value
+= 2;
1717 /* A prefix doesn't change the xflag_found. But the rest of the flags
1719 inst_env
->slot_needed
= 0;
1720 inst_env
->xflag_found
= 0;
1721 inst_env
->prefix_found
= 1;
1724 /* Calculates the prefix value for the double indirect addressing mode. */
1727 dip_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1732 /* It's invalid to be in a delay slot. */
1733 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1735 inst_env
->invalid
= 1;
1739 /* The prefix value is one dereference of the contents of the operand1
1741 address
= (CORE_ADDR
) inst_env
->reg
[cris_get_operand1 (inst
)];
1742 inst_env
->prefix_value
= read_memory_unsigned_integer (address
, 4);
1744 /* Check if the mode is autoincrement. */
1745 if (cris_get_mode (inst
) == AUTOINC_MODE
)
1747 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
1750 /* A prefix doesn't change the xflag_found. But the rest of the flags
1752 inst_env
->slot_needed
= 0;
1753 inst_env
->xflag_found
= 0;
1754 inst_env
->prefix_found
= 1;
1757 /* Finds the destination for a branch with 8-bits offset. */
1760 eight_bit_offset_branch_op (unsigned short inst
, inst_env_type
*inst_env
)
1765 /* If we have a prefix or are in a delay slot it's bad. */
1766 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1768 inst_env
->invalid
= 1;
1772 /* We have a branch, find out where the branch will land. */
1773 offset
= cris_get_branch_short_offset (inst
);
1775 /* Check if the offset is signed. */
1776 if (offset
& BRANCH_SIGNED_SHORT_OFFSET_MASK
)
1781 /* The offset ends with the sign bit, set it to zero. The address
1782 should always be word aligned. */
1783 offset
&= ~BRANCH_SIGNED_SHORT_OFFSET_MASK
;
1785 inst_env
->branch_found
= 1;
1786 inst_env
->branch_break_address
= inst_env
->reg
[REG_PC
] + offset
;
1788 inst_env
->slot_needed
= 1;
1789 inst_env
->prefix_found
= 0;
1790 inst_env
->xflag_found
= 0;
1791 inst_env
->disable_interrupt
= 1;
1794 /* Finds the destination for a branch with 16-bits offset. */
1797 sixteen_bit_offset_branch_op (unsigned short inst
, inst_env_type
*inst_env
)
1801 /* If we have a prefix or is in a delay slot it's bad. */
1802 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1804 inst_env
->invalid
= 1;
1808 /* We have a branch, find out the offset for the branch. */
1809 offset
= read_memory_integer (inst_env
->reg
[REG_PC
], 2);
1811 /* The instruction is one word longer than normal, so add one word
1813 inst_env
->reg
[REG_PC
] += 2;
1815 inst_env
->branch_found
= 1;
1816 inst_env
->branch_break_address
= inst_env
->reg
[REG_PC
] + offset
;
1819 inst_env
->slot_needed
= 1;
1820 inst_env
->prefix_found
= 0;
1821 inst_env
->xflag_found
= 0;
1822 inst_env
->disable_interrupt
= 1;
1825 /* Handles the ABS instruction. */
1828 abs_op (unsigned short inst
, inst_env_type
*inst_env
)
1833 /* ABS can't have a prefix, so it's bad if it does. */
1834 if (inst_env
->prefix_found
)
1836 inst_env
->invalid
= 1;
1840 /* Check if the operation affects the PC. */
1841 if (cris_get_operand2 (inst
) == REG_PC
)
1844 /* It's invalid to change to the PC if we are in a delay slot. */
1845 if (inst_env
->slot_needed
)
1847 inst_env
->invalid
= 1;
1851 value
= (long) inst_env
->reg
[REG_PC
];
1853 /* The value of abs (SIGNED_DWORD_MASK) is SIGNED_DWORD_MASK. */
1854 if (value
!= SIGNED_DWORD_MASK
)
1857 inst_env
->reg
[REG_PC
] = (long) value
;
1861 inst_env
->slot_needed
= 0;
1862 inst_env
->prefix_found
= 0;
1863 inst_env
->xflag_found
= 0;
1864 inst_env
->disable_interrupt
= 0;
1867 /* Handles the ADDI instruction. */
1870 addi_op (unsigned short inst
, inst_env_type
*inst_env
)
1872 /* It's invalid to have the PC as base register. And ADDI can't have
1874 if (inst_env
->prefix_found
|| (cris_get_operand1 (inst
) == REG_PC
))
1876 inst_env
->invalid
= 1;
1880 inst_env
->slot_needed
= 0;
1881 inst_env
->prefix_found
= 0;
1882 inst_env
->xflag_found
= 0;
1883 inst_env
->disable_interrupt
= 0;
1886 /* Handles the ASR instruction. */
1889 asr_op (unsigned short inst
, inst_env_type
*inst_env
)
1892 unsigned long value
;
1893 unsigned long signed_extend_mask
= 0;
1895 /* ASR can't have a prefix, so check that it doesn't. */
1896 if (inst_env
->prefix_found
)
1898 inst_env
->invalid
= 1;
1902 /* Check if the PC is the target register. */
1903 if (cris_get_operand2 (inst
) == REG_PC
)
1905 /* It's invalid to change the PC in a delay slot. */
1906 if (inst_env
->slot_needed
)
1908 inst_env
->invalid
= 1;
1911 /* Get the number of bits to shift. */
1912 shift_steps
= cris_get_asr_shift_steps (inst_env
->reg
[cris_get_operand1 (inst
)]);
1913 value
= inst_env
->reg
[REG_PC
];
1915 /* Find out how many bits the operation should apply to. */
1916 if (cris_get_size (inst
) == INST_BYTE_SIZE
)
1918 if (value
& SIGNED_BYTE_MASK
)
1920 signed_extend_mask
= 0xFF;
1921 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
1922 signed_extend_mask
= ~signed_extend_mask
;
1924 value
= value
>> shift_steps
;
1925 value
|= signed_extend_mask
;
1927 inst_env
->reg
[REG_PC
] &= 0xFFFFFF00;
1928 inst_env
->reg
[REG_PC
] |= value
;
1930 else if (cris_get_size (inst
) == INST_WORD_SIZE
)
1932 if (value
& SIGNED_WORD_MASK
)
1934 signed_extend_mask
= 0xFFFF;
1935 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
1936 signed_extend_mask
= ~signed_extend_mask
;
1938 value
= value
>> shift_steps
;
1939 value
|= signed_extend_mask
;
1941 inst_env
->reg
[REG_PC
] &= 0xFFFF0000;
1942 inst_env
->reg
[REG_PC
] |= value
;
1944 else if (cris_get_size (inst
) == INST_DWORD_SIZE
)
1946 if (value
& SIGNED_DWORD_MASK
)
1948 signed_extend_mask
= 0xFFFFFFFF;
1949 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
1950 signed_extend_mask
= ~signed_extend_mask
;
1952 value
= value
>> shift_steps
;
1953 value
|= signed_extend_mask
;
1954 inst_env
->reg
[REG_PC
] = value
;
1957 inst_env
->slot_needed
= 0;
1958 inst_env
->prefix_found
= 0;
1959 inst_env
->xflag_found
= 0;
1960 inst_env
->disable_interrupt
= 0;
1963 /* Handles the ASRQ instruction. */
1966 asrq_op (unsigned short inst
, inst_env_type
*inst_env
)
1970 unsigned long value
;
1971 unsigned long signed_extend_mask
= 0;
1973 /* ASRQ can't have a prefix, so check that it doesn't. */
1974 if (inst_env
->prefix_found
)
1976 inst_env
->invalid
= 1;
1980 /* Check if the PC is the target register. */
1981 if (cris_get_operand2 (inst
) == REG_PC
)
1984 /* It's invalid to change the PC in a delay slot. */
1985 if (inst_env
->slot_needed
)
1987 inst_env
->invalid
= 1;
1990 /* The shift size is given as a 5 bit quick value, i.e. we don't
1991 want the the sign bit of the quick value. */
1992 shift_steps
= cris_get_asr_shift_steps (inst
);
1993 value
= inst_env
->reg
[REG_PC
];
1994 if (value
& SIGNED_DWORD_MASK
)
1996 signed_extend_mask
= 0xFFFFFFFF;
1997 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
1998 signed_extend_mask
= ~signed_extend_mask
;
2000 value
= value
>> shift_steps
;
2001 value
|= signed_extend_mask
;
2002 inst_env
->reg
[REG_PC
] = value
;
2004 inst_env
->slot_needed
= 0;
2005 inst_env
->prefix_found
= 0;
2006 inst_env
->xflag_found
= 0;
2007 inst_env
->disable_interrupt
= 0;
2010 /* Handles the AX, EI and SETF instruction. */
2013 ax_ei_setf_op (unsigned short inst
, inst_env_type
*inst_env
)
2015 if (inst_env
->prefix_found
)
2017 inst_env
->invalid
= 1;
2020 /* Check if the instruction is setting the X flag. */
2021 if (cris_is_xflag_bit_on (inst
))
2023 inst_env
->xflag_found
= 1;
2027 inst_env
->xflag_found
= 0;
2029 inst_env
->slot_needed
= 0;
2030 inst_env
->prefix_found
= 0;
2031 inst_env
->disable_interrupt
= 1;
2034 /* Checks if the instruction is in assign mode. If so, it updates the assign
2035 register. Note that check_assign assumes that the caller has checked that
2036 there is a prefix to this instruction. The mode check depends on this. */
2039 check_assign (unsigned short inst
, inst_env_type
*inst_env
)
2041 /* Check if it's an assign addressing mode. */
2042 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2044 /* Assign the prefix value to operand 1. */
2045 inst_env
->reg
[cris_get_operand1 (inst
)] = inst_env
->prefix_value
;
2049 /* Handles the 2-operand BOUND instruction. */
2052 two_operand_bound_op (unsigned short inst
, inst_env_type
*inst_env
)
2054 /* It's invalid to have the PC as the index operand. */
2055 if (cris_get_operand2 (inst
) == REG_PC
)
2057 inst_env
->invalid
= 1;
2060 /* Check if we have a prefix. */
2061 if (inst_env
->prefix_found
)
2063 check_assign (inst
, inst_env
);
2065 /* Check if this is an autoincrement mode. */
2066 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2068 /* It's invalid to change the PC in a delay slot. */
2069 if (inst_env
->slot_needed
)
2071 inst_env
->invalid
= 1;
2074 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2076 inst_env
->slot_needed
= 0;
2077 inst_env
->prefix_found
= 0;
2078 inst_env
->xflag_found
= 0;
2079 inst_env
->disable_interrupt
= 0;
2082 /* Handles the 3-operand BOUND instruction. */
2085 three_operand_bound_op (unsigned short inst
, inst_env_type
*inst_env
)
2087 /* It's an error if we haven't got a prefix. And it's also an error
2088 if the PC is the destination register. */
2089 if ((!inst_env
->prefix_found
) || (cris_get_operand1 (inst
) == REG_PC
))
2091 inst_env
->invalid
= 1;
2094 inst_env
->slot_needed
= 0;
2095 inst_env
->prefix_found
= 0;
2096 inst_env
->xflag_found
= 0;
2097 inst_env
->disable_interrupt
= 0;
2100 /* Clears the status flags in inst_env. */
2103 btst_nop_op (unsigned short inst
, inst_env_type
*inst_env
)
2105 /* It's an error if we have got a prefix. */
2106 if (inst_env
->prefix_found
)
2108 inst_env
->invalid
= 1;
2112 inst_env
->slot_needed
= 0;
2113 inst_env
->prefix_found
= 0;
2114 inst_env
->xflag_found
= 0;
2115 inst_env
->disable_interrupt
= 0;
2118 /* Clears the status flags in inst_env. */
2121 clearf_di_op (unsigned short inst
, inst_env_type
*inst_env
)
2123 /* It's an error if we have got a prefix. */
2124 if (inst_env
->prefix_found
)
2126 inst_env
->invalid
= 1;
2130 inst_env
->slot_needed
= 0;
2131 inst_env
->prefix_found
= 0;
2132 inst_env
->xflag_found
= 0;
2133 inst_env
->disable_interrupt
= 1;
2136 /* Handles the CLEAR instruction if it's in register mode. */
2139 reg_mode_clear_op (unsigned short inst
, inst_env_type
*inst_env
)
2141 /* Check if the target is the PC. */
2142 if (cris_get_operand2 (inst
) == REG_PC
)
2144 /* The instruction will clear the instruction's size bits. */
2145 int clear_size
= cris_get_clear_size (inst
);
2146 if (clear_size
== INST_BYTE_SIZE
)
2148 inst_env
->delay_slot_pc
= inst_env
->reg
[REG_PC
] & 0xFFFFFF00;
2150 if (clear_size
== INST_WORD_SIZE
)
2152 inst_env
->delay_slot_pc
= inst_env
->reg
[REG_PC
] & 0xFFFF0000;
2154 if (clear_size
== INST_DWORD_SIZE
)
2156 inst_env
->delay_slot_pc
= 0x0;
2158 /* The jump will be delayed with one delay slot. So we need a delay
2160 inst_env
->slot_needed
= 1;
2161 inst_env
->delay_slot_pc_active
= 1;
2165 /* The PC will not change => no delay slot. */
2166 inst_env
->slot_needed
= 0;
2168 inst_env
->prefix_found
= 0;
2169 inst_env
->xflag_found
= 0;
2170 inst_env
->disable_interrupt
= 0;
2173 /* Handles the TEST instruction if it's in register mode. */
2176 reg_mode_test_op (unsigned short inst
, inst_env_type
*inst_env
)
2178 /* It's an error if we have got a prefix. */
2179 if (inst_env
->prefix_found
)
2181 inst_env
->invalid
= 1;
2184 inst_env
->slot_needed
= 0;
2185 inst_env
->prefix_found
= 0;
2186 inst_env
->xflag_found
= 0;
2187 inst_env
->disable_interrupt
= 0;
2191 /* Handles the CLEAR and TEST instruction if the instruction isn't
2192 in register mode. */
2195 none_reg_mode_clear_test_op (unsigned short inst
, inst_env_type
*inst_env
)
2197 /* Check if we are in a prefix mode. */
2198 if (inst_env
->prefix_found
)
2200 /* The only way the PC can change is if this instruction is in
2201 assign addressing mode. */
2202 check_assign (inst
, inst_env
);
2204 /* Indirect mode can't change the PC so just check if the mode is
2206 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2208 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2210 inst_env
->slot_needed
= 0;
2211 inst_env
->prefix_found
= 0;
2212 inst_env
->xflag_found
= 0;
2213 inst_env
->disable_interrupt
= 0;
2216 /* Checks that the PC isn't the destination register or the instructions has
2220 dstep_logshift_mstep_neg_not_op (unsigned short inst
, inst_env_type
*inst_env
)
2222 /* It's invalid to have the PC as the destination. The instruction can't
2224 if ((cris_get_operand2 (inst
) == REG_PC
) || inst_env
->prefix_found
)
2226 inst_env
->invalid
= 1;
2230 inst_env
->slot_needed
= 0;
2231 inst_env
->prefix_found
= 0;
2232 inst_env
->xflag_found
= 0;
2233 inst_env
->disable_interrupt
= 0;
2236 /* Checks that the instruction doesn't have a prefix. */
2239 break_op (unsigned short inst
, inst_env_type
*inst_env
)
2241 /* The instruction can't have a prefix. */
2242 if (inst_env
->prefix_found
)
2244 inst_env
->invalid
= 1;
2248 inst_env
->slot_needed
= 0;
2249 inst_env
->prefix_found
= 0;
2250 inst_env
->xflag_found
= 0;
2251 inst_env
->disable_interrupt
= 1;
2254 /* Checks that the PC isn't the destination register and that the instruction
2255 doesn't have a prefix. */
2258 scc_op (unsigned short inst
, inst_env_type
*inst_env
)
2260 /* It's invalid to have the PC as the destination. The instruction can't
2262 if ((cris_get_operand2 (inst
) == REG_PC
) || inst_env
->prefix_found
)
2264 inst_env
->invalid
= 1;
2268 inst_env
->slot_needed
= 0;
2269 inst_env
->prefix_found
= 0;
2270 inst_env
->xflag_found
= 0;
2271 inst_env
->disable_interrupt
= 1;
2274 /* Handles the register mode JUMP instruction. */
2277 reg_mode_jump_op (unsigned short inst
, inst_env_type
*inst_env
)
2279 /* It's invalid to do a JUMP in a delay slot. The mode is register, so
2280 you can't have a prefix. */
2281 if ((inst_env
->slot_needed
) || (inst_env
->prefix_found
))
2283 inst_env
->invalid
= 1;
2287 /* Just change the PC. */
2288 inst_env
->reg
[REG_PC
] = inst_env
->reg
[cris_get_operand1 (inst
)];
2289 inst_env
->slot_needed
= 0;
2290 inst_env
->prefix_found
= 0;
2291 inst_env
->xflag_found
= 0;
2292 inst_env
->disable_interrupt
= 1;
2295 /* Handles the JUMP instruction for all modes except register. */
2298 none_reg_mode_jump_op (unsigned short inst
, inst_env_type
*inst_env
)
2300 unsigned long newpc
;
2303 /* It's invalid to do a JUMP in a delay slot. */
2304 if (inst_env
->slot_needed
)
2306 inst_env
->invalid
= 1;
2310 /* Check if we have a prefix. */
2311 if (inst_env
->prefix_found
)
2313 check_assign (inst
, inst_env
);
2315 /* Get the new value for the the PC. */
2317 read_memory_unsigned_integer ((CORE_ADDR
) inst_env
->prefix_value
,
2322 /* Get the new value for the PC. */
2323 address
= (CORE_ADDR
) inst_env
->reg
[cris_get_operand1 (inst
)];
2324 newpc
= read_memory_unsigned_integer (address
, 4);
2326 /* Check if we should increment a register. */
2327 if (cris_get_mode (inst
) == AUTOINC_MODE
)
2329 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
2332 inst_env
->reg
[REG_PC
] = newpc
;
2334 inst_env
->slot_needed
= 0;
2335 inst_env
->prefix_found
= 0;
2336 inst_env
->xflag_found
= 0;
2337 inst_env
->disable_interrupt
= 1;
2340 /* Handles moves to special registers (aka P-register) for all modes. */
2343 move_to_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2345 if (inst_env
->prefix_found
)
2347 /* The instruction has a prefix that means we are only interested if
2348 the instruction is in assign mode. */
2349 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2351 /* The prefix handles the problem if we are in a delay slot. */
2352 if (cris_get_operand1 (inst
) == REG_PC
)
2354 /* Just take care of the assign. */
2355 check_assign (inst
, inst_env
);
2359 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2361 /* The instruction doesn't have a prefix, the only case left that we
2362 are interested in is the autoincrement mode. */
2363 if (cris_get_operand1 (inst
) == REG_PC
)
2365 /* If the PC is to be incremented it's invalid to be in a
2367 if (inst_env
->slot_needed
)
2369 inst_env
->invalid
= 1;
2373 /* The increment depends on the size of the special register. */
2374 if (cris_register_size (cris_get_operand2 (inst
)) == 1)
2376 process_autoincrement (INST_BYTE_SIZE
, inst
, inst_env
);
2378 else if (cris_register_size (cris_get_operand2 (inst
)) == 2)
2380 process_autoincrement (INST_WORD_SIZE
, inst
, inst_env
);
2384 process_autoincrement (INST_DWORD_SIZE
, inst
, inst_env
);
2388 inst_env
->slot_needed
= 0;
2389 inst_env
->prefix_found
= 0;
2390 inst_env
->xflag_found
= 0;
2391 inst_env
->disable_interrupt
= 1;
2394 /* Handles moves from special registers (aka P-register) for all modes
2398 none_reg_mode_move_from_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2400 if (inst_env
->prefix_found
)
2402 /* The instruction has a prefix that means we are only interested if
2403 the instruction is in assign mode. */
2404 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2406 /* The prefix handles the problem if we are in a delay slot. */
2407 if (cris_get_operand1 (inst
) == REG_PC
)
2409 /* Just take care of the assign. */
2410 check_assign (inst
, inst_env
);
2414 /* The instruction doesn't have a prefix, the only case left that we
2415 are interested in is the autoincrement mode. */
2416 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2418 if (cris_get_operand1 (inst
) == REG_PC
)
2420 /* If the PC is to be incremented it's invalid to be in a
2422 if (inst_env
->slot_needed
)
2424 inst_env
->invalid
= 1;
2428 /* The increment depends on the size of the special register. */
2429 if (cris_register_size (cris_get_operand2 (inst
)) == 1)
2431 process_autoincrement (INST_BYTE_SIZE
, inst
, inst_env
);
2433 else if (cris_register_size (cris_get_operand2 (inst
)) == 2)
2435 process_autoincrement (INST_WORD_SIZE
, inst
, inst_env
);
2439 process_autoincrement (INST_DWORD_SIZE
, inst
, inst_env
);
2443 inst_env
->slot_needed
= 0;
2444 inst_env
->prefix_found
= 0;
2445 inst_env
->xflag_found
= 0;
2446 inst_env
->disable_interrupt
= 1;
2449 /* Handles moves from special registers (aka P-register) when the mode
2453 reg_mode_move_from_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2455 /* Register mode move from special register can't have a prefix. */
2456 if (inst_env
->prefix_found
)
2458 inst_env
->invalid
= 1;
2462 if (cris_get_operand1 (inst
) == REG_PC
)
2464 /* It's invalid to change the PC in a delay slot. */
2465 if (inst_env
->slot_needed
)
2467 inst_env
->invalid
= 1;
2470 /* The destination is the PC, the jump will have a delay slot. */
2471 inst_env
->delay_slot_pc
= inst_env
->preg
[cris_get_operand2 (inst
)];
2472 inst_env
->slot_needed
= 1;
2473 inst_env
->delay_slot_pc_active
= 1;
2477 /* If the destination isn't PC, there will be no jump. */
2478 inst_env
->slot_needed
= 0;
2480 inst_env
->prefix_found
= 0;
2481 inst_env
->xflag_found
= 0;
2482 inst_env
->disable_interrupt
= 1;
2485 /* Handles the MOVEM from memory to general register instruction. */
2488 move_mem_to_reg_movem_op (unsigned short inst
, inst_env_type
*inst_env
)
2490 if (inst_env
->prefix_found
)
2492 /* The prefix handles the problem if we are in a delay slot. Is the
2493 MOVEM instruction going to change the PC? */
2494 if (cris_get_operand2 (inst
) >= REG_PC
)
2496 inst_env
->reg
[REG_PC
] =
2497 read_memory_unsigned_integer (inst_env
->prefix_value
, 4);
2499 /* The assign value is the value after the increment. Normally, the
2500 assign value is the value before the increment. */
2501 if ((cris_get_operand1 (inst
) == REG_PC
)
2502 && (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
))
2504 inst_env
->reg
[REG_PC
] = inst_env
->prefix_value
;
2505 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2510 /* Is the MOVEM instruction going to change the PC? */
2511 if (cris_get_operand2 (inst
) == REG_PC
)
2513 /* It's invalid to change the PC in a delay slot. */
2514 if (inst_env
->slot_needed
)
2516 inst_env
->invalid
= 1;
2519 inst_env
->reg
[REG_PC
] =
2520 read_memory_unsigned_integer (inst_env
->reg
[cris_get_operand1 (inst
)],
2523 /* The increment is not depending on the size, instead it's depending
2524 on the number of registers loaded from memory. */
2525 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
2527 /* It's invalid to change the PC in a delay slot. */
2528 if (inst_env
->slot_needed
)
2530 inst_env
->invalid
= 1;
2533 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2536 inst_env
->slot_needed
= 0;
2537 inst_env
->prefix_found
= 0;
2538 inst_env
->xflag_found
= 0;
2539 inst_env
->disable_interrupt
= 0;
2542 /* Handles the MOVEM to memory from general register instruction. */
2545 move_reg_to_mem_movem_op (unsigned short inst
, inst_env_type
*inst_env
)
2547 if (inst_env
->prefix_found
)
2549 /* The assign value is the value after the increment. Normally, the
2550 assign value is the value before the increment. */
2551 if ((cris_get_operand1 (inst
) == REG_PC
) &&
2552 (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
))
2554 /* The prefix handles the problem if we are in a delay slot. */
2555 inst_env
->reg
[REG_PC
] = inst_env
->prefix_value
;
2556 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2561 /* The increment is not depending on the size, instead it's depending
2562 on the number of registers loaded to memory. */
2563 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
2565 /* It's invalid to change the PC in a delay slot. */
2566 if (inst_env
->slot_needed
)
2568 inst_env
->invalid
= 1;
2571 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2574 inst_env
->slot_needed
= 0;
2575 inst_env
->prefix_found
= 0;
2576 inst_env
->xflag_found
= 0;
2577 inst_env
->disable_interrupt
= 0;
2580 /* Handles the intructions that's not yet implemented, by setting
2581 inst_env->invalid to true. */
2584 not_implemented_op (unsigned short inst
, inst_env_type
*inst_env
)
2586 inst_env
->invalid
= 1;
2589 /* Handles the XOR instruction. */
2592 xor_op (unsigned short inst
, inst_env_type
*inst_env
)
2594 /* XOR can't have a prefix. */
2595 if (inst_env
->prefix_found
)
2597 inst_env
->invalid
= 1;
2601 /* Check if the PC is the target. */
2602 if (cris_get_operand2 (inst
) == REG_PC
)
2604 /* It's invalid to change the PC in a delay slot. */
2605 if (inst_env
->slot_needed
)
2607 inst_env
->invalid
= 1;
2610 inst_env
->reg
[REG_PC
] ^= inst_env
->reg
[cris_get_operand1 (inst
)];
2612 inst_env
->slot_needed
= 0;
2613 inst_env
->prefix_found
= 0;
2614 inst_env
->xflag_found
= 0;
2615 inst_env
->disable_interrupt
= 0;
2618 /* Handles the MULS instruction. */
2621 muls_op (unsigned short inst
, inst_env_type
*inst_env
)
2623 /* MULS/U can't have a prefix. */
2624 if (inst_env
->prefix_found
)
2626 inst_env
->invalid
= 1;
2630 /* Consider it invalid if the PC is the target. */
2631 if (cris_get_operand2 (inst
) == REG_PC
)
2633 inst_env
->invalid
= 1;
2636 inst_env
->slot_needed
= 0;
2637 inst_env
->prefix_found
= 0;
2638 inst_env
->xflag_found
= 0;
2639 inst_env
->disable_interrupt
= 0;
2642 /* Handles the MULU instruction. */
2645 mulu_op (unsigned short inst
, inst_env_type
*inst_env
)
2647 /* MULS/U can't have a prefix. */
2648 if (inst_env
->prefix_found
)
2650 inst_env
->invalid
= 1;
2654 /* Consider it invalid if the PC is the target. */
2655 if (cris_get_operand2 (inst
) == REG_PC
)
2657 inst_env
->invalid
= 1;
2660 inst_env
->slot_needed
= 0;
2661 inst_env
->prefix_found
= 0;
2662 inst_env
->xflag_found
= 0;
2663 inst_env
->disable_interrupt
= 0;
2666 /* Calculate the result of the instruction for ADD, SUB, CMP AND, OR and MOVE.
2667 The MOVE instruction is the move from source to register. */
2670 add_sub_cmp_and_or_move_action (unsigned short inst
, inst_env_type
*inst_env
,
2671 unsigned long source1
, unsigned long source2
)
2673 unsigned long pc_mask
;
2674 unsigned long operation_mask
;
2676 /* Find out how many bits the operation should apply to. */
2677 if (cris_get_size (inst
) == INST_BYTE_SIZE
)
2679 pc_mask
= 0xFFFFFF00;
2680 operation_mask
= 0xFF;
2682 else if (cris_get_size (inst
) == INST_WORD_SIZE
)
2684 pc_mask
= 0xFFFF0000;
2685 operation_mask
= 0xFFFF;
2687 else if (cris_get_size (inst
) == INST_DWORD_SIZE
)
2690 operation_mask
= 0xFFFFFFFF;
2694 /* The size is out of range. */
2695 inst_env
->invalid
= 1;
2699 /* The instruction just works on uw_operation_mask bits. */
2700 source2
&= operation_mask
;
2701 source1
&= operation_mask
;
2703 /* Now calculate the result. The opcode's 3 first bits separates
2704 the different actions. */
2705 switch (cris_get_opcode (inst
) & 7)
2715 case 2: /* subtract */
2719 case 3: /* compare */
2731 inst_env
->invalid
= 1;
2737 /* Make sure that the result doesn't contain more than the instruction
2739 source2
&= operation_mask
;
2741 /* Calculate the new breakpoint address. */
2742 inst_env
->reg
[REG_PC
] &= pc_mask
;
2743 inst_env
->reg
[REG_PC
] |= source1
;
2747 /* Extends the value from either byte or word size to a dword. If the mode
2748 is zero extend then the value is extended with zero. If instead the mode
2749 is signed extend the sign bit of the value is taken into consideration. */
2751 static unsigned long
2752 do_sign_or_zero_extend (unsigned long value
, unsigned short *inst
)
2754 /* The size can be either byte or word, check which one it is.
2755 Don't check the highest bit, it's indicating if it's a zero
2757 if (cris_get_size (*inst
) & INST_WORD_SIZE
)
2762 /* Check if the instruction is signed extend. If so, check if value has
2764 if (cris_is_signed_extend_bit_on (*inst
) && (value
& SIGNED_WORD_MASK
))
2766 value
|= SIGNED_WORD_EXTEND_MASK
;
2774 /* Check if the instruction is signed extend. If so, check if value has
2776 if (cris_is_signed_extend_bit_on (*inst
) && (value
& SIGNED_BYTE_MASK
))
2778 value
|= SIGNED_BYTE_EXTEND_MASK
;
2781 /* The size should now be dword. */
2782 cris_set_size_to_dword (inst
);
2786 /* Handles the register mode for the ADD, SUB, CMP, AND, OR and MOVE
2787 instruction. The MOVE instruction is the move from source to register. */
2790 reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst
,
2791 inst_env_type
*inst_env
)
2793 unsigned long operand1
;
2794 unsigned long operand2
;
2796 /* It's invalid to have a prefix to the instruction. This is a register
2797 mode instruction and can't have a prefix. */
2798 if (inst_env
->prefix_found
)
2800 inst_env
->invalid
= 1;
2803 /* Check if the instruction has PC as its target. */
2804 if (cris_get_operand2 (inst
) == REG_PC
)
2806 if (inst_env
->slot_needed
)
2808 inst_env
->invalid
= 1;
2811 /* The instruction has the PC as its target register. */
2812 operand1
= inst_env
->reg
[cris_get_operand1 (inst
)];
2813 operand2
= inst_env
->reg
[REG_PC
];
2815 /* Check if it's a extend, signed or zero instruction. */
2816 if (cris_get_opcode (inst
) < 4)
2818 operand1
= do_sign_or_zero_extend (operand1
, &inst
);
2820 /* Calculate the PC value after the instruction, i.e. where the
2821 breakpoint should be. The order of the udw_operands is vital. */
2822 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
2824 inst_env
->slot_needed
= 0;
2825 inst_env
->prefix_found
= 0;
2826 inst_env
->xflag_found
= 0;
2827 inst_env
->disable_interrupt
= 0;
2830 /* Returns the data contained at address. The size of the data is derived from
2831 the size of the operation. If the instruction is a zero or signed
2832 extend instruction, the size field is changed in instruction. */
2834 static unsigned long
2835 get_data_from_address (unsigned short *inst
, CORE_ADDR address
)
2837 int size
= cris_get_size (*inst
);
2838 unsigned long value
;
2840 /* If it's an extend instruction we don't want the signed extend bit,
2841 because it influences the size. */
2842 if (cris_get_opcode (*inst
) < 4)
2844 size
&= ~SIGNED_EXTEND_BIT_MASK
;
2846 /* Is there a need for checking the size? Size should contain the number of
2849 value
= read_memory_unsigned_integer (address
, size
);
2851 /* Check if it's an extend, signed or zero instruction. */
2852 if (cris_get_opcode (*inst
) < 4)
2854 value
= do_sign_or_zero_extend (value
, inst
);
2859 /* Handles the assign addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
2860 instructions. The MOVE instruction is the move from source to register. */
2863 handle_prefix_assign_mode_for_aritm_op (unsigned short inst
,
2864 inst_env_type
*inst_env
)
2866 unsigned long operand2
;
2867 unsigned long operand3
;
2869 check_assign (inst
, inst_env
);
2870 if (cris_get_operand2 (inst
) == REG_PC
)
2872 operand2
= inst_env
->reg
[REG_PC
];
2874 /* Get the value of the third operand. */
2875 operand3
= get_data_from_address (&inst
, inst_env
->prefix_value
);
2877 /* Calculate the PC value after the instruction, i.e. where the
2878 breakpoint should be. The order of the udw_operands is vital. */
2879 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
2881 inst_env
->slot_needed
= 0;
2882 inst_env
->prefix_found
= 0;
2883 inst_env
->xflag_found
= 0;
2884 inst_env
->disable_interrupt
= 0;
2887 /* Handles the three-operand addressing mode for the ADD, SUB, CMP, AND and
2888 OR instructions. Note that for this to work as expected, the calling
2889 function must have made sure that there is a prefix to this instruction. */
2892 three_operand_add_sub_cmp_and_or_op (unsigned short inst
,
2893 inst_env_type
*inst_env
)
2895 unsigned long operand2
;
2896 unsigned long operand3
;
2898 if (cris_get_operand1 (inst
) == REG_PC
)
2900 /* The PC will be changed by the instruction. */
2901 operand2
= inst_env
->reg
[cris_get_operand2 (inst
)];
2903 /* Get the value of the third operand. */
2904 operand3
= get_data_from_address (&inst
, inst_env
->prefix_value
);
2906 /* Calculate the PC value after the instruction, i.e. where the
2907 breakpoint should be. */
2908 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
2910 inst_env
->slot_needed
= 0;
2911 inst_env
->prefix_found
= 0;
2912 inst_env
->xflag_found
= 0;
2913 inst_env
->disable_interrupt
= 0;
2916 /* Handles the index addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
2917 instructions. The MOVE instruction is the move from source to register. */
2920 handle_prefix_index_mode_for_aritm_op (unsigned short inst
,
2921 inst_env_type
*inst_env
)
2923 if (cris_get_operand1 (inst
) != cris_get_operand2 (inst
))
2925 /* If the instruction is MOVE it's invalid. If the instruction is ADD,
2926 SUB, AND or OR something weird is going on (if everything works these
2927 instructions should end up in the three operand version). */
2928 inst_env
->invalid
= 1;
2933 /* three_operand_add_sub_cmp_and_or does the same as we should do here
2935 three_operand_add_sub_cmp_and_or_op (inst
, inst_env
);
2937 inst_env
->slot_needed
= 0;
2938 inst_env
->prefix_found
= 0;
2939 inst_env
->xflag_found
= 0;
2940 inst_env
->disable_interrupt
= 0;
2943 /* Handles the autoincrement and indirect addresing mode for the ADD, SUB,
2944 CMP, AND OR and MOVE instruction. The MOVE instruction is the move from
2945 source to register. */
2948 handle_inc_and_index_mode_for_aritm_op (unsigned short inst
,
2949 inst_env_type
*inst_env
)
2951 unsigned long operand1
;
2952 unsigned long operand2
;
2953 unsigned long operand3
;
2956 /* The instruction is either an indirect or autoincrement addressing mode.
2957 Check if the destination register is the PC. */
2958 if (cris_get_operand2 (inst
) == REG_PC
)
2960 /* Must be done here, get_data_from_address may change the size
2962 size
= cris_get_size (inst
);
2963 operand2
= inst_env
->reg
[REG_PC
];
2965 /* Get the value of the third operand, i.e. the indirect operand. */
2966 operand1
= inst_env
->reg
[cris_get_operand1 (inst
)];
2967 operand3
= get_data_from_address (&inst
, operand1
);
2969 /* Calculate the PC value after the instruction, i.e. where the
2970 breakpoint should be. The order of the udw_operands is vital. */
2971 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
2973 /* If this is an autoincrement addressing mode, check if the increment
2975 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
2977 /* Get the size field. */
2978 size
= cris_get_size (inst
);
2980 /* If it's an extend instruction we don't want the signed extend bit,
2981 because it influences the size. */
2982 if (cris_get_opcode (inst
) < 4)
2984 size
&= ~SIGNED_EXTEND_BIT_MASK
;
2986 process_autoincrement (size
, inst
, inst_env
);
2988 inst_env
->slot_needed
= 0;
2989 inst_env
->prefix_found
= 0;
2990 inst_env
->xflag_found
= 0;
2991 inst_env
->disable_interrupt
= 0;
2994 /* Handles the two-operand addressing mode, all modes except register, for
2995 the ADD, SUB CMP, AND and OR instruction. */
2998 none_reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst
,
2999 inst_env_type
*inst_env
)
3001 if (inst_env
->prefix_found
)
3003 if (cris_get_mode (inst
) == PREFIX_INDEX_MODE
)
3005 handle_prefix_index_mode_for_aritm_op (inst
, inst_env
);
3007 else if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
3009 handle_prefix_assign_mode_for_aritm_op (inst
, inst_env
);
3013 /* The mode is invalid for a prefixed base instruction. */
3014 inst_env
->invalid
= 1;
3020 handle_inc_and_index_mode_for_aritm_op (inst
, inst_env
);
3024 /* Handles the quick addressing mode for the ADD and SUB instruction. */
3027 quick_mode_add_sub_op (unsigned short inst
, inst_env_type
*inst_env
)
3029 unsigned long operand1
;
3030 unsigned long operand2
;
3032 /* It's a bad idea to be in a prefix instruction now. This is a quick mode
3033 instruction and can't have a prefix. */
3034 if (inst_env
->prefix_found
)
3036 inst_env
->invalid
= 1;
3040 /* Check if the instruction has PC as its target. */
3041 if (cris_get_operand2 (inst
) == REG_PC
)
3043 if (inst_env
->slot_needed
)
3045 inst_env
->invalid
= 1;
3048 operand1
= cris_get_quick_value (inst
);
3049 operand2
= inst_env
->reg
[REG_PC
];
3051 /* The size should now be dword. */
3052 cris_set_size_to_dword (&inst
);
3054 /* Calculate the PC value after the instruction, i.e. where the
3055 breakpoint should be. */
3056 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3058 inst_env
->slot_needed
= 0;
3059 inst_env
->prefix_found
= 0;
3060 inst_env
->xflag_found
= 0;
3061 inst_env
->disable_interrupt
= 0;
3064 /* Handles the quick addressing mode for the CMP, AND and OR instruction. */
3067 quick_mode_and_cmp_move_or_op (unsigned short inst
, inst_env_type
*inst_env
)
3069 unsigned long operand1
;
3070 unsigned long operand2
;
3072 /* It's a bad idea to be in a prefix instruction now. This is a quick mode
3073 instruction and can't have a prefix. */
3074 if (inst_env
->prefix_found
)
3076 inst_env
->invalid
= 1;
3079 /* Check if the instruction has PC as its target. */
3080 if (cris_get_operand2 (inst
) == REG_PC
)
3082 if (inst_env
->slot_needed
)
3084 inst_env
->invalid
= 1;
3087 /* The instruction has the PC as its target register. */
3088 operand1
= cris_get_quick_value (inst
);
3089 operand2
= inst_env
->reg
[REG_PC
];
3091 /* The quick value is signed, so check if we must do a signed extend. */
3092 if (operand1
& SIGNED_QUICK_VALUE_MASK
)
3095 operand1
|= SIGNED_QUICK_VALUE_EXTEND_MASK
;
3097 /* The size should now be dword. */
3098 cris_set_size_to_dword (&inst
);
3100 /* Calculate the PC value after the instruction, i.e. where the
3101 breakpoint should be. */
3102 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3104 inst_env
->slot_needed
= 0;
3105 inst_env
->prefix_found
= 0;
3106 inst_env
->xflag_found
= 0;
3107 inst_env
->disable_interrupt
= 0;
3110 /* Translate op_type to a function and call it. */
3113 cris_gdb_func (enum cris_op_type op_type
, unsigned short inst
,
3114 inst_env_type
*inst_env
)
3118 case cris_not_implemented_op
:
3119 not_implemented_op (inst
, inst_env
);
3123 abs_op (inst
, inst_env
);
3127 addi_op (inst
, inst_env
);
3131 asr_op (inst
, inst_env
);
3135 asrq_op (inst
, inst_env
);
3138 case cris_ax_ei_setf_op
:
3139 ax_ei_setf_op (inst
, inst_env
);
3142 case cris_bdap_prefix
:
3143 bdap_prefix (inst
, inst_env
);
3146 case cris_biap_prefix
:
3147 biap_prefix (inst
, inst_env
);
3151 break_op (inst
, inst_env
);
3154 case cris_btst_nop_op
:
3155 btst_nop_op (inst
, inst_env
);
3158 case cris_clearf_di_op
:
3159 clearf_di_op (inst
, inst_env
);
3162 case cris_dip_prefix
:
3163 dip_prefix (inst
, inst_env
);
3166 case cris_dstep_logshift_mstep_neg_not_op
:
3167 dstep_logshift_mstep_neg_not_op (inst
, inst_env
);
3170 case cris_eight_bit_offset_branch_op
:
3171 eight_bit_offset_branch_op (inst
, inst_env
);
3174 case cris_move_mem_to_reg_movem_op
:
3175 move_mem_to_reg_movem_op (inst
, inst_env
);
3178 case cris_move_reg_to_mem_movem_op
:
3179 move_reg_to_mem_movem_op (inst
, inst_env
);
3182 case cris_move_to_preg_op
:
3183 move_to_preg_op (inst
, inst_env
);
3187 muls_op (inst
, inst_env
);
3191 mulu_op (inst
, inst_env
);
3194 case cris_none_reg_mode_add_sub_cmp_and_or_move_op
:
3195 none_reg_mode_add_sub_cmp_and_or_move_op (inst
, inst_env
);
3198 case cris_none_reg_mode_clear_test_op
:
3199 none_reg_mode_clear_test_op (inst
, inst_env
);
3202 case cris_none_reg_mode_jump_op
:
3203 none_reg_mode_jump_op (inst
, inst_env
);
3206 case cris_none_reg_mode_move_from_preg_op
:
3207 none_reg_mode_move_from_preg_op (inst
, inst_env
);
3210 case cris_quick_mode_add_sub_op
:
3211 quick_mode_add_sub_op (inst
, inst_env
);
3214 case cris_quick_mode_and_cmp_move_or_op
:
3215 quick_mode_and_cmp_move_or_op (inst
, inst_env
);
3218 case cris_quick_mode_bdap_prefix
:
3219 quick_mode_bdap_prefix (inst
, inst_env
);
3222 case cris_reg_mode_add_sub_cmp_and_or_move_op
:
3223 reg_mode_add_sub_cmp_and_or_move_op (inst
, inst_env
);
3226 case cris_reg_mode_clear_op
:
3227 reg_mode_clear_op (inst
, inst_env
);
3230 case cris_reg_mode_jump_op
:
3231 reg_mode_jump_op (inst
, inst_env
);
3234 case cris_reg_mode_move_from_preg_op
:
3235 reg_mode_move_from_preg_op (inst
, inst_env
);
3238 case cris_reg_mode_test_op
:
3239 reg_mode_test_op (inst
, inst_env
);
3243 scc_op (inst
, inst_env
);
3246 case cris_sixteen_bit_offset_branch_op
:
3247 sixteen_bit_offset_branch_op (inst
, inst_env
);
3250 case cris_three_operand_add_sub_cmp_and_or_op
:
3251 three_operand_add_sub_cmp_and_or_op (inst
, inst_env
);
3254 case cris_three_operand_bound_op
:
3255 three_operand_bound_op (inst
, inst_env
);
3258 case cris_two_operand_bound_op
:
3259 two_operand_bound_op (inst
, inst_env
);
3263 xor_op (inst
, inst_env
);
3268 /* This wrapper is to avoid cris_get_assembler being called before
3269 exec_bfd has been set. */
3272 cris_delayed_get_disassembler (bfd_vma addr
, struct disassemble_info
*info
)
3274 int (*print_insn
) (bfd_vma addr
, struct disassemble_info
*info
);
3275 /* FIXME: cagney/2003-08-27: It should be possible to select a CRIS
3276 disassembler, even when there is no BFD. Does something like
3277 "gdb; target remote; disassmeble *0x123" work? */
3278 gdb_assert (exec_bfd
!= NULL
);
3279 print_insn
= cris_get_disassembler (exec_bfd
);
3280 gdb_assert (print_insn
!= NULL
);
3281 return print_insn (addr
, info
);
3284 /* Copied from <asm/elf.h>. */
3285 typedef unsigned long elf_greg_t
;
3287 /* Same as user_regs_struct struct in <asm/user.h>. */
3288 typedef elf_greg_t elf_gregset_t
[35];
3290 /* Unpack an elf_gregset_t into GDB's register cache. */
3293 supply_gregset (elf_gregset_t
*gregsetp
)
3296 elf_greg_t
*regp
= *gregsetp
;
3297 static char zerobuf
[4] = {0};
3299 /* The kernel dumps all 32 registers as unsigned longs, but supply_register
3300 knows about the actual size of each register so that's no problem. */
3301 for (i
= 0; i
< NUM_GENREGS
+ NUM_SPECREGS
; i
++)
3303 supply_register (i
, (char *)®p
[i
]);
3307 /* Use a local version of this function to get the correct types for
3308 regsets, until multi-arch core support is ready. */
3311 fetch_core_registers (char *core_reg_sect
, unsigned core_reg_size
,
3312 int which
, CORE_ADDR reg_addr
)
3314 elf_gregset_t gregset
;
3319 if (core_reg_size
!= sizeof (gregset
))
3321 warning ("wrong size gregset struct in core file");
3325 memcpy (&gregset
, core_reg_sect
, sizeof (gregset
));
3326 supply_gregset (&gregset
);
3330 /* We've covered all the kinds of registers we know about here,
3331 so this must be something we wouldn't know what to do with
3332 anyway. Just ignore it. */
3337 static struct core_fns cris_elf_core_fns
=
3339 bfd_target_elf_flavour
, /* core_flavour */
3340 default_check_format
, /* check_format */
3341 default_core_sniffer
, /* core_sniffer */
3342 fetch_core_registers
, /* core_read_registers */
3346 /* Fetch (and possibly build) an appropriate link_map_offsets
3347 structure for native GNU/Linux CRIS targets using the struct
3348 offsets defined in link.h (but without actual reference to that
3351 This makes it possible to access GNU/Linux CRIS shared libraries
3352 from a GDB that was not built on an GNU/Linux CRIS host (for cross
3355 See gdb/solib-svr4.h for an explanation of these fields. */
3357 static struct link_map_offsets
*
3358 cris_linux_svr4_fetch_link_map_offsets (void)
3360 static struct link_map_offsets lmo
;
3361 static struct link_map_offsets
*lmp
= NULL
;
3367 lmo
.r_debug_size
= 8; /* The actual size is 20 bytes, but
3368 this is all we need. */
3369 lmo
.r_map_offset
= 4;
3372 lmo
.link_map_size
= 20;
3374 lmo
.l_addr_offset
= 0;
3375 lmo
.l_addr_size
= 4;
3377 lmo
.l_name_offset
= 4;
3378 lmo
.l_name_size
= 4;
3380 lmo
.l_next_offset
= 12;
3381 lmo
.l_next_size
= 4;
3383 lmo
.l_prev_offset
= 16;
3384 lmo
.l_prev_size
= 4;
3391 cris_fpless_backtrace (char *noargs
, int from_tty
)
3393 /* Points at the instruction after the jsr (except when in innermost frame
3394 where it points at the original pc). */
3397 /* Temporary variable, used for parsing from the start of the function that
3398 the pc is in, up to the pc. */
3399 CORE_ADDR tmp_pc
= 0;
3402 /* Information about current frame. */
3403 struct symtab_and_line sal
;
3406 /* Present instruction. */
3407 unsigned short insn
;
3409 /* Next instruction, lookahead. */
3410 unsigned short insn_next
;
3412 /* This is to store the offset between sp at start of function and until we
3413 reach push srp (if any). */
3414 int sp_add_later
= 0;
3415 int push_srp_found
= 0;
3419 /* Frame counter. */
3422 /* For the innermost frame, we want to look at srp in case it's a leaf
3423 function (since there's no push srp in that case). */
3424 int innermost_frame
= 1;
3426 deprecated_read_register_gen (PC_REGNUM
, (char *) &pc
);
3427 deprecated_read_register_gen (SP_REGNUM
, (char *) &sp
);
3429 /* We make an explicit return when we can't find an outer frame. */
3432 /* Get file name and line number. */
3433 sal
= find_pc_line (pc
, 0);
3435 /* Get function name. */
3436 find_pc_partial_function (pc
, &func_name
, (CORE_ADDR
*) NULL
,
3437 (CORE_ADDR
*) NULL
);
3439 /* Print information about current frame. */
3440 printf_unfiltered ("#%i 0x%08lx in %s", frame
++, pc
, func_name
);
3443 printf_unfiltered (" at %s:%i", sal
.symtab
->filename
, sal
.line
);
3445 printf_unfiltered ("\n");
3447 /* Get the start address of this function. */
3448 tmp_pc
= get_pc_function_start (pc
);
3450 /* Mini parser, only meant to find push sp and sub ...,sp from the start
3451 of the function, up to the pc. */
3454 insn
= read_memory_unsigned_integer (tmp_pc
, sizeof (short));
3455 tmp_pc
+= sizeof (short);
3458 /* push <reg> 32 bit instruction */
3459 insn_next
= read_memory_unsigned_integer (tmp_pc
,
3461 tmp_pc
+= sizeof (short);
3463 /* Recognize srp. */
3464 if (insn_next
== 0xBE7E)
3466 /* For subsequent (not this one though) push or sub which
3467 affects sp, adjust sp immediately. */
3470 /* Note: this will break if we ever encounter a
3471 push vr (1 byte) or push ccr (2 bytes). */
3476 /* Some other register was pushed. */
3487 else if (cris_get_operand2 (insn
) == SP_REGNUM
3488 && cris_get_mode (insn
) == 0x0000
3489 && cris_get_opcode (insn
) == 0x000A)
3492 val
= cris_get_quick_value (insn
);
3500 sp_add_later
+= val
;
3504 else if (cris_get_operand2 (insn
) == SP_REGNUM
3505 /* Autoincrement addressing mode. */
3506 && cris_get_mode (insn
) == 0x0003
3508 && ((insn
) & 0x03E0) >> 5 == 0x0004)
3511 val
= get_data_from_address (&insn
, tmp_pc
);
3519 sp_add_later
+= val
;
3522 else if (cris_get_operand2 (insn
) == SP_REGNUM
3523 && ((insn
& 0x0F00) >> 8) == 0x0001
3524 && (cris_get_signed_offset (insn
) < 0))
3526 /* Immediate byte offset addressing prefix word with sp as base
3527 register. Used for CRIS v8 i.e. ETRAX 100 and newer if <val>
3528 is between 64 and 128.
3529 movem r<regsave>,[sp=sp-<val>] */
3530 val
= -cris_get_signed_offset (insn
);
3531 insn_next
= read_memory_unsigned_integer (tmp_pc
,
3533 tmp_pc
+= sizeof (short);
3535 if (cris_get_mode (insn_next
) == PREFIX_ASSIGN_MODE
3536 && cris_get_opcode (insn_next
) == 0x000F
3537 && cris_get_size (insn_next
) == 0x0003
3538 && cris_get_operand1 (insn_next
) == SP_REGNUM
)
3546 sp_add_later
+= val
;
3557 /* sp should now point at where srp is stored on the stack. Update
3558 the pc to the srp. */
3559 pc
= read_memory_unsigned_integer (sp
, 4);
3561 else if (innermost_frame
)
3563 /* We couldn't find a push srp in the prologue, so this must be
3564 a leaf function, and thus we use the srp register directly.
3565 This should happen at most once, for the innermost function. */
3566 deprecated_read_register_gen (SRP_REGNUM
, (char *) &pc
);
3570 /* Couldn't find an outer frame. */
3574 /* Reset flag. (In case the innermost frame wasn't a leaf, we don't
3575 want to look at the srp register later either). */
3576 innermost_frame
= 0;
3578 /* Now, add the offset for everything up to, and including push srp,
3579 that was held back during the prologue parsing. */
3585 extern initialize_file_ftype _initialize_cris_tdep
; /* -Wmissing-prototypes */
3588 _initialize_cris_tdep (void)
3590 struct cmd_list_element
*c
;
3592 gdbarch_register (bfd_arch_cris
, cris_gdbarch_init
, cris_dump_tdep
);
3594 /* CRIS-specific user-commands. */
3595 c
= add_set_cmd ("cris-version", class_support
, var_integer
,
3596 (char *) &usr_cmd_cris_version
,
3597 "Set the current CRIS version.", &setlist
);
3598 set_cmd_sfunc (c
, cris_version_update
);
3599 add_show_from_set (c
, &showlist
);
3601 c
= add_set_enum_cmd ("cris-mode", class_support
, cris_mode_enums
,
3603 "Set the current CRIS mode.", &setlist
);
3604 set_cmd_sfunc (c
, cris_mode_update
);
3605 add_show_from_set (c
, &showlist
);
3607 c
= add_cmd ("cris-fpless-backtrace", class_support
, cris_fpless_backtrace
,
3608 "Display call chain using the subroutine return pointer.\n"
3609 "Note that this displays the address after the jump to the "
3610 "subroutine.", &cmdlist
);
3612 add_core_fns (&cris_elf_core_fns
);
3616 /* Prints out all target specific values. */
3619 cris_dump_tdep (struct gdbarch
*gdbarch
, struct ui_file
*file
)
3621 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3624 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_version = %i\n",
3625 tdep
->cris_version
);
3626 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_mode = %s\n",
3632 cris_version_update (char *ignore_args
, int from_tty
,
3633 struct cmd_list_element
*c
)
3635 struct gdbarch_info info
;
3637 /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones
3638 the set command passed as a parameter. The clone operation will
3639 include (BUG?) any ``set'' command callback, if present.
3640 Commands like ``info set'' call all the ``show'' command
3641 callbacks. Unfortunately, for ``show'' commands cloned from
3642 ``set'', this includes callbacks belonging to ``set'' commands.
3643 Making this worse, this only occures if add_show_from_set() is
3644 called after add_cmd_sfunc() (BUG?). */
3646 /* From here on, trust the user's CRIS version setting. */
3647 if (cmd_type (c
) == set_cmd
)
3649 usr_cmd_cris_version_valid
= 1;
3651 /* Update the current architecture, if needed. */
3652 gdbarch_info_init (&info
);
3653 if (!gdbarch_update_p (info
))
3654 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
3659 cris_mode_update (char *ignore_args
, int from_tty
,
3660 struct cmd_list_element
*c
)
3662 struct gdbarch_info info
;
3664 /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones
3665 the set command passed as a parameter. The clone operation will
3666 include (BUG?) any ``set'' command callback, if present.
3667 Commands like ``info set'' call all the ``show'' command
3668 callbacks. Unfortunately, for ``show'' commands cloned from
3669 ``set'', this includes callbacks belonging to ``set'' commands.
3670 Making this worse, this only occures if add_show_from_set() is
3671 called after add_cmd_sfunc() (BUG?). */
3673 /* From here on, trust the user's CRIS mode setting. */
3674 if (cmd_type (c
) == set_cmd
)
3676 usr_cmd_cris_mode_valid
= 1;
3678 /* Update the current architecture, if needed. */
3679 gdbarch_info_init (&info
);
3680 if (!gdbarch_update_p (info
))
3681 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
3685 /* Copied from pa64solib.c, with a couple of minor changes. */
3688 bfd_lookup_symbol (bfd
*abfd
, const char *symname
)
3690 unsigned int storage_needed
;
3692 asymbol
**symbol_table
;
3693 unsigned int number_of_symbols
;
3695 struct cleanup
*back_to
;
3696 CORE_ADDR symaddr
= 0;
3698 storage_needed
= bfd_get_symtab_upper_bound (abfd
);
3700 if (storage_needed
> 0)
3702 symbol_table
= (asymbol
**) xmalloc (storage_needed
);
3703 back_to
= make_cleanup (free
, symbol_table
);
3704 number_of_symbols
= bfd_canonicalize_symtab (abfd
, symbol_table
);
3706 for (i
= 0; i
< number_of_symbols
; i
++)
3708 sym
= *symbol_table
++;
3709 if (!strcmp (sym
->name
, symname
))
3711 /* Bfd symbols are section relative. */
3712 symaddr
= sym
->value
+ sym
->section
->vma
;
3716 do_cleanups (back_to
);
3721 static struct gdbarch
*
3722 cris_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3724 struct gdbarch
*gdbarch
;
3725 struct gdbarch_tdep
*tdep
;
3727 const char *cris_mode
;
3730 if (usr_cmd_cris_version_valid
)
3732 /* Trust the user's CRIS version setting. */
3733 cris_version
= usr_cmd_cris_version
;
3737 /* Assume it's CRIS version 10. */
3741 if (usr_cmd_cris_mode_valid
)
3743 /* Trust the user's CRIS mode setting. */
3744 cris_mode
= usr_cmd_cris_mode
;
3746 else if (cris_version
== 10)
3748 /* Assume CRIS version 10 is in user mode. */
3749 cris_mode
= CRIS_MODE_USER
;
3753 /* Strictly speaking, older CRIS version don't have a supervisor mode,
3754 but we regard its only mode as supervisor mode. */
3755 cris_mode
= CRIS_MODE_SUPERVISOR
;
3758 /* Make the current settings visible to the user. */
3759 usr_cmd_cris_version
= cris_version
;
3760 usr_cmd_cris_mode
= cris_mode
;
3762 /* Find a candidate among the list of pre-declared architectures. Both
3763 CRIS version and ABI must match. */
3764 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3766 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
3768 if ((gdbarch_tdep (arches
->gdbarch
)->cris_version
== cris_version
)
3769 && (gdbarch_tdep (arches
->gdbarch
)->cris_mode
== cris_mode
))
3770 return arches
->gdbarch
;
3773 /* No matching architecture was found. Create a new one. */
3774 tdep
= (struct gdbarch_tdep
*) xmalloc (sizeof (struct gdbarch_tdep
));
3775 gdbarch
= gdbarch_alloc (&info
, tdep
);
3777 tdep
->cris_version
= cris_version
;
3778 tdep
->cris_mode
= cris_mode
;
3780 /* INIT shall ensure that the INFO.BYTE_ORDER is non-zero. */
3781 switch (info
.byte_order
)
3783 case BFD_ENDIAN_LITTLE
:
3787 case BFD_ENDIAN_BIG
:
3788 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: big endian byte order in info");
3792 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown byte order in info");
3795 /* FIXME: Should be replaced by a cris_return_value implementation. */
3796 set_gdbarch_store_return_value (gdbarch
, cris_store_return_value
);
3797 set_gdbarch_extract_return_value (gdbarch
, cris_extract_return_value
);
3798 set_gdbarch_deprecated_reg_struct_has_addr (gdbarch
,
3799 cris_reg_struct_has_addr
);
3800 set_gdbarch_use_struct_convention (gdbarch
, always_use_struct_convention
);
3802 /* There are 32 registers (some of which may not be implemented). */
3803 set_gdbarch_num_regs (gdbarch
, 32);
3804 set_gdbarch_sp_regnum (gdbarch
, 14);
3805 set_gdbarch_pc_regnum (gdbarch
, 15);
3806 set_gdbarch_register_name (gdbarch
, cris_register_name
);
3808 /* Length of ordinary registers used in push_word and a few other
3809 places. DEPRECATED_REGISTER_RAW_SIZE is the real way to know how
3810 big a register is. */
3811 set_gdbarch_deprecated_register_size (gdbarch
, 4);
3812 set_gdbarch_double_bit (gdbarch
, 64);
3813 /* The default definition of a long double is 2 * TARGET_DOUBLE_BIT,
3814 which means we have to set this explicitly. */
3815 set_gdbarch_long_double_bit (gdbarch
, 64);
3816 set_gdbarch_register_bytes_ok (gdbarch
, cris_register_bytes_ok
);
3817 set_gdbarch_cannot_store_register (gdbarch
, cris_cannot_store_register
);
3818 set_gdbarch_cannot_fetch_register (gdbarch
, cris_cannot_fetch_register
);
3820 /* The total amount of space needed to store (in an array called registers)
3821 GDB's copy of the machine's register state. Note: We can not use
3822 cris_register_size at this point, since it relies on current_gdbarch
3824 switch (tdep
->cris_version
)
3830 /* Support for these may be added later. */
3831 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unsupported CRIS version");
3836 /* CRIS v8 and v9, a.k.a. ETRAX 100. General registers R0 - R15
3837 (32 bits), special registers P0 - P1 (8 bits), P4 - P5 (16 bits),
3838 and P8 - P14 (32 bits). */
3839 register_bytes
= (16 * 4) + (2 * 1) + (2 * 2) + (7 * 4);
3844 /* CRIS v10 and v11, a.k.a. ETRAX 100LX. In addition to ETRAX 100,
3845 P7 (32 bits), and P15 (32 bits) have been implemented. */
3846 register_bytes
= (16 * 4) + (2 * 1) + (2 * 2) + (9 * 4);
3850 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown CRIS version");
3853 set_gdbarch_deprecated_register_bytes (gdbarch
, register_bytes
);
3855 /* Returns the register offset for the first byte of register regno's space
3856 in the saved register state. */
3857 set_gdbarch_deprecated_register_byte (gdbarch
, cris_register_offset
);
3859 /* The length of the registers in the actual machine representation. */
3860 set_gdbarch_deprecated_register_raw_size (gdbarch
, cris_register_size
);
3862 /* The largest value DEPRECATED_REGISTER_RAW_SIZE can have. */
3863 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, 32);
3865 /* The length of the registers in the program's representation. */
3866 set_gdbarch_deprecated_register_virtual_size (gdbarch
, cris_register_size
);
3868 /* The largest value DEPRECATED_REGISTER_VIRTUAL_SIZE can have. */
3869 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, 32);
3871 set_gdbarch_deprecated_register_virtual_type (gdbarch
, cris_register_virtual_type
);
3873 /* Dummy frame functions. */
3874 set_gdbarch_push_dummy_code (gdbarch
, cris_push_dummy_code
);
3875 set_gdbarch_push_dummy_call (gdbarch
, cris_push_dummy_call
);
3876 set_gdbarch_frame_align (gdbarch
, cris_frame_align
);
3878 set_gdbarch_software_single_step (gdbarch
, cris_software_single_step
);
3879 set_gdbarch_skip_prologue (gdbarch
, cris_skip_prologue
);
3881 /* The stack grows downward. */
3882 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3884 set_gdbarch_breakpoint_from_pc (gdbarch
, cris_breakpoint_from_pc
);
3886 /* Prologue analyzer may have to be able to parse an incomplete
3887 prologue (PC in prologue, that is). Check infrun.c. */
3888 set_gdbarch_unwind_pc (gdbarch
, cris_unwind_pc
);
3889 set_gdbarch_unwind_sp (gdbarch
, cris_unwind_sp
);
3890 set_gdbarch_unwind_dummy_id (gdbarch
, cris_unwind_dummy_id
);
3892 /* FIXME: Hook in the DWARF CFI frame unwinder.
3893 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
3895 frame_unwind_append_sniffer (gdbarch
, cris_frame_sniffer
);
3896 frame_base_set_default (gdbarch
, &cris_frame_base
);
3898 /* Use target_specific function to define link map offsets. */
3899 set_solib_svr4_fetch_link_map_offsets
3900 (gdbarch
, cris_linux_svr4_fetch_link_map_offsets
);
3902 /* FIXME: cagney/2003-08-27: It should be possible to select a CRIS
3903 disassembler, even when there is no BFD. Does something like
3904 "gdb; target remote; disassmeble *0x123" work? */
3905 set_gdbarch_print_insn (gdbarch
, cris_delayed_get_disassembler
);