1 /* Target dependent code for CRIS, for GDB, the GNU debugger.
2 Copyright 2001 Free Software Foundation, Inc.
3 Contributed by Axis Communications AB.
4 Written by Hendrik Ruijter, Stefan Andersson, and Orjan Friberg.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
31 #include "opcode/cris.h"
32 #include "arch-utils.h"
35 /* To get entry_point_address. */
38 #include "solib.h" /* Support for shared libraries. */
39 #include "solib-svr4.h" /* For struct link_map_offsets. */
40 #include "gdb_string.h"
45 /* There are no floating point registers. Used in gdbserver low-linux.c. */
48 /* There are 16 general registers. */
51 /* There are 16 special registers. */
55 /* Register numbers of various important registers.
56 FP_REGNUM Contains address of executing stack frame.
57 STR_REGNUM Contains the address of structure return values.
58 RET_REGNUM Contains the return value when shorter than or equal to 32 bits
59 ARG1_REGNUM Contains the first parameter to a function.
60 ARG2_REGNUM Contains the second parameter to a function.
61 ARG3_REGNUM Contains the third parameter to a function.
62 ARG4_REGNUM Contains the fourth parameter to a function. Rest on stack.
63 SP_REGNUM Contains address of top of stack.
64 PC_REGNUM Contains address of next instruction.
65 SRP_REGNUM Subroutine return pointer register.
66 BRP_REGNUM Breakpoint return pointer register. */
68 /* FP_REGNUM = 8, SP_REGNUM = 14, and PC_REGNUM = 15 have been incorporated
69 into the multi-arch framework. */
73 /* Enums with respect to the general registers, valid for all
82 /* Enums with respect to the special registers, some of which may not be
83 applicable to all CRIS versions. */
101 extern const struct cris_spec_reg cris_spec_regs
[];
103 /* CRIS version, set via the user command 'set cris-version'. Affects
104 register names and sizes.*/
105 static int usr_cmd_cris_version
;
107 /* Indicates whether to trust the above variable. */
108 static int usr_cmd_cris_version_valid
= 0;
110 /* CRIS mode, set via the user command 'set cris-mode'. Affects availability
111 of some registers. */
112 static const char *usr_cmd_cris_mode
;
114 /* Indicates whether to trust the above variable. */
115 static int usr_cmd_cris_mode_valid
= 0;
117 static const char CRIS_MODE_USER
[] = "CRIS_MODE_USER";
118 static const char CRIS_MODE_SUPERVISOR
[] = "CRIS_MODE_SUPERVISOR";
119 static const char *cris_mode_enums
[] =
122 CRIS_MODE_SUPERVISOR
,
126 /* CRIS ABI, set via the user command 'set cris-abi'.
127 There are two flavours:
128 1. Original ABI with 32-bit doubles, where arguments <= 4 bytes are
130 2. New ABI with 64-bit doubles, where arguments <= 8 bytes are passed by
132 static const char *usr_cmd_cris_abi
;
134 /* Indicates whether to trust the above variable. */
135 static int usr_cmd_cris_abi_valid
= 0;
137 /* These variables are strings instead of enums to make them usable as
138 parameters to add_set_enum_cmd. */
139 static const char CRIS_ABI_ORIGINAL
[] = "CRIS_ABI_ORIGINAL";
140 static const char CRIS_ABI_V2
[] = "CRIS_ABI_V2";
141 static const char CRIS_ABI_SYMBOL
[] = ".$CRIS_ABI_V2";
142 static const char *cris_abi_enums
[] =
149 /* CRIS architecture specific information. */
153 const char *cris_mode
;
154 const char *cris_abi
;
157 /* Functions for accessing target dependent data. */
162 return (gdbarch_tdep (current_gdbarch
)->cris_version
);
168 return (gdbarch_tdep (current_gdbarch
)->cris_mode
);
174 return (gdbarch_tdep (current_gdbarch
)->cris_abi
);
177 /* For saving call-clobbered contents in R9 when returning structs. */
178 static CORE_ADDR struct_return_address
;
180 struct frame_extra_info
186 /* The instruction environment needed to find single-step breakpoints. */
188 struct instruction_environment
190 unsigned long reg
[NUM_GENREGS
];
191 unsigned long preg
[NUM_SPECREGS
];
192 unsigned long branch_break_address
;
193 unsigned long delay_slot_pc
;
194 unsigned long prefix_value
;
199 int delay_slot_pc_active
;
201 int disable_interrupt
;
204 /* Save old breakpoints in order to restore the state before a single_step.
205 At most, two breakpoints will have to be remembered. */
207 char binsn_quantum
[BREAKPOINT_MAX
];
208 static binsn_quantum break_mem
[2];
209 static CORE_ADDR next_pc
= 0;
210 static CORE_ADDR branch_target_address
= 0;
211 static unsigned char branch_break_inserted
= 0;
213 /* Machine-dependencies in CRIS for opcodes. */
215 /* Instruction sizes. */
216 enum cris_instruction_sizes
223 /* Addressing modes. */
224 enum cris_addressing_modes
231 /* Prefix addressing modes. */
232 enum cris_prefix_addressing_modes
234 PREFIX_INDEX_MODE
= 2,
235 PREFIX_ASSIGN_MODE
= 3,
237 /* Handle immediate byte offset addressing mode prefix format. */
238 PREFIX_OFFSET_MODE
= 2
241 /* Masks for opcodes. */
242 enum cris_opcode_masks
244 BRANCH_SIGNED_SHORT_OFFSET_MASK
= 0x1,
245 SIGNED_EXTEND_BIT_MASK
= 0x2,
246 SIGNED_BYTE_MASK
= 0x80,
247 SIGNED_BYTE_EXTEND_MASK
= 0xFFFFFF00,
248 SIGNED_WORD_MASK
= 0x8000,
249 SIGNED_WORD_EXTEND_MASK
= 0xFFFF0000,
250 SIGNED_DWORD_MASK
= 0x80000000,
251 SIGNED_QUICK_VALUE_MASK
= 0x20,
252 SIGNED_QUICK_VALUE_EXTEND_MASK
= 0xFFFFFFC0
255 /* Functions for opcodes. The general form of the ETRAX 16-bit instruction:
263 cris_get_operand2 (unsigned short insn
)
265 return ((insn
& 0xF000) >> 12);
269 cris_get_mode (unsigned short insn
)
271 return ((insn
& 0x0C00) >> 10);
275 cris_get_opcode (unsigned short insn
)
277 return ((insn
& 0x03C0) >> 6);
281 cris_get_size (unsigned short insn
)
283 return ((insn
& 0x0030) >> 4);
287 cris_get_operand1 (unsigned short insn
)
289 return (insn
& 0x000F);
292 /* Additional functions in order to handle opcodes. */
295 cris_get_wide_opcode (unsigned short insn
)
297 return ((insn
& 0x03E0) >> 5);
301 cris_get_short_size (unsigned short insn
)
303 return ((insn
& 0x0010) >> 4);
307 cris_get_quick_value (unsigned short insn
)
309 return (insn
& 0x003F);
313 cris_get_bdap_quick_offset (unsigned short insn
)
315 return (insn
& 0x00FF);
319 cris_get_branch_short_offset (unsigned short insn
)
321 return (insn
& 0x00FF);
325 cris_get_asr_shift_steps (unsigned long value
)
327 return (value
& 0x3F);
331 cris_get_asr_quick_shift_steps (unsigned short insn
)
333 return (insn
& 0x1F);
337 cris_get_clear_size (unsigned short insn
)
339 return ((insn
) & 0xC000);
343 cris_is_signed_extend_bit_on (unsigned short insn
)
345 return (((insn
) & 0x20) == 0x20);
349 cris_is_xflag_bit_on (unsigned short insn
)
351 return (((insn
) & 0x1000) == 0x1000);
355 cris_set_size_to_dword (unsigned short *insn
)
362 cris_get_signed_offset (unsigned short insn
)
364 return ((signed char) (insn
& 0x00FF));
367 /* Calls an op function given the op-type, working on the insn and the
369 static void cris_gdb_func (enum cris_op_type
, unsigned short, inst_env_type
*);
371 static CORE_ADDR
cris_skip_prologue_main (CORE_ADDR pc
, int frameless_p
);
373 static struct gdbarch
*cris_gdbarch_init (struct gdbarch_info
,
374 struct gdbarch_list
*);
376 static int cris_delayed_get_disassembler (bfd_vma
, disassemble_info
*);
378 static void cris_dump_tdep (struct gdbarch
*, struct ui_file
*);
380 static void cris_version_update (char *ignore_args
, int from_tty
,
381 struct cmd_list_element
*c
);
383 static void cris_mode_update (char *ignore_args
, int from_tty
,
384 struct cmd_list_element
*c
);
386 static void cris_abi_update (char *ignore_args
, int from_tty
,
387 struct cmd_list_element
*c
);
389 static CORE_ADDR
bfd_lookup_symbol (bfd
*, const char *);
391 /* Frames information. The definition of the struct frame_info is
395 int signal_handler_caller
399 If the compilation option -fno-omit-frame-pointer is present the
400 variable frame will be set to the content of R8 which is the frame
403 The variable pc contains the address where execution is performed
404 in the present frame. The innermost frame contains the current content
405 of the register PC. All other frames contain the content of the
406 register PC in the next frame.
408 The variable signal_handler_caller is non-zero when the frame is
409 associated with the call of a signal handler.
411 The variable return_pc contains the address where execution should be
412 resumed when the present frame has finished, the return address.
414 The variable leaf_function is 1 if the return address is in the register
415 SRP, and 0 if it is on the stack.
417 Prologue instructions C-code.
418 The prologue may consist of (-fno-omit-frame-pointer)
422 move.d sp,r8 move.d sp,r8
424 movem rY,[sp] movem rY,[sp]
425 move.S rZ,[r8-U] move.S rZ,[r8-U]
427 where 1 is a non-terminal function, and 2 is a leaf-function.
429 Note that this assumption is extremely brittle, and will break at the
430 slightest change in GCC's prologue.
432 If local variables are declared or register contents are saved on stack
433 the subq-instruction will be present with X as the number of bytes
434 needed for storage. The reshuffle with respect to r8 may be performed
435 with any size S (b, w, d) and any of the general registers Z={0..13}.
436 The offset U should be representable by a signed 8-bit value in all cases.
437 Thus, the prefix word is assumed to be immediate byte offset mode followed
438 by another word containing the instruction.
447 Prologue instructions C++-code.
448 Case 1) and 2) in the C-code may be followed by
454 move.S [r8+U],rZ ; P4
456 if any of the call parameters are stored. The host expects these
457 instructions to be executed in order to get the call parameters right. */
459 /* Examine the prologue of a function. The variable ip is the address of
460 the first instruction of the prologue. The variable limit is the address
461 of the first instruction after the prologue. The variable fi contains the
462 information in struct frame_info. The variable frameless_p controls whether
463 the entire prologue is examined (0) or just enough instructions to
464 determine that it is a prologue (1). */
467 cris_examine (CORE_ADDR ip
, CORE_ADDR limit
, struct frame_info
*fi
,
470 /* Present instruction. */
473 /* Next instruction, lookahead. */
474 unsigned short insn_next
;
477 /* Is there a push fp? */
480 /* Number of byte on stack used for local variables and movem. */
483 /* Highest register number in a movem. */
486 /* move.d r<source_register>,rS */
487 short source_register
;
489 /* This frame is with respect to a leaf until a push srp is found. */
490 fi
->extra_info
->leaf_function
= 1;
492 /* This frame is without the FP until a push fp is found. */
495 /* Assume nothing on stack. */
499 /* No information about register contents so far. */
501 /* We only want to know the end of the prologue when fi->saved_regs == 0.
502 When the saved registers are allocated full information is required. */
505 for (regno
= 0; regno
< NUM_REGS
; regno
++)
506 fi
->saved_regs
[regno
] = 0;
509 /* Find the prologue instructions. */
512 insn
= read_memory_unsigned_integer (ip
, sizeof (short));
513 ip
+= sizeof (short);
516 /* push <reg> 32 bit instruction */
517 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
518 ip
+= sizeof (short);
519 regno
= cris_get_operand2 (insn_next
);
521 /* This check, meant to recognize srp, used to be regno ==
522 (SRP_REGNUM - NUM_GENREGS), but that covers r11 also. */
523 if (insn_next
== 0xBE7E)
529 fi
->extra_info
->leaf_function
= 0;
531 else if (regno
== FP_REGNUM
)
536 else if (insn
== 0x866E)
545 else if (cris_get_operand2 (insn
) == SP_REGNUM
546 && cris_get_mode (insn
) == 0x0000
547 && cris_get_opcode (insn
) == 0x000A)
550 val
= cris_get_quick_value (insn
);
552 else if (cris_get_mode (insn
) == 0x0002
553 && cris_get_opcode (insn
) == 0x000F
554 && cris_get_size (insn
) == 0x0003
555 && cris_get_operand1 (insn
) == SP_REGNUM
)
557 /* movem r<regsave>,[sp] */
562 regsave
= cris_get_operand2 (insn
);
564 else if (cris_get_operand2 (insn
) == SP_REGNUM
565 && ((insn
& 0x0F00) >> 8) == 0x0001
566 && (cris_get_signed_offset (insn
) < 0))
568 /* Immediate byte offset addressing prefix word with sp as base
569 register. Used for CRIS v8 i.e. ETRAX 100 and newer if <val>
570 is between 64 and 128.
571 movem r<regsave>,[sp=sp-<val>] */
572 val
= -cris_get_signed_offset (insn
);
573 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
574 ip
+= sizeof (short);
575 if (cris_get_mode (insn_next
) == PREFIX_ASSIGN_MODE
576 && cris_get_opcode (insn_next
) == 0x000F
577 && cris_get_size (insn_next
) == 0x0003
578 && cris_get_operand1 (insn_next
) == SP_REGNUM
)
584 regsave
= cris_get_operand2 (insn_next
);
588 /* The prologue ended before the limit was reached. */
589 ip
-= 2 * sizeof (short);
593 else if (cris_get_mode (insn
) == 0x0001
594 && cris_get_opcode (insn
) == 0x0009
595 && cris_get_size (insn
) == 0x0002)
597 /* move.d r<10..13>,r<0..15> */
602 source_register
= cris_get_operand1 (insn
);
604 /* FIXME? In the glibc solibs, the prologue might contain something
605 like (this example taken from relocate_doit):
608 which isn't covered by the source_register check below. Question
609 is whether to add a check for this combo, or make better use of
610 the limit variable instead. */
611 if (source_register
< ARG1_REGNUM
|| source_register
> ARG4_REGNUM
)
613 /* The prologue ended before the limit was reached. */
614 ip
-= sizeof (short);
618 else if (cris_get_operand2 (insn
) == FP_REGNUM
619 /* The size is a fixed-size. */
620 && ((insn
& 0x0F00) >> 8) == 0x0001
621 /* A negative offset. */
622 && (cris_get_signed_offset (insn
) < 0))
624 /* move.S rZ,[r8-U] (?) */
625 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
626 ip
+= sizeof (short);
627 regno
= cris_get_operand2 (insn_next
);
628 if ((regno
>= 0 && regno
< SP_REGNUM
)
629 && cris_get_mode (insn_next
) == PREFIX_OFFSET_MODE
630 && cris_get_opcode (insn_next
) == 0x000F)
632 /* move.S rZ,[r8-U] */
637 /* The prologue ended before the limit was reached. */
638 ip
-= 2 * sizeof (short);
642 else if (cris_get_operand2 (insn
) == FP_REGNUM
643 /* The size is a fixed-size. */
644 && ((insn
& 0x0F00) >> 8) == 0x0001
645 /* A positive offset. */
646 && (cris_get_signed_offset (insn
) > 0))
648 /* move.S [r8+U],rZ (?) */
649 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
650 ip
+= sizeof (short);
651 regno
= cris_get_operand2 (insn_next
);
652 if ((regno
>= 0 && regno
< SP_REGNUM
)
653 && cris_get_mode (insn_next
) == PREFIX_OFFSET_MODE
654 && cris_get_opcode (insn_next
) == 0x0009
655 && cris_get_operand1 (insn_next
) == regno
)
657 /* move.S [r8+U],rZ */
662 /* The prologue ended before the limit was reached. */
663 ip
-= 2 * sizeof (short);
669 /* The prologue ended before the limit was reached. */
670 ip
-= sizeof (short);
676 /* We only want to know the end of the prologue when
677 fi->saved_regs == 0. */
683 fi
->saved_regs
[FP_REGNUM
] = FRAME_FP (fi
);
685 /* Calculate the addresses. */
686 for (regno
= regsave
; regno
>= 0; regno
--)
688 fi
->saved_regs
[regno
] = FRAME_FP (fi
) - val
;
691 if (fi
->extra_info
->leaf_function
)
693 /* Set the register SP to contain the stack pointer of
695 fi
->saved_regs
[SP_REGNUM
] = FRAME_FP (fi
) + 4;
699 /* Set the register SP to contain the stack pointer of
701 fi
->saved_regs
[SP_REGNUM
] = FRAME_FP (fi
) + 8;
703 /* Set the register SRP to contain the return address of
705 fi
->saved_regs
[SRP_REGNUM
] = FRAME_FP (fi
) + 4;
711 /* Advance pc beyond any function entry prologue instructions at pc
712 to reach some "real" code. */
715 cris_skip_prologue (CORE_ADDR pc
)
717 return cris_skip_prologue_main (pc
, 0);
720 /* As cris_skip_prologue, but stops as soon as it knows that the function
721 has a frame. Its result is equal to its input pc if the function is
722 frameless, unequal otherwise. */
725 cris_skip_prologue_frameless_p (CORE_ADDR pc
)
727 return cris_skip_prologue_main (pc
, 1);
730 /* Given a PC value corresponding to the start of a function, return the PC
731 of the first instruction after the function prologue. */
734 cris_skip_prologue_main (CORE_ADDR pc
, int frameless_p
)
736 struct frame_info fi
;
737 static struct frame_extra_info fei
;
738 struct symtab_and_line sal
= find_pc_line (pc
, 0);
740 CORE_ADDR pc_after_prologue
;
742 /* frame_info now contains dynamic memory. Since fi is a dummy here,
743 I use static memory for extra_info, and don't bother allocating
744 memory for saved_regs. */
746 fi
.extra_info
= &fei
;
748 /* If there is no symbol information then sal.end == 0, and we end up
749 examining only the first instruction in the function prologue.
750 Exaggerating the limit seems to be harmless. */
752 best_limit
= sal
.end
;
754 best_limit
= pc
+ 100;
756 pc_after_prologue
= cris_examine (pc
, best_limit
, &fi
, frameless_p
);
757 return pc_after_prologue
;
760 /* Use the program counter to determine the contents and size of a breakpoint
761 instruction. It returns a pointer to a string of bytes that encode a
762 breakpoint instruction, stores the length of the string to *lenptr, and
763 adjusts pcptr (if necessary) to point to the actual memory location where
764 the breakpoint should be inserted. */
766 const unsigned char *
767 cris_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
769 static unsigned char break_insn
[] = {0x38, 0xe9};
775 /* Returns the register SRP (subroutine return pointer) which must contain
776 the content of the register PC after a function call. */
779 cris_saved_pc_after_call (struct frame_info
*frame
)
781 return read_register (SRP_REGNUM
);
784 /* Returns 1 if spec_reg is applicable to the current gdbarch's CRIS version,
788 cris_spec_reg_applicable (struct cris_spec_reg spec_reg
)
790 int version
= cris_version ();
792 switch (spec_reg
.applicable_version
)
794 case cris_ver_version_all
:
796 case cris_ver_warning
:
797 /* Indeterminate/obsolete. */
800 /* Simulator only. */
803 return (version
>= 0 && version
<= 3);
805 return (version
>= 3);
807 return (version
== 8 || version
== 9);
809 return (version
>= 8);
811 return (version
>= 10);
813 /* Invalid cris version. */
818 /* Returns the register size in unit byte. Returns 0 for an unimplemented
819 register, -1 for an invalid register. */
822 cris_register_size (int regno
)
827 if (regno
>= 0 && regno
< NUM_GENREGS
)
829 /* General registers (R0 - R15) are 32 bits. */
832 else if (regno
>= NUM_GENREGS
&& regno
< NUM_REGS
)
834 /* Special register (R16 - R31). cris_spec_regs is zero-based.
835 Adjust regno accordingly. */
836 spec_regno
= regno
- NUM_GENREGS
;
838 /* The entries in cris_spec_regs are stored in register number order,
839 which means we can shortcut into the array when searching it. */
840 for (i
= spec_regno
; cris_spec_regs
[i
].name
!= NULL
; i
++)
842 if (cris_spec_regs
[i
].number
== spec_regno
843 && cris_spec_reg_applicable (cris_spec_regs
[i
]))
844 /* Go with the first applicable register. */
845 return cris_spec_regs
[i
].reg_size
;
847 /* Special register not applicable to this CRIS version. */
852 /* Invalid register. */
857 /* Nonzero if regno should not be fetched from the target. This is the case
858 for unimplemented (size 0) and non-existant registers. */
861 cris_cannot_fetch_register (int regno
)
863 return ((regno
< 0 || regno
>= NUM_REGS
)
864 || (cris_register_size (regno
) == 0));
867 /* Nonzero if regno should not be written to the target, for various
871 cris_cannot_store_register (int regno
)
873 /* There are three kinds of registers we refuse to write to.
874 1. Those that not implemented.
875 2. Those that are read-only (depends on the processor mode).
876 3. Those registers to which a write has no effect.
879 if (regno
< 0 || regno
>= NUM_REGS
|| cris_register_size (regno
) == 0)
880 /* Not implemented. */
883 else if (regno
== VR_REGNUM
)
887 else if (regno
== P0_REGNUM
|| regno
== P4_REGNUM
|| regno
== P8_REGNUM
)
888 /* Writing has no effect. */
891 else if (cris_mode () == CRIS_MODE_USER
)
893 if (regno
== IBR_REGNUM
|| regno
== BAR_REGNUM
|| regno
== BRP_REGNUM
894 || regno
== IRP_REGNUM
)
895 /* Read-only in user mode. */
902 /* Returns the register offset for the first byte of register regno's space
903 in the saved register state. Returns -1 for an invalid or unimplemented
907 cris_register_offset (int regno
)
913 if (regno
>= 0 && regno
< NUM_REGS
)
915 /* FIXME: The offsets should be cached and calculated only once,
916 when the architecture being debugged has changed. */
917 for (i
= 0; i
< regno
; i
++)
918 offset
+= cris_register_size (i
);
924 /* Invalid register. */
929 /* Return the GDB type (defined in gdbtypes.c) for the "standard" data type
930 of data in register regno. */
933 cris_register_virtual_type (int regno
)
935 if (regno
== SP_REGNUM
|| regno
== PC_REGNUM
936 || (regno
> P8_REGNUM
&& regno
< USP_REGNUM
))
938 /* SP, PC, IBR, IRP, SRP, BAR, DCCR, BRP */
939 return lookup_pointer_type (builtin_type_void
);
941 else if (regno
== P8_REGNUM
|| regno
== USP_REGNUM
942 || (regno
>= 0 && regno
< SP_REGNUM
))
944 /* R0 - R13, P8, P15 */
945 return builtin_type_unsigned_long
;
947 else if (regno
> P3_REGNUM
&& regno
< P8_REGNUM
)
949 /* P4, CCR, DCR0, DCR1 */
950 return builtin_type_unsigned_short
;
952 else if (regno
> PC_REGNUM
&& regno
< P4_REGNUM
)
955 return builtin_type_unsigned_char
;
959 /* Invalid register. */
960 return builtin_type_void
;
964 /* Stores a function return value of type type, where valbuf is the address
965 of the value to be stored. */
967 /* In the original CRIS ABI, R10 is used to store return values. */
970 cris_abi_original_store_return_value (struct type
*type
, char *valbuf
)
972 int len
= TYPE_LENGTH (type
);
974 if (len
<= REGISTER_SIZE
)
975 write_register_bytes (REGISTER_BYTE (RET_REGNUM
), valbuf
, len
);
977 internal_error (__FILE__
, __LINE__
, "cris_abi_original_store_return_value: type length too large.");
980 /* In the CRIS ABI V2, R10 and R11 are used to store return values. */
983 cris_abi_v2_store_return_value (struct type
*type
, char *valbuf
)
985 int len
= TYPE_LENGTH (type
);
987 if (len
<= 2 * REGISTER_SIZE
)
989 /* Note that this works since R10 and R11 are consecutive registers. */
990 write_register_bytes (REGISTER_BYTE (RET_REGNUM
), valbuf
, len
);
993 internal_error (__FILE__
, __LINE__
, "cris_abi_v2_store_return_value: type length too large.");
996 /* Return the name of register regno as a string. Return NULL for an invalid or
997 unimplemented register. */
1000 cris_register_name (int regno
)
1002 static char *cris_genreg_names
[] =
1003 { "r0", "r1", "r2", "r3", \
1004 "r4", "r5", "r6", "r7", \
1005 "r8", "r9", "r10", "r11", \
1006 "r12", "r13", "sp", "pc" };
1011 if (regno
>= 0 && regno
< NUM_GENREGS
)
1013 /* General register. */
1014 return cris_genreg_names
[regno
];
1016 else if (regno
>= NUM_GENREGS
&& regno
< NUM_REGS
)
1018 /* Special register (R16 - R31). cris_spec_regs is zero-based.
1019 Adjust regno accordingly. */
1020 spec_regno
= regno
- NUM_GENREGS
;
1022 /* The entries in cris_spec_regs are stored in register number order,
1023 which means we can shortcut into the array when searching it. */
1024 for (i
= spec_regno
; cris_spec_regs
[i
].name
!= NULL
; i
++)
1026 if (cris_spec_regs
[i
].number
== spec_regno
1027 && cris_spec_reg_applicable (cris_spec_regs
[i
]))
1028 /* Go with the first applicable register. */
1029 return cris_spec_regs
[i
].name
;
1031 /* Special register not applicable to this CRIS version. */
1036 /* Invalid register. */
1042 cris_register_bytes_ok (long bytes
)
1044 return (bytes
== REGISTER_BYTES
);
1047 /* Extract from an array regbuf containing the raw register state a function
1048 return value of type type, and copy that, in virtual format, into
1051 /* In the original CRIS ABI, R10 is used to return values. */
1054 cris_abi_original_extract_return_value (struct type
*type
, char *regbuf
,
1057 int len
= TYPE_LENGTH (type
);
1059 if (len
<= REGISTER_SIZE
)
1060 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET_REGNUM
), len
);
1062 internal_error (__FILE__
, __LINE__
, "cris_abi_original_extract_return_value: type length too large");
1065 /* In the CRIS ABI V2, R10 and R11 are used to store return values. */
1068 cris_abi_v2_extract_return_value (struct type
*type
, char *regbuf
,
1071 int len
= TYPE_LENGTH (type
);
1073 if (len
<= 2 * REGISTER_SIZE
)
1074 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET_REGNUM
), len
);
1076 internal_error (__FILE__
, __LINE__
, "cris_abi_v2_extract_return_value: type length too large");
1079 /* Store the address of the place in which to copy the structure the
1080 subroutine will return. In the CRIS ABI, R9 is used in order to pass
1081 the address of the allocated area where a structure return value must
1082 be stored. R9 is call-clobbered, which means we must save it here for
1086 cris_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1088 write_register (STR_REGNUM
, addr
);
1089 struct_return_address
= addr
;
1092 /* Extract from regbuf the address where a function should return a
1093 structure value. It's not there in the CRIS ABI, so we must do it another
1097 cris_extract_struct_value_address (char *regbuf
)
1099 return struct_return_address
;
1102 /* Returns 1 if a value of the given type being returned from a function
1103 must have space allocated for it on the stack. gcc_p is true if the
1104 function being considered is known to have been compiled by GCC.
1105 In the CRIS ABI, structure return values are passed to the called
1106 function by reference in register R9 to a caller-allocated area, so
1107 this is always true. */
1110 cris_use_struct_convention (int gcc_p
, struct type
*type
)
1115 /* Returns 1 if the given type will be passed by pointer rather than
1118 /* In the original CRIS ABI, arguments shorter than or equal to 32 bits are
1122 cris_abi_original_reg_struct_has_addr (int gcc_p
, struct type
*type
)
1124 return (TYPE_LENGTH (type
) > 4);
1127 /* In the CRIS ABI V2, arguments shorter than or equal to 64 bits are passed
1131 cris_abi_v2_reg_struct_has_addr (int gcc_p
, struct type
*type
)
1133 return (TYPE_LENGTH (type
) > 8);
1136 /* Returns 1 if the function invocation represented by fi does not have a
1137 stack frame associated with it. Otherwise return 0. */
1140 cris_frameless_function_invocation (struct frame_info
*fi
)
1142 if (fi
->signal_handler_caller
)
1145 return frameless_look_for_prologue (fi
);
1148 /* See frame.h. Determines the address of all registers in the current stack
1149 frame storing each in frame->saved_regs. Space for frame->saved_regs shall
1150 be allocated by FRAME_INIT_SAVED_REGS using either frame_saved_regs_zalloc
1151 or frame_obstack_alloc. */
1154 cris_frame_init_saved_regs (struct frame_info
*fi
)
1157 struct symtab_and_line sal
;
1159 char *dummy_regs
= deprecated_generic_find_dummy_frame (fi
->pc
, fi
->frame
);
1161 /* Examine the entire prologue. */
1162 register int frameless_p
= 0;
1164 /* Has this frame's registers already been initialized? */
1168 frame_saved_regs_zalloc (fi
);
1172 /* I don't see this ever happening, considering the context in which
1173 cris_frame_init_saved_regs is called (always when we're not in
1175 memcpy (&fi
->saved_regs
, dummy_regs
, sizeof (fi
->saved_regs
));
1179 ip
= get_pc_function_start (fi
->pc
);
1180 sal
= find_pc_line (ip
, 0);
1182 /* If there is no symbol information then sal.end == 0, and we end up
1183 examining only the first instruction in the function prologue.
1184 Exaggerating the limit seems to be harmless. */
1186 best_limit
= sal
.end
;
1188 best_limit
= ip
+ 100;
1190 cris_examine (ip
, best_limit
, fi
, frameless_p
);
1194 /* Initialises the extra frame information at the creation of a new frame.
1195 The inparameter fromleaf is 0 when the call is from create_new_frame.
1196 When the call is from get_prev_frame_info, fromleaf is determined by
1197 cris_frameless_function_invocation. */
1200 cris_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1204 /* Called from get_prev_frame. */
1205 fi
->pc
= FRAME_SAVED_PC (fi
->next
);
1208 fi
->extra_info
= (struct frame_extra_info
*)
1209 frame_obstack_alloc (sizeof (struct frame_extra_info
));
1211 fi
->extra_info
->return_pc
= 0;
1212 fi
->extra_info
->leaf_function
= 0;
1214 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1216 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
1217 by assuming it's always FP. */
1218 fi
->frame
= deprecated_read_register_dummy (fi
->pc
, fi
->frame
,
1220 fi
->extra_info
->return_pc
=
1221 deprecated_read_register_dummy (fi
->pc
, fi
->frame
, PC_REGNUM
);
1223 /* FIXME: Is this necessarily true? */
1224 fi
->extra_info
->leaf_function
= 0;
1228 cris_frame_init_saved_regs (fi
);
1230 /* Check fromleaf/frameless_function_invocation. (FIXME) */
1232 if (fi
->saved_regs
[SRP_REGNUM
] != 0)
1234 /* SRP was saved on the stack; non-leaf function. */
1235 fi
->extra_info
->return_pc
=
1236 read_memory_integer (fi
->saved_regs
[SRP_REGNUM
],
1237 REGISTER_RAW_SIZE (SRP_REGNUM
));
1241 /* SRP is still in a register; leaf function. */
1242 fi
->extra_info
->return_pc
= read_register (SRP_REGNUM
);
1243 /* FIXME: Should leaf_function be set to 1 here? */
1244 fi
->extra_info
->leaf_function
= 1;
1249 /* Return the content of the frame pointer in the present frame. In other
1250 words, determine the address of the calling function's frame. */
1253 cris_frame_chain (struct frame_info
*fi
)
1255 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1259 else if (!inside_entry_file (fi
->pc
))
1261 return read_memory_unsigned_integer (FRAME_FP (fi
), 4);
1269 /* Return the saved PC (which equals the return address) of this frame. */
1272 cris_frame_saved_pc (struct frame_info
*fi
)
1274 return fi
->extra_info
->return_pc
;
1277 /* Return the address of the argument block for the frame described
1278 by struct frame_info. */
1281 cris_frame_args_address (struct frame_info
*fi
)
1283 return FRAME_FP (fi
);
1286 /* Return the address of the locals block for the frame
1287 described by struct frame_info. */
1290 cris_frame_locals_address (struct frame_info
*fi
)
1292 return FRAME_FP (fi
);
1295 /* Setup the function arguments for calling a function in the inferior. */
1298 cris_abi_original_push_arguments (int nargs
, struct value
**args
,
1299 CORE_ADDR sp
, int struct_return
,
1300 CORE_ADDR struct_addr
)
1311 /* Data and parameters reside in different areas on the stack.
1312 Both frame pointers grow toward higher addresses. */
1313 CORE_ADDR fp_params
;
1316 /* Are we returning a value using a structure return or a normal value
1317 return? struct_addr is the address of the reserved space for the return
1318 structure to be written on the stack. */
1321 write_register (STR_REGNUM
, struct_addr
);
1324 /* Make sure there's space on the stack. Allocate space for data and a
1325 parameter to refer to that data. */
1326 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
1327 stack_alloc
+= (TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + REGISTER_SIZE
);
1329 /* We may over-allocate a little here, but that won't hurt anything. */
1331 /* Initialize stack frame pointers. */
1333 fp_data
= sp
+ (nargs
* REGISTER_SIZE
);
1335 /* Now load as many as possible of the first arguments into
1336 registers, and push the rest onto the stack. */
1337 argreg
= ARG1_REGNUM
;
1340 for (argnum
= 0; argnum
< nargs
; argnum
++)
1342 type
= VALUE_TYPE (args
[argnum
]);
1343 len
= TYPE_LENGTH (type
);
1344 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
1346 if (len
<= REGISTER_SIZE
&& argreg
<= ARG4_REGNUM
)
1348 /* Data fits in a register; put it in the first available
1350 write_register (argreg
, *(unsigned long *) val
);
1353 else if (len
> REGISTER_SIZE
&& argreg
<= ARG4_REGNUM
)
1355 /* Data does not fit in register; pass it on the stack and
1356 put its address in the first available register. */
1357 write_memory (fp_data
, val
, len
);
1358 write_register (argreg
, fp_data
);
1362 else if (len
> REGISTER_SIZE
)
1364 /* Data does not fit in register; put both data and
1365 parameter on the stack. */
1366 write_memory (fp_data
, val
, len
);
1367 write_memory (fp_params
, (char *) (&fp_data
), REGISTER_SIZE
);
1369 fp_params
+= REGISTER_SIZE
;
1373 /* Data fits in a register, but we are out of registers;
1374 put the parameter on the stack. */
1375 write_memory (fp_params
, val
, REGISTER_SIZE
);
1376 fp_params
+= REGISTER_SIZE
;
1384 cris_abi_v2_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1385 int struct_return
, CORE_ADDR struct_addr
)
1394 /* The function's arguments and memory allocated by gdb for the arguments to
1395 point at reside in separate areas on the stack.
1396 Both frame pointers grow toward higher addresses. */
1400 /* Are we returning a value using a structure return or a normal value
1401 return? struct_addr is the address of the reserved space for the return
1402 structure to be written on the stack. */
1405 write_register (STR_REGNUM
, struct_addr
);
1408 /* Allocate enough to keep things word-aligned on both parts of the
1411 for (argnum
= 0; argnum
< nargs
; argnum
++)
1416 len
= TYPE_LENGTH (VALUE_TYPE (args
[argnum
]));
1417 reg_demand
= (len
/ REGISTER_SIZE
) + (len
% REGISTER_SIZE
!= 0 ? 1 : 0);
1419 /* reg_demand * REGISTER_SIZE is the amount of memory we might need to
1420 allocate for this argument. 2 * REGISTER_SIZE is the amount of stack
1421 space we might need to pass the argument itself (either by value or by
1423 stack_alloc
+= (reg_demand
* REGISTER_SIZE
+ 2 * REGISTER_SIZE
);
1426 /* We may over-allocate a little here, but that won't hurt anything. */
1428 /* Initialize frame pointers. */
1430 fp_mem
= sp
+ (nargs
* (2 * REGISTER_SIZE
));
1432 /* Now load as many as possible of the first arguments into registers,
1433 and push the rest onto the stack. */
1434 argreg
= ARG1_REGNUM
;
1437 for (argnum
= 0; argnum
< nargs
; argnum
++)
1444 len
= TYPE_LENGTH (VALUE_TYPE (args
[argnum
]));
1445 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
1447 /* How may registers worth of storage do we need for this argument? */
1448 reg_demand
= (len
/ REGISTER_SIZE
) + (len
% REGISTER_SIZE
!= 0 ? 1 : 0);
1450 if (len
<= (2 * REGISTER_SIZE
)
1451 && (argreg
+ reg_demand
- 1 <= ARG4_REGNUM
))
1453 /* Data passed by value. Fits in available register(s). */
1454 for (i
= 0; i
< reg_demand
; i
++)
1456 write_register (argreg
, *(unsigned long *) val
);
1458 val
+= REGISTER_SIZE
;
1461 else if (len
<= (2 * REGISTER_SIZE
) && argreg
<= ARG4_REGNUM
)
1463 /* Data passed by value. Does not fit in available register(s).
1464 Use the register(s) first, then the stack. */
1465 for (i
= 0; i
< reg_demand
; i
++)
1467 if (argreg
<= ARG4_REGNUM
)
1469 write_register (argreg
, *(unsigned long *) val
);
1471 val
+= REGISTER_SIZE
;
1475 /* I guess this memory write could write the remaining data
1476 all at once instead of in REGISTER_SIZE chunks. */
1477 write_memory (fp_arg
, val
, REGISTER_SIZE
);
1478 fp_arg
+= REGISTER_SIZE
;
1479 val
+= REGISTER_SIZE
;
1483 else if (len
> (2 * REGISTER_SIZE
))
1485 /* Data passed by reference. Put it on the stack. */
1486 write_memory (fp_mem
, val
, len
);
1487 write_memory (fp_arg
, (char *) (&fp_mem
), REGISTER_SIZE
);
1489 /* fp_mem need not be word-aligned since it's just a chunk of
1490 memory being pointed at. That is, += len would do. */
1491 fp_mem
+= reg_demand
* REGISTER_SIZE
;
1492 fp_arg
+= REGISTER_SIZE
;
1496 /* Data passed by value. No available registers. Put it on
1498 write_memory (fp_arg
, val
, len
);
1500 /* fp_arg must be word-aligned (i.e., don't += len) to match
1501 the function prologue. */
1502 fp_arg
+= reg_demand
* REGISTER_SIZE
;
1509 /* Never put the return address on the stack. The register SRP is pushed
1510 by the called function unless it is a leaf-function. Due to the BRP
1511 register the PC will change when continue is sent. */
1514 cris_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1516 write_register (SRP_REGNUM
, CALL_DUMMY_ADDRESS ());
1520 /* Restore the machine to the state it had before the current frame
1521 was created. Discard the innermost frame from the stack and restore
1522 all saved registers. */
1525 cris_pop_frame (void)
1527 register struct frame_info
*fi
= get_current_frame ();
1529 register int stack_offset
= 0;
1531 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1533 /* This happens when we hit a breakpoint set at the entry point,
1534 when returning from a dummy frame. */
1535 generic_pop_dummy_frame ();
1539 cris_frame_init_saved_regs (fi
);
1541 /* For each register, the address of where it was saved on entry to
1542 the frame now lies in fi->saved_regs[regno], or zero if it was not
1543 saved. This includes special registers such as PC and FP saved in
1544 special ways in the stack frame. The SP_REGNUM is even more
1545 special, the address here is the SP for the next frame, not the
1546 address where the SP was saved. */
1548 /* Restore general registers R0 - R7. They were pushed on the stack
1549 after SP was saved. */
1550 for (regno
= 0; regno
< FP_REGNUM
; regno
++)
1552 if (fi
->saved_regs
[regno
])
1554 write_register (regno
,
1555 read_memory_integer (fi
->saved_regs
[regno
], 4));
1559 if (fi
->saved_regs
[FP_REGNUM
])
1561 /* Pop the frame pointer (R8). It was pushed before SP
1563 write_register (FP_REGNUM
,
1564 read_memory_integer (fi
->saved_regs
[FP_REGNUM
], 4));
1567 /* Not a leaf function. */
1568 if (fi
->saved_regs
[SRP_REGNUM
])
1570 /* SRP was pushed before SP was saved. */
1574 /* Restore the SP and adjust for R8 and (possibly) SRP. */
1575 write_register (SP_REGNUM
, fi
->saved_regs
[FP_REGNUM
] + stack_offset
);
1579 /* Currently, we can't get the correct info into fi->saved_regs
1580 without a frame pointer. */
1583 /* Restore the PC. */
1584 write_register (PC_REGNUM
, fi
->extra_info
->return_pc
);
1586 flush_cached_frames ();
1589 /* Calculates a value that measures how good inst_args constraints an
1590 instruction. It stems from cris_constraint, found in cris-dis.c. */
1593 constraint (unsigned int insn
, const signed char *inst_args
,
1594 inst_env_type
*inst_env
)
1599 const char *s
= inst_args
;
1605 if ((insn
& 0x30) == 0x30)
1610 /* A prefix operand. */
1611 if (inst_env
->prefix_found
)
1617 /* A "push" prefix. (This check was REMOVED by san 970921.) Check for
1618 valid "push" size. In case of special register, it may be != 4. */
1619 if (inst_env
->prefix_found
)
1625 retval
= (((insn
>> 0xC) & 0xF) == (insn
& 0xF));
1633 tmp
= (insn
>> 0xC) & 0xF;
1635 for (i
= 0; cris_spec_regs
[i
].name
!= NULL
; i
++)
1637 /* Since we match four bits, we will give a value of
1638 4 - 1 = 3 in a match. If there is a corresponding
1639 exact match of a special register in another pattern, it
1640 will get a value of 4, which will be higher. This should
1641 be correct in that an exact pattern would match better that
1643 Note that there is a reason for not returning zero; the
1644 pattern for "clear" is partly matched in the bit-pattern
1645 (the two lower bits must be zero), while the bit-pattern
1646 for a move from a special register is matched in the
1647 register constraint.
1648 This also means we will will have a race condition if
1649 there is a partly match in three bits in the bit pattern. */
1650 if (tmp
== cris_spec_regs
[i
].number
)
1657 if (cris_spec_regs
[i
].name
== NULL
)
1664 /* Returns the number of bits set in the variable value. */
1667 number_of_bits (unsigned int value
)
1669 int number_of_bits
= 0;
1673 number_of_bits
+= 1;
1674 value
&= (value
- 1);
1676 return number_of_bits
;
1679 /* Finds the address that should contain the single step breakpoint(s).
1680 It stems from code in cris-dis.c. */
1683 find_cris_op (unsigned short insn
, inst_env_type
*inst_env
)
1686 int max_level_of_match
= -1;
1687 int max_matched
= -1;
1690 for (i
= 0; cris_opcodes
[i
].name
!= NULL
; i
++)
1692 if (((cris_opcodes
[i
].match
& insn
) == cris_opcodes
[i
].match
)
1693 && ((cris_opcodes
[i
].lose
& insn
) == 0))
1695 level_of_match
= constraint (insn
, cris_opcodes
[i
].args
, inst_env
);
1696 if (level_of_match
>= 0)
1699 number_of_bits (cris_opcodes
[i
].match
| cris_opcodes
[i
].lose
);
1700 if (level_of_match
> max_level_of_match
)
1703 max_level_of_match
= level_of_match
;
1704 if (level_of_match
== 16)
1706 /* All bits matched, cannot find better. */
1716 /* Attempts to find single-step breakpoints. Returns -1 on failure which is
1717 actually an internal error. */
1720 find_step_target (inst_env_type
*inst_env
)
1724 unsigned short insn
;
1726 /* Create a local register image and set the initial state. */
1727 for (i
= 0; i
< NUM_GENREGS
; i
++)
1729 inst_env
->reg
[i
] = (unsigned long) read_register (i
);
1731 offset
= NUM_GENREGS
;
1732 for (i
= 0; i
< NUM_SPECREGS
; i
++)
1734 inst_env
->preg
[i
] = (unsigned long) read_register (offset
+ i
);
1736 inst_env
->branch_found
= 0;
1737 inst_env
->slot_needed
= 0;
1738 inst_env
->delay_slot_pc_active
= 0;
1739 inst_env
->prefix_found
= 0;
1740 inst_env
->invalid
= 0;
1741 inst_env
->xflag_found
= 0;
1742 inst_env
->disable_interrupt
= 0;
1744 /* Look for a step target. */
1747 /* Read an instruction from the client. */
1748 insn
= read_memory_unsigned_integer (inst_env
->reg
[PC_REGNUM
], 2);
1750 /* If the instruction is not in a delay slot the new content of the
1751 PC is [PC] + 2. If the instruction is in a delay slot it is not
1752 that simple. Since a instruction in a delay slot cannot change
1753 the content of the PC, it does not matter what value PC will have.
1754 Just make sure it is a valid instruction. */
1755 if (!inst_env
->delay_slot_pc_active
)
1757 inst_env
->reg
[PC_REGNUM
] += 2;
1761 inst_env
->delay_slot_pc_active
= 0;
1762 inst_env
->reg
[PC_REGNUM
] = inst_env
->delay_slot_pc
;
1764 /* Analyse the present instruction. */
1765 i
= find_cris_op (insn
, inst_env
);
1768 inst_env
->invalid
= 1;
1772 cris_gdb_func (cris_opcodes
[i
].op
, insn
, inst_env
);
1774 } while (!inst_env
->invalid
1775 && (inst_env
->prefix_found
|| inst_env
->xflag_found
1776 || inst_env
->slot_needed
));
1780 /* There is no hardware single-step support. The function find_step_target
1781 digs through the opcodes in order to find all possible targets.
1782 Either one ordinary target or two targets for branches may be found. */
1785 cris_software_single_step (enum target_signal ignore
, int insert_breakpoints
)
1787 inst_env_type inst_env
;
1789 if (insert_breakpoints
)
1791 /* Analyse the present instruction environment and insert
1793 int status
= find_step_target (&inst_env
);
1796 /* Could not find a target. FIXME: Should do something. */
1800 /* Insert at most two breakpoints. One for the next PC content
1801 and possibly another one for a branch, jump, etc. */
1802 next_pc
= (CORE_ADDR
) inst_env
.reg
[PC_REGNUM
];
1803 target_insert_breakpoint (next_pc
, break_mem
[0]);
1804 if (inst_env
.branch_found
1805 && (CORE_ADDR
) inst_env
.branch_break_address
!= next_pc
)
1807 branch_target_address
=
1808 (CORE_ADDR
) inst_env
.branch_break_address
;
1809 target_insert_breakpoint (branch_target_address
, break_mem
[1]);
1810 branch_break_inserted
= 1;
1816 /* Remove breakpoints. */
1817 target_remove_breakpoint (next_pc
, break_mem
[0]);
1818 if (branch_break_inserted
)
1820 target_remove_breakpoint (branch_target_address
, break_mem
[1]);
1821 branch_break_inserted
= 0;
1826 /* Calculates the prefix value for quick offset addressing mode. */
1829 quick_mode_bdap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1831 /* It's invalid to be in a delay slot. You can't have a prefix to this
1832 instruction (not 100% sure). */
1833 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1835 inst_env
->invalid
= 1;
1839 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand2 (inst
)];
1840 inst_env
->prefix_value
+= cris_get_bdap_quick_offset (inst
);
1842 /* A prefix doesn't change the xflag_found. But the rest of the flags
1844 inst_env
->slot_needed
= 0;
1845 inst_env
->prefix_found
= 1;
1848 /* Updates the autoincrement register. The size of the increment is derived
1849 from the size of the operation. The PC is always kept aligned on even
1853 process_autoincrement (int size
, unsigned short inst
, inst_env_type
*inst_env
)
1855 if (size
== INST_BYTE_SIZE
)
1857 inst_env
->reg
[cris_get_operand1 (inst
)] += 1;
1859 /* The PC must be word aligned, so increase the PC with one
1860 word even if the size is byte. */
1861 if (cris_get_operand1 (inst
) == REG_PC
)
1863 inst_env
->reg
[REG_PC
] += 1;
1866 else if (size
== INST_WORD_SIZE
)
1868 inst_env
->reg
[cris_get_operand1 (inst
)] += 2;
1870 else if (size
== INST_DWORD_SIZE
)
1872 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
1877 inst_env
->invalid
= 1;
1881 /* Just a forward declaration. */
1884 get_data_from_address (unsigned short *inst
, CORE_ADDR address
);
1886 /* Calculates the prefix value for the general case of offset addressing
1890 bdap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1895 /* It's invalid to be in a delay slot. */
1896 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1898 inst_env
->invalid
= 1;
1902 /* The calculation of prefix_value used to be after process_autoincrement,
1903 but that fails for an instruction such as jsr [$r0+12] which is encoded
1904 as 5f0d 0c00 30b9 when compiled with -fpic. Since PC is operand1 it
1905 mustn't be incremented until we have read it and what it points at. */
1906 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand2 (inst
)];
1908 /* The offset is an indirection of the contents of the operand1 register. */
1909 inst_env
->prefix_value
+=
1910 get_data_from_address (&inst
, inst_env
->reg
[cris_get_operand1 (inst
)]);
1912 if (cris_get_mode (inst
) == AUTOINC_MODE
)
1914 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
1917 /* A prefix doesn't change the xflag_found. But the rest of the flags
1919 inst_env
->slot_needed
= 0;
1920 inst_env
->prefix_found
= 1;
1923 /* Calculates the prefix value for the index addressing mode. */
1926 biap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1928 /* It's invalid to be in a delay slot. I can't see that it's possible to
1929 have a prefix to this instruction. So I will treat this as invalid. */
1930 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1932 inst_env
->invalid
= 1;
1936 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand1 (inst
)];
1938 /* The offset is the operand2 value shifted the size of the instruction
1940 inst_env
->prefix_value
+=
1941 inst_env
->reg
[cris_get_operand2 (inst
)] << cris_get_size (inst
);
1943 /* If the PC is operand1 (base) the address used is the address after
1944 the main instruction, i.e. address + 2 (the PC is already compensated
1945 for the prefix operation). */
1946 if (cris_get_operand1 (inst
) == REG_PC
)
1948 inst_env
->prefix_value
+= 2;
1951 /* A prefix doesn't change the xflag_found. But the rest of the flags
1953 inst_env
->slot_needed
= 0;
1954 inst_env
->xflag_found
= 0;
1955 inst_env
->prefix_found
= 1;
1958 /* Calculates the prefix value for the double indirect addressing mode. */
1961 dip_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1966 /* It's invalid to be in a delay slot. */
1967 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1969 inst_env
->invalid
= 1;
1973 /* The prefix value is one dereference of the contents of the operand1
1975 address
= (CORE_ADDR
) inst_env
->reg
[cris_get_operand1 (inst
)];
1976 inst_env
->prefix_value
= read_memory_unsigned_integer (address
, 4);
1978 /* Check if the mode is autoincrement. */
1979 if (cris_get_mode (inst
) == AUTOINC_MODE
)
1981 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
1984 /* A prefix doesn't change the xflag_found. But the rest of the flags
1986 inst_env
->slot_needed
= 0;
1987 inst_env
->xflag_found
= 0;
1988 inst_env
->prefix_found
= 1;
1991 /* Finds the destination for a branch with 8-bits offset. */
1994 eight_bit_offset_branch_op (unsigned short inst
, inst_env_type
*inst_env
)
1999 /* If we have a prefix or are in a delay slot it's bad. */
2000 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
2002 inst_env
->invalid
= 1;
2006 /* We have a branch, find out where the branch will land. */
2007 offset
= cris_get_branch_short_offset (inst
);
2009 /* Check if the offset is signed. */
2010 if (offset
& BRANCH_SIGNED_SHORT_OFFSET_MASK
)
2015 /* The offset ends with the sign bit, set it to zero. The address
2016 should always be word aligned. */
2017 offset
&= ~BRANCH_SIGNED_SHORT_OFFSET_MASK
;
2019 inst_env
->branch_found
= 1;
2020 inst_env
->branch_break_address
= inst_env
->reg
[REG_PC
] + offset
;
2022 inst_env
->slot_needed
= 1;
2023 inst_env
->prefix_found
= 0;
2024 inst_env
->xflag_found
= 0;
2025 inst_env
->disable_interrupt
= 1;
2028 /* Finds the destination for a branch with 16-bits offset. */
2031 sixteen_bit_offset_branch_op (unsigned short inst
, inst_env_type
*inst_env
)
2035 /* If we have a prefix or is in a delay slot it's bad. */
2036 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
2038 inst_env
->invalid
= 1;
2042 /* We have a branch, find out the offset for the branch. */
2043 offset
= read_memory_integer (inst_env
->reg
[REG_PC
], 2);
2045 /* The instruction is one word longer than normal, so add one word
2047 inst_env
->reg
[REG_PC
] += 2;
2049 inst_env
->branch_found
= 1;
2050 inst_env
->branch_break_address
= inst_env
->reg
[REG_PC
] + offset
;
2053 inst_env
->slot_needed
= 1;
2054 inst_env
->prefix_found
= 0;
2055 inst_env
->xflag_found
= 0;
2056 inst_env
->disable_interrupt
= 1;
2059 /* Handles the ABS instruction. */
2062 abs_op (unsigned short inst
, inst_env_type
*inst_env
)
2067 /* ABS can't have a prefix, so it's bad if it does. */
2068 if (inst_env
->prefix_found
)
2070 inst_env
->invalid
= 1;
2074 /* Check if the operation affects the PC. */
2075 if (cris_get_operand2 (inst
) == REG_PC
)
2078 /* It's invalid to change to the PC if we are in a delay slot. */
2079 if (inst_env
->slot_needed
)
2081 inst_env
->invalid
= 1;
2085 value
= (long) inst_env
->reg
[REG_PC
];
2087 /* The value of abs (SIGNED_DWORD_MASK) is SIGNED_DWORD_MASK. */
2088 if (value
!= SIGNED_DWORD_MASK
)
2091 inst_env
->reg
[REG_PC
] = (long) value
;
2095 inst_env
->slot_needed
= 0;
2096 inst_env
->prefix_found
= 0;
2097 inst_env
->xflag_found
= 0;
2098 inst_env
->disable_interrupt
= 0;
2101 /* Handles the ADDI instruction. */
2104 addi_op (unsigned short inst
, inst_env_type
*inst_env
)
2106 /* It's invalid to have the PC as base register. And ADDI can't have
2108 if (inst_env
->prefix_found
|| (cris_get_operand1 (inst
) == REG_PC
))
2110 inst_env
->invalid
= 1;
2114 inst_env
->slot_needed
= 0;
2115 inst_env
->prefix_found
= 0;
2116 inst_env
->xflag_found
= 0;
2117 inst_env
->disable_interrupt
= 0;
2120 /* Handles the ASR instruction. */
2123 asr_op (unsigned short inst
, inst_env_type
*inst_env
)
2126 unsigned long value
;
2127 unsigned long signed_extend_mask
= 0;
2129 /* ASR can't have a prefix, so check that it doesn't. */
2130 if (inst_env
->prefix_found
)
2132 inst_env
->invalid
= 1;
2136 /* Check if the PC is the target register. */
2137 if (cris_get_operand2 (inst
) == REG_PC
)
2139 /* It's invalid to change the PC in a delay slot. */
2140 if (inst_env
->slot_needed
)
2142 inst_env
->invalid
= 1;
2145 /* Get the number of bits to shift. */
2146 shift_steps
= cris_get_asr_shift_steps (inst_env
->reg
[cris_get_operand1 (inst
)]);
2147 value
= inst_env
->reg
[REG_PC
];
2149 /* Find out how many bits the operation should apply to. */
2150 if (cris_get_size (inst
) == INST_BYTE_SIZE
)
2152 if (value
& SIGNED_BYTE_MASK
)
2154 signed_extend_mask
= 0xFF;
2155 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2156 signed_extend_mask
= ~signed_extend_mask
;
2158 value
= value
>> shift_steps
;
2159 value
|= signed_extend_mask
;
2161 inst_env
->reg
[REG_PC
] &= 0xFFFFFF00;
2162 inst_env
->reg
[REG_PC
] |= value
;
2164 else if (cris_get_size (inst
) == INST_WORD_SIZE
)
2166 if (value
& SIGNED_WORD_MASK
)
2168 signed_extend_mask
= 0xFFFF;
2169 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2170 signed_extend_mask
= ~signed_extend_mask
;
2172 value
= value
>> shift_steps
;
2173 value
|= signed_extend_mask
;
2175 inst_env
->reg
[REG_PC
] &= 0xFFFF0000;
2176 inst_env
->reg
[REG_PC
] |= value
;
2178 else if (cris_get_size (inst
) == INST_DWORD_SIZE
)
2180 if (value
& SIGNED_DWORD_MASK
)
2182 signed_extend_mask
= 0xFFFFFFFF;
2183 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2184 signed_extend_mask
= ~signed_extend_mask
;
2186 value
= value
>> shift_steps
;
2187 value
|= signed_extend_mask
;
2188 inst_env
->reg
[REG_PC
] = value
;
2191 inst_env
->slot_needed
= 0;
2192 inst_env
->prefix_found
= 0;
2193 inst_env
->xflag_found
= 0;
2194 inst_env
->disable_interrupt
= 0;
2197 /* Handles the ASRQ instruction. */
2200 asrq_op (unsigned short inst
, inst_env_type
*inst_env
)
2204 unsigned long value
;
2205 unsigned long signed_extend_mask
= 0;
2207 /* ASRQ can't have a prefix, so check that it doesn't. */
2208 if (inst_env
->prefix_found
)
2210 inst_env
->invalid
= 1;
2214 /* Check if the PC is the target register. */
2215 if (cris_get_operand2 (inst
) == REG_PC
)
2218 /* It's invalid to change the PC in a delay slot. */
2219 if (inst_env
->slot_needed
)
2221 inst_env
->invalid
= 1;
2224 /* The shift size is given as a 5 bit quick value, i.e. we don't
2225 want the the sign bit of the quick value. */
2226 shift_steps
= cris_get_asr_shift_steps (inst
);
2227 value
= inst_env
->reg
[REG_PC
];
2228 if (value
& SIGNED_DWORD_MASK
)
2230 signed_extend_mask
= 0xFFFFFFFF;
2231 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2232 signed_extend_mask
= ~signed_extend_mask
;
2234 value
= value
>> shift_steps
;
2235 value
|= signed_extend_mask
;
2236 inst_env
->reg
[REG_PC
] = value
;
2238 inst_env
->slot_needed
= 0;
2239 inst_env
->prefix_found
= 0;
2240 inst_env
->xflag_found
= 0;
2241 inst_env
->disable_interrupt
= 0;
2244 /* Handles the AX, EI and SETF instruction. */
2247 ax_ei_setf_op (unsigned short inst
, inst_env_type
*inst_env
)
2249 if (inst_env
->prefix_found
)
2251 inst_env
->invalid
= 1;
2254 /* Check if the instruction is setting the X flag. */
2255 if (cris_is_xflag_bit_on (inst
))
2257 inst_env
->xflag_found
= 1;
2261 inst_env
->xflag_found
= 0;
2263 inst_env
->slot_needed
= 0;
2264 inst_env
->prefix_found
= 0;
2265 inst_env
->disable_interrupt
= 1;
2268 /* Checks if the instruction is in assign mode. If so, it updates the assign
2269 register. Note that check_assign assumes that the caller has checked that
2270 there is a prefix to this instruction. The mode check depends on this. */
2273 check_assign (unsigned short inst
, inst_env_type
*inst_env
)
2275 /* Check if it's an assign addressing mode. */
2276 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2278 /* Assign the prefix value to operand 1. */
2279 inst_env
->reg
[cris_get_operand1 (inst
)] = inst_env
->prefix_value
;
2283 /* Handles the 2-operand BOUND instruction. */
2286 two_operand_bound_op (unsigned short inst
, inst_env_type
*inst_env
)
2288 /* It's invalid to have the PC as the index operand. */
2289 if (cris_get_operand2 (inst
) == REG_PC
)
2291 inst_env
->invalid
= 1;
2294 /* Check if we have a prefix. */
2295 if (inst_env
->prefix_found
)
2297 check_assign (inst
, inst_env
);
2299 /* Check if this is an autoincrement mode. */
2300 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2302 /* It's invalid to change the PC in a delay slot. */
2303 if (inst_env
->slot_needed
)
2305 inst_env
->invalid
= 1;
2308 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2310 inst_env
->slot_needed
= 0;
2311 inst_env
->prefix_found
= 0;
2312 inst_env
->xflag_found
= 0;
2313 inst_env
->disable_interrupt
= 0;
2316 /* Handles the 3-operand BOUND instruction. */
2319 three_operand_bound_op (unsigned short inst
, inst_env_type
*inst_env
)
2321 /* It's an error if we haven't got a prefix. And it's also an error
2322 if the PC is the destination register. */
2323 if ((!inst_env
->prefix_found
) || (cris_get_operand1 (inst
) == REG_PC
))
2325 inst_env
->invalid
= 1;
2328 inst_env
->slot_needed
= 0;
2329 inst_env
->prefix_found
= 0;
2330 inst_env
->xflag_found
= 0;
2331 inst_env
->disable_interrupt
= 0;
2334 /* Clears the status flags in inst_env. */
2337 btst_nop_op (unsigned short inst
, inst_env_type
*inst_env
)
2339 /* It's an error if we have got a prefix. */
2340 if (inst_env
->prefix_found
)
2342 inst_env
->invalid
= 1;
2346 inst_env
->slot_needed
= 0;
2347 inst_env
->prefix_found
= 0;
2348 inst_env
->xflag_found
= 0;
2349 inst_env
->disable_interrupt
= 0;
2352 /* Clears the status flags in inst_env. */
2355 clearf_di_op (unsigned short inst
, inst_env_type
*inst_env
)
2357 /* It's an error if we have got a prefix. */
2358 if (inst_env
->prefix_found
)
2360 inst_env
->invalid
= 1;
2364 inst_env
->slot_needed
= 0;
2365 inst_env
->prefix_found
= 0;
2366 inst_env
->xflag_found
= 0;
2367 inst_env
->disable_interrupt
= 1;
2370 /* Handles the CLEAR instruction if it's in register mode. */
2373 reg_mode_clear_op (unsigned short inst
, inst_env_type
*inst_env
)
2375 /* Check if the target is the PC. */
2376 if (cris_get_operand2 (inst
) == REG_PC
)
2378 /* The instruction will clear the instruction's size bits. */
2379 int clear_size
= cris_get_clear_size (inst
);
2380 if (clear_size
== INST_BYTE_SIZE
)
2382 inst_env
->delay_slot_pc
= inst_env
->reg
[REG_PC
] & 0xFFFFFF00;
2384 if (clear_size
== INST_WORD_SIZE
)
2386 inst_env
->delay_slot_pc
= inst_env
->reg
[REG_PC
] & 0xFFFF0000;
2388 if (clear_size
== INST_DWORD_SIZE
)
2390 inst_env
->delay_slot_pc
= 0x0;
2392 /* The jump will be delayed with one delay slot. So we need a delay
2394 inst_env
->slot_needed
= 1;
2395 inst_env
->delay_slot_pc_active
= 1;
2399 /* The PC will not change => no delay slot. */
2400 inst_env
->slot_needed
= 0;
2402 inst_env
->prefix_found
= 0;
2403 inst_env
->xflag_found
= 0;
2404 inst_env
->disable_interrupt
= 0;
2407 /* Handles the TEST instruction if it's in register mode. */
2410 reg_mode_test_op (unsigned short inst
, inst_env_type
*inst_env
)
2412 /* It's an error if we have got a prefix. */
2413 if (inst_env
->prefix_found
)
2415 inst_env
->invalid
= 1;
2418 inst_env
->slot_needed
= 0;
2419 inst_env
->prefix_found
= 0;
2420 inst_env
->xflag_found
= 0;
2421 inst_env
->disable_interrupt
= 0;
2425 /* Handles the CLEAR and TEST instruction if the instruction isn't
2426 in register mode. */
2429 none_reg_mode_clear_test_op (unsigned short inst
, inst_env_type
*inst_env
)
2431 /* Check if we are in a prefix mode. */
2432 if (inst_env
->prefix_found
)
2434 /* The only way the PC can change is if this instruction is in
2435 assign addressing mode. */
2436 check_assign (inst
, inst_env
);
2438 /* Indirect mode can't change the PC so just check if the mode is
2440 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2442 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2444 inst_env
->slot_needed
= 0;
2445 inst_env
->prefix_found
= 0;
2446 inst_env
->xflag_found
= 0;
2447 inst_env
->disable_interrupt
= 0;
2450 /* Checks that the PC isn't the destination register or the instructions has
2454 dstep_logshift_mstep_neg_not_op (unsigned short inst
, inst_env_type
*inst_env
)
2456 /* It's invalid to have the PC as the destination. The instruction can't
2458 if ((cris_get_operand2 (inst
) == REG_PC
) || inst_env
->prefix_found
)
2460 inst_env
->invalid
= 1;
2464 inst_env
->slot_needed
= 0;
2465 inst_env
->prefix_found
= 0;
2466 inst_env
->xflag_found
= 0;
2467 inst_env
->disable_interrupt
= 0;
2470 /* Checks that the instruction doesn't have a prefix. */
2473 break_op (unsigned short inst
, inst_env_type
*inst_env
)
2475 /* The instruction can't have a prefix. */
2476 if (inst_env
->prefix_found
)
2478 inst_env
->invalid
= 1;
2482 inst_env
->slot_needed
= 0;
2483 inst_env
->prefix_found
= 0;
2484 inst_env
->xflag_found
= 0;
2485 inst_env
->disable_interrupt
= 1;
2488 /* Checks that the PC isn't the destination register and that the instruction
2489 doesn't have a prefix. */
2492 scc_op (unsigned short inst
, inst_env_type
*inst_env
)
2494 /* It's invalid to have the PC as the destination. The instruction can't
2496 if ((cris_get_operand2 (inst
) == REG_PC
) || inst_env
->prefix_found
)
2498 inst_env
->invalid
= 1;
2502 inst_env
->slot_needed
= 0;
2503 inst_env
->prefix_found
= 0;
2504 inst_env
->xflag_found
= 0;
2505 inst_env
->disable_interrupt
= 1;
2508 /* Handles the register mode JUMP instruction. */
2511 reg_mode_jump_op (unsigned short inst
, inst_env_type
*inst_env
)
2513 /* It's invalid to do a JUMP in a delay slot. The mode is register, so
2514 you can't have a prefix. */
2515 if ((inst_env
->slot_needed
) || (inst_env
->prefix_found
))
2517 inst_env
->invalid
= 1;
2521 /* Just change the PC. */
2522 inst_env
->reg
[REG_PC
] = inst_env
->reg
[cris_get_operand1 (inst
)];
2523 inst_env
->slot_needed
= 0;
2524 inst_env
->prefix_found
= 0;
2525 inst_env
->xflag_found
= 0;
2526 inst_env
->disable_interrupt
= 1;
2529 /* Handles the JUMP instruction for all modes except register. */
2531 void none_reg_mode_jump_op (unsigned short inst
, inst_env_type
*inst_env
)
2533 unsigned long newpc
;
2536 /* It's invalid to do a JUMP in a delay slot. */
2537 if (inst_env
->slot_needed
)
2539 inst_env
->invalid
= 1;
2543 /* Check if we have a prefix. */
2544 if (inst_env
->prefix_found
)
2546 check_assign (inst
, inst_env
);
2548 /* Get the new value for the the PC. */
2550 read_memory_unsigned_integer ((CORE_ADDR
) inst_env
->prefix_value
,
2555 /* Get the new value for the PC. */
2556 address
= (CORE_ADDR
) inst_env
->reg
[cris_get_operand1 (inst
)];
2557 newpc
= read_memory_unsigned_integer (address
, 4);
2559 /* Check if we should increment a register. */
2560 if (cris_get_mode (inst
) == AUTOINC_MODE
)
2562 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
2565 inst_env
->reg
[REG_PC
] = newpc
;
2567 inst_env
->slot_needed
= 0;
2568 inst_env
->prefix_found
= 0;
2569 inst_env
->xflag_found
= 0;
2570 inst_env
->disable_interrupt
= 1;
2573 /* Handles moves to special registers (aka P-register) for all modes. */
2576 move_to_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2578 if (inst_env
->prefix_found
)
2580 /* The instruction has a prefix that means we are only interested if
2581 the instruction is in assign mode. */
2582 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2584 /* The prefix handles the problem if we are in a delay slot. */
2585 if (cris_get_operand1 (inst
) == REG_PC
)
2587 /* Just take care of the assign. */
2588 check_assign (inst
, inst_env
);
2592 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2594 /* The instruction doesn't have a prefix, the only case left that we
2595 are interested in is the autoincrement mode. */
2596 if (cris_get_operand1 (inst
) == REG_PC
)
2598 /* If the PC is to be incremented it's invalid to be in a
2600 if (inst_env
->slot_needed
)
2602 inst_env
->invalid
= 1;
2606 /* The increment depends on the size of the special register. */
2607 if (cris_register_size (cris_get_operand2 (inst
)) == 1)
2609 process_autoincrement (INST_BYTE_SIZE
, inst
, inst_env
);
2611 else if (cris_register_size (cris_get_operand2 (inst
)) == 2)
2613 process_autoincrement (INST_WORD_SIZE
, inst
, inst_env
);
2617 process_autoincrement (INST_DWORD_SIZE
, inst
, inst_env
);
2621 inst_env
->slot_needed
= 0;
2622 inst_env
->prefix_found
= 0;
2623 inst_env
->xflag_found
= 0;
2624 inst_env
->disable_interrupt
= 1;
2627 /* Handles moves from special registers (aka P-register) for all modes
2631 none_reg_mode_move_from_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2633 if (inst_env
->prefix_found
)
2635 /* The instruction has a prefix that means we are only interested if
2636 the instruction is in assign mode. */
2637 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2639 /* The prefix handles the problem if we are in a delay slot. */
2640 if (cris_get_operand1 (inst
) == REG_PC
)
2642 /* Just take care of the assign. */
2643 check_assign (inst
, inst_env
);
2647 /* The instruction doesn't have a prefix, the only case left that we
2648 are interested in is the autoincrement mode. */
2649 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2651 if (cris_get_operand1 (inst
) == REG_PC
)
2653 /* If the PC is to be incremented it's invalid to be in a
2655 if (inst_env
->slot_needed
)
2657 inst_env
->invalid
= 1;
2661 /* The increment depends on the size of the special register. */
2662 if (cris_register_size (cris_get_operand2 (inst
)) == 1)
2664 process_autoincrement (INST_BYTE_SIZE
, inst
, inst_env
);
2666 else if (cris_register_size (cris_get_operand2 (inst
)) == 2)
2668 process_autoincrement (INST_WORD_SIZE
, inst
, inst_env
);
2672 process_autoincrement (INST_DWORD_SIZE
, inst
, inst_env
);
2676 inst_env
->slot_needed
= 0;
2677 inst_env
->prefix_found
= 0;
2678 inst_env
->xflag_found
= 0;
2679 inst_env
->disable_interrupt
= 1;
2682 /* Handles moves from special registers (aka P-register) when the mode
2686 reg_mode_move_from_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2688 /* Register mode move from special register can't have a prefix. */
2689 if (inst_env
->prefix_found
)
2691 inst_env
->invalid
= 1;
2695 if (cris_get_operand1 (inst
) == REG_PC
)
2697 /* It's invalid to change the PC in a delay slot. */
2698 if (inst_env
->slot_needed
)
2700 inst_env
->invalid
= 1;
2703 /* The destination is the PC, the jump will have a delay slot. */
2704 inst_env
->delay_slot_pc
= inst_env
->preg
[cris_get_operand2 (inst
)];
2705 inst_env
->slot_needed
= 1;
2706 inst_env
->delay_slot_pc_active
= 1;
2710 /* If the destination isn't PC, there will be no jump. */
2711 inst_env
->slot_needed
= 0;
2713 inst_env
->prefix_found
= 0;
2714 inst_env
->xflag_found
= 0;
2715 inst_env
->disable_interrupt
= 1;
2718 /* Handles the MOVEM from memory to general register instruction. */
2721 move_mem_to_reg_movem_op (unsigned short inst
, inst_env_type
*inst_env
)
2723 if (inst_env
->prefix_found
)
2725 /* The prefix handles the problem if we are in a delay slot. Is the
2726 MOVEM instruction going to change the PC? */
2727 if (cris_get_operand2 (inst
) >= REG_PC
)
2729 inst_env
->reg
[REG_PC
] =
2730 read_memory_unsigned_integer (inst_env
->prefix_value
, 4);
2732 /* The assign value is the value after the increment. Normally, the
2733 assign value is the value before the increment. */
2734 if ((cris_get_operand1 (inst
) == REG_PC
)
2735 && (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
))
2737 inst_env
->reg
[REG_PC
] = inst_env
->prefix_value
;
2738 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2743 /* Is the MOVEM instruction going to change the PC? */
2744 if (cris_get_operand2 (inst
) == REG_PC
)
2746 /* It's invalid to change the PC in a delay slot. */
2747 if (inst_env
->slot_needed
)
2749 inst_env
->invalid
= 1;
2752 inst_env
->reg
[REG_PC
] =
2753 read_memory_unsigned_integer (inst_env
->reg
[cris_get_operand1 (inst
)],
2756 /* The increment is not depending on the size, instead it's depending
2757 on the number of registers loaded from memory. */
2758 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
2760 /* It's invalid to change the PC in a delay slot. */
2761 if (inst_env
->slot_needed
)
2763 inst_env
->invalid
= 1;
2766 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2769 inst_env
->slot_needed
= 0;
2770 inst_env
->prefix_found
= 0;
2771 inst_env
->xflag_found
= 0;
2772 inst_env
->disable_interrupt
= 0;
2775 /* Handles the MOVEM to memory from general register instruction. */
2778 move_reg_to_mem_movem_op (unsigned short inst
, inst_env_type
*inst_env
)
2780 if (inst_env
->prefix_found
)
2782 /* The assign value is the value after the increment. Normally, the
2783 assign value is the value before the increment. */
2784 if ((cris_get_operand1 (inst
) == REG_PC
) &&
2785 (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
))
2787 /* The prefix handles the problem if we are in a delay slot. */
2788 inst_env
->reg
[REG_PC
] = inst_env
->prefix_value
;
2789 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2794 /* The increment is not depending on the size, instead it's depending
2795 on the number of registers loaded to memory. */
2796 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
2798 /* It's invalid to change the PC in a delay slot. */
2799 if (inst_env
->slot_needed
)
2801 inst_env
->invalid
= 1;
2804 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2807 inst_env
->slot_needed
= 0;
2808 inst_env
->prefix_found
= 0;
2809 inst_env
->xflag_found
= 0;
2810 inst_env
->disable_interrupt
= 0;
2813 /* Handles the pop instruction to a general register.
2814 POP is a assembler macro for MOVE.D [SP+], Rd. */
2817 reg_pop_op (unsigned short inst
, inst_env_type
*inst_env
)
2819 /* POP can't have a prefix. */
2820 if (inst_env
->prefix_found
)
2822 inst_env
->invalid
= 1;
2825 if (cris_get_operand2 (inst
) == REG_PC
)
2827 /* It's invalid to change the PC in a delay slot. */
2828 if (inst_env
->slot_needed
)
2830 inst_env
->invalid
= 1;
2833 inst_env
->reg
[REG_PC
] =
2834 read_memory_unsigned_integer (inst_env
->reg
[REG_SP
], 4);
2836 inst_env
->slot_needed
= 0;
2837 inst_env
->prefix_found
= 0;
2838 inst_env
->xflag_found
= 0;
2839 inst_env
->disable_interrupt
= 0;
2842 /* Handles moves from register to memory. */
2845 move_reg_to_mem_index_inc_op (unsigned short inst
, inst_env_type
*inst_env
)
2847 /* Check if we have a prefix. */
2848 if (inst_env
->prefix_found
)
2850 /* The only thing that can change the PC is an assign. */
2851 check_assign (inst
, inst_env
);
2853 else if ((cris_get_operand1 (inst
) == REG_PC
)
2854 && (cris_get_mode (inst
) == AUTOINC_MODE
))
2856 /* It's invalid to change the PC in a delay slot. */
2857 if (inst_env
->slot_needed
)
2859 inst_env
->invalid
= 1;
2862 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2864 inst_env
->slot_needed
= 0;
2865 inst_env
->prefix_found
= 0;
2866 inst_env
->xflag_found
= 0;
2867 inst_env
->disable_interrupt
= 0;
2870 /* Handles the intructions that's not yet implemented, by setting
2871 inst_env->invalid to true. */
2874 not_implemented_op (unsigned short inst
, inst_env_type
*inst_env
)
2876 inst_env
->invalid
= 1;
2879 /* Handles the XOR instruction. */
2882 xor_op (unsigned short inst
, inst_env_type
*inst_env
)
2884 /* XOR can't have a prefix. */
2885 if (inst_env
->prefix_found
)
2887 inst_env
->invalid
= 1;
2891 /* Check if the PC is the target. */
2892 if (cris_get_operand2 (inst
) == REG_PC
)
2894 /* It's invalid to change the PC in a delay slot. */
2895 if (inst_env
->slot_needed
)
2897 inst_env
->invalid
= 1;
2900 inst_env
->reg
[REG_PC
] ^= inst_env
->reg
[cris_get_operand1 (inst
)];
2902 inst_env
->slot_needed
= 0;
2903 inst_env
->prefix_found
= 0;
2904 inst_env
->xflag_found
= 0;
2905 inst_env
->disable_interrupt
= 0;
2908 /* Handles the MULS instruction. */
2911 muls_op (unsigned short inst
, inst_env_type
*inst_env
)
2913 /* MULS/U can't have a prefix. */
2914 if (inst_env
->prefix_found
)
2916 inst_env
->invalid
= 1;
2920 /* Consider it invalid if the PC is the target. */
2921 if (cris_get_operand2 (inst
) == REG_PC
)
2923 inst_env
->invalid
= 1;
2926 inst_env
->slot_needed
= 0;
2927 inst_env
->prefix_found
= 0;
2928 inst_env
->xflag_found
= 0;
2929 inst_env
->disable_interrupt
= 0;
2932 /* Handles the MULU instruction. */
2935 mulu_op (unsigned short inst
, inst_env_type
*inst_env
)
2937 /* MULS/U can't have a prefix. */
2938 if (inst_env
->prefix_found
)
2940 inst_env
->invalid
= 1;
2944 /* Consider it invalid if the PC is the target. */
2945 if (cris_get_operand2 (inst
) == REG_PC
)
2947 inst_env
->invalid
= 1;
2950 inst_env
->slot_needed
= 0;
2951 inst_env
->prefix_found
= 0;
2952 inst_env
->xflag_found
= 0;
2953 inst_env
->disable_interrupt
= 0;
2956 /* Calculate the result of the instruction for ADD, SUB, CMP AND, OR and MOVE.
2957 The MOVE instruction is the move from source to register. */
2960 add_sub_cmp_and_or_move_action (unsigned short inst
, inst_env_type
*inst_env
,
2961 unsigned long source1
, unsigned long source2
)
2963 unsigned long pc_mask
;
2964 unsigned long operation_mask
;
2966 /* Find out how many bits the operation should apply to. */
2967 if (cris_get_size (inst
) == INST_BYTE_SIZE
)
2969 pc_mask
= 0xFFFFFF00;
2970 operation_mask
= 0xFF;
2972 else if (cris_get_size (inst
) == INST_WORD_SIZE
)
2974 pc_mask
= 0xFFFF0000;
2975 operation_mask
= 0xFFFF;
2977 else if (cris_get_size (inst
) == INST_DWORD_SIZE
)
2980 operation_mask
= 0xFFFFFFFF;
2984 /* The size is out of range. */
2985 inst_env
->invalid
= 1;
2989 /* The instruction just works on uw_operation_mask bits. */
2990 source2
&= operation_mask
;
2991 source1
&= operation_mask
;
2993 /* Now calculate the result. The opcode's 3 first bits separates
2994 the different actions. */
2995 switch (cris_get_opcode (inst
) & 7)
3005 case 2: /* subtract */
3009 case 3: /* compare */
3021 inst_env
->invalid
= 1;
3027 /* Make sure that the result doesn't contain more than the instruction
3029 source2
&= operation_mask
;
3031 /* Calculate the new breakpoint address. */
3032 inst_env
->reg
[REG_PC
] &= pc_mask
;
3033 inst_env
->reg
[REG_PC
] |= source1
;
3037 /* Extends the value from either byte or word size to a dword. If the mode
3038 is zero extend then the value is extended with zero. If instead the mode
3039 is signed extend the sign bit of the value is taken into consideration. */
3042 do_sign_or_zero_extend (unsigned long value
, unsigned short *inst
)
3044 /* The size can be either byte or word, check which one it is.
3045 Don't check the highest bit, it's indicating if it's a zero
3047 if (cris_get_size (*inst
) & INST_WORD_SIZE
)
3052 /* Check if the instruction is signed extend. If so, check if value has
3054 if (cris_is_signed_extend_bit_on (*inst
) && (value
& SIGNED_WORD_MASK
))
3056 value
|= SIGNED_WORD_EXTEND_MASK
;
3064 /* Check if the instruction is signed extend. If so, check if value has
3066 if (cris_is_signed_extend_bit_on (*inst
) && (value
& SIGNED_BYTE_MASK
))
3068 value
|= SIGNED_BYTE_EXTEND_MASK
;
3071 /* The size should now be dword. */
3072 cris_set_size_to_dword (inst
);
3076 /* Handles the register mode for the ADD, SUB, CMP, AND, OR and MOVE
3077 instruction. The MOVE instruction is the move from source to register. */
3080 reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst
,
3081 inst_env_type
*inst_env
)
3083 unsigned long operand1
;
3084 unsigned long operand2
;
3086 /* It's invalid to have a prefix to the instruction. This is a register
3087 mode instruction and can't have a prefix. */
3088 if (inst_env
->prefix_found
)
3090 inst_env
->invalid
= 1;
3093 /* Check if the instruction has PC as its target. */
3094 if (cris_get_operand2 (inst
) == REG_PC
)
3096 if (inst_env
->slot_needed
)
3098 inst_env
->invalid
= 1;
3101 /* The instruction has the PC as its target register. */
3102 operand1
= inst_env
->reg
[cris_get_operand1 (inst
)];
3103 operand2
= inst_env
->reg
[REG_PC
];
3105 /* Check if it's a extend, signed or zero instruction. */
3106 if (cris_get_opcode (inst
) < 4)
3108 operand1
= do_sign_or_zero_extend (operand1
, &inst
);
3110 /* Calculate the PC value after the instruction, i.e. where the
3111 breakpoint should be. The order of the udw_operands is vital. */
3112 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3114 inst_env
->slot_needed
= 0;
3115 inst_env
->prefix_found
= 0;
3116 inst_env
->xflag_found
= 0;
3117 inst_env
->disable_interrupt
= 0;
3120 /* Returns the data contained at address. The size of the data is derived from
3121 the size of the operation. If the instruction is a zero or signed
3122 extend instruction, the size field is changed in instruction. */
3125 get_data_from_address (unsigned short *inst
, CORE_ADDR address
)
3127 int size
= cris_get_size (*inst
);
3128 unsigned long value
;
3130 /* If it's an extend instruction we don't want the signed extend bit,
3131 because it influences the size. */
3132 if (cris_get_opcode (*inst
) < 4)
3134 size
&= ~SIGNED_EXTEND_BIT_MASK
;
3136 /* Is there a need for checking the size? Size should contain the number of
3139 value
= read_memory_unsigned_integer (address
, size
);
3141 /* Check if it's an extend, signed or zero instruction. */
3142 if (cris_get_opcode (*inst
) < 4)
3144 value
= do_sign_or_zero_extend (value
, inst
);
3149 /* Handles the assign addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
3150 instructions. The MOVE instruction is the move from source to register. */
3153 handle_prefix_assign_mode_for_aritm_op (unsigned short inst
,
3154 inst_env_type
*inst_env
)
3156 unsigned long operand2
;
3157 unsigned long operand3
;
3159 check_assign (inst
, inst_env
);
3160 if (cris_get_operand2 (inst
) == REG_PC
)
3162 operand2
= inst_env
->reg
[REG_PC
];
3164 /* Get the value of the third operand. */
3165 operand3
= get_data_from_address (&inst
, inst_env
->prefix_value
);
3167 /* Calculate the PC value after the instruction, i.e. where the
3168 breakpoint should be. The order of the udw_operands is vital. */
3169 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
3171 inst_env
->slot_needed
= 0;
3172 inst_env
->prefix_found
= 0;
3173 inst_env
->xflag_found
= 0;
3174 inst_env
->disable_interrupt
= 0;
3177 /* Handles the three-operand addressing mode for the ADD, SUB, CMP, AND and
3178 OR instructions. Note that for this to work as expected, the calling
3179 function must have made sure that there is a prefix to this instruction. */
3182 three_operand_add_sub_cmp_and_or_op (unsigned short inst
,
3183 inst_env_type
*inst_env
)
3185 unsigned long operand2
;
3186 unsigned long operand3
;
3188 if (cris_get_operand1 (inst
) == REG_PC
)
3190 /* The PC will be changed by the instruction. */
3191 operand2
= inst_env
->reg
[cris_get_operand2 (inst
)];
3193 /* Get the value of the third operand. */
3194 operand3
= get_data_from_address (&inst
, inst_env
->prefix_value
);
3196 /* Calculate the PC value after the instruction, i.e. where the
3197 breakpoint should be. */
3198 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
3200 inst_env
->slot_needed
= 0;
3201 inst_env
->prefix_found
= 0;
3202 inst_env
->xflag_found
= 0;
3203 inst_env
->disable_interrupt
= 0;
3206 /* Handles the index addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
3207 instructions. The MOVE instruction is the move from source to register. */
3210 handle_prefix_index_mode_for_aritm_op (unsigned short inst
,
3211 inst_env_type
*inst_env
)
3213 if (cris_get_operand1 (inst
) != cris_get_operand2 (inst
))
3215 /* If the instruction is MOVE it's invalid. If the instruction is ADD,
3216 SUB, AND or OR something weird is going on (if everything works these
3217 instructions should end up in the three operand version). */
3218 inst_env
->invalid
= 1;
3223 /* three_operand_add_sub_cmp_and_or does the same as we should do here
3225 three_operand_add_sub_cmp_and_or_op (inst
, inst_env
);
3227 inst_env
->slot_needed
= 0;
3228 inst_env
->prefix_found
= 0;
3229 inst_env
->xflag_found
= 0;
3230 inst_env
->disable_interrupt
= 0;
3233 /* Handles the autoincrement and indirect addresing mode for the ADD, SUB,
3234 CMP, AND OR and MOVE instruction. The MOVE instruction is the move from
3235 source to register. */
3238 handle_inc_and_index_mode_for_aritm_op (unsigned short inst
,
3239 inst_env_type
*inst_env
)
3241 unsigned long operand1
;
3242 unsigned long operand2
;
3243 unsigned long operand3
;
3246 /* The instruction is either an indirect or autoincrement addressing mode.
3247 Check if the destination register is the PC. */
3248 if (cris_get_operand2 (inst
) == REG_PC
)
3250 /* Must be done here, get_data_from_address may change the size
3252 size
= cris_get_size (inst
);
3253 operand2
= inst_env
->reg
[REG_PC
];
3255 /* Get the value of the third operand, i.e. the indirect operand. */
3256 operand1
= inst_env
->reg
[cris_get_operand1 (inst
)];
3257 operand3
= get_data_from_address (&inst
, operand1
);
3259 /* Calculate the PC value after the instruction, i.e. where the
3260 breakpoint should be. The order of the udw_operands is vital. */
3261 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
3263 /* If this is an autoincrement addressing mode, check if the increment
3265 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
3267 /* Get the size field. */
3268 size
= cris_get_size (inst
);
3270 /* If it's an extend instruction we don't want the signed extend bit,
3271 because it influences the size. */
3272 if (cris_get_opcode (inst
) < 4)
3274 size
&= ~SIGNED_EXTEND_BIT_MASK
;
3276 process_autoincrement (size
, inst
, inst_env
);
3278 inst_env
->slot_needed
= 0;
3279 inst_env
->prefix_found
= 0;
3280 inst_env
->xflag_found
= 0;
3281 inst_env
->disable_interrupt
= 0;
3284 /* Handles the two-operand addressing mode, all modes except register, for
3285 the ADD, SUB CMP, AND and OR instruction. */
3288 none_reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst
,
3289 inst_env_type
*inst_env
)
3291 if (inst_env
->prefix_found
)
3293 if (cris_get_mode (inst
) == PREFIX_INDEX_MODE
)
3295 handle_prefix_index_mode_for_aritm_op (inst
, inst_env
);
3297 else if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
3299 handle_prefix_assign_mode_for_aritm_op (inst
, inst_env
);
3303 /* The mode is invalid for a prefixed base instruction. */
3304 inst_env
->invalid
= 1;
3310 handle_inc_and_index_mode_for_aritm_op (inst
, inst_env
);
3314 /* Handles the quick addressing mode for the ADD and SUB instruction. */
3317 quick_mode_add_sub_op (unsigned short inst
, inst_env_type
*inst_env
)
3319 unsigned long operand1
;
3320 unsigned long operand2
;
3322 /* It's a bad idea to be in a prefix instruction now. This is a quick mode
3323 instruction and can't have a prefix. */
3324 if (inst_env
->prefix_found
)
3326 inst_env
->invalid
= 1;
3330 /* Check if the instruction has PC as its target. */
3331 if (cris_get_operand2 (inst
) == REG_PC
)
3333 if (inst_env
->slot_needed
)
3335 inst_env
->invalid
= 1;
3338 operand1
= cris_get_quick_value (inst
);
3339 operand2
= inst_env
->reg
[REG_PC
];
3341 /* The size should now be dword. */
3342 cris_set_size_to_dword (&inst
);
3344 /* Calculate the PC value after the instruction, i.e. where the
3345 breakpoint should be. */
3346 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3348 inst_env
->slot_needed
= 0;
3349 inst_env
->prefix_found
= 0;
3350 inst_env
->xflag_found
= 0;
3351 inst_env
->disable_interrupt
= 0;
3354 /* Handles the quick addressing mode for the CMP, AND and OR instruction. */
3357 quick_mode_and_cmp_move_or_op (unsigned short inst
, inst_env_type
*inst_env
)
3359 unsigned long operand1
;
3360 unsigned long operand2
;
3362 /* It's a bad idea to be in a prefix instruction now. This is a quick mode
3363 instruction and can't have a prefix. */
3364 if (inst_env
->prefix_found
)
3366 inst_env
->invalid
= 1;
3369 /* Check if the instruction has PC as its target. */
3370 if (cris_get_operand2 (inst
) == REG_PC
)
3372 if (inst_env
->slot_needed
)
3374 inst_env
->invalid
= 1;
3377 /* The instruction has the PC as its target register. */
3378 operand1
= cris_get_quick_value (inst
);
3379 operand2
= inst_env
->reg
[REG_PC
];
3381 /* The quick value is signed, so check if we must do a signed extend. */
3382 if (operand1
& SIGNED_QUICK_VALUE_MASK
)
3385 operand1
|= SIGNED_QUICK_VALUE_EXTEND_MASK
;
3387 /* The size should now be dword. */
3388 cris_set_size_to_dword (&inst
);
3390 /* Calculate the PC value after the instruction, i.e. where the
3391 breakpoint should be. */
3392 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3394 inst_env
->slot_needed
= 0;
3395 inst_env
->prefix_found
= 0;
3396 inst_env
->xflag_found
= 0;
3397 inst_env
->disable_interrupt
= 0;
3400 /* Translate op_type to a function and call it. */
3402 static void cris_gdb_func (enum cris_op_type op_type
, unsigned short inst
,
3403 inst_env_type
*inst_env
)
3407 case cris_not_implemented_op
:
3408 not_implemented_op (inst
, inst_env
);
3412 abs_op (inst
, inst_env
);
3416 addi_op (inst
, inst_env
);
3420 asr_op (inst
, inst_env
);
3424 asrq_op (inst
, inst_env
);
3427 case cris_ax_ei_setf_op
:
3428 ax_ei_setf_op (inst
, inst_env
);
3431 case cris_bdap_prefix
:
3432 bdap_prefix (inst
, inst_env
);
3435 case cris_biap_prefix
:
3436 biap_prefix (inst
, inst_env
);
3440 break_op (inst
, inst_env
);
3443 case cris_btst_nop_op
:
3444 btst_nop_op (inst
, inst_env
);
3447 case cris_clearf_di_op
:
3448 clearf_di_op (inst
, inst_env
);
3451 case cris_dip_prefix
:
3452 dip_prefix (inst
, inst_env
);
3455 case cris_dstep_logshift_mstep_neg_not_op
:
3456 dstep_logshift_mstep_neg_not_op (inst
, inst_env
);
3459 case cris_eight_bit_offset_branch_op
:
3460 eight_bit_offset_branch_op (inst
, inst_env
);
3463 case cris_move_mem_to_reg_movem_op
:
3464 move_mem_to_reg_movem_op (inst
, inst_env
);
3467 case cris_move_reg_to_mem_movem_op
:
3468 move_reg_to_mem_movem_op (inst
, inst_env
);
3471 case cris_move_to_preg_op
:
3472 move_to_preg_op (inst
, inst_env
);
3476 muls_op (inst
, inst_env
);
3480 mulu_op (inst
, inst_env
);
3483 case cris_none_reg_mode_add_sub_cmp_and_or_move_op
:
3484 none_reg_mode_add_sub_cmp_and_or_move_op (inst
, inst_env
);
3487 case cris_none_reg_mode_clear_test_op
:
3488 none_reg_mode_clear_test_op (inst
, inst_env
);
3491 case cris_none_reg_mode_jump_op
:
3492 none_reg_mode_jump_op (inst
, inst_env
);
3495 case cris_none_reg_mode_move_from_preg_op
:
3496 none_reg_mode_move_from_preg_op (inst
, inst_env
);
3499 case cris_quick_mode_add_sub_op
:
3500 quick_mode_add_sub_op (inst
, inst_env
);
3503 case cris_quick_mode_and_cmp_move_or_op
:
3504 quick_mode_and_cmp_move_or_op (inst
, inst_env
);
3507 case cris_quick_mode_bdap_prefix
:
3508 quick_mode_bdap_prefix (inst
, inst_env
);
3511 case cris_reg_mode_add_sub_cmp_and_or_move_op
:
3512 reg_mode_add_sub_cmp_and_or_move_op (inst
, inst_env
);
3515 case cris_reg_mode_clear_op
:
3516 reg_mode_clear_op (inst
, inst_env
);
3519 case cris_reg_mode_jump_op
:
3520 reg_mode_jump_op (inst
, inst_env
);
3523 case cris_reg_mode_move_from_preg_op
:
3524 reg_mode_move_from_preg_op (inst
, inst_env
);
3527 case cris_reg_mode_test_op
:
3528 reg_mode_test_op (inst
, inst_env
);
3532 scc_op (inst
, inst_env
);
3535 case cris_sixteen_bit_offset_branch_op
:
3536 sixteen_bit_offset_branch_op (inst
, inst_env
);
3539 case cris_three_operand_add_sub_cmp_and_or_op
:
3540 three_operand_add_sub_cmp_and_or_op (inst
, inst_env
);
3543 case cris_three_operand_bound_op
:
3544 three_operand_bound_op (inst
, inst_env
);
3547 case cris_two_operand_bound_op
:
3548 two_operand_bound_op (inst
, inst_env
);
3552 xor_op (inst
, inst_env
);
3557 /* This wrapper is to avoid cris_get_assembler being called before
3558 exec_bfd has been set. */
3561 cris_delayed_get_disassembler (bfd_vma addr
, disassemble_info
*info
)
3563 tm_print_insn
= cris_get_disassembler (exec_bfd
);
3564 return TARGET_PRINT_INSN (addr
, info
);
3567 /* Copied from <asm/elf.h>. */
3568 typedef unsigned long elf_greg_t
;
3570 /* Same as user_regs_struct struct in <asm/user.h>. */
3571 typedef elf_greg_t elf_gregset_t
[35];
3573 /* Unpack an elf_gregset_t into GDB's register cache. */
3576 supply_gregset (elf_gregset_t
*gregsetp
)
3579 elf_greg_t
*regp
= *gregsetp
;
3580 static char zerobuf
[4] = {0};
3582 /* The kernel dumps all 32 registers as unsigned longs, but supply_register
3583 knows about the actual size of each register so that's no problem. */
3584 for (i
= 0; i
< NUM_GENREGS
+ NUM_SPECREGS
; i
++)
3586 supply_register (i
, (char *)®p
[i
]);
3590 /* Use a local version of this function to get the correct types for
3591 regsets, until multi-arch core support is ready. */
3594 fetch_core_registers (char *core_reg_sect
, unsigned core_reg_size
,
3595 int which
, CORE_ADDR reg_addr
)
3597 elf_gregset_t gregset
;
3602 if (core_reg_size
!= sizeof (gregset
))
3604 warning ("wrong size gregset struct in core file");
3608 memcpy (&gregset
, core_reg_sect
, sizeof (gregset
));
3609 supply_gregset (&gregset
);
3613 /* We've covered all the kinds of registers we know about here,
3614 so this must be something we wouldn't know what to do with
3615 anyway. Just ignore it. */
3620 static struct core_fns cris_elf_core_fns
=
3622 bfd_target_elf_flavour
, /* core_flavour */
3623 default_check_format
, /* check_format */
3624 default_core_sniffer
, /* core_sniffer */
3625 fetch_core_registers
, /* core_read_registers */
3629 /* Fetch (and possibly build) an appropriate link_map_offsets
3630 structure for native GNU/Linux CRIS targets using the struct
3631 offsets defined in link.h (but without actual reference to that
3634 This makes it possible to access GNU/Linux CRIS shared libraries
3635 from a GDB that was not built on an GNU/Linux CRIS host (for cross
3638 See gdb/solib-svr4.h for an explanation of these fields. */
3640 struct link_map_offsets
*
3641 cris_linux_svr4_fetch_link_map_offsets (void)
3643 static struct link_map_offsets lmo
;
3644 static struct link_map_offsets
*lmp
= NULL
;
3650 lmo
.r_debug_size
= 8; /* The actual size is 20 bytes, but
3651 this is all we need. */
3652 lmo
.r_map_offset
= 4;
3655 lmo
.link_map_size
= 20;
3657 lmo
.l_addr_offset
= 0;
3658 lmo
.l_addr_size
= 4;
3660 lmo
.l_name_offset
= 4;
3661 lmo
.l_name_size
= 4;
3663 lmo
.l_next_offset
= 12;
3664 lmo
.l_next_size
= 4;
3666 lmo
.l_prev_offset
= 16;
3667 lmo
.l_prev_size
= 4;
3674 cris_fpless_backtrace (char *noargs
, int from_tty
)
3676 /* Points at the instruction after the jsr (except when in innermost frame
3677 where it points at the original pc). */
3680 /* Temporary variable, used for parsing from the start of the function that
3681 the pc is in, up to the pc. */
3682 CORE_ADDR tmp_pc
= 0;
3685 /* Information about current frame. */
3686 struct symtab_and_line sal
;
3689 /* Present instruction. */
3690 unsigned short insn
;
3692 /* Next instruction, lookahead. */
3693 unsigned short insn_next
;
3695 /* This is to store the offset between sp at start of function and until we
3696 reach push srp (if any). */
3697 int sp_add_later
= 0;
3698 int push_srp_found
= 0;
3702 /* Frame counter. */
3705 /* For the innermost frame, we want to look at srp in case it's a leaf
3706 function (since there's no push srp in that case). */
3707 int innermost_frame
= 1;
3709 read_register_gen (PC_REGNUM
, (char *) &pc
);
3710 read_register_gen (SP_REGNUM
, (char *) &sp
);
3712 /* We make an explicit return when we can't find an outer frame. */
3715 /* Get file name and line number. */
3716 sal
= find_pc_line (pc
, 0);
3718 /* Get function name. */
3719 find_pc_partial_function (pc
, &func_name
, (CORE_ADDR
*) NULL
,
3720 (CORE_ADDR
*) NULL
);
3722 /* Print information about current frame. */
3723 printf_unfiltered ("#%i 0x%08lx in %s", frame
++, pc
, func_name
);
3726 printf_unfiltered (" at %s:%i", sal
.symtab
->filename
, sal
.line
);
3728 printf_unfiltered ("\n");
3730 /* Get the start address of this function. */
3731 tmp_pc
= get_pc_function_start (pc
);
3733 /* Mini parser, only meant to find push sp and sub ...,sp from the start
3734 of the function, up to the pc. */
3737 insn
= read_memory_unsigned_integer (tmp_pc
, sizeof (short));
3738 tmp_pc
+= sizeof (short);
3741 /* push <reg> 32 bit instruction */
3742 insn_next
= read_memory_unsigned_integer (tmp_pc
,
3744 tmp_pc
+= sizeof (short);
3746 /* Recognize srp. */
3747 if (insn_next
== 0xBE7E)
3749 /* For subsequent (not this one though) push or sub which
3750 affects sp, adjust sp immediately. */
3753 /* Note: this will break if we ever encounter a
3754 push vr (1 byte) or push ccr (2 bytes). */
3759 /* Some other register was pushed. */
3770 else if (cris_get_operand2 (insn
) == SP_REGNUM
3771 && cris_get_mode (insn
) == 0x0000
3772 && cris_get_opcode (insn
) == 0x000A)
3775 val
= cris_get_quick_value (insn
);
3783 sp_add_later
+= val
;
3787 else if (cris_get_operand2 (insn
) == SP_REGNUM
3788 /* Autoincrement addressing mode. */
3789 && cris_get_mode (insn
) == 0x0003
3791 && ((insn
) & 0x03E0) >> 5 == 0x0004)
3794 val
= get_data_from_address (&insn
, tmp_pc
);
3802 sp_add_later
+= val
;
3805 else if (cris_get_operand2 (insn
) == SP_REGNUM
3806 && ((insn
& 0x0F00) >> 8) == 0x0001
3807 && (cris_get_signed_offset (insn
) < 0))
3809 /* Immediate byte offset addressing prefix word with sp as base
3810 register. Used for CRIS v8 i.e. ETRAX 100 and newer if <val>
3811 is between 64 and 128.
3812 movem r<regsave>,[sp=sp-<val>] */
3813 val
= -cris_get_signed_offset (insn
);
3814 insn_next
= read_memory_unsigned_integer (tmp_pc
,
3816 tmp_pc
+= sizeof (short);
3818 if (cris_get_mode (insn_next
) == PREFIX_ASSIGN_MODE
3819 && cris_get_opcode (insn_next
) == 0x000F
3820 && cris_get_size (insn_next
) == 0x0003
3821 && cris_get_operand1 (insn_next
) == SP_REGNUM
)
3829 sp_add_later
+= val
;
3840 /* sp should now point at where srp is stored on the stack. Update
3841 the pc to the srp. */
3842 pc
= read_memory_unsigned_integer (sp
, 4);
3844 else if (innermost_frame
)
3846 /* We couldn't find a push srp in the prologue, so this must be
3847 a leaf function, and thus we use the srp register directly.
3848 This should happen at most once, for the innermost function. */
3849 read_register_gen (SRP_REGNUM
, (char *) &pc
);
3853 /* Couldn't find an outer frame. */
3857 /* Reset flag. (In case the innermost frame wasn't a leaf, we don't
3858 want to look at the srp register later either). */
3859 innermost_frame
= 0;
3861 /* Now, add the offset for everything up to, and including push srp,
3862 that was held back during the prologue parsing. */
3869 _initialize_cris_tdep (void)
3871 struct cmd_list_element
*c
;
3873 gdbarch_register (bfd_arch_cris
, cris_gdbarch_init
, cris_dump_tdep
);
3875 /* Used in disassembly. */
3876 tm_print_insn
= cris_delayed_get_disassembler
;
3878 /* CRIS-specific user-commands. */
3879 c
= add_set_cmd ("cris-version", class_support
, var_integer
,
3880 (char *) &usr_cmd_cris_version
,
3881 "Set the current CRIS version.", &setlist
);
3882 set_cmd_sfunc (c
, cris_version_update
);
3883 add_show_from_set (c
, &showlist
);
3885 c
= add_set_enum_cmd ("cris-mode", class_support
, cris_mode_enums
,
3887 "Set the current CRIS mode.", &setlist
);
3888 set_cmd_sfunc (c
, cris_mode_update
);
3889 add_show_from_set (c
, &showlist
);
3891 c
= add_set_enum_cmd ("cris-abi", class_support
, cris_abi_enums
,
3893 "Set the current CRIS ABI version.", &setlist
);
3894 set_cmd_sfunc (c
, cris_abi_update
);
3895 add_show_from_set (c
, &showlist
);
3897 c
= add_cmd ("cris-fpless-backtrace", class_support
, cris_fpless_backtrace
,
3898 "Display call chain using the subroutine return pointer.\n"
3899 "Note that this displays the address after the jump to the "
3900 "subroutine.", &cmdlist
);
3902 add_core_fns (&cris_elf_core_fns
);
3906 /* Prints out all target specific values. */
3909 cris_dump_tdep (struct gdbarch
*gdbarch
, struct ui_file
*file
)
3911 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3914 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_version = %i\n",
3915 tdep
->cris_version
);
3916 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_mode = %s\n",
3918 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_abi = %s\n",
3925 cris_version_update (char *ignore_args
, int from_tty
,
3926 struct cmd_list_element
*c
)
3928 struct gdbarch_info info
;
3930 /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones
3931 the set command passed as a parameter. The clone operation will
3932 include (BUG?) any ``set'' command callback, if present.
3933 Commands like ``info set'' call all the ``show'' command
3934 callbacks. Unfortunatly, for ``show'' commands cloned from
3935 ``set'', this includes callbacks belonging to ``set'' commands.
3936 Making this worse, this only occures if add_show_from_set() is
3937 called after add_cmd_sfunc() (BUG?). */
3939 /* From here on, trust the user's CRIS version setting. */
3940 if (cmd_type (c
) == set_cmd
)
3942 usr_cmd_cris_version_valid
= 1;
3944 /* Update the current architecture, if needed. */
3945 gdbarch_info_init (&info
);
3946 if (!gdbarch_update_p (info
))
3947 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
3952 cris_mode_update (char *ignore_args
, int from_tty
,
3953 struct cmd_list_element
*c
)
3955 struct gdbarch_info info
;
3957 /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones
3958 the set command passed as a parameter. The clone operation will
3959 include (BUG?) any ``set'' command callback, if present.
3960 Commands like ``info set'' call all the ``show'' command
3961 callbacks. Unfortunatly, for ``show'' commands cloned from
3962 ``set'', this includes callbacks belonging to ``set'' commands.
3963 Making this worse, this only occures if add_show_from_set() is
3964 called after add_cmd_sfunc() (BUG?). */
3966 /* From here on, trust the user's CRIS mode setting. */
3967 if (cmd_type (c
) == set_cmd
)
3969 usr_cmd_cris_mode_valid
= 1;
3971 /* Update the current architecture, if needed. */
3972 gdbarch_info_init (&info
);
3973 if (!gdbarch_update_p (info
))
3974 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
3979 cris_abi_update (char *ignore_args
, int from_tty
,
3980 struct cmd_list_element
*c
)
3982 struct gdbarch_info info
;
3984 /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones
3985 the set command passed as a parameter. The clone operation will
3986 include (BUG?) any ``set'' command callback, if present.
3987 Commands like ``info set'' call all the ``show'' command
3988 callbacks. Unfortunatly, for ``show'' commands cloned from
3989 ``set'', this includes callbacks belonging to ``set'' commands.
3990 Making this worse, this only occures if add_show_from_set() is
3991 called after add_cmd_sfunc() (BUG?). */
3993 /* From here on, trust the user's CRIS ABI setting. */
3994 if (cmd_type (c
) == set_cmd
)
3996 usr_cmd_cris_abi_valid
= 1;
3998 /* Update the current architecture, if needed. */
3999 gdbarch_info_init (&info
);
4000 if (!gdbarch_update_p (info
))
4001 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
4005 /* Copied from pa64solib.c, with a couple of minor changes. */
4008 bfd_lookup_symbol (bfd
*abfd
, const char *symname
)
4010 unsigned int storage_needed
;
4012 asymbol
**symbol_table
;
4013 unsigned int number_of_symbols
;
4015 struct cleanup
*back_to
;
4016 CORE_ADDR symaddr
= 0;
4018 storage_needed
= bfd_get_symtab_upper_bound (abfd
);
4020 if (storage_needed
> 0)
4022 symbol_table
= (asymbol
**) xmalloc (storage_needed
);
4023 back_to
= make_cleanup (free
, (PTR
) symbol_table
);
4024 number_of_symbols
= bfd_canonicalize_symtab (abfd
, symbol_table
);
4026 for (i
= 0; i
< number_of_symbols
; i
++)
4028 sym
= *symbol_table
++;
4029 if (!strcmp (sym
->name
, symname
))
4031 /* Bfd symbols are section relative. */
4032 symaddr
= sym
->value
+ sym
->section
->vma
;
4036 do_cleanups (back_to
);
4041 static struct gdbarch
*
4042 cris_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
4044 struct gdbarch
*gdbarch
;
4045 struct gdbarch_tdep
*tdep
;
4047 const char *cris_mode
;
4048 const char *cris_abi
;
4049 CORE_ADDR cris_abi_sym
= 0;
4052 if (usr_cmd_cris_version_valid
)
4054 /* Trust the user's CRIS version setting. */
4055 cris_version
= usr_cmd_cris_version
;
4059 /* Assume it's CRIS version 10. */
4063 if (usr_cmd_cris_mode_valid
)
4065 /* Trust the user's CRIS mode setting. */
4066 cris_mode
= usr_cmd_cris_mode
;
4068 else if (cris_version
== 10)
4070 /* Assume CRIS version 10 is in user mode. */
4071 cris_mode
= CRIS_MODE_USER
;
4075 /* Strictly speaking, older CRIS version don't have a supervisor mode,
4076 but we regard its only mode as supervisor mode. */
4077 cris_mode
= CRIS_MODE_SUPERVISOR
;
4080 if (usr_cmd_cris_abi_valid
)
4082 /* Trust the user's ABI setting. */
4083 cris_abi
= usr_cmd_cris_abi
;
4087 if (bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
4089 /* An elf target uses the new ABI. */
4090 cris_abi
= CRIS_ABI_V2
;
4092 else if (bfd_get_flavour (info
.abfd
) == bfd_target_aout_flavour
)
4094 /* An a.out target may use either ABI. Look for hints in the
4096 cris_abi_sym
= bfd_lookup_symbol (info
.abfd
, CRIS_ABI_SYMBOL
);
4097 cris_abi
= cris_abi_sym
? CRIS_ABI_V2
: CRIS_ABI_ORIGINAL
;
4101 /* Unknown bfd flavour. Assume it's the new ABI. */
4102 cris_abi
= CRIS_ABI_V2
;
4105 else if (arches
!= NULL
)
4107 /* No bfd available. Stick with the ABI from the most recently
4108 selected architecture of this same family (the head of arches
4109 always points to this). (This is to avoid changing the ABI
4110 when the user updates the architecture with the 'set
4111 cris-version' command.) */
4112 cris_abi
= gdbarch_tdep (arches
->gdbarch
)->cris_abi
;
4116 /* No bfd, and no previously selected architecture available.
4117 Assume it's the new ABI. */
4118 cris_abi
= CRIS_ABI_V2
;
4121 /* Make the current settings visible to the user. */
4122 usr_cmd_cris_version
= cris_version
;
4123 usr_cmd_cris_mode
= cris_mode
;
4124 usr_cmd_cris_abi
= cris_abi
;
4126 /* Find a candidate among the list of pre-declared architectures. Both
4127 CRIS version and ABI must match. */
4128 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
4130 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
4132 if ((gdbarch_tdep (arches
->gdbarch
)->cris_version
== cris_version
)
4133 && (gdbarch_tdep (arches
->gdbarch
)->cris_mode
== cris_mode
)
4134 && (gdbarch_tdep (arches
->gdbarch
)->cris_abi
== cris_abi
))
4135 return arches
->gdbarch
;
4138 /* No matching architecture was found. Create a new one. */
4139 tdep
= (struct gdbarch_tdep
*) xmalloc (sizeof (struct gdbarch_tdep
));
4140 gdbarch
= gdbarch_alloc (&info
, tdep
);
4142 tdep
->cris_version
= cris_version
;
4143 tdep
->cris_mode
= cris_mode
;
4144 tdep
->cris_abi
= cris_abi
;
4146 /* INIT shall ensure that the INFO.BYTE_ORDER is non-zero. */
4147 switch (info
.byte_order
)
4149 case BFD_ENDIAN_LITTLE
:
4153 case BFD_ENDIAN_BIG
:
4154 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: big endian byte order in info");
4158 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown byte order in info");
4161 /* Initialize the ABI dependent things. */
4162 if (tdep
->cris_abi
== CRIS_ABI_ORIGINAL
)
4164 set_gdbarch_double_bit (gdbarch
, 32);
4165 set_gdbarch_push_arguments (gdbarch
, cris_abi_original_push_arguments
);
4166 set_gdbarch_deprecated_store_return_value (gdbarch
,
4167 cris_abi_original_store_return_value
);
4168 set_gdbarch_deprecated_extract_return_value
4169 (gdbarch
, cris_abi_original_extract_return_value
);
4170 set_gdbarch_reg_struct_has_addr
4171 (gdbarch
, cris_abi_original_reg_struct_has_addr
);
4173 else if (tdep
->cris_abi
== CRIS_ABI_V2
)
4175 set_gdbarch_double_bit (gdbarch
, 64);
4176 set_gdbarch_push_arguments (gdbarch
, cris_abi_v2_push_arguments
);
4177 set_gdbarch_deprecated_store_return_value (gdbarch
, cris_abi_v2_store_return_value
);
4178 set_gdbarch_deprecated_extract_return_value
4179 (gdbarch
, cris_abi_v2_extract_return_value
);
4180 set_gdbarch_reg_struct_has_addr (gdbarch
,
4181 cris_abi_v2_reg_struct_has_addr
);
4184 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown CRIS ABI");
4186 /* The default definition of a long double is 2 * TARGET_DOUBLE_BIT,
4187 which means we have to set this explicitly. */
4188 set_gdbarch_long_double_bit (gdbarch
, 64);
4190 /* There are 32 registers (some of which may not be implemented). */
4191 set_gdbarch_num_regs (gdbarch
, 32);
4192 set_gdbarch_sp_regnum (gdbarch
, 14);
4193 set_gdbarch_fp_regnum (gdbarch
, 8);
4194 set_gdbarch_pc_regnum (gdbarch
, 15);
4196 set_gdbarch_register_name (gdbarch
, cris_register_name
);
4198 /* Length of ordinary registers used in push_word and a few other places.
4199 REGISTER_RAW_SIZE is the real way to know how big a register is. */
4200 set_gdbarch_register_size (gdbarch
, 4);
4203 set_gdbarch_register_bytes_ok (gdbarch
, cris_register_bytes_ok
);
4204 set_gdbarch_software_single_step (gdbarch
, cris_software_single_step
);
4207 set_gdbarch_cannot_store_register (gdbarch
, cris_cannot_store_register
);
4208 set_gdbarch_cannot_fetch_register (gdbarch
, cris_cannot_fetch_register
);
4211 /* The total amount of space needed to store (in an array called registers)
4212 GDB's copy of the machine's register state. Note: We can not use
4213 cris_register_size at this point, since it relies on current_gdbarch
4215 switch (tdep
->cris_version
)
4221 /* Support for these may be added later. */
4222 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unsupported CRIS version");
4227 /* CRIS v8 and v9, a.k.a. ETRAX 100. General registers R0 - R15
4228 (32 bits), special registers P0 - P1 (8 bits), P4 - P5 (16 bits),
4229 and P8 - P14 (32 bits). */
4230 register_bytes
= (16 * 4) + (2 * 1) + (2 * 2) + (7 * 4);
4235 /* CRIS v10 and v11, a.k.a. ETRAX 100LX. In addition to ETRAX 100,
4236 P7 (32 bits), and P15 (32 bits) have been implemented. */
4237 register_bytes
= (16 * 4) + (2 * 1) + (2 * 2) + (9 * 4);
4241 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown CRIS version");
4244 set_gdbarch_register_bytes (gdbarch
, register_bytes
);
4246 /* Returns the register offset for the first byte of register regno's space
4247 in the saved register state. */
4248 set_gdbarch_register_byte (gdbarch
, cris_register_offset
);
4250 /* The length of the registers in the actual machine representation. */
4251 set_gdbarch_register_raw_size (gdbarch
, cris_register_size
);
4253 /* The largest value REGISTER_RAW_SIZE can have. */
4254 set_gdbarch_max_register_raw_size (gdbarch
, 32);
4256 /* The length of the registers in the program's representation. */
4257 set_gdbarch_register_virtual_size (gdbarch
, cris_register_size
);
4259 /* The largest value REGISTER_VIRTUAL_SIZE can have. */
4260 set_gdbarch_max_register_virtual_size (gdbarch
, 32);
4262 set_gdbarch_register_virtual_type (gdbarch
, cris_register_virtual_type
);
4264 /* Use generic dummy frames. */
4265 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
4267 /* Where to execute the call in the memory segments. */
4268 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
4269 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
4271 /* Start execution at the beginning of dummy. */
4272 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
4273 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
4275 /* Set to 1 since call_dummy_breakpoint_offset was defined. */
4276 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
4278 /* Read all about dummy frames in blockframe.c. */
4279 set_gdbarch_call_dummy_length (gdbarch
, 0);
4280 set_gdbarch_pc_in_call_dummy (gdbarch
, pc_in_call_dummy_at_entry_point
);
4282 /* Defined to 1 to indicate that the target supports inferior function
4284 set_gdbarch_call_dummy_p (gdbarch
, 1);
4285 set_gdbarch_call_dummy_words (gdbarch
, 0);
4286 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
4288 /* No stack adjustment needed when peforming an inferior function call. */
4289 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
4290 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
4292 set_gdbarch_get_saved_register (gdbarch
, generic_get_saved_register
);
4294 /* No register requires conversion from raw format to virtual format. */
4295 set_gdbarch_register_convertible (gdbarch
, generic_register_convertible_not
);
4297 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
4298 set_gdbarch_push_return_address (gdbarch
, cris_push_return_address
);
4299 set_gdbarch_pop_frame (gdbarch
, cris_pop_frame
);
4301 set_gdbarch_store_struct_return (gdbarch
, cris_store_struct_return
);
4302 set_gdbarch_deprecated_extract_struct_value_address
4303 (gdbarch
, cris_extract_struct_value_address
);
4304 set_gdbarch_use_struct_convention (gdbarch
, cris_use_struct_convention
);
4306 set_gdbarch_frame_init_saved_regs (gdbarch
, cris_frame_init_saved_regs
);
4307 set_gdbarch_init_extra_frame_info (gdbarch
, cris_init_extra_frame_info
);
4308 set_gdbarch_skip_prologue (gdbarch
, cris_skip_prologue
);
4309 set_gdbarch_prologue_frameless_p (gdbarch
, generic_prologue_frameless_p
);
4311 /* The stack grows downward. */
4312 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
4314 set_gdbarch_breakpoint_from_pc (gdbarch
, cris_breakpoint_from_pc
);
4316 /* The PC must not be decremented after a breakpoint. (The breakpoint
4317 handler takes care of that.) */
4318 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
4320 /* Offset from address of function to start of its code. */
4321 set_gdbarch_function_start_offset (gdbarch
, 0);
4323 /* The number of bytes at the start of arglist that are not really args,
4324 0 in the CRIS ABI. */
4325 set_gdbarch_frame_args_skip (gdbarch
, 0);
4326 set_gdbarch_frameless_function_invocation
4327 (gdbarch
, cris_frameless_function_invocation
);
4328 set_gdbarch_frame_chain (gdbarch
, cris_frame_chain
);
4329 set_gdbarch_frame_chain_valid (gdbarch
, generic_file_frame_chain_valid
);
4331 set_gdbarch_frame_saved_pc (gdbarch
, cris_frame_saved_pc
);
4332 set_gdbarch_frame_args_address (gdbarch
, cris_frame_args_address
);
4333 set_gdbarch_frame_locals_address (gdbarch
, cris_frame_locals_address
);
4334 set_gdbarch_saved_pc_after_call (gdbarch
, cris_saved_pc_after_call
);
4336 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
4338 /* No extra stack alignment needed. Set to 1 by default. */
4339 set_gdbarch_extra_stack_alignment_needed (gdbarch
, 0);
4341 /* Helpful for backtracing and returning in a call dummy. */
4342 set_gdbarch_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
4344 /* Use target_specific function to define link map offsets. */
4345 set_solib_svr4_fetch_link_map_offsets
4346 (gdbarch
, cris_linux_svr4_fetch_link_map_offsets
);