1 /* Target dependent code for CRIS, for GDB, the GNU debugger.
2 Copyright 2001 Free Software Foundation, Inc.
3 Contributed by Axis Communications AB.
4 Written by Hendrik Ruijter, Stefan Andersson, and Orjan Friberg.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
31 #include "opcode/cris.h"
32 #include "arch-utils.h"
35 /* To get entry_point_address. */
40 /* There are no floating point registers. Used in gdbserver low-linux.c. */
43 /* There are 16 general registers. */
46 /* There are 16 special registers. */
50 /* Register numbers of various important registers.
51 FP_REGNUM Contains address of executing stack frame.
52 STR_REGNUM Contains the address of structure return values.
53 RET_REGNUM Contains the return value when shorter than or equal to 32 bits
54 ARG1_REGNUM Contains the first parameter to a function.
55 ARG2_REGNUM Contains the second parameter to a function.
56 ARG3_REGNUM Contains the third parameter to a function.
57 ARG4_REGNUM Contains the fourth parameter to a function. Rest on stack.
58 SP_REGNUM Contains address of top of stack.
59 PC_REGNUM Contains address of next instruction.
60 SRP_REGNUM Subroutine return pointer register.
61 BRP_REGNUM Breakpoint return pointer register. */
63 /* FP_REGNUM = 8, SP_REGNUM = 14, and PC_REGNUM = 15 have been incorporated
64 into the multi-arch framework. */
68 /* Enums with respect to the general registers, valid for all
77 /* Enums with respect to the special registers, some of which may not be
78 applicable to all CRIS versions. */
95 extern const struct cris_spec_reg cris_spec_regs
[];
97 /* CRIS version, set via the user command 'set cris-version'. Affects
98 register names and sizes.*/
99 static int usr_cmd_cris_version
;
101 /* Indicates whether to trust the above variable. */
102 static int usr_cmd_cris_version_valid
= 0;
104 /* CRIS mode, set via the user command 'set cris-mode'. Affects availability
105 of some registers. */
106 static const char *usr_cmd_cris_mode
;
108 /* Indicates whether to trust the above variable. */
109 static int usr_cmd_cris_mode_valid
= 0;
111 static const char CRIS_MODE_USER
[] = "CRIS_MODE_USER";
112 static const char CRIS_MODE_SUPERVISOR
[] = "CRIS_MODE_SUPERVISOR";
113 static const char *cris_mode_enums
[] =
116 CRIS_MODE_SUPERVISOR
,
120 /* CRIS ABI, set via the user command 'set cris-abi'.
121 There are two flavours:
122 1. Original ABI with 32-bit doubles, where arguments <= 4 bytes are
124 2. New ABI with 64-bit doubles, where arguments <= 8 bytes are passed by
126 static const char *usr_cmd_cris_abi
;
128 /* Indicates whether to trust the above variable. */
129 static int usr_cmd_cris_abi_valid
= 0;
131 /* These variables are strings instead of enums to make them usable as
132 parameters to add_set_enum_cmd. */
133 static const char CRIS_ABI_ORIGINAL
[] = "CRIS_ABI_ORIGINAL";
134 static const char CRIS_ABI_V2
[] = "CRIS_ABI_V2";
135 static const char CRIS_ABI_SYMBOL
[] = ".$CRIS_ABI_V2";
136 static const char *cris_abi_enums
[] =
143 /* CRIS architecture specific information. */
147 const char *cris_mode
;
148 const char *cris_abi
;
151 /* Functions for accessing target dependent data. */
156 return (gdbarch_tdep (current_gdbarch
)->cris_version
);
162 return (gdbarch_tdep (current_gdbarch
)->cris_mode
);
168 return (gdbarch_tdep (current_gdbarch
)->cris_abi
);
171 /* For saving call-clobbered contents in R9 when returning structs. */
172 static CORE_ADDR struct_return_address
;
174 struct frame_extra_info
180 /* The instruction environment needed to find single-step breakpoints. */
182 struct instruction_environment
184 unsigned long reg
[NUM_GENREGS
];
185 unsigned long preg
[NUM_SPECREGS
];
186 unsigned long branch_break_address
;
187 unsigned long delay_slot_pc
;
188 unsigned long prefix_value
;
193 int delay_slot_pc_active
;
195 int disable_interrupt
;
198 /* Save old breakpoints in order to restore the state before a single_step.
199 At most, two breakpoints will have to be remembered. */
201 char binsn_quantum
[BREAKPOINT_MAX
];
202 static binsn_quantum break_mem
[2];
203 static CORE_ADDR next_pc
= 0;
204 static CORE_ADDR branch_target_address
= 0;
205 static unsigned char branch_break_inserted
= 0;
207 /* Machine-dependencies in CRIS for opcodes. */
209 /* Instruction sizes. */
210 enum cris_instruction_sizes
217 /* Addressing modes. */
218 enum cris_addressing_modes
225 /* Prefix addressing modes. */
226 enum cris_prefix_addressing_modes
228 PREFIX_INDEX_MODE
= 2,
229 PREFIX_ASSIGN_MODE
= 3,
231 /* Handle immediate byte offset addressing mode prefix format. */
232 PREFIX_OFFSET_MODE
= 2
235 /* Masks for opcodes. */
236 enum cris_opcode_masks
238 BRANCH_SIGNED_SHORT_OFFSET_MASK
= 0x1,
239 SIGNED_EXTEND_BIT_MASK
= 0x2,
240 SIGNED_BYTE_MASK
= 0x80,
241 SIGNED_BYTE_EXTEND_MASK
= 0xFFFFFF00,
242 SIGNED_WORD_MASK
= 0x8000,
243 SIGNED_WORD_EXTEND_MASK
= 0xFFFF0000,
244 SIGNED_DWORD_MASK
= 0x80000000,
245 SIGNED_QUICK_VALUE_MASK
= 0x20,
246 SIGNED_QUICK_VALUE_EXTEND_MASK
= 0xFFFFFFC0
249 /* Functions for opcodes. The general form of the ETRAX 16-bit instruction:
257 cris_get_operand2 (unsigned short insn
)
259 return ((insn
& 0xF000) >> 12);
263 cris_get_mode (unsigned short insn
)
265 return ((insn
& 0x0C00) >> 10);
269 cris_get_opcode (unsigned short insn
)
271 return ((insn
& 0x03C0) >> 6);
275 cris_get_size (unsigned short insn
)
277 return ((insn
& 0x0030) >> 4);
281 cris_get_operand1 (unsigned short insn
)
283 return (insn
& 0x000F);
286 /* Additional functions in order to handle opcodes. */
289 cris_get_wide_opcode (unsigned short insn
)
291 return ((insn
& 0x03E0) >> 5);
295 cris_get_short_size (unsigned short insn
)
297 return ((insn
& 0x0010) >> 4);
301 cris_get_quick_value (unsigned short insn
)
303 return (insn
& 0x003F);
307 cris_get_bdap_quick_offset (unsigned short insn
)
309 return (insn
& 0x00FF);
313 cris_get_branch_short_offset (unsigned short insn
)
315 return (insn
& 0x00FF);
319 cris_get_asr_shift_steps (unsigned long value
)
321 return (value
& 0x3F);
325 cris_get_asr_quick_shift_steps (unsigned short insn
)
327 return (insn
& 0x1F);
331 cris_get_clear_size (unsigned short insn
)
333 return ((insn
) & 0xC000);
337 cris_is_signed_extend_bit_on (unsigned short insn
)
339 return (((insn
) & 0x20) == 0x20);
343 cris_is_xflag_bit_on (unsigned short insn
)
345 return (((insn
) & 0x1000) == 0x1000);
349 cris_set_size_to_dword (unsigned short *insn
)
356 cris_get_signed_offset (unsigned short insn
)
358 return ((signed char) (insn
& 0x00FF));
361 /* Calls an op function given the op-type, working on the insn and the
363 static void cris_gdb_func (enum cris_op_type
, unsigned short, inst_env_type
*);
365 static CORE_ADDR
cris_skip_prologue_main (CORE_ADDR pc
, int frameless_p
);
367 static struct gdbarch
*cris_gdbarch_init (struct gdbarch_info
,
368 struct gdbarch_list
*);
370 static int cris_delayed_get_disassembler (bfd_vma
, disassemble_info
*);
372 static void cris_dump_tdep (struct gdbarch
*, struct ui_file
*);
374 static void cris_version_update (char *ignore_args
, int from_tty
,
375 struct cmd_list_element
*c
);
377 static void cris_mode_update (char *ignore_args
, int from_tty
,
378 struct cmd_list_element
*c
);
380 static void cris_abi_update (char *ignore_args
, int from_tty
,
381 struct cmd_list_element
*c
);
383 static CORE_ADDR
bfd_lookup_symbol (bfd
*, const char *);
385 /* Frames information. The definition of the struct frame_info is
389 int signal_handler_caller
393 If the compilation option -fno-omit-frame-pointer is present the
394 variable frame will be set to the content of R8 which is the frame
397 The variable pc contains the address where execution is performed
398 in the present frame. The innermost frame contains the current content
399 of the register PC. All other frames contain the content of the
400 register PC in the next frame.
402 The variable signal_handler_caller is non-zero when the frame is
403 associated with the call of a signal handler.
405 The variable return_pc contains the address where execution should be
406 resumed when the present frame has finished, the return address.
408 The variable leaf_function is 1 if the return address is in the register
409 SRP, and 0 if it is on the stack.
411 Prologue instructions C-code.
412 The prologue may consist of (-fno-omit-frame-pointer)
416 move.d sp,r8 move.d sp,r8
418 movem rY,[sp] movem rY,[sp]
419 move.S rZ,[r8-U] move.S rZ,[r8-U]
421 where 1 is a non-terminal function, and 2 is a leaf-function.
423 Note that this assumption is extremely brittle, and will break at the
424 slightest change in GCC's prologue.
426 If local variables are declared or register contents are saved on stack
427 the subq-instruction will be present with X as the number of bytes
428 needed for storage. The reshuffle with respect to r8 may be performed
429 with any size S (b, w, d) and any of the general registers Z={0..13}.
430 The offset U should be representable by a signed 8-bit value in all cases.
431 Thus, the prefix word is assumed to be immediate byte offset mode followed
432 by another word containing the instruction.
441 Prologue instructions C++-code.
442 Case 1) and 2) in the C-code may be followed by
448 move.S [r8+U],rZ ; P4
450 if any of the call parameters are stored. The host expects these
451 instructions to be executed in order to get the call parameters right. */
453 /* Examine the prologue of a function. The variable ip is the address of
454 the first instruction of the prologue. The variable limit is the address
455 of the first instruction after the prologue. The variable fi contains the
456 information in struct frame_info. The variable frameless_p controls whether
457 the entire prologue is examined (0) or just enough instructions to
458 determine that it is a prologue (1). */
461 cris_examine (CORE_ADDR ip
, CORE_ADDR limit
, struct frame_info
*fi
,
464 /* Present instruction. */
467 /* Next instruction, lookahead. */
468 unsigned short insn_next
;
471 /* Is there a push fp? */
474 /* Number of byte on stack used for local variables and movem. */
477 /* Highest register number in a movem. */
480 /* move.d r<source_register>,rS */
481 short source_register
;
483 /* This frame is with respect to a leaf until a push srp is found. */
484 fi
->extra_info
->leaf_function
= 1;
486 /* This frame is without the FP until a push fp is found. */
489 /* Assume nothing on stack. */
493 /* No information about register contents so far. */
495 /* We only want to know the end of the prologue when fi->saved_regs == 0.
496 When the saved registers are allocated full information is required. */
499 for (regno
= 0; regno
< NUM_REGS
; regno
++)
500 fi
->saved_regs
[regno
] = 0;
503 /* Find the prologue instructions. */
506 insn
= read_memory_unsigned_integer (ip
, sizeof (short));
507 ip
+= sizeof (short);
510 /* push <reg> 32 bit instruction */
511 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
512 ip
+= sizeof (short);
513 regno
= cris_get_operand2 (insn_next
);
514 if (regno
== (SRP_REGNUM
- NUM_GENREGS
))
520 fi
->extra_info
->leaf_function
= 0;
522 else if (regno
== FP_REGNUM
)
527 else if (insn
== 0x866E)
536 else if (cris_get_operand2 (insn
) == SP_REGNUM
537 && cris_get_mode (insn
) == 0x0000
538 && cris_get_opcode (insn
) == 0x000A)
541 val
= cris_get_quick_value (insn
);
543 else if (cris_get_mode (insn
) == 0x0002
544 && cris_get_opcode (insn
) == 0x000F
545 && cris_get_size (insn
) == 0x0003
546 && cris_get_operand1 (insn
) == SP_REGNUM
)
548 /* movem r<regsave>,[sp] */
553 regsave
= cris_get_operand2 (insn
);
555 else if (cris_get_operand2 (insn
) == SP_REGNUM
556 && ((insn
& 0x0F00) >> 8) == 0x0001
557 && (cris_get_signed_offset (insn
) < 0))
559 /* Immediate byte offset addressing prefix word with sp as base
560 register. Used for CRIS v8 i.e. ETRAX 100 and newer if <val>
561 is between 64 and 128.
562 movem r<regsave>,[sp=sp-<val>] */
563 val
= -cris_get_signed_offset (insn
);
564 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
565 ip
+= sizeof (short);
566 if (cris_get_mode (insn_next
) == PREFIX_ASSIGN_MODE
567 && cris_get_opcode (insn_next
) == 0x000F
568 && cris_get_size (insn_next
) == 0x0003
569 && cris_get_operand1 (insn_next
) == SP_REGNUM
)
575 regsave
= cris_get_operand2 (insn_next
);
579 /* The prologue ended before the limit was reached. */
580 ip
-= 2 * sizeof (short);
584 else if (cris_get_mode (insn
) == 0x0001
585 && cris_get_opcode (insn
) == 0x0009
586 && cris_get_size (insn
) == 0x0002)
588 /* move.d r<10..13>,r<0..15> */
593 source_register
= cris_get_operand1 (insn
);
594 if (source_register
< ARG1_REGNUM
|| source_register
> ARG4_REGNUM
)
596 /* The prologue ended before the limit was reached. */
597 ip
-= sizeof (short);
601 else if (cris_get_operand2 (insn
) == FP_REGNUM
602 /* The size is a fixed-size. */
603 && ((insn
& 0x0F00) >> 8) == 0x0001
604 /* A negative offset. */
605 && (cris_get_signed_offset (insn
) < 0))
607 /* move.S rZ,[r8-U] (?) */
608 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
609 ip
+= sizeof (short);
610 regno
= cris_get_operand2 (insn_next
);
611 if ((regno
>= 0 && regno
< SP_REGNUM
)
612 && cris_get_mode (insn_next
) == PREFIX_OFFSET_MODE
613 && cris_get_opcode (insn_next
) == 0x000F)
615 /* move.S rZ,[r8-U] */
620 /* The prologue ended before the limit was reached. */
621 ip
-= 2 * sizeof (short);
625 else if (cris_get_operand2 (insn
) == FP_REGNUM
626 /* The size is a fixed-size. */
627 && ((insn
& 0x0F00) >> 8) == 0x0001
628 /* A positive offset. */
629 && (cris_get_signed_offset (insn
) > 0))
631 /* move.S [r8+U],rZ (?) */
632 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
633 ip
+= sizeof (short);
634 regno
= cris_get_operand2 (insn_next
);
635 if ((regno
>= 0 && regno
< SP_REGNUM
)
636 && cris_get_mode (insn_next
) == PREFIX_OFFSET_MODE
637 && cris_get_opcode (insn_next
) == 0x0009
638 && cris_get_operand1 (insn_next
) == regno
)
640 /* move.S [r8+U],rZ */
645 /* The prologue ended before the limit was reached. */
646 ip
-= 2 * sizeof (short);
652 /* The prologue ended before the limit was reached. */
653 ip
-= sizeof (short);
659 /* We only want to know the end of the prologue when
660 fi->saved_regs == 0. */
666 fi
->saved_regs
[FP_REGNUM
] = FRAME_FP (fi
);
668 /* Calculate the addresses. */
669 for (regno
= regsave
; regno
>= 0; regno
--)
671 fi
->saved_regs
[regno
] = FRAME_FP (fi
) - val
;
674 if (fi
->extra_info
->leaf_function
)
676 /* Set the register SP to contain the stack pointer of
678 fi
->saved_regs
[SP_REGNUM
] = FRAME_FP (fi
) + 4;
682 /* Set the register SP to contain the stack pointer of
684 fi
->saved_regs
[SP_REGNUM
] = FRAME_FP (fi
) + 8;
686 /* Set the register SRP to contain the return address of
688 fi
->saved_regs
[SRP_REGNUM
] = FRAME_FP (fi
) + 4;
694 /* Advance pc beyond any function entry prologue instructions at pc
695 to reach some "real" code. */
698 cris_skip_prologue (CORE_ADDR pc
)
700 return cris_skip_prologue_main (pc
, 0);
703 /* As cris_skip_prologue, but stops as soon as it knows that the function
704 has a frame. Its result is equal to its input pc if the function is
705 frameless, unequal otherwise. */
708 cris_skip_prologue_frameless_p (CORE_ADDR pc
)
710 return cris_skip_prologue_main (pc
, 1);
713 /* Given a PC value corresponding to the start of a function, return the PC
714 of the first instruction after the function prologue. */
717 cris_skip_prologue_main (CORE_ADDR pc
, int frameless_p
)
719 struct frame_info fi
;
720 static struct frame_extra_info fei
;
721 struct symtab_and_line sal
= find_pc_line (pc
, 0);
723 CORE_ADDR pc_after_prologue
;
725 /* frame_info now contains dynamic memory. Since fi is a dummy here,
726 I use static memory for extra_info, and don't bother allocating
727 memory for saved_regs. */
729 fi
.extra_info
= &fei
;
731 /* If there is no symbol information then sal.end == 0, and we end up
732 examining only the first instruction in the function prologue.
733 Exaggerating the limit seems to be harmless. */
735 best_limit
= sal
.end
;
737 best_limit
= pc
+ 100;
739 pc_after_prologue
= cris_examine (pc
, best_limit
, &fi
, frameless_p
);
740 return pc_after_prologue
;
743 /* Use the program counter to determine the contents and size of a breakpoint
744 instruction. It returns a pointer to a string of bytes that encode a
745 breakpoint instruction, stores the length of the string to *lenptr, and
746 adjusts pcptr (if necessary) to point to the actual memory location where
747 the breakpoint should be inserted. */
750 cris_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
752 static unsigned char break_insn
[] = {0x38, 0xe9};
758 /* Returns the register SRP (subroutine return pointer) which must contain
759 the content of the register PC after a function call. */
762 cris_saved_pc_after_call ()
764 return read_register (SRP_REGNUM
);
767 /* Returns 1 if spec_reg is applicable to the current gdbarch's CRIS version,
771 cris_spec_reg_applicable (struct cris_spec_reg spec_reg
)
773 int version
= cris_version ();
775 switch (spec_reg
.applicable_version
)
777 case cris_ver_version_all
:
779 case cris_ver_warning
:
780 /* Indeterminate/obsolete. */
783 /* Simulator only. */
786 return (version
>= 0 && version
<= 3);
788 return (version
>= 3);
790 return (version
== 8 || version
== 9);
792 return (version
>= 8);
794 return (version
>= 10);
796 /* Invalid cris version. */
801 /* Returns the register size in unit byte. Returns 0 for an unimplemented
802 register, -1 for an invalid register. */
805 cris_register_size (int regno
)
810 if (regno
>= 0 && regno
< NUM_GENREGS
)
812 /* General registers (R0 - R15) are 32 bits. */
815 else if (regno
>= NUM_GENREGS
&& regno
< NUM_REGS
)
817 /* Special register (R16 - R31). cris_spec_regs is zero-based.
818 Adjust regno accordingly. */
819 spec_regno
= regno
- NUM_GENREGS
;
821 /* The entries in cris_spec_regs are stored in register number order,
822 which means we can shortcut into the array when searching it. */
823 for (i
= spec_regno
; cris_spec_regs
[i
].name
!= NULL
; i
++)
825 if (cris_spec_regs
[i
].number
== spec_regno
826 && cris_spec_reg_applicable (cris_spec_regs
[i
]))
827 /* Go with the first applicable register. */
828 return cris_spec_regs
[i
].reg_size
;
830 /* Special register not applicable to this CRIS version. */
835 /* Invalid register. */
840 /* Nonzero if regno should not be fetched from the target. This is the case
841 for unimplemented (size 0) and non-existant registers. */
844 cris_cannot_fetch_register (int regno
)
846 return ((regno
< 0 || regno
>= NUM_REGS
)
847 || (cris_register_size (regno
) == 0));
850 /* Nonzero if regno should not be written to the target, for various
854 cris_cannot_store_register (int regno
)
856 /* There are three kinds of registers we refuse to write to.
857 1. Those that not implemented.
858 2. Those that are read-only (depends on the processor mode).
859 3. Those registers to which a write has no effect.
862 if (regno
< 0 || regno
>= NUM_REGS
|| cris_register_size (regno
) == 0)
863 /* Not implemented. */
866 else if (regno
== VR_REGNUM
)
870 else if (regno
== P0_REGNUM
|| regno
== P4_REGNUM
|| regno
== P8_REGNUM
)
871 /* Writing has no effect. */
874 else if (cris_mode () == CRIS_MODE_USER
)
876 if (regno
== IBR_REGNUM
|| regno
== BAR_REGNUM
|| regno
== BRP_REGNUM
877 || regno
== IRP_REGNUM
)
878 /* Read-only in user mode. */
885 /* Returns the register offset for the first byte of register regno's space
886 in the saved register state. Returns -1 for an invalid or unimplemented
890 cris_register_offset (int regno
)
896 if (regno
>= 0 && regno
< NUM_REGS
)
898 /* FIXME: The offsets should be cached and calculated only once,
899 when the architecture being debugged has changed. */
900 for (i
= 0; i
< regno
; i
++)
901 offset
+= cris_register_size (i
);
907 /* Invalid register. */
912 /* Return the GDB type (defined in gdbtypes.c) for the "standard" data type
913 of data in register regno. */
916 cris_register_virtual_type (int regno
)
918 if (regno
== SP_REGNUM
|| regno
== PC_REGNUM
919 || (regno
> P8_REGNUM
&& regno
< USP_REGNUM
))
921 /* SP, PC, IBR, IRP, SRP, BAR, DCCR, BRP */
922 return lookup_pointer_type (builtin_type_void
);
924 else if (regno
== P8_REGNUM
|| regno
== USP_REGNUM
925 || (regno
>= 0 && regno
< SP_REGNUM
))
927 /* R0 - R13, P8, P15 */
928 return builtin_type_unsigned_long
;
930 else if (regno
> P3_REGNUM
&& regno
< P8_REGNUM
)
932 /* P4, CCR, DCR0, DCR1 */
933 return builtin_type_unsigned_short
;
935 else if (regno
> PC_REGNUM
&& regno
< P4_REGNUM
)
938 return builtin_type_unsigned_char
;
942 /* Invalid register. */
943 return builtin_type_void
;
947 /* Stores a function return value of type type, where valbuf is the address
948 of the value to be stored. */
950 /* In the original CRIS ABI, R10 is used to store return values. */
953 cris_abi_original_store_return_value (struct type
*type
, char *valbuf
)
955 int len
= TYPE_LENGTH (type
);
957 if (len
<= REGISTER_SIZE
)
958 write_register_bytes (REGISTER_BYTE (RET_REGNUM
), valbuf
, len
);
960 internal_error (__FILE__
, __LINE__
, "cris_abi_original_store_return_value: type length too large.");
963 /* In the CRIS ABI V2, R10 and R11 are used to store return values. */
966 cris_abi_v2_store_return_value (struct type
*type
, char *valbuf
)
968 int len
= TYPE_LENGTH (type
);
970 if (len
<= 2 * REGISTER_SIZE
)
972 /* Note that this works since R10 and R11 are consecutive registers. */
973 write_register_bytes (REGISTER_BYTE (RET_REGNUM
), valbuf
, len
);
976 internal_error (__FILE__
, __LINE__
, "cris_abi_v2_store_return_value: type length too large.");
979 /* Return the name of register regno as a string. Return NULL for an invalid or
980 unimplemented register. */
983 cris_register_name (int regno
)
985 static char *cris_genreg_names
[] =
986 { "r0", "r1", "r2", "r3", \
987 "r4", "r5", "r6", "r7", \
988 "r8", "r9", "r10", "r11", \
989 "r12", "r13", "sp", "pc" };
994 if (regno
>= 0 && regno
< NUM_GENREGS
)
996 /* General register. */
997 return cris_genreg_names
[regno
];
999 else if (regno
>= NUM_GENREGS
&& regno
< NUM_REGS
)
1001 /* Special register (R16 - R31). cris_spec_regs is zero-based.
1002 Adjust regno accordingly. */
1003 spec_regno
= regno
- NUM_GENREGS
;
1005 /* The entries in cris_spec_regs are stored in register number order,
1006 which means we can shortcut into the array when searching it. */
1007 for (i
= spec_regno
; cris_spec_regs
[i
].name
!= NULL
; i
++)
1009 if (cris_spec_regs
[i
].number
== spec_regno
1010 && cris_spec_reg_applicable (cris_spec_regs
[i
]))
1011 /* Go with the first applicable register. */
1012 return cris_spec_regs
[i
].name
;
1014 /* Special register not applicable to this CRIS version. */
1019 /* Invalid register. */
1025 cris_register_bytes_ok (long bytes
)
1027 return (bytes
== REGISTER_BYTES
);
1030 /* Extract from an array regbuf containing the raw register state a function
1031 return value of type type, and copy that, in virtual format, into
1034 /* In the original CRIS ABI, R10 is used to return values. */
1037 cris_abi_original_extract_return_value (struct type
*type
, char *regbuf
,
1040 int len
= TYPE_LENGTH (type
);
1042 if (len
<= REGISTER_SIZE
)
1043 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET_REGNUM
), len
);
1045 internal_error (__FILE__
, __LINE__
, "cris_abi_original_extract_return_value: type length too large");
1048 /* In the CRIS ABI V2, R10 and R11 are used to store return values. */
1051 cris_abi_v2_extract_return_value (struct type
*type
, char *regbuf
,
1054 int len
= TYPE_LENGTH (type
);
1056 if (len
<= 2 * REGISTER_SIZE
)
1057 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET_REGNUM
), len
);
1059 internal_error (__FILE__
, __LINE__
, "cris_abi_v2_extract_return_value: type length too large");
1062 /* Store the address of the place in which to copy the structure the
1063 subroutine will return. In the CRIS ABI, R9 is used in order to pass
1064 the address of the allocated area where a structure return value must
1065 be stored. R9 is call-clobbered, which means we must save it here for
1069 cris_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1071 write_register (STR_REGNUM
, addr
);
1072 struct_return_address
= addr
;
1075 /* Extract from regbuf the address where a function should return a
1076 structure value. It's not there in the CRIS ABI, so we must do it another
1080 cris_extract_struct_value_address (char *regbuf
)
1082 return struct_return_address
;
1085 /* Returns 1 if a value of the given type being returned from a function
1086 must have space allocated for it on the stack. gcc_p is true if the
1087 function being considered is known to have been compiled by GCC.
1088 In the CRIS ABI, structure return values are passed to the called
1089 function by reference in register R9 to a caller-allocated area, so
1090 this is always true. */
1093 cris_use_struct_convention (int gcc_p
, struct type
*type
)
1098 /* Returns 1 if the given type will be passed by pointer rather than
1101 /* In the original CRIS ABI, arguments shorter than or equal to 32 bits are
1105 cris_abi_original_reg_struct_has_addr (int gcc_p
, struct type
*type
)
1107 return (TYPE_LENGTH (type
) > 4);
1110 /* In the CRIS ABI V2, arguments shorter than or equal to 64 bits are passed
1114 cris_abi_v2_reg_struct_has_addr (int gcc_p
, struct type
*type
)
1116 return (TYPE_LENGTH (type
) > 8);
1119 /* Returns 1 if the function invocation represented by fi does not have a
1120 stack frame associated with it. Otherwise return 0. */
1123 cris_frameless_function_invocation (struct frame_info
*fi
)
1125 if (fi
->signal_handler_caller
)
1128 return frameless_look_for_prologue (fi
);
1131 /* See frame.h. Determines the address of all registers in the current stack
1132 frame storing each in frame->saved_regs. Space for frame->saved_regs shall
1133 be allocated by FRAME_INIT_SAVED_REGS using either frame_saved_regs_zalloc
1134 or frame_obstack_alloc. */
1137 cris_frame_init_saved_regs (struct frame_info
*fi
)
1140 struct symtab_and_line sal
;
1142 char *dummy_regs
= generic_find_dummy_frame (fi
->pc
, fi
->frame
);
1144 /* Examine the entire prologue. */
1145 register int frameless_p
= 0;
1147 /* Has this frame's registers already been initialized? */
1151 frame_saved_regs_zalloc (fi
);
1155 /* I don't see this ever happening, considering the context in which
1156 cris_frame_init_saved_regs is called (always when we're not in
1158 memcpy (&fi
->saved_regs
, dummy_regs
, sizeof (fi
->saved_regs
));
1162 ip
= get_pc_function_start (fi
->pc
);
1163 sal
= find_pc_line (ip
, 0);
1165 /* If there is no symbol information then sal.end == 0, and we end up
1166 examining only the first instruction in the function prologue.
1167 Exaggerating the limit seems to be harmless. */
1169 best_limit
= sal
.end
;
1171 best_limit
= ip
+ 100;
1173 cris_examine (ip
, best_limit
, fi
, frameless_p
);
1177 /* Initialises the extra frame information at the creation of a new frame.
1178 The inparameter fromleaf is 0 when the call is from create_new_frame.
1179 When the call is from get_prev_frame_info, fromleaf is determined by
1180 cris_frameless_function_invocation. */
1183 cris_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1187 /* Called from get_prev_frame. */
1188 fi
->pc
= FRAME_SAVED_PC (fi
->next
);
1191 fi
->extra_info
= (struct frame_extra_info
*)
1192 frame_obstack_alloc (sizeof (struct frame_extra_info
));
1194 fi
->extra_info
->return_pc
= 0;
1195 fi
->extra_info
->leaf_function
= 0;
1197 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1199 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
1200 by assuming it's always FP. */
1201 fi
->frame
= generic_read_register_dummy (fi
->pc
, fi
->frame
, SP_REGNUM
);
1202 fi
->extra_info
->return_pc
=
1203 generic_read_register_dummy (fi
->pc
, fi
->frame
, PC_REGNUM
);
1205 /* FIXME: Is this necessarily true? */
1206 fi
->extra_info
->leaf_function
= 0;
1210 cris_frame_init_saved_regs (fi
);
1212 /* Check fromleaf/frameless_function_invocation. (FIXME) */
1214 if (fi
->saved_regs
[SRP_REGNUM
] != 0)
1216 /* SRP was saved on the stack; non-leaf function. */
1217 fi
->extra_info
->return_pc
=
1218 read_memory_integer (fi
->saved_regs
[SRP_REGNUM
],
1219 REGISTER_RAW_SIZE (SRP_REGNUM
));
1223 /* SRP is still in a register; leaf function. */
1224 fi
->extra_info
->return_pc
= read_register (SRP_REGNUM
);
1225 /* FIXME: Should leaf_function be set to 1 here? */
1226 fi
->extra_info
->leaf_function
= 1;
1231 /* Return the content of the frame pointer in the present frame. In other
1232 words, determine the address of the calling function's frame. */
1235 cris_frame_chain (struct frame_info
*fi
)
1237 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1241 else if (!inside_entry_file (fi
->pc
))
1243 return read_memory_unsigned_integer (FRAME_FP (fi
), 4);
1251 /* Return the saved PC (which equals the return address) of this frame. */
1254 cris_frame_saved_pc (struct frame_info
*fi
)
1256 return fi
->extra_info
->return_pc
;
1259 /* Return the address of the argument block for the frame described
1260 by struct frame_info. */
1263 cris_frame_args_address (struct frame_info
*fi
)
1265 return FRAME_FP (fi
);
1268 /* Return the address of the locals block for the frame
1269 described by struct frame_info. */
1272 cris_frame_locals_address (struct frame_info
*fi
)
1274 return FRAME_FP (fi
);
1277 /* Setup the function arguments for calling a function in the inferior. */
1280 cris_abi_original_push_arguments (int nargs
, struct value
**args
,
1281 CORE_ADDR sp
, int struct_return
,
1282 CORE_ADDR struct_addr
)
1293 /* Data and parameters reside in different areas on the stack.
1294 Both frame pointers grow toward higher addresses. */
1295 CORE_ADDR fp_params
;
1298 /* Are we returning a value using a structure return or a normal value
1299 return? struct_addr is the address of the reserved space for the return
1300 structure to be written on the stack. */
1303 write_register (STR_REGNUM
, struct_addr
);
1306 /* Make sure there's space on the stack. Allocate space for data and a
1307 parameter to refer to that data. */
1308 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
1309 stack_alloc
+= (TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + REGISTER_SIZE
);
1311 /* We may over-allocate a little here, but that won't hurt anything. */
1313 /* Initialize stack frame pointers. */
1315 fp_data
= sp
+ (nargs
* REGISTER_SIZE
);
1317 /* Now load as many as possible of the first arguments into
1318 registers, and push the rest onto the stack. */
1319 argreg
= ARG1_REGNUM
;
1322 for (argnum
= 0; argnum
< nargs
; argnum
++)
1324 type
= VALUE_TYPE (args
[argnum
]);
1325 len
= TYPE_LENGTH (type
);
1326 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
1328 if (len
<= REGISTER_SIZE
&& argreg
<= ARG4_REGNUM
)
1330 /* Data fits in a register; put it in the first available
1332 write_register (argreg
, *(unsigned long *) val
);
1335 else if (len
> REGISTER_SIZE
&& argreg
<= ARG4_REGNUM
)
1337 /* Data does not fit in register; pass it on the stack and
1338 put its address in the first available register. */
1339 write_memory (fp_data
, val
, len
);
1340 write_register (argreg
, fp_data
);
1344 else if (len
> REGISTER_SIZE
)
1346 /* Data does not fit in register; put both data and
1347 parameter on the stack. */
1348 write_memory (fp_data
, val
, len
);
1349 write_memory (fp_params
, (char *) (&fp_data
), REGISTER_SIZE
);
1351 fp_params
+= REGISTER_SIZE
;
1355 /* Data fits in a register, but we are out of registers;
1356 put the parameter on the stack. */
1357 write_memory (fp_params
, val
, REGISTER_SIZE
);
1358 fp_params
+= REGISTER_SIZE
;
1366 cris_abi_v2_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1367 int struct_return
, CORE_ADDR struct_addr
)
1376 /* The function's arguments and memory allocated by gdb for the arguments to
1377 point at reside in separate areas on the stack.
1378 Both frame pointers grow toward higher addresses. */
1382 /* Are we returning a value using a structure return or a normal value
1383 return? struct_addr is the address of the reserved space for the return
1384 structure to be written on the stack. */
1387 write_register (STR_REGNUM
, struct_addr
);
1390 /* Allocate enough to keep things word-aligned on both parts of the
1393 for (argnum
= 0; argnum
< nargs
; argnum
++)
1398 len
= TYPE_LENGTH (VALUE_TYPE (args
[argnum
]));
1399 reg_demand
= (len
/ REGISTER_SIZE
) + (len
% REGISTER_SIZE
!= 0 ? 1 : 0);
1401 /* reg_demand * REGISTER_SIZE is the amount of memory we might need to
1402 allocate for this argument. 2 * REGISTER_SIZE is the amount of stack
1403 space we might need to pass the argument itself (either by value or by
1405 stack_alloc
+= (reg_demand
* REGISTER_SIZE
+ 2 * REGISTER_SIZE
);
1408 /* We may over-allocate a little here, but that won't hurt anything. */
1410 /* Initialize frame pointers. */
1412 fp_mem
= sp
+ (nargs
* (2 * REGISTER_SIZE
));
1414 /* Now load as many as possible of the first arguments into registers,
1415 and push the rest onto the stack. */
1416 argreg
= ARG1_REGNUM
;
1419 for (argnum
= 0; argnum
< nargs
; argnum
++)
1426 len
= TYPE_LENGTH (VALUE_TYPE (args
[argnum
]));
1427 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
1429 /* How may registers worth of storage do we need for this argument? */
1430 reg_demand
= (len
/ REGISTER_SIZE
) + (len
% REGISTER_SIZE
!= 0 ? 1 : 0);
1432 if (len
<= (2 * REGISTER_SIZE
)
1433 && (argreg
+ reg_demand
- 1 <= ARG4_REGNUM
))
1435 /* Data passed by value. Fits in available register(s). */
1436 for (i
= 0; i
< reg_demand
; i
++)
1438 write_register (argreg
, *(unsigned long *) val
);
1440 val
+= REGISTER_SIZE
;
1443 else if (len
<= (2 * REGISTER_SIZE
) && argreg
<= ARG4_REGNUM
)
1445 /* Data passed by value. Does not fit in available register(s).
1446 Use the register(s) first, then the stack. */
1447 for (i
= 0; i
< reg_demand
; i
++)
1449 if (argreg
<= ARG4_REGNUM
)
1451 write_register (argreg
, *(unsigned long *) val
);
1453 val
+= REGISTER_SIZE
;
1457 /* I guess this memory write could write the remaining data
1458 all at once instead of in REGISTER_SIZE chunks. */
1459 write_memory (fp_arg
, val
, REGISTER_SIZE
);
1460 fp_arg
+= REGISTER_SIZE
;
1461 val
+= REGISTER_SIZE
;
1465 else if (len
> (2 * REGISTER_SIZE
))
1467 /* Data passed by reference. Put it on the stack. */
1468 write_memory (fp_mem
, val
, len
);
1469 write_memory (fp_arg
, (char *) (&fp_mem
), REGISTER_SIZE
);
1471 /* fp_mem need not be word-aligned since it's just a chunk of
1472 memory being pointed at. That is, += len would do. */
1473 fp_mem
+= reg_demand
* REGISTER_SIZE
;
1474 fp_arg
+= REGISTER_SIZE
;
1478 /* Data passed by value. No available registers. Put it on
1480 write_memory (fp_arg
, val
, len
);
1482 /* fp_arg must be word-aligned (i.e., don't += len) to match
1483 the function prologue. */
1484 fp_arg
+= reg_demand
* REGISTER_SIZE
;
1491 /* Never put the return address on the stack. The register SRP is pushed
1492 by the called function unless it is a leaf-function. Due to the BRP
1493 register the PC will change when continue is sent. */
1496 cris_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1498 write_register (SRP_REGNUM
, CALL_DUMMY_ADDRESS ());
1502 /* Restore the machine to the state it had before the current frame
1503 was created. Discard the innermost frame from the stack and restore
1504 all saved registers. */
1509 register struct frame_info
*fi
= get_current_frame ();
1511 register int stack_offset
= 0;
1513 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1515 /* This happens when we hit a breakpoint set at the entry point,
1516 when returning from a dummy frame. */
1517 generic_pop_dummy_frame ();
1521 cris_frame_init_saved_regs (fi
);
1523 /* For each register, the address of where it was saved on entry to
1524 the frame now lies in fi->saved_regs[regno], or zero if it was not
1525 saved. This includes special registers such as PC and FP saved in
1526 special ways in the stack frame. The SP_REGNUM is even more
1527 special, the address here is the SP for the next frame, not the
1528 address where the SP was saved. */
1530 /* Restore general registers R0 - R7. They were pushed on the stack
1531 after SP was saved. */
1532 for (regno
= 0; regno
< FP_REGNUM
; regno
++)
1534 if (fi
->saved_regs
[regno
])
1536 write_register (regno
,
1537 read_memory_integer (fi
->saved_regs
[regno
], 4));
1541 if (fi
->saved_regs
[FP_REGNUM
])
1543 /* Pop the frame pointer (R8). It was pushed before SP
1545 write_register (FP_REGNUM
,
1546 read_memory_integer (fi
->saved_regs
[FP_REGNUM
], 4));
1549 /* Not a leaf function. */
1550 if (fi
->saved_regs
[SRP_REGNUM
])
1552 /* SRP was pushed before SP was saved. */
1556 /* Restore the SP and adjust for R8 and (possibly) SRP. */
1557 write_register (SP_REGNUM
, fi
->saved_regs
[FP_REGNUM
] + stack_offset
);
1561 /* Currently, we can't get the correct info into fi->saved_regs
1562 without a frame pointer. */
1565 /* Restore the PC. */
1566 write_register (PC_REGNUM
, fi
->extra_info
->return_pc
);
1568 flush_cached_frames ();
1571 /* Calculates a value that measures how good inst_args constraints an
1572 instruction. It stems from cris_constraint, found in cris-dis.c. */
1575 constraint (unsigned int insn
, const signed char *inst_args
,
1576 inst_env_type
*inst_env
)
1581 const char *s
= inst_args
;
1587 if ((insn
& 0x30) == 0x30)
1592 /* A prefix operand. */
1593 if (inst_env
->prefix_found
)
1599 /* A "push" prefix. (This check was REMOVED by san 970921.) Check for
1600 valid "push" size. In case of special register, it may be != 4. */
1601 if (inst_env
->prefix_found
)
1607 retval
= (((insn
>> 0xC) & 0xF) == (insn
& 0xF));
1615 tmp
= (insn
>> 0xC) & 0xF;
1617 for (i
= 0; cris_spec_regs
[i
].name
!= NULL
; i
++)
1619 /* Since we match four bits, we will give a value of
1620 4 - 1 = 3 in a match. If there is a corresponding
1621 exact match of a special register in another pattern, it
1622 will get a value of 4, which will be higher. This should
1623 be correct in that an exact pattern would match better that
1625 Note that there is a reason for not returning zero; the
1626 pattern for "clear" is partly matched in the bit-pattern
1627 (the two lower bits must be zero), while the bit-pattern
1628 for a move from a special register is matched in the
1629 register constraint.
1630 This also means we will will have a race condition if
1631 there is a partly match in three bits in the bit pattern. */
1632 if (tmp
== cris_spec_regs
[i
].number
)
1639 if (cris_spec_regs
[i
].name
== NULL
)
1646 /* Returns the number of bits set in the variable value. */
1649 number_of_bits (unsigned int value
)
1651 int number_of_bits
= 0;
1655 number_of_bits
+= 1;
1656 value
&= (value
- 1);
1658 return number_of_bits
;
1661 /* Finds the address that should contain the single step breakpoint(s).
1662 It stems from code in cris-dis.c. */
1665 find_cris_op (unsigned short insn
, inst_env_type
*inst_env
)
1668 int max_level_of_match
= -1;
1669 int max_matched
= -1;
1672 for (i
= 0; cris_opcodes
[i
].name
!= NULL
; i
++)
1674 if (((cris_opcodes
[i
].match
& insn
) == cris_opcodes
[i
].match
)
1675 && ((cris_opcodes
[i
].lose
& insn
) == 0))
1677 level_of_match
= constraint (insn
, cris_opcodes
[i
].args
, inst_env
);
1678 if (level_of_match
>= 0)
1681 number_of_bits (cris_opcodes
[i
].match
| cris_opcodes
[i
].lose
);
1682 if (level_of_match
> max_level_of_match
)
1685 max_level_of_match
= level_of_match
;
1686 if (level_of_match
== 16)
1688 /* All bits matched, cannot find better. */
1698 /* Attempts to find single-step breakpoints. Returns -1 on failure which is
1699 actually an internal error. */
1702 find_step_target (inst_env_type
*inst_env
)
1706 unsigned short insn
;
1708 /* Create a local register image and set the initial state. */
1709 for (i
= 0; i
< NUM_GENREGS
; i
++)
1711 inst_env
->reg
[i
] = (unsigned long) read_register (i
);
1713 offset
= NUM_GENREGS
;
1714 for (i
= 0; i
< NUM_SPECREGS
; i
++)
1716 inst_env
->preg
[i
] = (unsigned long) read_register (offset
+ i
);
1718 inst_env
->branch_found
= 0;
1719 inst_env
->slot_needed
= 0;
1720 inst_env
->delay_slot_pc_active
= 0;
1721 inst_env
->prefix_found
= 0;
1722 inst_env
->invalid
= 0;
1723 inst_env
->xflag_found
= 0;
1724 inst_env
->disable_interrupt
= 0;
1726 /* Look for a step target. */
1729 /* Read an instruction from the client. */
1730 insn
= read_memory_unsigned_integer (inst_env
->reg
[PC_REGNUM
], 2);
1732 /* If the instruction is not in a delay slot the new content of the
1733 PC is [PC] + 2. If the instruction is in a delay slot it is not
1734 that simple. Since a instruction in a delay slot cannot change
1735 the content of the PC, it does not matter what value PC will have.
1736 Just make sure it is a valid instruction. */
1737 if (!inst_env
->delay_slot_pc_active
)
1739 inst_env
->reg
[PC_REGNUM
] += 2;
1743 inst_env
->delay_slot_pc_active
= 0;
1744 inst_env
->reg
[PC_REGNUM
] = inst_env
->delay_slot_pc
;
1746 /* Analyse the present instruction. */
1747 i
= find_cris_op (insn
, inst_env
);
1750 inst_env
->invalid
= 1;
1754 cris_gdb_func (cris_opcodes
[i
].op
, insn
, inst_env
);
1756 } while (!inst_env
->invalid
1757 && (inst_env
->prefix_found
|| inst_env
->xflag_found
1758 || inst_env
->slot_needed
));
1762 /* There is no hardware single-step support. The function find_step_target
1763 digs through the opcodes in order to find all possible targets.
1764 Either one ordinary target or two targets for branches may be found. */
1767 cris_software_single_step (enum target_signal ignore
, int insert_breakpoints
)
1769 inst_env_type inst_env
;
1771 if (insert_breakpoints
)
1773 /* Analyse the present instruction environment and insert
1775 int status
= find_step_target (&inst_env
);
1778 /* Could not find a target. FIXME: Should do something. */
1782 /* Insert at most two breakpoints. One for the next PC content
1783 and possibly another one for a branch, jump, etc. */
1784 next_pc
= (CORE_ADDR
) inst_env
.reg
[PC_REGNUM
];
1785 target_insert_breakpoint (next_pc
, break_mem
[0]);
1786 if (inst_env
.branch_found
1787 && (CORE_ADDR
) inst_env
.branch_break_address
!= next_pc
)
1789 branch_target_address
=
1790 (CORE_ADDR
) inst_env
.branch_break_address
;
1791 target_insert_breakpoint (branch_target_address
, break_mem
[1]);
1792 branch_break_inserted
= 1;
1798 /* Remove breakpoints. */
1799 target_remove_breakpoint (next_pc
, break_mem
[0]);
1800 if (branch_break_inserted
)
1802 target_remove_breakpoint (branch_target_address
, break_mem
[1]);
1803 branch_break_inserted
= 0;
1808 /* Calculates the prefix value for quick offset addressing mode. */
1811 quick_mode_bdap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1813 /* It's invalid to be in a delay slot. You can't have a prefix to this
1814 instruction (not 100% sure). */
1815 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1817 inst_env
->invalid
= 1;
1821 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand2 (inst
)];
1822 inst_env
->prefix_value
+= cris_get_bdap_quick_offset (inst
);
1824 /* A prefix doesn't change the xflag_found. But the rest of the flags
1826 inst_env
->slot_needed
= 0;
1827 inst_env
->prefix_found
= 1;
1830 /* Updates the autoincrement register. The size of the increment is derived
1831 from the size of the operation. The PC is always kept aligned on even
1835 process_autoincrement (int size
, unsigned short inst
, inst_env_type
*inst_env
)
1837 if (size
== INST_BYTE_SIZE
)
1839 inst_env
->reg
[cris_get_operand1 (inst
)] += 1;
1841 /* The PC must be word aligned, so increase the PC with one
1842 word even if the size is byte. */
1843 if (cris_get_operand1 (inst
) == REG_PC
)
1845 inst_env
->reg
[REG_PC
] += 1;
1848 else if (size
== INST_WORD_SIZE
)
1850 inst_env
->reg
[cris_get_operand1 (inst
)] += 2;
1852 else if (size
== INST_DWORD_SIZE
)
1854 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
1859 inst_env
->invalid
= 1;
1863 /* Calculates the prefix value for the general case of offset addressing
1867 bdap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1872 /* It's invalid to be in a delay slot. */
1873 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1875 inst_env
->invalid
= 1;
1879 /* The calculation of prefix_value used to be after process_autoincrement,
1880 but that fails for an instruction such as jsr [$r0+12] which is encoded
1881 as 5f0d 0c00 30b9 when compiled with -fpic. Since PC is operand1 it
1882 mustn't be incremented until we have read it and what it points at. */
1883 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand2 (inst
)];
1885 /* The offset is an indirection of the contents of the operand1 register. */
1886 inst_env
->prefix_value
+=
1887 read_memory_integer (inst_env
->reg
[cris_get_operand1 (inst
)],
1888 cris_get_size (inst
));
1890 if (cris_get_mode (inst
) == AUTOINC_MODE
)
1892 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
1895 /* A prefix doesn't change the xflag_found. But the rest of the flags
1897 inst_env
->slot_needed
= 0;
1898 inst_env
->prefix_found
= 1;
1901 /* Calculates the prefix value for the index addressing mode. */
1904 biap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1906 /* It's invalid to be in a delay slot. I can't see that it's possible to
1907 have a prefix to this instruction. So I will treat this as invalid. */
1908 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1910 inst_env
->invalid
= 1;
1914 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand1 (inst
)];
1916 /* The offset is the operand2 value shifted the size of the instruction
1918 inst_env
->prefix_value
+=
1919 inst_env
->reg
[cris_get_operand2 (inst
)] << cris_get_size (inst
);
1921 /* If the PC is operand1 (base) the address used is the address after
1922 the main instruction, i.e. address + 2 (the PC is already compensated
1923 for the prefix operation). */
1924 if (cris_get_operand1 (inst
) == REG_PC
)
1926 inst_env
->prefix_value
+= 2;
1929 /* A prefix doesn't change the xflag_found. But the rest of the flags
1931 inst_env
->slot_needed
= 0;
1932 inst_env
->xflag_found
= 0;
1933 inst_env
->prefix_found
= 1;
1936 /* Calculates the prefix value for the double indirect addressing mode. */
1939 dip_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1944 /* It's invalid to be in a delay slot. */
1945 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1947 inst_env
->invalid
= 1;
1951 /* The prefix value is one dereference of the contents of the operand1
1953 address
= (CORE_ADDR
) inst_env
->reg
[cris_get_operand1 (inst
)];
1954 inst_env
->prefix_value
= read_memory_unsigned_integer (address
, 4);
1956 /* Check if the mode is autoincrement. */
1957 if (cris_get_mode (inst
) == AUTOINC_MODE
)
1959 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
1962 /* A prefix doesn't change the xflag_found. But the rest of the flags
1964 inst_env
->slot_needed
= 0;
1965 inst_env
->xflag_found
= 0;
1966 inst_env
->prefix_found
= 1;
1969 /* Finds the destination for a branch with 8-bits offset. */
1972 eight_bit_offset_branch_op (unsigned short inst
, inst_env_type
*inst_env
)
1977 /* If we have a prefix or are in a delay slot it's bad. */
1978 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1980 inst_env
->invalid
= 1;
1984 /* We have a branch, find out where the branch will land. */
1985 offset
= cris_get_branch_short_offset (inst
);
1987 /* Check if the offset is signed. */
1988 if (offset
& BRANCH_SIGNED_SHORT_OFFSET_MASK
)
1993 /* The offset ends with the sign bit, set it to zero. The address
1994 should always be word aligned. */
1995 offset
&= ~BRANCH_SIGNED_SHORT_OFFSET_MASK
;
1997 inst_env
->branch_found
= 1;
1998 inst_env
->branch_break_address
= inst_env
->reg
[REG_PC
] + offset
;
2000 inst_env
->slot_needed
= 1;
2001 inst_env
->prefix_found
= 0;
2002 inst_env
->xflag_found
= 0;
2003 inst_env
->disable_interrupt
= 1;
2006 /* Finds the destination for a branch with 16-bits offset. */
2009 sixteen_bit_offset_branch_op (unsigned short inst
, inst_env_type
*inst_env
)
2013 /* If we have a prefix or is in a delay slot it's bad. */
2014 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
2016 inst_env
->invalid
= 1;
2020 /* We have a branch, find out the offset for the branch. */
2021 offset
= read_memory_integer (inst_env
->reg
[REG_PC
], 2);
2023 /* The instruction is one word longer than normal, so add one word
2025 inst_env
->reg
[REG_PC
] += 2;
2027 inst_env
->branch_found
= 1;
2028 inst_env
->branch_break_address
= inst_env
->reg
[REG_PC
] + offset
;
2031 inst_env
->slot_needed
= 1;
2032 inst_env
->prefix_found
= 0;
2033 inst_env
->xflag_found
= 0;
2034 inst_env
->disable_interrupt
= 1;
2037 /* Handles the ABS instruction. */
2040 abs_op (unsigned short inst
, inst_env_type
*inst_env
)
2045 /* ABS can't have a prefix, so it's bad if it does. */
2046 if (inst_env
->prefix_found
)
2048 inst_env
->invalid
= 1;
2052 /* Check if the operation affects the PC. */
2053 if (cris_get_operand2 (inst
) == REG_PC
)
2056 /* It's invalid to change to the PC if we are in a delay slot. */
2057 if (inst_env
->slot_needed
)
2059 inst_env
->invalid
= 1;
2063 value
= (long) inst_env
->reg
[REG_PC
];
2065 /* The value of abs (SIGNED_DWORD_MASK) is SIGNED_DWORD_MASK. */
2066 if (value
!= SIGNED_DWORD_MASK
)
2069 inst_env
->reg
[REG_PC
] = (long) value
;
2073 inst_env
->slot_needed
= 0;
2074 inst_env
->prefix_found
= 0;
2075 inst_env
->xflag_found
= 0;
2076 inst_env
->disable_interrupt
= 0;
2079 /* Handles the ADDI instruction. */
2082 addi_op (unsigned short inst
, inst_env_type
*inst_env
)
2084 /* It's invalid to have the PC as base register. And ADDI can't have
2086 if (inst_env
->prefix_found
|| (cris_get_operand1 (inst
) == REG_PC
))
2088 inst_env
->invalid
= 1;
2092 inst_env
->slot_needed
= 0;
2093 inst_env
->prefix_found
= 0;
2094 inst_env
->xflag_found
= 0;
2095 inst_env
->disable_interrupt
= 0;
2098 /* Handles the ASR instruction. */
2101 asr_op (unsigned short inst
, inst_env_type
*inst_env
)
2104 unsigned long value
;
2105 unsigned long signed_extend_mask
= 0;
2107 /* ASR can't have a prefix, so check that it doesn't. */
2108 if (inst_env
->prefix_found
)
2110 inst_env
->invalid
= 1;
2114 /* Check if the PC is the target register. */
2115 if (cris_get_operand2 (inst
) == REG_PC
)
2117 /* It's invalid to change the PC in a delay slot. */
2118 if (inst_env
->slot_needed
)
2120 inst_env
->invalid
= 1;
2123 /* Get the number of bits to shift. */
2124 shift_steps
= cris_get_asr_shift_steps (inst_env
->reg
[cris_get_operand1 (inst
)]);
2125 value
= inst_env
->reg
[REG_PC
];
2127 /* Find out how many bits the operation should apply to. */
2128 if (cris_get_size (inst
) == INST_BYTE_SIZE
)
2130 if (value
& SIGNED_BYTE_MASK
)
2132 signed_extend_mask
= 0xFF;
2133 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2134 signed_extend_mask
= ~signed_extend_mask
;
2136 value
= value
>> shift_steps
;
2137 value
|= signed_extend_mask
;
2139 inst_env
->reg
[REG_PC
] &= 0xFFFFFF00;
2140 inst_env
->reg
[REG_PC
] |= value
;
2142 else if (cris_get_size (inst
) == INST_WORD_SIZE
)
2144 if (value
& SIGNED_WORD_MASK
)
2146 signed_extend_mask
= 0xFFFF;
2147 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2148 signed_extend_mask
= ~signed_extend_mask
;
2150 value
= value
>> shift_steps
;
2151 value
|= signed_extend_mask
;
2153 inst_env
->reg
[REG_PC
] &= 0xFFFF0000;
2154 inst_env
->reg
[REG_PC
] |= value
;
2156 else if (cris_get_size (inst
) == INST_DWORD_SIZE
)
2158 if (value
& SIGNED_DWORD_MASK
)
2160 signed_extend_mask
= 0xFFFFFFFF;
2161 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2162 signed_extend_mask
= ~signed_extend_mask
;
2164 value
= value
>> shift_steps
;
2165 value
|= signed_extend_mask
;
2166 inst_env
->reg
[REG_PC
] = value
;
2169 inst_env
->slot_needed
= 0;
2170 inst_env
->prefix_found
= 0;
2171 inst_env
->xflag_found
= 0;
2172 inst_env
->disable_interrupt
= 0;
2175 /* Handles the ASRQ instruction. */
2178 asrq_op (unsigned short inst
, inst_env_type
*inst_env
)
2182 unsigned long value
;
2183 unsigned long signed_extend_mask
= 0;
2185 /* ASRQ can't have a prefix, so check that it doesn't. */
2186 if (inst_env
->prefix_found
)
2188 inst_env
->invalid
= 1;
2192 /* Check if the PC is the target register. */
2193 if (cris_get_operand2 (inst
) == REG_PC
)
2196 /* It's invalid to change the PC in a delay slot. */
2197 if (inst_env
->slot_needed
)
2199 inst_env
->invalid
= 1;
2202 /* The shift size is given as a 5 bit quick value, i.e. we don't
2203 want the the sign bit of the quick value. */
2204 shift_steps
= cris_get_asr_shift_steps (inst
);
2205 value
= inst_env
->reg
[REG_PC
];
2206 if (value
& SIGNED_DWORD_MASK
)
2208 signed_extend_mask
= 0xFFFFFFFF;
2209 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2210 signed_extend_mask
= ~signed_extend_mask
;
2212 value
= value
>> shift_steps
;
2213 value
|= signed_extend_mask
;
2214 inst_env
->reg
[REG_PC
] = value
;
2216 inst_env
->slot_needed
= 0;
2217 inst_env
->prefix_found
= 0;
2218 inst_env
->xflag_found
= 0;
2219 inst_env
->disable_interrupt
= 0;
2222 /* Handles the AX, EI and SETF instruction. */
2225 ax_ei_setf_op (unsigned short inst
, inst_env_type
*inst_env
)
2227 if (inst_env
->prefix_found
)
2229 inst_env
->invalid
= 1;
2232 /* Check if the instruction is setting the X flag. */
2233 if (cris_is_xflag_bit_on (inst
))
2235 inst_env
->xflag_found
= 1;
2239 inst_env
->xflag_found
= 0;
2241 inst_env
->slot_needed
= 0;
2242 inst_env
->prefix_found
= 0;
2243 inst_env
->disable_interrupt
= 1;
2246 /* Checks if the instruction is in assign mode. If so, it updates the assign
2247 register. Note that check_assign assumes that the caller has checked that
2248 there is a prefix to this instruction. The mode check depends on this. */
2251 check_assign (unsigned short inst
, inst_env_type
*inst_env
)
2253 /* Check if it's an assign addressing mode. */
2254 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2256 /* Assign the prefix value to operand 1. */
2257 inst_env
->reg
[cris_get_operand1 (inst
)] = inst_env
->prefix_value
;
2261 /* Handles the 2-operand BOUND instruction. */
2264 two_operand_bound_op (unsigned short inst
, inst_env_type
*inst_env
)
2266 /* It's invalid to have the PC as the index operand. */
2267 if (cris_get_operand2 (inst
) == REG_PC
)
2269 inst_env
->invalid
= 1;
2272 /* Check if we have a prefix. */
2273 if (inst_env
->prefix_found
)
2275 check_assign (inst
, inst_env
);
2277 /* Check if this is an autoincrement mode. */
2278 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2280 /* It's invalid to change the PC in a delay slot. */
2281 if (inst_env
->slot_needed
)
2283 inst_env
->invalid
= 1;
2286 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2288 inst_env
->slot_needed
= 0;
2289 inst_env
->prefix_found
= 0;
2290 inst_env
->xflag_found
= 0;
2291 inst_env
->disable_interrupt
= 0;
2294 /* Handles the 3-operand BOUND instruction. */
2297 three_operand_bound_op (unsigned short inst
, inst_env_type
*inst_env
)
2299 /* It's an error if we haven't got a prefix. And it's also an error
2300 if the PC is the destination register. */
2301 if ((!inst_env
->prefix_found
) || (cris_get_operand1 (inst
) == REG_PC
))
2303 inst_env
->invalid
= 1;
2306 inst_env
->slot_needed
= 0;
2307 inst_env
->prefix_found
= 0;
2308 inst_env
->xflag_found
= 0;
2309 inst_env
->disable_interrupt
= 0;
2312 /* Clears the status flags in inst_env. */
2315 btst_nop_op (unsigned short inst
, inst_env_type
*inst_env
)
2317 /* It's an error if we have got a prefix. */
2318 if (inst_env
->prefix_found
)
2320 inst_env
->invalid
= 1;
2324 inst_env
->slot_needed
= 0;
2325 inst_env
->prefix_found
= 0;
2326 inst_env
->xflag_found
= 0;
2327 inst_env
->disable_interrupt
= 0;
2330 /* Clears the status flags in inst_env. */
2333 clearf_di_op (unsigned short inst
, inst_env_type
*inst_env
)
2335 /* It's an error if we have got a prefix. */
2336 if (inst_env
->prefix_found
)
2338 inst_env
->invalid
= 1;
2342 inst_env
->slot_needed
= 0;
2343 inst_env
->prefix_found
= 0;
2344 inst_env
->xflag_found
= 0;
2345 inst_env
->disable_interrupt
= 1;
2348 /* Handles the CLEAR instruction if it's in register mode. */
2351 reg_mode_clear_op (unsigned short inst
, inst_env_type
*inst_env
)
2353 /* Check if the target is the PC. */
2354 if (cris_get_operand2 (inst
) == REG_PC
)
2356 /* The instruction will clear the instruction's size bits. */
2357 int clear_size
= cris_get_clear_size (inst
);
2358 if (clear_size
== INST_BYTE_SIZE
)
2360 inst_env
->delay_slot_pc
= inst_env
->reg
[REG_PC
] & 0xFFFFFF00;
2362 if (clear_size
== INST_WORD_SIZE
)
2364 inst_env
->delay_slot_pc
= inst_env
->reg
[REG_PC
] & 0xFFFF0000;
2366 if (clear_size
== INST_DWORD_SIZE
)
2368 inst_env
->delay_slot_pc
= 0x0;
2370 /* The jump will be delayed with one delay slot. So we need a delay
2372 inst_env
->slot_needed
= 1;
2373 inst_env
->delay_slot_pc_active
= 1;
2377 /* The PC will not change => no delay slot. */
2378 inst_env
->slot_needed
= 0;
2380 inst_env
->prefix_found
= 0;
2381 inst_env
->xflag_found
= 0;
2382 inst_env
->disable_interrupt
= 0;
2385 /* Handles the TEST instruction if it's in register mode. */
2388 reg_mode_test_op (unsigned short inst
, inst_env_type
*inst_env
)
2390 /* It's an error if we have got a prefix. */
2391 if (inst_env
->prefix_found
)
2393 inst_env
->invalid
= 1;
2396 inst_env
->slot_needed
= 0;
2397 inst_env
->prefix_found
= 0;
2398 inst_env
->xflag_found
= 0;
2399 inst_env
->disable_interrupt
= 0;
2403 /* Handles the CLEAR and TEST instruction if the instruction isn't
2404 in register mode. */
2407 none_reg_mode_clear_test_op (unsigned short inst
, inst_env_type
*inst_env
)
2409 /* Check if we are in a prefix mode. */
2410 if (inst_env
->prefix_found
)
2412 /* The only way the PC can change is if this instruction is in
2413 assign addressing mode. */
2414 check_assign (inst
, inst_env
);
2416 /* Indirect mode can't change the PC so just check if the mode is
2418 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2420 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2422 inst_env
->slot_needed
= 0;
2423 inst_env
->prefix_found
= 0;
2424 inst_env
->xflag_found
= 0;
2425 inst_env
->disable_interrupt
= 0;
2428 /* Checks that the PC isn't the destination register or the instructions has
2432 dstep_logshift_mstep_neg_not_op (unsigned short inst
, inst_env_type
*inst_env
)
2434 /* It's invalid to have the PC as the destination. The instruction can't
2436 if ((cris_get_operand2 (inst
) == REG_PC
) || inst_env
->prefix_found
)
2438 inst_env
->invalid
= 1;
2442 inst_env
->slot_needed
= 0;
2443 inst_env
->prefix_found
= 0;
2444 inst_env
->xflag_found
= 0;
2445 inst_env
->disable_interrupt
= 0;
2448 /* Checks that the instruction doesn't have a prefix. */
2451 break_op (unsigned short inst
, inst_env_type
*inst_env
)
2453 /* The instruction can't have a prefix. */
2454 if (inst_env
->prefix_found
)
2456 inst_env
->invalid
= 1;
2460 inst_env
->slot_needed
= 0;
2461 inst_env
->prefix_found
= 0;
2462 inst_env
->xflag_found
= 0;
2463 inst_env
->disable_interrupt
= 1;
2466 /* Checks that the PC isn't the destination register and that the instruction
2467 doesn't have a prefix. */
2470 scc_op (unsigned short inst
, inst_env_type
*inst_env
)
2472 /* It's invalid to have the PC as the destination. The instruction can't
2474 if ((cris_get_operand2 (inst
) == REG_PC
) || inst_env
->prefix_found
)
2476 inst_env
->invalid
= 1;
2480 inst_env
->slot_needed
= 0;
2481 inst_env
->prefix_found
= 0;
2482 inst_env
->xflag_found
= 0;
2483 inst_env
->disable_interrupt
= 1;
2486 /* Handles the register mode JUMP instruction. */
2489 reg_mode_jump_op (unsigned short inst
, inst_env_type
*inst_env
)
2491 /* It's invalid to do a JUMP in a delay slot. The mode is register, so
2492 you can't have a prefix. */
2493 if ((inst_env
->slot_needed
) || (inst_env
->prefix_found
))
2495 inst_env
->invalid
= 1;
2499 /* Just change the PC. */
2500 inst_env
->reg
[REG_PC
] = inst_env
->reg
[cris_get_operand1 (inst
)];
2501 inst_env
->slot_needed
= 0;
2502 inst_env
->prefix_found
= 0;
2503 inst_env
->xflag_found
= 0;
2504 inst_env
->disable_interrupt
= 1;
2507 /* Handles the JUMP instruction for all modes except register. */
2509 void none_reg_mode_jump_op (unsigned short inst
, inst_env_type
*inst_env
)
2511 unsigned long newpc
;
2514 /* It's invalid to do a JUMP in a delay slot. */
2515 if (inst_env
->slot_needed
)
2517 inst_env
->invalid
= 1;
2521 /* Check if we have a prefix. */
2522 if (inst_env
->prefix_found
)
2524 check_assign (inst
, inst_env
);
2526 /* Get the new value for the the PC. */
2528 read_memory_unsigned_integer ((CORE_ADDR
) inst_env
->prefix_value
,
2533 /* Get the new value for the PC. */
2534 address
= (CORE_ADDR
) inst_env
->reg
[cris_get_operand1 (inst
)];
2535 newpc
= read_memory_unsigned_integer (address
, 4);
2537 /* Check if we should increment a register. */
2538 if (cris_get_mode (inst
) == AUTOINC_MODE
)
2540 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
2543 inst_env
->reg
[REG_PC
] = newpc
;
2545 inst_env
->slot_needed
= 0;
2546 inst_env
->prefix_found
= 0;
2547 inst_env
->xflag_found
= 0;
2548 inst_env
->disable_interrupt
= 1;
2551 /* Handles moves to special registers (aka P-register) for all modes. */
2554 move_to_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2556 if (inst_env
->prefix_found
)
2558 /* The instruction has a prefix that means we are only interested if
2559 the instruction is in assign mode. */
2560 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2562 /* The prefix handles the problem if we are in a delay slot. */
2563 if (cris_get_operand1 (inst
) == REG_PC
)
2565 /* Just take care of the assign. */
2566 check_assign (inst
, inst_env
);
2570 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2572 /* The instruction doesn't have a prefix, the only case left that we
2573 are interested in is the autoincrement mode. */
2574 if (cris_get_operand1 (inst
) == REG_PC
)
2576 /* If the PC is to be incremented it's invalid to be in a
2578 if (inst_env
->slot_needed
)
2580 inst_env
->invalid
= 1;
2583 /* The increment depends on the size of the special register.
2584 Register P0 to P3 has the size byte, register P4 to P7 has the
2585 size word and register P8 to P15 has the size dword. */
2586 if (cris_get_operand2 (inst
) < 4)
2588 process_autoincrement (INST_BYTE_SIZE
, inst
, inst_env
);
2590 if (cris_get_operand2 (inst
) < 8)
2592 process_autoincrement (INST_WORD_SIZE
, inst
, inst_env
);
2596 process_autoincrement (INST_DWORD_SIZE
, inst
, inst_env
);
2600 inst_env
->slot_needed
= 0;
2601 inst_env
->prefix_found
= 0;
2602 inst_env
->xflag_found
= 0;
2603 inst_env
->disable_interrupt
= 1;
2606 /* Handles moves from special registers (aka P-register) for all modes
2610 none_reg_mode_move_from_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2612 if (inst_env
->prefix_found
)
2614 /* The instruction has a prefix that means we are only interested if
2615 the instruction is in assign mode. */
2616 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2618 /* The prefix handles the problem if we are in a delay slot. */
2619 if (cris_get_operand1 (inst
) == REG_PC
)
2621 /* Just take care of the assign. */
2622 check_assign (inst
, inst_env
);
2626 /* The instruction doesn't have a prefix, the only case left that we
2627 are interested in is the autoincrement mode. */
2628 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2630 if (cris_get_operand1 (inst
) == REG_PC
)
2632 /* If the PC is to be incremented it's invalid to be in a
2634 if (inst_env
->slot_needed
)
2636 inst_env
->invalid
= 1;
2639 /* The increment depends on the size of the special register.
2640 Register P0 to P3 has the size byte, register P4 to P7 has
2641 the size word and register P8 to P15 has the size dword. */
2642 if (cris_get_operand2 (inst
) < 4)
2644 process_autoincrement (INST_BYTE_SIZE
, inst
, inst_env
);
2646 if (cris_get_operand2 (inst
) < 8)
2648 process_autoincrement (INST_WORD_SIZE
, inst
, inst_env
);
2652 process_autoincrement (INST_DWORD_SIZE
, inst
, inst_env
);
2656 inst_env
->slot_needed
= 0;
2657 inst_env
->prefix_found
= 0;
2658 inst_env
->xflag_found
= 0;
2659 inst_env
->disable_interrupt
= 1;
2662 /* Handles moves from special registers (aka P-register) when the mode
2666 reg_mode_move_from_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2668 /* Register mode move from special register can't have a prefix. */
2669 if (inst_env
->prefix_found
)
2671 inst_env
->invalid
= 1;
2675 if (cris_get_operand1 (inst
) == REG_PC
)
2677 /* It's invalid to change the PC in a delay slot. */
2678 if (inst_env
->slot_needed
)
2680 inst_env
->invalid
= 1;
2683 /* The destination is the PC, the jump will have a delay slot. */
2684 inst_env
->delay_slot_pc
= inst_env
->preg
[cris_get_operand2 (inst
)];
2685 inst_env
->slot_needed
= 1;
2686 inst_env
->delay_slot_pc_active
= 1;
2690 /* If the destination isn't PC, there will be no jump. */
2691 inst_env
->slot_needed
= 0;
2693 inst_env
->prefix_found
= 0;
2694 inst_env
->xflag_found
= 0;
2695 inst_env
->disable_interrupt
= 1;
2698 /* Handles the MOVEM from memory to general register instruction. */
2701 move_mem_to_reg_movem_op (unsigned short inst
, inst_env_type
*inst_env
)
2703 if (inst_env
->prefix_found
)
2705 /* The prefix handles the problem if we are in a delay slot. Is the
2706 MOVEM instruction going to change the PC? */
2707 if (cris_get_operand2 (inst
) >= REG_PC
)
2709 inst_env
->reg
[REG_PC
] =
2710 read_memory_unsigned_integer (inst_env
->prefix_value
, 4);
2712 /* The assign value is the value after the increment. Normally, the
2713 assign value is the value before the increment. */
2714 if ((cris_get_operand1 (inst
) == REG_PC
)
2715 && (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
))
2717 inst_env
->reg
[REG_PC
] = inst_env
->prefix_value
;
2718 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2723 /* Is the MOVEM instruction going to change the PC? */
2724 if (cris_get_operand2 (inst
) == REG_PC
)
2726 /* It's invalid to change the PC in a delay slot. */
2727 if (inst_env
->slot_needed
)
2729 inst_env
->invalid
= 1;
2732 inst_env
->reg
[REG_PC
] =
2733 read_memory_unsigned_integer (inst_env
->reg
[cris_get_operand1 (inst
)],
2736 /* The increment is not depending on the size, instead it's depending
2737 on the number of registers loaded from memory. */
2738 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
2740 /* It's invalid to change the PC in a delay slot. */
2741 if (inst_env
->slot_needed
)
2743 inst_env
->invalid
= 1;
2746 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2749 inst_env
->slot_needed
= 0;
2750 inst_env
->prefix_found
= 0;
2751 inst_env
->xflag_found
= 0;
2752 inst_env
->disable_interrupt
= 0;
2755 /* Handles the MOVEM to memory from general register instruction. */
2758 move_reg_to_mem_movem_op (unsigned short inst
, inst_env_type
*inst_env
)
2760 if (inst_env
->prefix_found
)
2762 /* The assign value is the value after the increment. Normally, the
2763 assign value is the value before the increment. */
2764 if ((cris_get_operand1 (inst
) == REG_PC
) &&
2765 (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
))
2767 /* The prefix handles the problem if we are in a delay slot. */
2768 inst_env
->reg
[REG_PC
] = inst_env
->prefix_value
;
2769 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2774 /* The increment is not depending on the size, instead it's depending
2775 on the number of registers loaded to memory. */
2776 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
2778 /* It's invalid to change the PC in a delay slot. */
2779 if (inst_env
->slot_needed
)
2781 inst_env
->invalid
= 1;
2784 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2787 inst_env
->slot_needed
= 0;
2788 inst_env
->prefix_found
= 0;
2789 inst_env
->xflag_found
= 0;
2790 inst_env
->disable_interrupt
= 0;
2793 /* Handles the pop instruction to a general register.
2794 POP is a assembler macro for MOVE.D [SP+], Rd. */
2797 reg_pop_op (unsigned short inst
, inst_env_type
*inst_env
)
2799 /* POP can't have a prefix. */
2800 if (inst_env
->prefix_found
)
2802 inst_env
->invalid
= 1;
2805 if (cris_get_operand2 (inst
) == REG_PC
)
2807 /* It's invalid to change the PC in a delay slot. */
2808 if (inst_env
->slot_needed
)
2810 inst_env
->invalid
= 1;
2813 inst_env
->reg
[REG_PC
] =
2814 read_memory_unsigned_integer (inst_env
->reg
[REG_SP
], 4);
2816 inst_env
->slot_needed
= 0;
2817 inst_env
->prefix_found
= 0;
2818 inst_env
->xflag_found
= 0;
2819 inst_env
->disable_interrupt
= 0;
2822 /* Handles moves from register to memory. */
2825 move_reg_to_mem_index_inc_op (unsigned short inst
, inst_env_type
*inst_env
)
2827 /* Check if we have a prefix. */
2828 if (inst_env
->prefix_found
)
2830 /* The only thing that can change the PC is an assign. */
2831 check_assign (inst
, inst_env
);
2833 else if ((cris_get_operand1 (inst
) == REG_PC
)
2834 && (cris_get_mode (inst
) == AUTOINC_MODE
))
2836 /* It's invalid to change the PC in a delay slot. */
2837 if (inst_env
->slot_needed
)
2839 inst_env
->invalid
= 1;
2842 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2844 inst_env
->slot_needed
= 0;
2845 inst_env
->prefix_found
= 0;
2846 inst_env
->xflag_found
= 0;
2847 inst_env
->disable_interrupt
= 0;
2850 /* Handles the intructions that's not yet implemented, by setting
2851 inst_env->invalid to true. */
2854 not_implemented_op (unsigned short inst
, inst_env_type
*inst_env
)
2856 inst_env
->invalid
= 1;
2859 /* Handles the XOR instruction. */
2862 xor_op (unsigned short inst
, inst_env_type
*inst_env
)
2864 /* XOR can't have a prefix. */
2865 if (inst_env
->prefix_found
)
2867 inst_env
->invalid
= 1;
2871 /* Check if the PC is the target. */
2872 if (cris_get_operand2 (inst
) == REG_PC
)
2874 /* It's invalid to change the PC in a delay slot. */
2875 if (inst_env
->slot_needed
)
2877 inst_env
->invalid
= 1;
2880 inst_env
->reg
[REG_PC
] ^= inst_env
->reg
[cris_get_operand1 (inst
)];
2882 inst_env
->slot_needed
= 0;
2883 inst_env
->prefix_found
= 0;
2884 inst_env
->xflag_found
= 0;
2885 inst_env
->disable_interrupt
= 0;
2888 /* Handles the MULS instruction. */
2891 muls_op (unsigned short inst
, inst_env_type
*inst_env
)
2893 /* MULS/U can't have a prefix. */
2894 if (inst_env
->prefix_found
)
2896 inst_env
->invalid
= 1;
2900 /* Consider it invalid if the PC is the target. */
2901 if (cris_get_operand2 (inst
) == REG_PC
)
2903 inst_env
->invalid
= 1;
2906 inst_env
->slot_needed
= 0;
2907 inst_env
->prefix_found
= 0;
2908 inst_env
->xflag_found
= 0;
2909 inst_env
->disable_interrupt
= 0;
2912 /* Handles the MULU instruction. */
2915 mulu_op (unsigned short inst
, inst_env_type
*inst_env
)
2917 /* MULS/U can't have a prefix. */
2918 if (inst_env
->prefix_found
)
2920 inst_env
->invalid
= 1;
2924 /* Consider it invalid if the PC is the target. */
2925 if (cris_get_operand2 (inst
) == REG_PC
)
2927 inst_env
->invalid
= 1;
2930 inst_env
->slot_needed
= 0;
2931 inst_env
->prefix_found
= 0;
2932 inst_env
->xflag_found
= 0;
2933 inst_env
->disable_interrupt
= 0;
2936 /* Calculate the result of the instruction for ADD, SUB, CMP AND, OR and MOVE.
2937 The MOVE instruction is the move from source to register. */
2940 add_sub_cmp_and_or_move_action (unsigned short inst
, inst_env_type
*inst_env
,
2941 unsigned long source1
, unsigned long source2
)
2943 unsigned long pc_mask
;
2944 unsigned long operation_mask
;
2946 /* Find out how many bits the operation should apply to. */
2947 if (cris_get_size (inst
) == INST_BYTE_SIZE
)
2949 pc_mask
= 0xFFFFFF00;
2950 operation_mask
= 0xFF;
2952 else if (cris_get_size (inst
) == INST_WORD_SIZE
)
2954 pc_mask
= 0xFFFF0000;
2955 operation_mask
= 0xFFFF;
2957 else if (cris_get_size (inst
) == INST_DWORD_SIZE
)
2960 operation_mask
= 0xFFFFFFFF;
2964 /* The size is out of range. */
2965 inst_env
->invalid
= 1;
2969 /* The instruction just works on uw_operation_mask bits. */
2970 source2
&= operation_mask
;
2971 source1
&= operation_mask
;
2973 /* Now calculate the result. The opcode's 3 first bits separates
2974 the different actions. */
2975 switch (cris_get_opcode (inst
) & 7)
2985 case 2: /* subtract */
2989 case 3: /* compare */
3001 inst_env
->invalid
= 1;
3007 /* Make sure that the result doesn't contain more than the instruction
3009 source2
&= operation_mask
;
3011 /* Calculate the new breakpoint address. */
3012 inst_env
->reg
[REG_PC
] &= pc_mask
;
3013 inst_env
->reg
[REG_PC
] |= source1
;
3017 /* Extends the value from either byte or word size to a dword. If the mode
3018 is zero extend then the value is extended with zero. If instead the mode
3019 is signed extend the sign bit of the value is taken into consideration. */
3022 do_sign_or_zero_extend (unsigned long value
, unsigned short *inst
)
3024 /* The size can be either byte or word, check which one it is.
3025 Don't check the highest bit, it's indicating if it's a zero
3027 if (cris_get_size (*inst
) & INST_WORD_SIZE
)
3032 /* Check if the instruction is signed extend. If so, check if value has
3034 if (cris_is_signed_extend_bit_on (*inst
) && (value
& SIGNED_WORD_MASK
))
3036 value
|= SIGNED_WORD_EXTEND_MASK
;
3044 /* Check if the instruction is signed extend. If so, check if value has
3046 if (cris_is_signed_extend_bit_on (*inst
) && (value
& SIGNED_BYTE_MASK
))
3048 value
|= SIGNED_BYTE_EXTEND_MASK
;
3051 /* The size should now be dword. */
3052 cris_set_size_to_dword (inst
);
3056 /* Handles the register mode for the ADD, SUB, CMP, AND, OR and MOVE
3057 instruction. The MOVE instruction is the move from source to register. */
3060 reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst
,
3061 inst_env_type
*inst_env
)
3063 unsigned long operand1
;
3064 unsigned long operand2
;
3066 /* It's invalid to have a prefix to the instruction. This is a register
3067 mode instruction and can't have a prefix. */
3068 if (inst_env
->prefix_found
)
3070 inst_env
->invalid
= 1;
3073 /* Check if the instruction has PC as its target. */
3074 if (cris_get_operand2 (inst
) == REG_PC
)
3076 if (inst_env
->slot_needed
)
3078 inst_env
->invalid
= 1;
3081 /* The instruction has the PC as its target register. */
3082 operand1
= inst_env
->reg
[cris_get_operand1 (inst
)];
3083 operand2
= inst_env
->reg
[REG_PC
];
3085 /* Check if it's a extend, signed or zero instruction. */
3086 if (cris_get_opcode (inst
) < 4)
3088 operand1
= do_sign_or_zero_extend (operand1
, &inst
);
3090 /* Calculate the PC value after the instruction, i.e. where the
3091 breakpoint should be. The order of the udw_operands is vital. */
3092 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3094 inst_env
->slot_needed
= 0;
3095 inst_env
->prefix_found
= 0;
3096 inst_env
->xflag_found
= 0;
3097 inst_env
->disable_interrupt
= 0;
3100 /* Returns the data contained at address. The size of the data is derived from
3101 the size of the operation. If the instruction is a zero or signed
3102 extend instruction, the size field is changed in instruction. */
3105 get_data_from_address (unsigned short *inst
, CORE_ADDR address
)
3107 int size
= cris_get_size (*inst
);
3108 unsigned long value
;
3110 /* If it's an extend instruction we don't want the signed extend bit,
3111 because it influences the size. */
3112 if (cris_get_opcode (*inst
) < 4)
3114 size
&= ~SIGNED_EXTEND_BIT_MASK
;
3116 /* Is there a need for checking the size? Size should contain the number of
3119 value
= read_memory_unsigned_integer (address
, size
);
3121 /* Check if it's an extend, signed or zero instruction. */
3122 if (cris_get_opcode (*inst
) < 4)
3124 value
= do_sign_or_zero_extend (value
, inst
);
3129 /* Handles the assign addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
3130 instructions. The MOVE instruction is the move from source to register. */
3133 handle_prefix_assign_mode_for_aritm_op (unsigned short inst
,
3134 inst_env_type
*inst_env
)
3136 unsigned long operand2
;
3137 unsigned long operand3
;
3139 check_assign (inst
, inst_env
);
3140 if (cris_get_operand2 (inst
) == REG_PC
)
3142 operand2
= inst_env
->reg
[REG_PC
];
3144 /* Get the value of the third operand. */
3145 operand3
= get_data_from_address (&inst
, inst_env
->prefix_value
);
3147 /* Calculate the PC value after the instruction, i.e. where the
3148 breakpoint should be. The order of the udw_operands is vital. */
3149 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
3151 inst_env
->slot_needed
= 0;
3152 inst_env
->prefix_found
= 0;
3153 inst_env
->xflag_found
= 0;
3154 inst_env
->disable_interrupt
= 0;
3157 /* Handles the three-operand addressing mode for the ADD, SUB, CMP, AND and
3158 OR instructions. Note that for this to work as expected, the calling
3159 function must have made sure that there is a prefix to this instruction. */
3162 three_operand_add_sub_cmp_and_or_op (unsigned short inst
,
3163 inst_env_type
*inst_env
)
3165 unsigned long operand2
;
3166 unsigned long operand3
;
3168 if (cris_get_operand1 (inst
) == REG_PC
)
3170 /* The PC will be changed by the instruction. */
3171 operand2
= inst_env
->reg
[cris_get_operand2 (inst
)];
3173 /* Get the value of the third operand. */
3174 operand3
= get_data_from_address (&inst
, inst_env
->prefix_value
);
3176 /* Calculate the PC value after the instruction, i.e. where the
3177 breakpoint should be. */
3178 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
3180 inst_env
->slot_needed
= 0;
3181 inst_env
->prefix_found
= 0;
3182 inst_env
->xflag_found
= 0;
3183 inst_env
->disable_interrupt
= 0;
3186 /* Handles the index addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
3187 instructions. The MOVE instruction is the move from source to register. */
3190 handle_prefix_index_mode_for_aritm_op (unsigned short inst
,
3191 inst_env_type
*inst_env
)
3193 if (cris_get_operand1 (inst
) != cris_get_operand2 (inst
))
3195 /* If the instruction is MOVE it's invalid. If the instruction is ADD,
3196 SUB, AND or OR something weird is going on (if everything works these
3197 instructions should end up in the three operand version). */
3198 inst_env
->invalid
= 1;
3203 /* three_operand_add_sub_cmp_and_or does the same as we should do here
3205 three_operand_add_sub_cmp_and_or_op (inst
, inst_env
);
3207 inst_env
->slot_needed
= 0;
3208 inst_env
->prefix_found
= 0;
3209 inst_env
->xflag_found
= 0;
3210 inst_env
->disable_interrupt
= 0;
3213 /* Handles the autoincrement and indirect addresing mode for the ADD, SUB,
3214 CMP, AND OR and MOVE instruction. The MOVE instruction is the move from
3215 source to register. */
3218 handle_inc_and_index_mode_for_aritm_op (unsigned short inst
,
3219 inst_env_type
*inst_env
)
3221 unsigned long operand1
;
3222 unsigned long operand2
;
3223 unsigned long operand3
;
3226 /* The instruction is either an indirect or autoincrement addressing mode.
3227 Check if the destination register is the PC. */
3228 if (cris_get_operand2 (inst
) == REG_PC
)
3230 /* Must be done here, get_data_from_address may change the size
3232 size
= cris_get_size (inst
);
3233 operand2
= inst_env
->reg
[REG_PC
];
3235 /* Get the value of the third operand, i.e. the indirect operand. */
3236 operand1
= inst_env
->reg
[cris_get_operand1 (inst
)];
3237 operand3
= get_data_from_address (&inst
, operand1
);
3239 /* Calculate the PC value after the instruction, i.e. where the
3240 breakpoint should be. The order of the udw_operands is vital. */
3241 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
3243 /* If this is an autoincrement addressing mode, check if the increment
3245 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
3247 /* Get the size field. */
3248 size
= cris_get_size (inst
);
3250 /* If it's an extend instruction we don't want the signed extend bit,
3251 because it influences the size. */
3252 if (cris_get_opcode (inst
) < 4)
3254 size
&= ~SIGNED_EXTEND_BIT_MASK
;
3256 process_autoincrement (size
, inst
, inst_env
);
3258 inst_env
->slot_needed
= 0;
3259 inst_env
->prefix_found
= 0;
3260 inst_env
->xflag_found
= 0;
3261 inst_env
->disable_interrupt
= 0;
3264 /* Handles the two-operand addressing mode, all modes except register, for
3265 the ADD, SUB CMP, AND and OR instruction. */
3268 none_reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst
,
3269 inst_env_type
*inst_env
)
3271 if (inst_env
->prefix_found
)
3273 if (cris_get_mode (inst
) == PREFIX_INDEX_MODE
)
3275 handle_prefix_index_mode_for_aritm_op (inst
, inst_env
);
3277 else if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
3279 handle_prefix_assign_mode_for_aritm_op (inst
, inst_env
);
3283 /* The mode is invalid for a prefixed base instruction. */
3284 inst_env
->invalid
= 1;
3290 handle_inc_and_index_mode_for_aritm_op (inst
, inst_env
);
3294 /* Handles the quick addressing mode for the ADD and SUB instruction. */
3297 quick_mode_add_sub_op (unsigned short inst
, inst_env_type
*inst_env
)
3299 unsigned long operand1
;
3300 unsigned long operand2
;
3302 /* It's a bad idea to be in a prefix instruction now. This is a quick mode
3303 instruction and can't have a prefix. */
3304 if (inst_env
->prefix_found
)
3306 inst_env
->invalid
= 1;
3310 /* Check if the instruction has PC as its target. */
3311 if (cris_get_operand2 (inst
) == REG_PC
)
3313 if (inst_env
->slot_needed
)
3315 inst_env
->invalid
= 1;
3318 operand1
= cris_get_quick_value (inst
);
3319 operand2
= inst_env
->reg
[REG_PC
];
3321 /* The size should now be dword. */
3322 cris_set_size_to_dword (&inst
);
3324 /* Calculate the PC value after the instruction, i.e. where the
3325 breakpoint should be. */
3326 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3328 inst_env
->slot_needed
= 0;
3329 inst_env
->prefix_found
= 0;
3330 inst_env
->xflag_found
= 0;
3331 inst_env
->disable_interrupt
= 0;
3334 /* Handles the quick addressing mode for the CMP, AND and OR instruction. */
3337 quick_mode_and_cmp_move_or_op (unsigned short inst
, inst_env_type
*inst_env
)
3339 unsigned long operand1
;
3340 unsigned long operand2
;
3342 /* It's a bad idea to be in a prefix instruction now. This is a quick mode
3343 instruction and can't have a prefix. */
3344 if (inst_env
->prefix_found
)
3346 inst_env
->invalid
= 1;
3349 /* Check if the instruction has PC as its target. */
3350 if (cris_get_operand2 (inst
) == REG_PC
)
3352 if (inst_env
->slot_needed
)
3354 inst_env
->invalid
= 1;
3357 /* The instruction has the PC as its target register. */
3358 operand1
= cris_get_quick_value (inst
);
3359 operand2
= inst_env
->reg
[REG_PC
];
3361 /* The quick value is signed, so check if we must do a signed extend. */
3362 if (operand1
& SIGNED_QUICK_VALUE_MASK
)
3365 operand1
|= SIGNED_QUICK_VALUE_EXTEND_MASK
;
3367 /* The size should now be dword. */
3368 cris_set_size_to_dword (&inst
);
3370 /* Calculate the PC value after the instruction, i.e. where the
3371 breakpoint should be. */
3372 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3374 inst_env
->slot_needed
= 0;
3375 inst_env
->prefix_found
= 0;
3376 inst_env
->xflag_found
= 0;
3377 inst_env
->disable_interrupt
= 0;
3380 /* Translate op_type to a function and call it. */
3382 static void cris_gdb_func (enum cris_op_type op_type
, unsigned short inst
,
3383 inst_env_type
*inst_env
)
3387 case cris_not_implemented_op
:
3388 not_implemented_op (inst
, inst_env
);
3392 abs_op (inst
, inst_env
);
3396 addi_op (inst
, inst_env
);
3400 asr_op (inst
, inst_env
);
3404 asrq_op (inst
, inst_env
);
3407 case cris_ax_ei_setf_op
:
3408 ax_ei_setf_op (inst
, inst_env
);
3411 case cris_bdap_prefix
:
3412 bdap_prefix (inst
, inst_env
);
3415 case cris_biap_prefix
:
3416 biap_prefix (inst
, inst_env
);
3420 break_op (inst
, inst_env
);
3423 case cris_btst_nop_op
:
3424 btst_nop_op (inst
, inst_env
);
3427 case cris_clearf_di_op
:
3428 clearf_di_op (inst
, inst_env
);
3431 case cris_dip_prefix
:
3432 dip_prefix (inst
, inst_env
);
3435 case cris_dstep_logshift_mstep_neg_not_op
:
3436 dstep_logshift_mstep_neg_not_op (inst
, inst_env
);
3439 case cris_eight_bit_offset_branch_op
:
3440 eight_bit_offset_branch_op (inst
, inst_env
);
3443 case cris_move_mem_to_reg_movem_op
:
3444 move_mem_to_reg_movem_op (inst
, inst_env
);
3447 case cris_move_reg_to_mem_movem_op
:
3448 move_reg_to_mem_movem_op (inst
, inst_env
);
3451 case cris_move_to_preg_op
:
3452 move_to_preg_op (inst
, inst_env
);
3456 muls_op (inst
, inst_env
);
3460 mulu_op (inst
, inst_env
);
3463 case cris_none_reg_mode_add_sub_cmp_and_or_move_op
:
3464 none_reg_mode_add_sub_cmp_and_or_move_op (inst
, inst_env
);
3467 case cris_none_reg_mode_clear_test_op
:
3468 none_reg_mode_clear_test_op (inst
, inst_env
);
3471 case cris_none_reg_mode_jump_op
:
3472 none_reg_mode_jump_op (inst
, inst_env
);
3475 case cris_none_reg_mode_move_from_preg_op
:
3476 none_reg_mode_move_from_preg_op (inst
, inst_env
);
3479 case cris_quick_mode_add_sub_op
:
3480 quick_mode_add_sub_op (inst
, inst_env
);
3483 case cris_quick_mode_and_cmp_move_or_op
:
3484 quick_mode_and_cmp_move_or_op (inst
, inst_env
);
3487 case cris_quick_mode_bdap_prefix
:
3488 quick_mode_bdap_prefix (inst
, inst_env
);
3491 case cris_reg_mode_add_sub_cmp_and_or_move_op
:
3492 reg_mode_add_sub_cmp_and_or_move_op (inst
, inst_env
);
3495 case cris_reg_mode_clear_op
:
3496 reg_mode_clear_op (inst
, inst_env
);
3499 case cris_reg_mode_jump_op
:
3500 reg_mode_jump_op (inst
, inst_env
);
3503 case cris_reg_mode_move_from_preg_op
:
3504 reg_mode_move_from_preg_op (inst
, inst_env
);
3507 case cris_reg_mode_test_op
:
3508 reg_mode_test_op (inst
, inst_env
);
3512 scc_op (inst
, inst_env
);
3515 case cris_sixteen_bit_offset_branch_op
:
3516 sixteen_bit_offset_branch_op (inst
, inst_env
);
3519 case cris_three_operand_add_sub_cmp_and_or_op
:
3520 three_operand_add_sub_cmp_and_or_op (inst
, inst_env
);
3523 case cris_three_operand_bound_op
:
3524 three_operand_bound_op (inst
, inst_env
);
3527 case cris_two_operand_bound_op
:
3528 two_operand_bound_op (inst
, inst_env
);
3532 xor_op (inst
, inst_env
);
3537 /* This wrapper is to avoid cris_get_assembler being called before
3538 exec_bfd has been set. */
3541 cris_delayed_get_disassembler (bfd_vma addr
, disassemble_info
*info
)
3543 tm_print_insn
= cris_get_disassembler (exec_bfd
);
3544 return TARGET_PRINT_INSN (addr
, info
);
3548 _initialize_cris_tdep (void)
3550 struct cmd_list_element
*c
;
3552 gdbarch_register (bfd_arch_cris
, cris_gdbarch_init
, cris_dump_tdep
);
3554 /* Used in disassembly. */
3555 tm_print_insn
= cris_delayed_get_disassembler
;
3557 /* CRIS-specific user-commands. */
3558 c
= add_set_cmd ("cris-version", class_support
, var_integer
,
3559 (char *) &usr_cmd_cris_version
,
3560 "Set the current CRIS version.", &setlist
);
3561 c
->function
.sfunc
= cris_version_update
;
3562 add_show_from_set (c
, &showlist
);
3564 c
= add_set_enum_cmd ("cris-mode", class_support
, cris_mode_enums
,
3566 "Set the current CRIS mode.", &setlist
);
3567 c
->function
.sfunc
= cris_mode_update
;
3568 add_show_from_set (c
, &showlist
);
3570 c
= add_set_enum_cmd ("cris-abi", class_support
, cris_abi_enums
,
3572 "Set the current CRIS ABI version.", &setlist
);
3573 c
->function
.sfunc
= cris_abi_update
;
3574 add_show_from_set (c
, &showlist
);
3577 /* Prints out all target specific values. */
3580 cris_dump_tdep (struct gdbarch
*gdbarch
, struct ui_file
*file
)
3582 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3585 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_version = %i\n",
3586 tdep
->cris_version
);
3587 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_mode = %s\n",
3589 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_abi = %s\n",
3596 cris_version_update (char *ignore_args
, int from_tty
,
3597 struct cmd_list_element
*c
)
3599 struct gdbarch_info info
;
3601 /* From here on, trust the user's CRIS version setting. */
3602 if (c
->type
== set_cmd
)
3604 usr_cmd_cris_version_valid
= 1;
3606 /* Update the current architecture, if needed. */
3607 memset (&info
, 0, sizeof info
);
3608 if (!gdbarch_update_p (info
))
3609 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
3614 cris_mode_update (char *ignore_args
, int from_tty
,
3615 struct cmd_list_element
*c
)
3617 struct gdbarch_info info
;
3619 /* From here on, trust the user's CRIS mode setting. */
3620 if (c
->type
== set_cmd
)
3622 usr_cmd_cris_mode_valid
= 1;
3624 /* Update the current architecture, if needed. */
3625 memset (&info
, 0, sizeof info
);
3626 if (!gdbarch_update_p (info
))
3627 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
3632 cris_abi_update (char *ignore_args
, int from_tty
,
3633 struct cmd_list_element
*c
)
3635 struct gdbarch_info info
;
3637 /* From here on, trust the user's CRIS ABI setting. */
3638 if (c
->type
== set_cmd
)
3640 usr_cmd_cris_abi_valid
= 1;
3642 /* Update the current architecture, if needed. */
3643 memset (&info
, 0, sizeof info
);
3644 if (!gdbarch_update_p (info
))
3645 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
3649 /* Copied from pa64solib.c, with a couple of minor changes. */
3652 bfd_lookup_symbol (bfd
*abfd
, const char *symname
)
3654 unsigned int storage_needed
;
3656 asymbol
**symbol_table
;
3657 unsigned int number_of_symbols
;
3659 struct cleanup
*back_to
;
3660 CORE_ADDR symaddr
= 0;
3662 storage_needed
= bfd_get_symtab_upper_bound (abfd
);
3664 if (storage_needed
> 0)
3666 symbol_table
= (asymbol
**) xmalloc (storage_needed
);
3667 back_to
= make_cleanup (free
, (PTR
) symbol_table
);
3668 number_of_symbols
= bfd_canonicalize_symtab (abfd
, symbol_table
);
3670 for (i
= 0; i
< number_of_symbols
; i
++)
3672 sym
= *symbol_table
++;
3673 if (!strcmp (sym
->name
, symname
))
3675 /* Bfd symbols are section relative. */
3676 symaddr
= sym
->value
+ sym
->section
->vma
;
3680 do_cleanups (back_to
);
3685 static struct gdbarch
*
3686 cris_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3688 struct gdbarch
*gdbarch
;
3689 struct gdbarch_tdep
*tdep
;
3691 const char *cris_mode
;
3692 const char *cris_abi
;
3693 CORE_ADDR cris_abi_sym
= 0;
3696 if (usr_cmd_cris_version_valid
)
3698 /* Trust the user's CRIS version setting. */
3699 cris_version
= usr_cmd_cris_version
;
3703 /* Assume it's CRIS version 10. */
3707 if (usr_cmd_cris_mode_valid
)
3709 /* Trust the user's CRIS mode setting. */
3710 cris_mode
= usr_cmd_cris_mode
;
3712 else if (cris_version
== 10)
3714 /* Assume CRIS version 10 is in user mode. */
3715 cris_mode
= CRIS_MODE_USER
;
3719 /* Strictly speaking, older CRIS version don't have a supervisor mode,
3720 but we regard its only mode as supervisor mode. */
3721 cris_mode
= CRIS_MODE_SUPERVISOR
;
3724 if (usr_cmd_cris_abi_valid
)
3726 /* Trust the user's ABI setting. */
3727 cris_abi
= usr_cmd_cris_abi
;
3731 if (bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
3733 /* An elf target uses the new ABI. */
3734 cris_abi
= CRIS_ABI_V2
;
3736 else if (bfd_get_flavour (info
.abfd
) == bfd_target_aout_flavour
)
3738 /* An a.out target may use either ABI. Look for hints in the
3740 cris_abi_sym
= bfd_lookup_symbol (info
.abfd
, CRIS_ABI_SYMBOL
);
3741 cris_abi
= cris_abi_sym
? CRIS_ABI_V2
: CRIS_ABI_ORIGINAL
;
3745 /* Unknown bfd flavour. Assume it's the new ABI. */
3746 cris_abi
= CRIS_ABI_V2
;
3749 else if (gdbarch_tdep (current_gdbarch
))
3751 /* No bfd available. Stick with whatever ABI we're currently using.
3752 (This is to avoid changing the ABI when the user updates the
3753 architecture with the 'set cris-version' command.) */
3754 cris_abi
= gdbarch_tdep (current_gdbarch
)->cris_abi
;
3758 /* No bfd, and no current architecture available. Assume it's the
3760 cris_abi
= CRIS_ABI_V2
;
3763 /* Make the current settings visible to the user. */
3764 usr_cmd_cris_version
= cris_version
;
3765 usr_cmd_cris_mode
= cris_mode
;
3766 usr_cmd_cris_abi
= cris_abi
;
3768 /* Find a candidate among the list of pre-declared architectures. Both
3769 CRIS version and ABI must match. */
3770 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3772 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
3774 if ((gdbarch_tdep (arches
->gdbarch
)->cris_version
== cris_version
)
3775 && (gdbarch_tdep (arches
->gdbarch
)->cris_mode
== cris_mode
)
3776 && (gdbarch_tdep (arches
->gdbarch
)->cris_abi
== cris_abi
))
3777 return arches
->gdbarch
;
3780 /* No matching architecture was found. Create a new one. */
3781 tdep
= (struct gdbarch_tdep
*) xmalloc (sizeof (struct gdbarch_tdep
));
3782 gdbarch
= gdbarch_alloc (&info
, tdep
);
3784 tdep
->cris_version
= cris_version
;
3785 tdep
->cris_mode
= cris_mode
;
3786 tdep
->cris_abi
= cris_abi
;
3788 /* INIT shall ensure that the INFO.BYTE_ORDER is non-zero. */
3789 switch (info
.byte_order
)
3796 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: big endian byte order in info");
3800 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown byte order in info");
3803 /* Initialize the ABI dependent things. */
3804 if (tdep
->cris_abi
== CRIS_ABI_ORIGINAL
)
3806 set_gdbarch_double_bit (gdbarch
, 32);
3807 set_gdbarch_push_arguments (gdbarch
, cris_abi_original_push_arguments
);
3808 set_gdbarch_store_return_value (gdbarch
,
3809 cris_abi_original_store_return_value
);
3810 set_gdbarch_extract_return_value
3811 (gdbarch
, cris_abi_original_extract_return_value
);
3812 set_gdbarch_reg_struct_has_addr
3813 (gdbarch
, cris_abi_original_reg_struct_has_addr
);
3815 else if (tdep
->cris_abi
== CRIS_ABI_V2
)
3817 set_gdbarch_double_bit (gdbarch
, 64);
3818 set_gdbarch_push_arguments (gdbarch
, cris_abi_v2_push_arguments
);
3819 set_gdbarch_store_return_value (gdbarch
, cris_abi_v2_store_return_value
);
3820 set_gdbarch_extract_return_value (gdbarch
,
3821 cris_abi_v2_extract_return_value
);
3822 set_gdbarch_reg_struct_has_addr (gdbarch
,
3823 cris_abi_v2_reg_struct_has_addr
);
3826 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown CRIS ABI");
3828 /* The default definition of a long double is 2 * TARGET_DOUBLE_BIT,
3829 which means we have to set this explicitly. */
3830 set_gdbarch_long_double_bit (gdbarch
, 64);
3832 /* Floating point is IEEE compatible. */
3833 set_gdbarch_ieee_float (gdbarch
, 1);
3835 /* There are 32 registers (some of which may not be implemented). */
3836 set_gdbarch_num_regs (gdbarch
, 32);
3837 set_gdbarch_sp_regnum (gdbarch
, 14);
3838 set_gdbarch_fp_regnum (gdbarch
, 8);
3839 set_gdbarch_pc_regnum (gdbarch
, 15);
3841 set_gdbarch_register_name (gdbarch
, cris_register_name
);
3843 /* Length of ordinary registers used in push_word and a few other places.
3844 REGISTER_RAW_SIZE is the real way to know how big a register is. */
3845 set_gdbarch_register_size (gdbarch
, 4);
3848 set_gdbarch_register_bytes_ok (gdbarch
, cris_register_bytes_ok
);
3849 set_gdbarch_software_single_step (gdbarch
, cris_software_single_step
);
3852 set_gdbarch_cannot_store_register (gdbarch
, cris_cannot_store_register
);
3853 set_gdbarch_cannot_fetch_register (gdbarch
, cris_cannot_fetch_register
);
3856 /* The total amount of space needed to store (in an array called registers)
3857 GDB's copy of the machine's register state. Note: We can not use
3858 cris_register_size at this point, since it relies on current_gdbarch
3860 switch (tdep
->cris_version
)
3866 /* Support for these may be added later. */
3867 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unsupported CRIS version");
3872 /* CRIS v8 and v9, a.k.a. ETRAX 100. General registers R0 - R15
3873 (32 bits), special registers P0 - P1 (8 bits), P4 - P5 (16 bits),
3874 and P8 - P14 (32 bits). */
3875 register_bytes
= (16 * 4) + (2 * 1) + (2 * 2) + (7 * 4);
3880 /* CRIS v10 and v11, a.k.a. ETRAX 100LX. In addition to ETRAX 100,
3881 P7 (32 bits), and P15 (32 bits) have been implemented. */
3882 register_bytes
= (16 * 4) + (2 * 1) + (2 * 2) + (9 * 4);
3886 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown CRIS version");
3889 set_gdbarch_register_bytes (gdbarch
, register_bytes
);
3891 /* Returns the register offset for the first byte of register regno's space
3892 in the saved register state. */
3893 set_gdbarch_register_byte (gdbarch
, cris_register_offset
);
3895 /* The length of the registers in the actual machine representation. */
3896 set_gdbarch_register_raw_size (gdbarch
, cris_register_size
);
3898 /* The largest value REGISTER_RAW_SIZE can have. */
3899 set_gdbarch_max_register_raw_size (gdbarch
, 32);
3901 /* The length of the registers in the program's representation. */
3902 set_gdbarch_register_virtual_size (gdbarch
, cris_register_size
);
3904 /* The largest value REGISTER_VIRTUAL_SIZE can have. */
3905 set_gdbarch_max_register_virtual_size (gdbarch
, 32);
3907 set_gdbarch_register_virtual_type (gdbarch
, cris_register_virtual_type
);
3909 /* Use generic dummy frames. */
3910 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
3912 /* Where to execute the call in the memory segments. */
3913 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
3914 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
3916 /* Start execution at the beginning of dummy. */
3917 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
3918 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
3920 /* Set to 1 since call_dummy_breakpoint_offset was defined. */
3921 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
3923 /* Read all about dummy frames in blockframe.c. */
3924 set_gdbarch_call_dummy_length (gdbarch
, 0);
3925 set_gdbarch_pc_in_call_dummy (gdbarch
, pc_in_call_dummy_at_entry_point
);
3927 /* Defined to 1 to indicate that the target supports inferior function
3929 set_gdbarch_call_dummy_p (gdbarch
, 1);
3930 set_gdbarch_call_dummy_words (gdbarch
, 0);
3931 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
3933 /* No stack adjustment needed when peforming an inferior function call. */
3934 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
3935 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
3937 set_gdbarch_get_saved_register (gdbarch
, generic_get_saved_register
);
3939 /* No register requires conversion from raw format to virtual format. */
3940 set_gdbarch_register_convertible (gdbarch
, generic_register_convertible_not
);
3942 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
3943 set_gdbarch_push_return_address (gdbarch
, cris_push_return_address
);
3944 set_gdbarch_pop_frame (gdbarch
, cris_pop_frame
);
3946 set_gdbarch_store_struct_return (gdbarch
, cris_store_struct_return
);
3947 set_gdbarch_extract_struct_value_address (gdbarch
,
3948 cris_extract_struct_value_address
);
3949 set_gdbarch_use_struct_convention (gdbarch
, cris_use_struct_convention
);
3951 set_gdbarch_frame_init_saved_regs (gdbarch
, cris_frame_init_saved_regs
);
3952 set_gdbarch_init_extra_frame_info (gdbarch
, cris_init_extra_frame_info
);
3953 set_gdbarch_skip_prologue (gdbarch
, cris_skip_prologue
);
3954 set_gdbarch_prologue_frameless_p (gdbarch
, generic_prologue_frameless_p
);
3956 /* The stack grows downward. */
3957 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3959 set_gdbarch_breakpoint_from_pc (gdbarch
, cris_breakpoint_from_pc
);
3961 /* The PC must not be decremented after a breakpoint. (The breakpoint
3962 handler takes care of that.) */
3963 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
3965 /* Offset from address of function to start of its code. */
3966 set_gdbarch_function_start_offset (gdbarch
, 0);
3968 /* The number of bytes at the start of arglist that are not really args,
3969 0 in the CRIS ABI. */
3970 set_gdbarch_frame_args_skip (gdbarch
, 0);
3971 set_gdbarch_frameless_function_invocation
3972 (gdbarch
, cris_frameless_function_invocation
);
3973 set_gdbarch_frame_chain (gdbarch
, cris_frame_chain
);
3974 set_gdbarch_frame_chain_valid (gdbarch
, generic_file_frame_chain_valid
);
3976 set_gdbarch_frame_saved_pc (gdbarch
, cris_frame_saved_pc
);
3977 set_gdbarch_frame_args_address (gdbarch
, cris_frame_args_address
);
3978 set_gdbarch_frame_locals_address (gdbarch
, cris_frame_locals_address
);
3979 set_gdbarch_saved_pc_after_call (gdbarch
, cris_saved_pc_after_call
);
3981 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
3983 /* No extra stack alignment needed. Set to 1 by default. */
3984 set_gdbarch_extra_stack_alignment_needed (gdbarch
, 0);
3986 /* Helpful for backtracing and returning in a call dummy. */
3987 set_gdbarch_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);