1 /* Target dependent code for CRIS, for GDB, the GNU debugger.
2 Copyright 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by Axis Communications AB.
4 Written by Hendrik Ruijter, Stefan Andersson, and Orjan Friberg.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
31 #include "opcode/cris.h"
32 #include "arch-utils.h"
35 /* To get entry_point_address. */
38 #include "solib.h" /* Support for shared libraries. */
39 #include "solib-svr4.h" /* For struct link_map_offsets. */
40 #include "gdb_string.h"
45 /* There are no floating point registers. Used in gdbserver low-linux.c. */
48 /* There are 16 general registers. */
51 /* There are 16 special registers. */
55 /* Register numbers of various important registers.
56 FP_REGNUM Contains address of executing stack frame.
57 STR_REGNUM Contains the address of structure return values.
58 RET_REGNUM Contains the return value when shorter than or equal to 32 bits
59 ARG1_REGNUM Contains the first parameter to a function.
60 ARG2_REGNUM Contains the second parameter to a function.
61 ARG3_REGNUM Contains the third parameter to a function.
62 ARG4_REGNUM Contains the fourth parameter to a function. Rest on stack.
63 SP_REGNUM Contains address of top of stack.
64 PC_REGNUM Contains address of next instruction.
65 SRP_REGNUM Subroutine return pointer register.
66 BRP_REGNUM Breakpoint return pointer register. */
68 /* FP_REGNUM = 8, SP_REGNUM = 14, and PC_REGNUM = 15 have been incorporated
69 into the multi-arch framework. */
73 /* Enums with respect to the general registers, valid for all
82 /* Enums with respect to the special registers, some of which may not be
83 applicable to all CRIS versions. */
101 extern const struct cris_spec_reg cris_spec_regs
[];
103 /* CRIS version, set via the user command 'set cris-version'. Affects
104 register names and sizes.*/
105 static int usr_cmd_cris_version
;
107 /* Indicates whether to trust the above variable. */
108 static int usr_cmd_cris_version_valid
= 0;
110 /* CRIS mode, set via the user command 'set cris-mode'. Affects availability
111 of some registers. */
112 static const char *usr_cmd_cris_mode
;
114 /* Indicates whether to trust the above variable. */
115 static int usr_cmd_cris_mode_valid
= 0;
117 static const char CRIS_MODE_USER
[] = "CRIS_MODE_USER";
118 static const char CRIS_MODE_SUPERVISOR
[] = "CRIS_MODE_SUPERVISOR";
119 static const char *cris_mode_enums
[] =
122 CRIS_MODE_SUPERVISOR
,
126 /* CRIS ABI, set via the user command 'set cris-abi'.
127 There are two flavours:
128 1. Original ABI with 32-bit doubles, where arguments <= 4 bytes are
130 2. New ABI with 64-bit doubles, where arguments <= 8 bytes are passed by
132 static const char *usr_cmd_cris_abi
;
134 /* Indicates whether to trust the above variable. */
135 static int usr_cmd_cris_abi_valid
= 0;
137 /* These variables are strings instead of enums to make them usable as
138 parameters to add_set_enum_cmd. */
139 static const char CRIS_ABI_ORIGINAL
[] = "CRIS_ABI_ORIGINAL";
140 static const char CRIS_ABI_V2
[] = "CRIS_ABI_V2";
141 static const char CRIS_ABI_SYMBOL
[] = ".$CRIS_ABI_V2";
142 static const char *cris_abi_enums
[] =
149 /* CRIS architecture specific information. */
153 const char *cris_mode
;
154 const char *cris_abi
;
157 /* Functions for accessing target dependent data. */
162 return (gdbarch_tdep (current_gdbarch
)->cris_version
);
168 return (gdbarch_tdep (current_gdbarch
)->cris_mode
);
174 return (gdbarch_tdep (current_gdbarch
)->cris_abi
);
177 /* For saving call-clobbered contents in R9 when returning structs. */
178 static CORE_ADDR struct_return_address
;
180 struct frame_extra_info
186 /* The instruction environment needed to find single-step breakpoints. */
188 struct instruction_environment
190 unsigned long reg
[NUM_GENREGS
];
191 unsigned long preg
[NUM_SPECREGS
];
192 unsigned long branch_break_address
;
193 unsigned long delay_slot_pc
;
194 unsigned long prefix_value
;
199 int delay_slot_pc_active
;
201 int disable_interrupt
;
204 /* Save old breakpoints in order to restore the state before a single_step.
205 At most, two breakpoints will have to be remembered. */
207 char binsn_quantum
[BREAKPOINT_MAX
];
208 static binsn_quantum break_mem
[2];
209 static CORE_ADDR next_pc
= 0;
210 static CORE_ADDR branch_target_address
= 0;
211 static unsigned char branch_break_inserted
= 0;
213 /* Machine-dependencies in CRIS for opcodes. */
215 /* Instruction sizes. */
216 enum cris_instruction_sizes
223 /* Addressing modes. */
224 enum cris_addressing_modes
231 /* Prefix addressing modes. */
232 enum cris_prefix_addressing_modes
234 PREFIX_INDEX_MODE
= 2,
235 PREFIX_ASSIGN_MODE
= 3,
237 /* Handle immediate byte offset addressing mode prefix format. */
238 PREFIX_OFFSET_MODE
= 2
241 /* Masks for opcodes. */
242 enum cris_opcode_masks
244 BRANCH_SIGNED_SHORT_OFFSET_MASK
= 0x1,
245 SIGNED_EXTEND_BIT_MASK
= 0x2,
246 SIGNED_BYTE_MASK
= 0x80,
247 SIGNED_BYTE_EXTEND_MASK
= 0xFFFFFF00,
248 SIGNED_WORD_MASK
= 0x8000,
249 SIGNED_WORD_EXTEND_MASK
= 0xFFFF0000,
250 SIGNED_DWORD_MASK
= 0x80000000,
251 SIGNED_QUICK_VALUE_MASK
= 0x20,
252 SIGNED_QUICK_VALUE_EXTEND_MASK
= 0xFFFFFFC0
255 /* Functions for opcodes. The general form of the ETRAX 16-bit instruction:
263 cris_get_operand2 (unsigned short insn
)
265 return ((insn
& 0xF000) >> 12);
269 cris_get_mode (unsigned short insn
)
271 return ((insn
& 0x0C00) >> 10);
275 cris_get_opcode (unsigned short insn
)
277 return ((insn
& 0x03C0) >> 6);
281 cris_get_size (unsigned short insn
)
283 return ((insn
& 0x0030) >> 4);
287 cris_get_operand1 (unsigned short insn
)
289 return (insn
& 0x000F);
292 /* Additional functions in order to handle opcodes. */
295 cris_get_wide_opcode (unsigned short insn
)
297 return ((insn
& 0x03E0) >> 5);
301 cris_get_short_size (unsigned short insn
)
303 return ((insn
& 0x0010) >> 4);
307 cris_get_quick_value (unsigned short insn
)
309 return (insn
& 0x003F);
313 cris_get_bdap_quick_offset (unsigned short insn
)
315 return (insn
& 0x00FF);
319 cris_get_branch_short_offset (unsigned short insn
)
321 return (insn
& 0x00FF);
325 cris_get_asr_shift_steps (unsigned long value
)
327 return (value
& 0x3F);
331 cris_get_asr_quick_shift_steps (unsigned short insn
)
333 return (insn
& 0x1F);
337 cris_get_clear_size (unsigned short insn
)
339 return ((insn
) & 0xC000);
343 cris_is_signed_extend_bit_on (unsigned short insn
)
345 return (((insn
) & 0x20) == 0x20);
349 cris_is_xflag_bit_on (unsigned short insn
)
351 return (((insn
) & 0x1000) == 0x1000);
355 cris_set_size_to_dword (unsigned short *insn
)
362 cris_get_signed_offset (unsigned short insn
)
364 return ((signed char) (insn
& 0x00FF));
367 /* Calls an op function given the op-type, working on the insn and the
369 static void cris_gdb_func (enum cris_op_type
, unsigned short, inst_env_type
*);
371 static CORE_ADDR
cris_skip_prologue_main (CORE_ADDR pc
, int frameless_p
);
373 static struct gdbarch
*cris_gdbarch_init (struct gdbarch_info
,
374 struct gdbarch_list
*);
376 static int cris_delayed_get_disassembler (bfd_vma
, disassemble_info
*);
378 static void cris_dump_tdep (struct gdbarch
*, struct ui_file
*);
380 static void cris_version_update (char *ignore_args
, int from_tty
,
381 struct cmd_list_element
*c
);
383 static void cris_mode_update (char *ignore_args
, int from_tty
,
384 struct cmd_list_element
*c
);
386 static void cris_abi_update (char *ignore_args
, int from_tty
,
387 struct cmd_list_element
*c
);
389 static CORE_ADDR
bfd_lookup_symbol (bfd
*, const char *);
391 /* Frames information. The definition of the struct frame_info is
395 enum frame_type type;
399 If the compilation option -fno-omit-frame-pointer is present the
400 variable frame will be set to the content of R8 which is the frame
403 The variable pc contains the address where execution is performed
404 in the present frame. The innermost frame contains the current content
405 of the register PC. All other frames contain the content of the
406 register PC in the next frame.
408 The variable `type' indicates the frame's type: normal, SIGTRAMP
409 (associated with a signal handler), dummy (associated with a dummy
412 The variable return_pc contains the address where execution should be
413 resumed when the present frame has finished, the return address.
415 The variable leaf_function is 1 if the return address is in the register
416 SRP, and 0 if it is on the stack.
418 Prologue instructions C-code.
419 The prologue may consist of (-fno-omit-frame-pointer)
423 move.d sp,r8 move.d sp,r8
425 movem rY,[sp] movem rY,[sp]
426 move.S rZ,[r8-U] move.S rZ,[r8-U]
428 where 1 is a non-terminal function, and 2 is a leaf-function.
430 Note that this assumption is extremely brittle, and will break at the
431 slightest change in GCC's prologue.
433 If local variables are declared or register contents are saved on stack
434 the subq-instruction will be present with X as the number of bytes
435 needed for storage. The reshuffle with respect to r8 may be performed
436 with any size S (b, w, d) and any of the general registers Z={0..13}.
437 The offset U should be representable by a signed 8-bit value in all cases.
438 Thus, the prefix word is assumed to be immediate byte offset mode followed
439 by another word containing the instruction.
448 Prologue instructions C++-code.
449 Case 1) and 2) in the C-code may be followed by
455 move.S [r8+U],rZ ; P4
457 if any of the call parameters are stored. The host expects these
458 instructions to be executed in order to get the call parameters right. */
460 /* Examine the prologue of a function. The variable ip is the address of
461 the first instruction of the prologue. The variable limit is the address
462 of the first instruction after the prologue. The variable fi contains the
463 information in struct frame_info. The variable frameless_p controls whether
464 the entire prologue is examined (0) or just enough instructions to
465 determine that it is a prologue (1). */
468 cris_examine (CORE_ADDR ip
, CORE_ADDR limit
, struct frame_info
*fi
,
471 /* Present instruction. */
474 /* Next instruction, lookahead. */
475 unsigned short insn_next
;
478 /* Is there a push fp? */
481 /* Number of byte on stack used for local variables and movem. */
484 /* Highest register number in a movem. */
487 /* move.d r<source_register>,rS */
488 short source_register
;
490 /* This frame is with respect to a leaf until a push srp is found. */
491 get_frame_extra_info (fi
)->leaf_function
= 1;
493 /* This frame is without the FP until a push fp is found. */
496 /* Assume nothing on stack. */
500 /* No information about register contents so far. */
502 /* We only want to know the end of the prologue when fi->saved_regs == 0.
503 When the saved registers are allocated full information is required. */
504 if (get_frame_saved_regs (fi
))
506 for (regno
= 0; regno
< NUM_REGS
; regno
++)
507 get_frame_saved_regs (fi
)[regno
] = 0;
510 /* Find the prologue instructions. */
513 insn
= read_memory_unsigned_integer (ip
, sizeof (short));
514 ip
+= sizeof (short);
517 /* push <reg> 32 bit instruction */
518 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
519 ip
+= sizeof (short);
520 regno
= cris_get_operand2 (insn_next
);
522 /* This check, meant to recognize srp, used to be regno ==
523 (SRP_REGNUM - NUM_GENREGS), but that covers r11 also. */
524 if (insn_next
== 0xBE7E)
530 get_frame_extra_info (fi
)->leaf_function
= 0;
532 else if (regno
== FP_REGNUM
)
537 else if (insn
== 0x866E)
546 else if (cris_get_operand2 (insn
) == SP_REGNUM
547 && cris_get_mode (insn
) == 0x0000
548 && cris_get_opcode (insn
) == 0x000A)
551 val
= cris_get_quick_value (insn
);
553 else if (cris_get_mode (insn
) == 0x0002
554 && cris_get_opcode (insn
) == 0x000F
555 && cris_get_size (insn
) == 0x0003
556 && cris_get_operand1 (insn
) == SP_REGNUM
)
558 /* movem r<regsave>,[sp] */
563 regsave
= cris_get_operand2 (insn
);
565 else if (cris_get_operand2 (insn
) == SP_REGNUM
566 && ((insn
& 0x0F00) >> 8) == 0x0001
567 && (cris_get_signed_offset (insn
) < 0))
569 /* Immediate byte offset addressing prefix word with sp as base
570 register. Used for CRIS v8 i.e. ETRAX 100 and newer if <val>
571 is between 64 and 128.
572 movem r<regsave>,[sp=sp-<val>] */
573 val
= -cris_get_signed_offset (insn
);
574 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
575 ip
+= sizeof (short);
576 if (cris_get_mode (insn_next
) == PREFIX_ASSIGN_MODE
577 && cris_get_opcode (insn_next
) == 0x000F
578 && cris_get_size (insn_next
) == 0x0003
579 && cris_get_operand1 (insn_next
) == SP_REGNUM
)
585 regsave
= cris_get_operand2 (insn_next
);
589 /* The prologue ended before the limit was reached. */
590 ip
-= 2 * sizeof (short);
594 else if (cris_get_mode (insn
) == 0x0001
595 && cris_get_opcode (insn
) == 0x0009
596 && cris_get_size (insn
) == 0x0002)
598 /* move.d r<10..13>,r<0..15> */
603 source_register
= cris_get_operand1 (insn
);
605 /* FIXME? In the glibc solibs, the prologue might contain something
606 like (this example taken from relocate_doit):
609 which isn't covered by the source_register check below. Question
610 is whether to add a check for this combo, or make better use of
611 the limit variable instead. */
612 if (source_register
< ARG1_REGNUM
|| source_register
> ARG4_REGNUM
)
614 /* The prologue ended before the limit was reached. */
615 ip
-= sizeof (short);
619 else if (cris_get_operand2 (insn
) == FP_REGNUM
620 /* The size is a fixed-size. */
621 && ((insn
& 0x0F00) >> 8) == 0x0001
622 /* A negative offset. */
623 && (cris_get_signed_offset (insn
) < 0))
625 /* move.S rZ,[r8-U] (?) */
626 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
627 ip
+= sizeof (short);
628 regno
= cris_get_operand2 (insn_next
);
629 if ((regno
>= 0 && regno
< SP_REGNUM
)
630 && cris_get_mode (insn_next
) == PREFIX_OFFSET_MODE
631 && cris_get_opcode (insn_next
) == 0x000F)
633 /* move.S rZ,[r8-U] */
638 /* The prologue ended before the limit was reached. */
639 ip
-= 2 * sizeof (short);
643 else if (cris_get_operand2 (insn
) == FP_REGNUM
644 /* The size is a fixed-size. */
645 && ((insn
& 0x0F00) >> 8) == 0x0001
646 /* A positive offset. */
647 && (cris_get_signed_offset (insn
) > 0))
649 /* move.S [r8+U],rZ (?) */
650 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
651 ip
+= sizeof (short);
652 regno
= cris_get_operand2 (insn_next
);
653 if ((regno
>= 0 && regno
< SP_REGNUM
)
654 && cris_get_mode (insn_next
) == PREFIX_OFFSET_MODE
655 && cris_get_opcode (insn_next
) == 0x0009
656 && cris_get_operand1 (insn_next
) == regno
)
658 /* move.S [r8+U],rZ */
663 /* The prologue ended before the limit was reached. */
664 ip
-= 2 * sizeof (short);
670 /* The prologue ended before the limit was reached. */
671 ip
-= sizeof (short);
677 /* We only want to know the end of the prologue when
678 fi->saved_regs == 0. */
679 if (!get_frame_saved_regs (fi
))
684 get_frame_saved_regs (fi
)[FP_REGNUM
] = get_frame_base (fi
);
686 /* Calculate the addresses. */
687 for (regno
= regsave
; regno
>= 0; regno
--)
689 get_frame_saved_regs (fi
)[regno
] = get_frame_base (fi
) - val
;
692 if (get_frame_extra_info (fi
)->leaf_function
)
694 /* Set the register SP to contain the stack pointer of
696 get_frame_saved_regs (fi
)[SP_REGNUM
] = get_frame_base (fi
) + 4;
700 /* Set the register SP to contain the stack pointer of
702 get_frame_saved_regs (fi
)[SP_REGNUM
] = get_frame_base (fi
) + 8;
704 /* Set the register SRP to contain the return address of
706 get_frame_saved_regs (fi
)[SRP_REGNUM
] = get_frame_base (fi
) + 4;
712 /* Advance pc beyond any function entry prologue instructions at pc
713 to reach some "real" code. */
716 cris_skip_prologue (CORE_ADDR pc
)
718 return cris_skip_prologue_main (pc
, 0);
721 /* As cris_skip_prologue, but stops as soon as it knows that the function
722 has a frame. Its result is equal to its input pc if the function is
723 frameless, unequal otherwise. */
726 cris_skip_prologue_frameless_p (CORE_ADDR pc
)
728 return cris_skip_prologue_main (pc
, 1);
731 /* Given a PC value corresponding to the start of a function, return the PC
732 of the first instruction after the function prologue. */
735 cris_skip_prologue_main (CORE_ADDR pc
, int frameless_p
)
737 struct cleanup
*old_chain
= make_cleanup (null_cleanup
, NULL
);
738 struct frame_info
*fi
;
739 struct symtab_and_line sal
= find_pc_line (pc
, 0);
741 CORE_ADDR pc_after_prologue
;
743 /* frame_info now contains dynamic memory. Since fi is a dummy
744 here, I don't bother allocating memory for saved_regs. */
745 fi
= deprecated_frame_xmalloc_with_cleanup (0, sizeof (struct frame_extra_info
));
747 /* If there is no symbol information then sal.end == 0, and we end up
748 examining only the first instruction in the function prologue.
749 Exaggerating the limit seems to be harmless. */
751 best_limit
= sal
.end
;
753 best_limit
= pc
+ 100;
755 pc_after_prologue
= cris_examine (pc
, best_limit
, fi
, frameless_p
);
756 do_cleanups (old_chain
);
757 return pc_after_prologue
;
760 /* Use the program counter to determine the contents and size of a breakpoint
761 instruction. It returns a pointer to a string of bytes that encode a
762 breakpoint instruction, stores the length of the string to *lenptr, and
763 adjusts pcptr (if necessary) to point to the actual memory location where
764 the breakpoint should be inserted. */
766 const unsigned char *
767 cris_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
769 static unsigned char break_insn
[] = {0x38, 0xe9};
775 /* Returns the register SRP (subroutine return pointer) which must contain
776 the content of the register PC after a function call. */
779 cris_saved_pc_after_call (struct frame_info
*frame
)
781 return read_register (SRP_REGNUM
);
784 /* Returns 1 if spec_reg is applicable to the current gdbarch's CRIS version,
788 cris_spec_reg_applicable (struct cris_spec_reg spec_reg
)
790 int version
= cris_version ();
792 switch (spec_reg
.applicable_version
)
794 case cris_ver_version_all
:
796 case cris_ver_warning
:
797 /* Indeterminate/obsolete. */
800 /* Simulator only. */
803 return (version
>= 0 && version
<= 3);
805 return (version
>= 3);
807 return (version
== 8 || version
== 9);
809 return (version
>= 8);
811 return (version
>= 10);
813 /* Invalid cris version. */
818 /* Returns the register size in unit byte. Returns 0 for an unimplemented
819 register, -1 for an invalid register. */
822 cris_register_size (int regno
)
827 if (regno
>= 0 && regno
< NUM_GENREGS
)
829 /* General registers (R0 - R15) are 32 bits. */
832 else if (regno
>= NUM_GENREGS
&& regno
< NUM_REGS
)
834 /* Special register (R16 - R31). cris_spec_regs is zero-based.
835 Adjust regno accordingly. */
836 spec_regno
= regno
- NUM_GENREGS
;
838 /* The entries in cris_spec_regs are stored in register number order,
839 which means we can shortcut into the array when searching it. */
840 for (i
= spec_regno
; cris_spec_regs
[i
].name
!= NULL
; i
++)
842 if (cris_spec_regs
[i
].number
== spec_regno
843 && cris_spec_reg_applicable (cris_spec_regs
[i
]))
844 /* Go with the first applicable register. */
845 return cris_spec_regs
[i
].reg_size
;
847 /* Special register not applicable to this CRIS version. */
852 /* Invalid register. */
857 /* Nonzero if regno should not be fetched from the target. This is the case
858 for unimplemented (size 0) and non-existant registers. */
861 cris_cannot_fetch_register (int regno
)
863 return ((regno
< 0 || regno
>= NUM_REGS
)
864 || (cris_register_size (regno
) == 0));
867 /* Nonzero if regno should not be written to the target, for various
871 cris_cannot_store_register (int regno
)
873 /* There are three kinds of registers we refuse to write to.
874 1. Those that not implemented.
875 2. Those that are read-only (depends on the processor mode).
876 3. Those registers to which a write has no effect.
879 if (regno
< 0 || regno
>= NUM_REGS
|| cris_register_size (regno
) == 0)
880 /* Not implemented. */
883 else if (regno
== VR_REGNUM
)
887 else if (regno
== P0_REGNUM
|| regno
== P4_REGNUM
|| regno
== P8_REGNUM
)
888 /* Writing has no effect. */
891 else if (cris_mode () == CRIS_MODE_USER
)
893 if (regno
== IBR_REGNUM
|| regno
== BAR_REGNUM
|| regno
== BRP_REGNUM
894 || regno
== IRP_REGNUM
)
895 /* Read-only in user mode. */
902 /* Returns the register offset for the first byte of register regno's space
903 in the saved register state. Returns -1 for an invalid or unimplemented
907 cris_register_offset (int regno
)
913 if (regno
>= 0 && regno
< NUM_REGS
)
915 /* FIXME: The offsets should be cached and calculated only once,
916 when the architecture being debugged has changed. */
917 for (i
= 0; i
< regno
; i
++)
918 offset
+= cris_register_size (i
);
924 /* Invalid register. */
929 /* Return the GDB type (defined in gdbtypes.c) for the "standard" data type
930 of data in register regno. */
933 cris_register_virtual_type (int regno
)
935 if (regno
== SP_REGNUM
|| regno
== PC_REGNUM
936 || (regno
> P8_REGNUM
&& regno
< USP_REGNUM
))
938 /* SP, PC, IBR, IRP, SRP, BAR, DCCR, BRP */
939 return lookup_pointer_type (builtin_type_void
);
941 else if (regno
== P8_REGNUM
|| regno
== USP_REGNUM
942 || (regno
>= 0 && regno
< SP_REGNUM
))
944 /* R0 - R13, P8, P15 */
945 return builtin_type_unsigned_long
;
947 else if (regno
> P3_REGNUM
&& regno
< P8_REGNUM
)
949 /* P4, CCR, DCR0, DCR1 */
950 return builtin_type_unsigned_short
;
952 else if (regno
> PC_REGNUM
&& regno
< P4_REGNUM
)
955 return builtin_type_unsigned_char
;
959 /* Invalid register. */
960 return builtin_type_void
;
964 /* Stores a function return value of type type, where valbuf is the address
965 of the value to be stored. */
967 /* In the original CRIS ABI, R10 is used to store return values. */
970 cris_abi_original_store_return_value (struct type
*type
, char *valbuf
)
972 int len
= TYPE_LENGTH (type
);
974 if (len
<= REGISTER_SIZE
)
975 deprecated_write_register_bytes (REGISTER_BYTE (RET_REGNUM
), valbuf
, len
);
977 internal_error (__FILE__
, __LINE__
, "cris_abi_original_store_return_value: type length too large.");
980 /* In the CRIS ABI V2, R10 and R11 are used to store return values. */
983 cris_abi_v2_store_return_value (struct type
*type
, char *valbuf
)
985 int len
= TYPE_LENGTH (type
);
987 if (len
<= 2 * REGISTER_SIZE
)
989 /* Note that this works since R10 and R11 are consecutive registers. */
990 deprecated_write_register_bytes (REGISTER_BYTE (RET_REGNUM
), valbuf
,
994 internal_error (__FILE__
, __LINE__
, "cris_abi_v2_store_return_value: type length too large.");
997 /* Return the name of register regno as a string. Return NULL for an invalid or
998 unimplemented register. */
1001 cris_register_name (int regno
)
1003 static char *cris_genreg_names
[] =
1004 { "r0", "r1", "r2", "r3", \
1005 "r4", "r5", "r6", "r7", \
1006 "r8", "r9", "r10", "r11", \
1007 "r12", "r13", "sp", "pc" };
1012 if (regno
>= 0 && regno
< NUM_GENREGS
)
1014 /* General register. */
1015 return cris_genreg_names
[regno
];
1017 else if (regno
>= NUM_GENREGS
&& regno
< NUM_REGS
)
1019 /* Special register (R16 - R31). cris_spec_regs is zero-based.
1020 Adjust regno accordingly. */
1021 spec_regno
= regno
- NUM_GENREGS
;
1023 /* The entries in cris_spec_regs are stored in register number order,
1024 which means we can shortcut into the array when searching it. */
1025 for (i
= spec_regno
; cris_spec_regs
[i
].name
!= NULL
; i
++)
1027 if (cris_spec_regs
[i
].number
== spec_regno
1028 && cris_spec_reg_applicable (cris_spec_regs
[i
]))
1029 /* Go with the first applicable register. */
1030 return cris_spec_regs
[i
].name
;
1032 /* Special register not applicable to this CRIS version. */
1037 /* Invalid register. */
1043 cris_register_bytes_ok (long bytes
)
1045 return (bytes
== REGISTER_BYTES
);
1048 /* Extract from an array regbuf containing the raw register state a function
1049 return value of type type, and copy that, in virtual format, into
1052 /* In the original CRIS ABI, R10 is used to return values. */
1055 cris_abi_original_extract_return_value (struct type
*type
, char *regbuf
,
1058 int len
= TYPE_LENGTH (type
);
1060 if (len
<= REGISTER_SIZE
)
1061 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET_REGNUM
), len
);
1063 internal_error (__FILE__
, __LINE__
, "cris_abi_original_extract_return_value: type length too large");
1066 /* In the CRIS ABI V2, R10 and R11 are used to store return values. */
1069 cris_abi_v2_extract_return_value (struct type
*type
, char *regbuf
,
1072 int len
= TYPE_LENGTH (type
);
1074 if (len
<= 2 * REGISTER_SIZE
)
1075 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET_REGNUM
), len
);
1077 internal_error (__FILE__
, __LINE__
, "cris_abi_v2_extract_return_value: type length too large");
1080 /* Store the address of the place in which to copy the structure the
1081 subroutine will return. In the CRIS ABI, R9 is used in order to pass
1082 the address of the allocated area where a structure return value must
1083 be stored. R9 is call-clobbered, which means we must save it here for
1087 cris_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1089 write_register (STR_REGNUM
, addr
);
1090 struct_return_address
= addr
;
1093 /* Extract from regbuf the address where a function should return a
1094 structure value. It's not there in the CRIS ABI, so we must do it another
1098 cris_extract_struct_value_address (char *regbuf
)
1100 return struct_return_address
;
1103 /* Returns 1 if a value of the given type being returned from a function
1104 must have space allocated for it on the stack. gcc_p is true if the
1105 function being considered is known to have been compiled by GCC.
1106 In the CRIS ABI, structure return values are passed to the called
1107 function by reference in register R9 to a caller-allocated area, so
1108 this is always true. */
1111 cris_use_struct_convention (int gcc_p
, struct type
*type
)
1116 /* Returns 1 if the given type will be passed by pointer rather than
1119 /* In the original CRIS ABI, arguments shorter than or equal to 32 bits are
1123 cris_abi_original_reg_struct_has_addr (int gcc_p
, struct type
*type
)
1125 return (TYPE_LENGTH (type
) > 4);
1128 /* In the CRIS ABI V2, arguments shorter than or equal to 64 bits are passed
1132 cris_abi_v2_reg_struct_has_addr (int gcc_p
, struct type
*type
)
1134 return (TYPE_LENGTH (type
) > 8);
1137 /* Returns 1 if the function invocation represented by fi does not have a
1138 stack frame associated with it. Otherwise return 0. */
1141 cris_frameless_function_invocation (struct frame_info
*fi
)
1143 if ((get_frame_type (fi
) == SIGTRAMP_FRAME
))
1146 return frameless_look_for_prologue (fi
);
1149 /* See frame.h. Determines the address of all registers in the
1150 current stack frame storing each in frame->saved_regs. Space for
1151 frame->saved_regs shall be allocated by
1152 DEPRECATED_FRAME_INIT_SAVED_REGS using frame_saved_regs_zalloc. */
1155 cris_frame_init_saved_regs (struct frame_info
*fi
)
1158 struct symtab_and_line sal
;
1160 char *dummy_regs
= deprecated_generic_find_dummy_frame (get_frame_pc (fi
),
1161 get_frame_base (fi
));
1163 /* Examine the entire prologue. */
1164 register int frameless_p
= 0;
1166 /* Has this frame's registers already been initialized? */
1167 if (get_frame_saved_regs (fi
))
1170 frame_saved_regs_zalloc (fi
);
1174 /* I don't see this ever happening, considering the context in which
1175 cris_frame_init_saved_regs is called (always when we're not in
1177 memcpy (get_frame_saved_regs (fi
), dummy_regs
, SIZEOF_FRAME_SAVED_REGS
);
1181 ip
= get_frame_func (fi
);
1182 sal
= find_pc_line (ip
, 0);
1184 /* If there is no symbol information then sal.end == 0, and we end up
1185 examining only the first instruction in the function prologue.
1186 Exaggerating the limit seems to be harmless. */
1188 best_limit
= sal
.end
;
1190 best_limit
= ip
+ 100;
1192 cris_examine (ip
, best_limit
, fi
, frameless_p
);
1196 /* Initialises the extra frame information at the creation of a new frame.
1197 The inparameter fromleaf is 0 when the call is from create_new_frame.
1198 When the call is from get_prev_frame_info, fromleaf is determined by
1199 cris_frameless_function_invocation. */
1202 cris_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1204 if (get_next_frame (fi
))
1206 /* Called from get_prev_frame. */
1207 deprecated_update_frame_pc_hack (fi
, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi
)));
1210 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
1212 get_frame_extra_info (fi
)->return_pc
= 0;
1213 get_frame_extra_info (fi
)->leaf_function
= 0;
1215 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
),
1216 get_frame_base (fi
),
1217 get_frame_base (fi
)))
1219 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
1220 by assuming it's always FP. */
1221 deprecated_update_frame_base_hack (fi
, deprecated_read_register_dummy (get_frame_pc (fi
), get_frame_base (fi
), SP_REGNUM
));
1222 get_frame_extra_info (fi
)->return_pc
=
1223 deprecated_read_register_dummy (get_frame_pc (fi
),
1224 get_frame_base (fi
), PC_REGNUM
);
1226 /* FIXME: Is this necessarily true? */
1227 get_frame_extra_info (fi
)->leaf_function
= 0;
1231 cris_frame_init_saved_regs (fi
);
1233 /* Check fromleaf/frameless_function_invocation. (FIXME) */
1235 if (get_frame_saved_regs (fi
)[SRP_REGNUM
] != 0)
1237 /* SRP was saved on the stack; non-leaf function. */
1238 get_frame_extra_info (fi
)->return_pc
=
1239 read_memory_integer (get_frame_saved_regs (fi
)[SRP_REGNUM
],
1240 REGISTER_RAW_SIZE (SRP_REGNUM
));
1244 /* SRP is still in a register; leaf function. */
1245 get_frame_extra_info (fi
)->return_pc
= read_register (SRP_REGNUM
);
1246 /* FIXME: Should leaf_function be set to 1 here? */
1247 get_frame_extra_info (fi
)->leaf_function
= 1;
1252 /* Return the content of the frame pointer in the present frame. In other
1253 words, determine the address of the calling function's frame. */
1256 cris_frame_chain (struct frame_info
*fi
)
1258 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
),
1259 get_frame_base (fi
),
1260 get_frame_base (fi
)))
1262 return get_frame_base (fi
);
1264 else if (!inside_entry_file (get_frame_pc (fi
)))
1266 return read_memory_unsigned_integer (get_frame_base (fi
), 4);
1274 /* Return the saved PC (which equals the return address) of this frame. */
1277 cris_frame_saved_pc (struct frame_info
*fi
)
1279 return get_frame_extra_info (fi
)->return_pc
;
1282 /* Setup the function arguments for calling a function in the inferior. */
1285 cris_abi_original_push_arguments (int nargs
, struct value
**args
,
1286 CORE_ADDR sp
, int struct_return
,
1287 CORE_ADDR struct_addr
)
1298 /* Data and parameters reside in different areas on the stack.
1299 Both frame pointers grow toward higher addresses. */
1300 CORE_ADDR fp_params
;
1303 /* Are we returning a value using a structure return or a normal value
1304 return? struct_addr is the address of the reserved space for the return
1305 structure to be written on the stack. */
1308 write_register (STR_REGNUM
, struct_addr
);
1311 /* Make sure there's space on the stack. Allocate space for data and a
1312 parameter to refer to that data. */
1313 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
1314 stack_alloc
+= (TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + REGISTER_SIZE
);
1316 /* We may over-allocate a little here, but that won't hurt anything. */
1318 /* Initialize stack frame pointers. */
1320 fp_data
= sp
+ (nargs
* REGISTER_SIZE
);
1322 /* Now load as many as possible of the first arguments into
1323 registers, and push the rest onto the stack. */
1324 argreg
= ARG1_REGNUM
;
1327 for (argnum
= 0; argnum
< nargs
; argnum
++)
1329 type
= VALUE_TYPE (args
[argnum
]);
1330 len
= TYPE_LENGTH (type
);
1331 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
1333 if (len
<= REGISTER_SIZE
&& argreg
<= ARG4_REGNUM
)
1335 /* Data fits in a register; put it in the first available
1337 write_register (argreg
, *(unsigned long *) val
);
1340 else if (len
> REGISTER_SIZE
&& argreg
<= ARG4_REGNUM
)
1342 /* Data does not fit in register; pass it on the stack and
1343 put its address in the first available register. */
1344 write_memory (fp_data
, val
, len
);
1345 write_register (argreg
, fp_data
);
1349 else if (len
> REGISTER_SIZE
)
1351 /* Data does not fit in register; put both data and
1352 parameter on the stack. */
1353 write_memory (fp_data
, val
, len
);
1354 write_memory (fp_params
, (char *) (&fp_data
), REGISTER_SIZE
);
1356 fp_params
+= REGISTER_SIZE
;
1360 /* Data fits in a register, but we are out of registers;
1361 put the parameter on the stack. */
1362 write_memory (fp_params
, val
, REGISTER_SIZE
);
1363 fp_params
+= REGISTER_SIZE
;
1371 cris_abi_v2_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1372 int struct_return
, CORE_ADDR struct_addr
)
1381 /* The function's arguments and memory allocated by gdb for the arguments to
1382 point at reside in separate areas on the stack.
1383 Both frame pointers grow toward higher addresses. */
1387 /* Are we returning a value using a structure return or a normal value
1388 return? struct_addr is the address of the reserved space for the return
1389 structure to be written on the stack. */
1392 write_register (STR_REGNUM
, struct_addr
);
1395 /* Allocate enough to keep things word-aligned on both parts of the
1398 for (argnum
= 0; argnum
< nargs
; argnum
++)
1403 len
= TYPE_LENGTH (VALUE_TYPE (args
[argnum
]));
1404 reg_demand
= (len
/ REGISTER_SIZE
) + (len
% REGISTER_SIZE
!= 0 ? 1 : 0);
1406 /* reg_demand * REGISTER_SIZE is the amount of memory we might need to
1407 allocate for this argument. 2 * REGISTER_SIZE is the amount of stack
1408 space we might need to pass the argument itself (either by value or by
1410 stack_alloc
+= (reg_demand
* REGISTER_SIZE
+ 2 * REGISTER_SIZE
);
1413 /* We may over-allocate a little here, but that won't hurt anything. */
1415 /* Initialize frame pointers. */
1417 fp_mem
= sp
+ (nargs
* (2 * REGISTER_SIZE
));
1419 /* Now load as many as possible of the first arguments into registers,
1420 and push the rest onto the stack. */
1421 argreg
= ARG1_REGNUM
;
1424 for (argnum
= 0; argnum
< nargs
; argnum
++)
1431 len
= TYPE_LENGTH (VALUE_TYPE (args
[argnum
]));
1432 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
1434 /* How may registers worth of storage do we need for this argument? */
1435 reg_demand
= (len
/ REGISTER_SIZE
) + (len
% REGISTER_SIZE
!= 0 ? 1 : 0);
1437 if (len
<= (2 * REGISTER_SIZE
)
1438 && (argreg
+ reg_demand
- 1 <= ARG4_REGNUM
))
1440 /* Data passed by value. Fits in available register(s). */
1441 for (i
= 0; i
< reg_demand
; i
++)
1443 write_register (argreg
, *(unsigned long *) val
);
1445 val
+= REGISTER_SIZE
;
1448 else if (len
<= (2 * REGISTER_SIZE
) && argreg
<= ARG4_REGNUM
)
1450 /* Data passed by value. Does not fit in available register(s).
1451 Use the register(s) first, then the stack. */
1452 for (i
= 0; i
< reg_demand
; i
++)
1454 if (argreg
<= ARG4_REGNUM
)
1456 write_register (argreg
, *(unsigned long *) val
);
1458 val
+= REGISTER_SIZE
;
1462 /* I guess this memory write could write the remaining data
1463 all at once instead of in REGISTER_SIZE chunks. */
1464 write_memory (fp_arg
, val
, REGISTER_SIZE
);
1465 fp_arg
+= REGISTER_SIZE
;
1466 val
+= REGISTER_SIZE
;
1470 else if (len
> (2 * REGISTER_SIZE
))
1472 /* Data passed by reference. Put it on the stack. */
1473 write_memory (fp_mem
, val
, len
);
1474 write_memory (fp_arg
, (char *) (&fp_mem
), REGISTER_SIZE
);
1476 /* fp_mem need not be word-aligned since it's just a chunk of
1477 memory being pointed at. That is, += len would do. */
1478 fp_mem
+= reg_demand
* REGISTER_SIZE
;
1479 fp_arg
+= REGISTER_SIZE
;
1483 /* Data passed by value. No available registers. Put it on
1485 write_memory (fp_arg
, val
, len
);
1487 /* fp_arg must be word-aligned (i.e., don't += len) to match
1488 the function prologue. */
1489 fp_arg
+= reg_demand
* REGISTER_SIZE
;
1496 /* Never put the return address on the stack. The register SRP is pushed
1497 by the called function unless it is a leaf-function. Due to the BRP
1498 register the PC will change when continue is sent. */
1501 cris_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1503 write_register (SRP_REGNUM
, CALL_DUMMY_ADDRESS ());
1507 /* Restore the machine to the state it had before the current frame
1508 was created. Discard the innermost frame from the stack and restore
1509 all saved registers. */
1512 cris_pop_frame (void)
1514 register struct frame_info
*fi
= get_current_frame ();
1516 register int stack_offset
= 0;
1518 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
),
1519 get_frame_base (fi
),
1520 get_frame_base (fi
)))
1522 /* This happens when we hit a breakpoint set at the entry point,
1523 when returning from a dummy frame. */
1524 generic_pop_dummy_frame ();
1528 cris_frame_init_saved_regs (fi
);
1530 /* For each register, the address of where it was saved on entry to
1531 the frame now lies in fi->saved_regs[regno], or zero if it was not
1532 saved. This includes special registers such as PC and FP saved in
1533 special ways in the stack frame. The SP_REGNUM is even more
1534 special, the address here is the SP for the next frame, not the
1535 address where the SP was saved. */
1537 /* Restore general registers R0 - R7. They were pushed on the stack
1538 after SP was saved. */
1539 for (regno
= 0; regno
< FP_REGNUM
; regno
++)
1541 if (get_frame_saved_regs (fi
)[regno
])
1543 write_register (regno
,
1544 read_memory_integer (get_frame_saved_regs (fi
)[regno
], 4));
1548 if (get_frame_saved_regs (fi
)[FP_REGNUM
])
1550 /* Pop the frame pointer (R8). It was pushed before SP
1552 write_register (FP_REGNUM
,
1553 read_memory_integer (get_frame_saved_regs (fi
)[FP_REGNUM
], 4));
1556 /* Not a leaf function. */
1557 if (get_frame_saved_regs (fi
)[SRP_REGNUM
])
1559 /* SRP was pushed before SP was saved. */
1563 /* Restore the SP and adjust for R8 and (possibly) SRP. */
1564 write_register (SP_REGNUM
, get_frame_saved_regs (fi
)[FP_REGNUM
] + stack_offset
);
1568 /* Currently, we can't get the correct info into fi->saved_regs
1569 without a frame pointer. */
1572 /* Restore the PC. */
1573 write_register (PC_REGNUM
, get_frame_extra_info (fi
)->return_pc
);
1575 flush_cached_frames ();
1578 /* Calculates a value that measures how good inst_args constraints an
1579 instruction. It stems from cris_constraint, found in cris-dis.c. */
1582 constraint (unsigned int insn
, const signed char *inst_args
,
1583 inst_env_type
*inst_env
)
1588 const char *s
= inst_args
;
1594 if ((insn
& 0x30) == 0x30)
1599 /* A prefix operand. */
1600 if (inst_env
->prefix_found
)
1606 /* A "push" prefix. (This check was REMOVED by san 970921.) Check for
1607 valid "push" size. In case of special register, it may be != 4. */
1608 if (inst_env
->prefix_found
)
1614 retval
= (((insn
>> 0xC) & 0xF) == (insn
& 0xF));
1622 tmp
= (insn
>> 0xC) & 0xF;
1624 for (i
= 0; cris_spec_regs
[i
].name
!= NULL
; i
++)
1626 /* Since we match four bits, we will give a value of
1627 4 - 1 = 3 in a match. If there is a corresponding
1628 exact match of a special register in another pattern, it
1629 will get a value of 4, which will be higher. This should
1630 be correct in that an exact pattern would match better that
1632 Note that there is a reason for not returning zero; the
1633 pattern for "clear" is partly matched in the bit-pattern
1634 (the two lower bits must be zero), while the bit-pattern
1635 for a move from a special register is matched in the
1636 register constraint.
1637 This also means we will will have a race condition if
1638 there is a partly match in three bits in the bit pattern. */
1639 if (tmp
== cris_spec_regs
[i
].number
)
1646 if (cris_spec_regs
[i
].name
== NULL
)
1653 /* Returns the number of bits set in the variable value. */
1656 number_of_bits (unsigned int value
)
1658 int number_of_bits
= 0;
1662 number_of_bits
+= 1;
1663 value
&= (value
- 1);
1665 return number_of_bits
;
1668 /* Finds the address that should contain the single step breakpoint(s).
1669 It stems from code in cris-dis.c. */
1672 find_cris_op (unsigned short insn
, inst_env_type
*inst_env
)
1675 int max_level_of_match
= -1;
1676 int max_matched
= -1;
1679 for (i
= 0; cris_opcodes
[i
].name
!= NULL
; i
++)
1681 if (((cris_opcodes
[i
].match
& insn
) == cris_opcodes
[i
].match
)
1682 && ((cris_opcodes
[i
].lose
& insn
) == 0))
1684 level_of_match
= constraint (insn
, cris_opcodes
[i
].args
, inst_env
);
1685 if (level_of_match
>= 0)
1688 number_of_bits (cris_opcodes
[i
].match
| cris_opcodes
[i
].lose
);
1689 if (level_of_match
> max_level_of_match
)
1692 max_level_of_match
= level_of_match
;
1693 if (level_of_match
== 16)
1695 /* All bits matched, cannot find better. */
1705 /* Attempts to find single-step breakpoints. Returns -1 on failure which is
1706 actually an internal error. */
1709 find_step_target (inst_env_type
*inst_env
)
1713 unsigned short insn
;
1715 /* Create a local register image and set the initial state. */
1716 for (i
= 0; i
< NUM_GENREGS
; i
++)
1718 inst_env
->reg
[i
] = (unsigned long) read_register (i
);
1720 offset
= NUM_GENREGS
;
1721 for (i
= 0; i
< NUM_SPECREGS
; i
++)
1723 inst_env
->preg
[i
] = (unsigned long) read_register (offset
+ i
);
1725 inst_env
->branch_found
= 0;
1726 inst_env
->slot_needed
= 0;
1727 inst_env
->delay_slot_pc_active
= 0;
1728 inst_env
->prefix_found
= 0;
1729 inst_env
->invalid
= 0;
1730 inst_env
->xflag_found
= 0;
1731 inst_env
->disable_interrupt
= 0;
1733 /* Look for a step target. */
1736 /* Read an instruction from the client. */
1737 insn
= read_memory_unsigned_integer (inst_env
->reg
[PC_REGNUM
], 2);
1739 /* If the instruction is not in a delay slot the new content of the
1740 PC is [PC] + 2. If the instruction is in a delay slot it is not
1741 that simple. Since a instruction in a delay slot cannot change
1742 the content of the PC, it does not matter what value PC will have.
1743 Just make sure it is a valid instruction. */
1744 if (!inst_env
->delay_slot_pc_active
)
1746 inst_env
->reg
[PC_REGNUM
] += 2;
1750 inst_env
->delay_slot_pc_active
= 0;
1751 inst_env
->reg
[PC_REGNUM
] = inst_env
->delay_slot_pc
;
1753 /* Analyse the present instruction. */
1754 i
= find_cris_op (insn
, inst_env
);
1757 inst_env
->invalid
= 1;
1761 cris_gdb_func (cris_opcodes
[i
].op
, insn
, inst_env
);
1763 } while (!inst_env
->invalid
1764 && (inst_env
->prefix_found
|| inst_env
->xflag_found
1765 || inst_env
->slot_needed
));
1769 /* There is no hardware single-step support. The function find_step_target
1770 digs through the opcodes in order to find all possible targets.
1771 Either one ordinary target or two targets for branches may be found. */
1774 cris_software_single_step (enum target_signal ignore
, int insert_breakpoints
)
1776 inst_env_type inst_env
;
1778 if (insert_breakpoints
)
1780 /* Analyse the present instruction environment and insert
1782 int status
= find_step_target (&inst_env
);
1785 /* Could not find a target. FIXME: Should do something. */
1789 /* Insert at most two breakpoints. One for the next PC content
1790 and possibly another one for a branch, jump, etc. */
1791 next_pc
= (CORE_ADDR
) inst_env
.reg
[PC_REGNUM
];
1792 target_insert_breakpoint (next_pc
, break_mem
[0]);
1793 if (inst_env
.branch_found
1794 && (CORE_ADDR
) inst_env
.branch_break_address
!= next_pc
)
1796 branch_target_address
=
1797 (CORE_ADDR
) inst_env
.branch_break_address
;
1798 target_insert_breakpoint (branch_target_address
, break_mem
[1]);
1799 branch_break_inserted
= 1;
1805 /* Remove breakpoints. */
1806 target_remove_breakpoint (next_pc
, break_mem
[0]);
1807 if (branch_break_inserted
)
1809 target_remove_breakpoint (branch_target_address
, break_mem
[1]);
1810 branch_break_inserted
= 0;
1815 /* Calculates the prefix value for quick offset addressing mode. */
1818 quick_mode_bdap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1820 /* It's invalid to be in a delay slot. You can't have a prefix to this
1821 instruction (not 100% sure). */
1822 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1824 inst_env
->invalid
= 1;
1828 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand2 (inst
)];
1829 inst_env
->prefix_value
+= cris_get_bdap_quick_offset (inst
);
1831 /* A prefix doesn't change the xflag_found. But the rest of the flags
1833 inst_env
->slot_needed
= 0;
1834 inst_env
->prefix_found
= 1;
1837 /* Updates the autoincrement register. The size of the increment is derived
1838 from the size of the operation. The PC is always kept aligned on even
1842 process_autoincrement (int size
, unsigned short inst
, inst_env_type
*inst_env
)
1844 if (size
== INST_BYTE_SIZE
)
1846 inst_env
->reg
[cris_get_operand1 (inst
)] += 1;
1848 /* The PC must be word aligned, so increase the PC with one
1849 word even if the size is byte. */
1850 if (cris_get_operand1 (inst
) == REG_PC
)
1852 inst_env
->reg
[REG_PC
] += 1;
1855 else if (size
== INST_WORD_SIZE
)
1857 inst_env
->reg
[cris_get_operand1 (inst
)] += 2;
1859 else if (size
== INST_DWORD_SIZE
)
1861 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
1866 inst_env
->invalid
= 1;
1870 /* Just a forward declaration. */
1872 unsigned long get_data_from_address (unsigned short *inst
, CORE_ADDR address
);
1874 /* Calculates the prefix value for the general case of offset addressing
1878 bdap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1883 /* It's invalid to be in a delay slot. */
1884 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1886 inst_env
->invalid
= 1;
1890 /* The calculation of prefix_value used to be after process_autoincrement,
1891 but that fails for an instruction such as jsr [$r0+12] which is encoded
1892 as 5f0d 0c00 30b9 when compiled with -fpic. Since PC is operand1 it
1893 mustn't be incremented until we have read it and what it points at. */
1894 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand2 (inst
)];
1896 /* The offset is an indirection of the contents of the operand1 register. */
1897 inst_env
->prefix_value
+=
1898 get_data_from_address (&inst
, inst_env
->reg
[cris_get_operand1 (inst
)]);
1900 if (cris_get_mode (inst
) == AUTOINC_MODE
)
1902 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
1905 /* A prefix doesn't change the xflag_found. But the rest of the flags
1907 inst_env
->slot_needed
= 0;
1908 inst_env
->prefix_found
= 1;
1911 /* Calculates the prefix value for the index addressing mode. */
1914 biap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1916 /* It's invalid to be in a delay slot. I can't see that it's possible to
1917 have a prefix to this instruction. So I will treat this as invalid. */
1918 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1920 inst_env
->invalid
= 1;
1924 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand1 (inst
)];
1926 /* The offset is the operand2 value shifted the size of the instruction
1928 inst_env
->prefix_value
+=
1929 inst_env
->reg
[cris_get_operand2 (inst
)] << cris_get_size (inst
);
1931 /* If the PC is operand1 (base) the address used is the address after
1932 the main instruction, i.e. address + 2 (the PC is already compensated
1933 for the prefix operation). */
1934 if (cris_get_operand1 (inst
) == REG_PC
)
1936 inst_env
->prefix_value
+= 2;
1939 /* A prefix doesn't change the xflag_found. But the rest of the flags
1941 inst_env
->slot_needed
= 0;
1942 inst_env
->xflag_found
= 0;
1943 inst_env
->prefix_found
= 1;
1946 /* Calculates the prefix value for the double indirect addressing mode. */
1949 dip_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1954 /* It's invalid to be in a delay slot. */
1955 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1957 inst_env
->invalid
= 1;
1961 /* The prefix value is one dereference of the contents of the operand1
1963 address
= (CORE_ADDR
) inst_env
->reg
[cris_get_operand1 (inst
)];
1964 inst_env
->prefix_value
= read_memory_unsigned_integer (address
, 4);
1966 /* Check if the mode is autoincrement. */
1967 if (cris_get_mode (inst
) == AUTOINC_MODE
)
1969 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
1972 /* A prefix doesn't change the xflag_found. But the rest of the flags
1974 inst_env
->slot_needed
= 0;
1975 inst_env
->xflag_found
= 0;
1976 inst_env
->prefix_found
= 1;
1979 /* Finds the destination for a branch with 8-bits offset. */
1982 eight_bit_offset_branch_op (unsigned short inst
, inst_env_type
*inst_env
)
1987 /* If we have a prefix or are in a delay slot it's bad. */
1988 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1990 inst_env
->invalid
= 1;
1994 /* We have a branch, find out where the branch will land. */
1995 offset
= cris_get_branch_short_offset (inst
);
1997 /* Check if the offset is signed. */
1998 if (offset
& BRANCH_SIGNED_SHORT_OFFSET_MASK
)
2003 /* The offset ends with the sign bit, set it to zero. The address
2004 should always be word aligned. */
2005 offset
&= ~BRANCH_SIGNED_SHORT_OFFSET_MASK
;
2007 inst_env
->branch_found
= 1;
2008 inst_env
->branch_break_address
= inst_env
->reg
[REG_PC
] + offset
;
2010 inst_env
->slot_needed
= 1;
2011 inst_env
->prefix_found
= 0;
2012 inst_env
->xflag_found
= 0;
2013 inst_env
->disable_interrupt
= 1;
2016 /* Finds the destination for a branch with 16-bits offset. */
2019 sixteen_bit_offset_branch_op (unsigned short inst
, inst_env_type
*inst_env
)
2023 /* If we have a prefix or is in a delay slot it's bad. */
2024 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
2026 inst_env
->invalid
= 1;
2030 /* We have a branch, find out the offset for the branch. */
2031 offset
= read_memory_integer (inst_env
->reg
[REG_PC
], 2);
2033 /* The instruction is one word longer than normal, so add one word
2035 inst_env
->reg
[REG_PC
] += 2;
2037 inst_env
->branch_found
= 1;
2038 inst_env
->branch_break_address
= inst_env
->reg
[REG_PC
] + offset
;
2041 inst_env
->slot_needed
= 1;
2042 inst_env
->prefix_found
= 0;
2043 inst_env
->xflag_found
= 0;
2044 inst_env
->disable_interrupt
= 1;
2047 /* Handles the ABS instruction. */
2050 abs_op (unsigned short inst
, inst_env_type
*inst_env
)
2055 /* ABS can't have a prefix, so it's bad if it does. */
2056 if (inst_env
->prefix_found
)
2058 inst_env
->invalid
= 1;
2062 /* Check if the operation affects the PC. */
2063 if (cris_get_operand2 (inst
) == REG_PC
)
2066 /* It's invalid to change to the PC if we are in a delay slot. */
2067 if (inst_env
->slot_needed
)
2069 inst_env
->invalid
= 1;
2073 value
= (long) inst_env
->reg
[REG_PC
];
2075 /* The value of abs (SIGNED_DWORD_MASK) is SIGNED_DWORD_MASK. */
2076 if (value
!= SIGNED_DWORD_MASK
)
2079 inst_env
->reg
[REG_PC
] = (long) value
;
2083 inst_env
->slot_needed
= 0;
2084 inst_env
->prefix_found
= 0;
2085 inst_env
->xflag_found
= 0;
2086 inst_env
->disable_interrupt
= 0;
2089 /* Handles the ADDI instruction. */
2092 addi_op (unsigned short inst
, inst_env_type
*inst_env
)
2094 /* It's invalid to have the PC as base register. And ADDI can't have
2096 if (inst_env
->prefix_found
|| (cris_get_operand1 (inst
) == REG_PC
))
2098 inst_env
->invalid
= 1;
2102 inst_env
->slot_needed
= 0;
2103 inst_env
->prefix_found
= 0;
2104 inst_env
->xflag_found
= 0;
2105 inst_env
->disable_interrupt
= 0;
2108 /* Handles the ASR instruction. */
2111 asr_op (unsigned short inst
, inst_env_type
*inst_env
)
2114 unsigned long value
;
2115 unsigned long signed_extend_mask
= 0;
2117 /* ASR can't have a prefix, so check that it doesn't. */
2118 if (inst_env
->prefix_found
)
2120 inst_env
->invalid
= 1;
2124 /* Check if the PC is the target register. */
2125 if (cris_get_operand2 (inst
) == REG_PC
)
2127 /* It's invalid to change the PC in a delay slot. */
2128 if (inst_env
->slot_needed
)
2130 inst_env
->invalid
= 1;
2133 /* Get the number of bits to shift. */
2134 shift_steps
= cris_get_asr_shift_steps (inst_env
->reg
[cris_get_operand1 (inst
)]);
2135 value
= inst_env
->reg
[REG_PC
];
2137 /* Find out how many bits the operation should apply to. */
2138 if (cris_get_size (inst
) == INST_BYTE_SIZE
)
2140 if (value
& SIGNED_BYTE_MASK
)
2142 signed_extend_mask
= 0xFF;
2143 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2144 signed_extend_mask
= ~signed_extend_mask
;
2146 value
= value
>> shift_steps
;
2147 value
|= signed_extend_mask
;
2149 inst_env
->reg
[REG_PC
] &= 0xFFFFFF00;
2150 inst_env
->reg
[REG_PC
] |= value
;
2152 else if (cris_get_size (inst
) == INST_WORD_SIZE
)
2154 if (value
& SIGNED_WORD_MASK
)
2156 signed_extend_mask
= 0xFFFF;
2157 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2158 signed_extend_mask
= ~signed_extend_mask
;
2160 value
= value
>> shift_steps
;
2161 value
|= signed_extend_mask
;
2163 inst_env
->reg
[REG_PC
] &= 0xFFFF0000;
2164 inst_env
->reg
[REG_PC
] |= value
;
2166 else if (cris_get_size (inst
) == INST_DWORD_SIZE
)
2168 if (value
& SIGNED_DWORD_MASK
)
2170 signed_extend_mask
= 0xFFFFFFFF;
2171 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2172 signed_extend_mask
= ~signed_extend_mask
;
2174 value
= value
>> shift_steps
;
2175 value
|= signed_extend_mask
;
2176 inst_env
->reg
[REG_PC
] = value
;
2179 inst_env
->slot_needed
= 0;
2180 inst_env
->prefix_found
= 0;
2181 inst_env
->xflag_found
= 0;
2182 inst_env
->disable_interrupt
= 0;
2185 /* Handles the ASRQ instruction. */
2188 asrq_op (unsigned short inst
, inst_env_type
*inst_env
)
2192 unsigned long value
;
2193 unsigned long signed_extend_mask
= 0;
2195 /* ASRQ can't have a prefix, so check that it doesn't. */
2196 if (inst_env
->prefix_found
)
2198 inst_env
->invalid
= 1;
2202 /* Check if the PC is the target register. */
2203 if (cris_get_operand2 (inst
) == REG_PC
)
2206 /* It's invalid to change the PC in a delay slot. */
2207 if (inst_env
->slot_needed
)
2209 inst_env
->invalid
= 1;
2212 /* The shift size is given as a 5 bit quick value, i.e. we don't
2213 want the the sign bit of the quick value. */
2214 shift_steps
= cris_get_asr_shift_steps (inst
);
2215 value
= inst_env
->reg
[REG_PC
];
2216 if (value
& SIGNED_DWORD_MASK
)
2218 signed_extend_mask
= 0xFFFFFFFF;
2219 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2220 signed_extend_mask
= ~signed_extend_mask
;
2222 value
= value
>> shift_steps
;
2223 value
|= signed_extend_mask
;
2224 inst_env
->reg
[REG_PC
] = value
;
2226 inst_env
->slot_needed
= 0;
2227 inst_env
->prefix_found
= 0;
2228 inst_env
->xflag_found
= 0;
2229 inst_env
->disable_interrupt
= 0;
2232 /* Handles the AX, EI and SETF instruction. */
2235 ax_ei_setf_op (unsigned short inst
, inst_env_type
*inst_env
)
2237 if (inst_env
->prefix_found
)
2239 inst_env
->invalid
= 1;
2242 /* Check if the instruction is setting the X flag. */
2243 if (cris_is_xflag_bit_on (inst
))
2245 inst_env
->xflag_found
= 1;
2249 inst_env
->xflag_found
= 0;
2251 inst_env
->slot_needed
= 0;
2252 inst_env
->prefix_found
= 0;
2253 inst_env
->disable_interrupt
= 1;
2256 /* Checks if the instruction is in assign mode. If so, it updates the assign
2257 register. Note that check_assign assumes that the caller has checked that
2258 there is a prefix to this instruction. The mode check depends on this. */
2261 check_assign (unsigned short inst
, inst_env_type
*inst_env
)
2263 /* Check if it's an assign addressing mode. */
2264 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2266 /* Assign the prefix value to operand 1. */
2267 inst_env
->reg
[cris_get_operand1 (inst
)] = inst_env
->prefix_value
;
2271 /* Handles the 2-operand BOUND instruction. */
2274 two_operand_bound_op (unsigned short inst
, inst_env_type
*inst_env
)
2276 /* It's invalid to have the PC as the index operand. */
2277 if (cris_get_operand2 (inst
) == REG_PC
)
2279 inst_env
->invalid
= 1;
2282 /* Check if we have a prefix. */
2283 if (inst_env
->prefix_found
)
2285 check_assign (inst
, inst_env
);
2287 /* Check if this is an autoincrement mode. */
2288 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2290 /* It's invalid to change the PC in a delay slot. */
2291 if (inst_env
->slot_needed
)
2293 inst_env
->invalid
= 1;
2296 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2298 inst_env
->slot_needed
= 0;
2299 inst_env
->prefix_found
= 0;
2300 inst_env
->xflag_found
= 0;
2301 inst_env
->disable_interrupt
= 0;
2304 /* Handles the 3-operand BOUND instruction. */
2307 three_operand_bound_op (unsigned short inst
, inst_env_type
*inst_env
)
2309 /* It's an error if we haven't got a prefix. And it's also an error
2310 if the PC is the destination register. */
2311 if ((!inst_env
->prefix_found
) || (cris_get_operand1 (inst
) == REG_PC
))
2313 inst_env
->invalid
= 1;
2316 inst_env
->slot_needed
= 0;
2317 inst_env
->prefix_found
= 0;
2318 inst_env
->xflag_found
= 0;
2319 inst_env
->disable_interrupt
= 0;
2322 /* Clears the status flags in inst_env. */
2325 btst_nop_op (unsigned short inst
, inst_env_type
*inst_env
)
2327 /* It's an error if we have got a prefix. */
2328 if (inst_env
->prefix_found
)
2330 inst_env
->invalid
= 1;
2334 inst_env
->slot_needed
= 0;
2335 inst_env
->prefix_found
= 0;
2336 inst_env
->xflag_found
= 0;
2337 inst_env
->disable_interrupt
= 0;
2340 /* Clears the status flags in inst_env. */
2343 clearf_di_op (unsigned short inst
, inst_env_type
*inst_env
)
2345 /* It's an error if we have got a prefix. */
2346 if (inst_env
->prefix_found
)
2348 inst_env
->invalid
= 1;
2352 inst_env
->slot_needed
= 0;
2353 inst_env
->prefix_found
= 0;
2354 inst_env
->xflag_found
= 0;
2355 inst_env
->disable_interrupt
= 1;
2358 /* Handles the CLEAR instruction if it's in register mode. */
2361 reg_mode_clear_op (unsigned short inst
, inst_env_type
*inst_env
)
2363 /* Check if the target is the PC. */
2364 if (cris_get_operand2 (inst
) == REG_PC
)
2366 /* The instruction will clear the instruction's size bits. */
2367 int clear_size
= cris_get_clear_size (inst
);
2368 if (clear_size
== INST_BYTE_SIZE
)
2370 inst_env
->delay_slot_pc
= inst_env
->reg
[REG_PC
] & 0xFFFFFF00;
2372 if (clear_size
== INST_WORD_SIZE
)
2374 inst_env
->delay_slot_pc
= inst_env
->reg
[REG_PC
] & 0xFFFF0000;
2376 if (clear_size
== INST_DWORD_SIZE
)
2378 inst_env
->delay_slot_pc
= 0x0;
2380 /* The jump will be delayed with one delay slot. So we need a delay
2382 inst_env
->slot_needed
= 1;
2383 inst_env
->delay_slot_pc_active
= 1;
2387 /* The PC will not change => no delay slot. */
2388 inst_env
->slot_needed
= 0;
2390 inst_env
->prefix_found
= 0;
2391 inst_env
->xflag_found
= 0;
2392 inst_env
->disable_interrupt
= 0;
2395 /* Handles the TEST instruction if it's in register mode. */
2398 reg_mode_test_op (unsigned short inst
, inst_env_type
*inst_env
)
2400 /* It's an error if we have got a prefix. */
2401 if (inst_env
->prefix_found
)
2403 inst_env
->invalid
= 1;
2406 inst_env
->slot_needed
= 0;
2407 inst_env
->prefix_found
= 0;
2408 inst_env
->xflag_found
= 0;
2409 inst_env
->disable_interrupt
= 0;
2413 /* Handles the CLEAR and TEST instruction if the instruction isn't
2414 in register mode. */
2417 none_reg_mode_clear_test_op (unsigned short inst
, inst_env_type
*inst_env
)
2419 /* Check if we are in a prefix mode. */
2420 if (inst_env
->prefix_found
)
2422 /* The only way the PC can change is if this instruction is in
2423 assign addressing mode. */
2424 check_assign (inst
, inst_env
);
2426 /* Indirect mode can't change the PC so just check if the mode is
2428 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2430 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2432 inst_env
->slot_needed
= 0;
2433 inst_env
->prefix_found
= 0;
2434 inst_env
->xflag_found
= 0;
2435 inst_env
->disable_interrupt
= 0;
2438 /* Checks that the PC isn't the destination register or the instructions has
2442 dstep_logshift_mstep_neg_not_op (unsigned short inst
, inst_env_type
*inst_env
)
2444 /* It's invalid to have the PC as the destination. The instruction can't
2446 if ((cris_get_operand2 (inst
) == REG_PC
) || inst_env
->prefix_found
)
2448 inst_env
->invalid
= 1;
2452 inst_env
->slot_needed
= 0;
2453 inst_env
->prefix_found
= 0;
2454 inst_env
->xflag_found
= 0;
2455 inst_env
->disable_interrupt
= 0;
2458 /* Checks that the instruction doesn't have a prefix. */
2461 break_op (unsigned short inst
, inst_env_type
*inst_env
)
2463 /* The instruction can't have a prefix. */
2464 if (inst_env
->prefix_found
)
2466 inst_env
->invalid
= 1;
2470 inst_env
->slot_needed
= 0;
2471 inst_env
->prefix_found
= 0;
2472 inst_env
->xflag_found
= 0;
2473 inst_env
->disable_interrupt
= 1;
2476 /* Checks that the PC isn't the destination register and that the instruction
2477 doesn't have a prefix. */
2480 scc_op (unsigned short inst
, inst_env_type
*inst_env
)
2482 /* It's invalid to have the PC as the destination. The instruction can't
2484 if ((cris_get_operand2 (inst
) == REG_PC
) || inst_env
->prefix_found
)
2486 inst_env
->invalid
= 1;
2490 inst_env
->slot_needed
= 0;
2491 inst_env
->prefix_found
= 0;
2492 inst_env
->xflag_found
= 0;
2493 inst_env
->disable_interrupt
= 1;
2496 /* Handles the register mode JUMP instruction. */
2499 reg_mode_jump_op (unsigned short inst
, inst_env_type
*inst_env
)
2501 /* It's invalid to do a JUMP in a delay slot. The mode is register, so
2502 you can't have a prefix. */
2503 if ((inst_env
->slot_needed
) || (inst_env
->prefix_found
))
2505 inst_env
->invalid
= 1;
2509 /* Just change the PC. */
2510 inst_env
->reg
[REG_PC
] = inst_env
->reg
[cris_get_operand1 (inst
)];
2511 inst_env
->slot_needed
= 0;
2512 inst_env
->prefix_found
= 0;
2513 inst_env
->xflag_found
= 0;
2514 inst_env
->disable_interrupt
= 1;
2517 /* Handles the JUMP instruction for all modes except register. */
2519 void none_reg_mode_jump_op (unsigned short inst
, inst_env_type
*inst_env
)
2521 unsigned long newpc
;
2524 /* It's invalid to do a JUMP in a delay slot. */
2525 if (inst_env
->slot_needed
)
2527 inst_env
->invalid
= 1;
2531 /* Check if we have a prefix. */
2532 if (inst_env
->prefix_found
)
2534 check_assign (inst
, inst_env
);
2536 /* Get the new value for the the PC. */
2538 read_memory_unsigned_integer ((CORE_ADDR
) inst_env
->prefix_value
,
2543 /* Get the new value for the PC. */
2544 address
= (CORE_ADDR
) inst_env
->reg
[cris_get_operand1 (inst
)];
2545 newpc
= read_memory_unsigned_integer (address
, 4);
2547 /* Check if we should increment a register. */
2548 if (cris_get_mode (inst
) == AUTOINC_MODE
)
2550 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
2553 inst_env
->reg
[REG_PC
] = newpc
;
2555 inst_env
->slot_needed
= 0;
2556 inst_env
->prefix_found
= 0;
2557 inst_env
->xflag_found
= 0;
2558 inst_env
->disable_interrupt
= 1;
2561 /* Handles moves to special registers (aka P-register) for all modes. */
2564 move_to_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2566 if (inst_env
->prefix_found
)
2568 /* The instruction has a prefix that means we are only interested if
2569 the instruction is in assign mode. */
2570 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2572 /* The prefix handles the problem if we are in a delay slot. */
2573 if (cris_get_operand1 (inst
) == REG_PC
)
2575 /* Just take care of the assign. */
2576 check_assign (inst
, inst_env
);
2580 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2582 /* The instruction doesn't have a prefix, the only case left that we
2583 are interested in is the autoincrement mode. */
2584 if (cris_get_operand1 (inst
) == REG_PC
)
2586 /* If the PC is to be incremented it's invalid to be in a
2588 if (inst_env
->slot_needed
)
2590 inst_env
->invalid
= 1;
2594 /* The increment depends on the size of the special register. */
2595 if (cris_register_size (cris_get_operand2 (inst
)) == 1)
2597 process_autoincrement (INST_BYTE_SIZE
, inst
, inst_env
);
2599 else if (cris_register_size (cris_get_operand2 (inst
)) == 2)
2601 process_autoincrement (INST_WORD_SIZE
, inst
, inst_env
);
2605 process_autoincrement (INST_DWORD_SIZE
, inst
, inst_env
);
2609 inst_env
->slot_needed
= 0;
2610 inst_env
->prefix_found
= 0;
2611 inst_env
->xflag_found
= 0;
2612 inst_env
->disable_interrupt
= 1;
2615 /* Handles moves from special registers (aka P-register) for all modes
2619 none_reg_mode_move_from_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2621 if (inst_env
->prefix_found
)
2623 /* The instruction has a prefix that means we are only interested if
2624 the instruction is in assign mode. */
2625 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2627 /* The prefix handles the problem if we are in a delay slot. */
2628 if (cris_get_operand1 (inst
) == REG_PC
)
2630 /* Just take care of the assign. */
2631 check_assign (inst
, inst_env
);
2635 /* The instruction doesn't have a prefix, the only case left that we
2636 are interested in is the autoincrement mode. */
2637 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2639 if (cris_get_operand1 (inst
) == REG_PC
)
2641 /* If the PC is to be incremented it's invalid to be in a
2643 if (inst_env
->slot_needed
)
2645 inst_env
->invalid
= 1;
2649 /* The increment depends on the size of the special register. */
2650 if (cris_register_size (cris_get_operand2 (inst
)) == 1)
2652 process_autoincrement (INST_BYTE_SIZE
, inst
, inst_env
);
2654 else if (cris_register_size (cris_get_operand2 (inst
)) == 2)
2656 process_autoincrement (INST_WORD_SIZE
, inst
, inst_env
);
2660 process_autoincrement (INST_DWORD_SIZE
, inst
, inst_env
);
2664 inst_env
->slot_needed
= 0;
2665 inst_env
->prefix_found
= 0;
2666 inst_env
->xflag_found
= 0;
2667 inst_env
->disable_interrupt
= 1;
2670 /* Handles moves from special registers (aka P-register) when the mode
2674 reg_mode_move_from_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2676 /* Register mode move from special register can't have a prefix. */
2677 if (inst_env
->prefix_found
)
2679 inst_env
->invalid
= 1;
2683 if (cris_get_operand1 (inst
) == REG_PC
)
2685 /* It's invalid to change the PC in a delay slot. */
2686 if (inst_env
->slot_needed
)
2688 inst_env
->invalid
= 1;
2691 /* The destination is the PC, the jump will have a delay slot. */
2692 inst_env
->delay_slot_pc
= inst_env
->preg
[cris_get_operand2 (inst
)];
2693 inst_env
->slot_needed
= 1;
2694 inst_env
->delay_slot_pc_active
= 1;
2698 /* If the destination isn't PC, there will be no jump. */
2699 inst_env
->slot_needed
= 0;
2701 inst_env
->prefix_found
= 0;
2702 inst_env
->xflag_found
= 0;
2703 inst_env
->disable_interrupt
= 1;
2706 /* Handles the MOVEM from memory to general register instruction. */
2709 move_mem_to_reg_movem_op (unsigned short inst
, inst_env_type
*inst_env
)
2711 if (inst_env
->prefix_found
)
2713 /* The prefix handles the problem if we are in a delay slot. Is the
2714 MOVEM instruction going to change the PC? */
2715 if (cris_get_operand2 (inst
) >= REG_PC
)
2717 inst_env
->reg
[REG_PC
] =
2718 read_memory_unsigned_integer (inst_env
->prefix_value
, 4);
2720 /* The assign value is the value after the increment. Normally, the
2721 assign value is the value before the increment. */
2722 if ((cris_get_operand1 (inst
) == REG_PC
)
2723 && (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
))
2725 inst_env
->reg
[REG_PC
] = inst_env
->prefix_value
;
2726 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2731 /* Is the MOVEM instruction going to change the PC? */
2732 if (cris_get_operand2 (inst
) == REG_PC
)
2734 /* It's invalid to change the PC in a delay slot. */
2735 if (inst_env
->slot_needed
)
2737 inst_env
->invalid
= 1;
2740 inst_env
->reg
[REG_PC
] =
2741 read_memory_unsigned_integer (inst_env
->reg
[cris_get_operand1 (inst
)],
2744 /* The increment is not depending on the size, instead it's depending
2745 on the number of registers loaded from memory. */
2746 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
2748 /* It's invalid to change the PC in a delay slot. */
2749 if (inst_env
->slot_needed
)
2751 inst_env
->invalid
= 1;
2754 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2757 inst_env
->slot_needed
= 0;
2758 inst_env
->prefix_found
= 0;
2759 inst_env
->xflag_found
= 0;
2760 inst_env
->disable_interrupt
= 0;
2763 /* Handles the MOVEM to memory from general register instruction. */
2766 move_reg_to_mem_movem_op (unsigned short inst
, inst_env_type
*inst_env
)
2768 if (inst_env
->prefix_found
)
2770 /* The assign value is the value after the increment. Normally, the
2771 assign value is the value before the increment. */
2772 if ((cris_get_operand1 (inst
) == REG_PC
) &&
2773 (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
))
2775 /* The prefix handles the problem if we are in a delay slot. */
2776 inst_env
->reg
[REG_PC
] = inst_env
->prefix_value
;
2777 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2782 /* The increment is not depending on the size, instead it's depending
2783 on the number of registers loaded to memory. */
2784 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
2786 /* It's invalid to change the PC in a delay slot. */
2787 if (inst_env
->slot_needed
)
2789 inst_env
->invalid
= 1;
2792 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2795 inst_env
->slot_needed
= 0;
2796 inst_env
->prefix_found
= 0;
2797 inst_env
->xflag_found
= 0;
2798 inst_env
->disable_interrupt
= 0;
2801 /* Handles the pop instruction to a general register.
2802 POP is a assembler macro for MOVE.D [SP+], Rd. */
2805 reg_pop_op (unsigned short inst
, inst_env_type
*inst_env
)
2807 /* POP can't have a prefix. */
2808 if (inst_env
->prefix_found
)
2810 inst_env
->invalid
= 1;
2813 if (cris_get_operand2 (inst
) == REG_PC
)
2815 /* It's invalid to change the PC in a delay slot. */
2816 if (inst_env
->slot_needed
)
2818 inst_env
->invalid
= 1;
2821 inst_env
->reg
[REG_PC
] =
2822 read_memory_unsigned_integer (inst_env
->reg
[REG_SP
], 4);
2824 inst_env
->slot_needed
= 0;
2825 inst_env
->prefix_found
= 0;
2826 inst_env
->xflag_found
= 0;
2827 inst_env
->disable_interrupt
= 0;
2830 /* Handles moves from register to memory. */
2833 move_reg_to_mem_index_inc_op (unsigned short inst
, inst_env_type
*inst_env
)
2835 /* Check if we have a prefix. */
2836 if (inst_env
->prefix_found
)
2838 /* The only thing that can change the PC is an assign. */
2839 check_assign (inst
, inst_env
);
2841 else if ((cris_get_operand1 (inst
) == REG_PC
)
2842 && (cris_get_mode (inst
) == AUTOINC_MODE
))
2844 /* It's invalid to change the PC in a delay slot. */
2845 if (inst_env
->slot_needed
)
2847 inst_env
->invalid
= 1;
2850 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2852 inst_env
->slot_needed
= 0;
2853 inst_env
->prefix_found
= 0;
2854 inst_env
->xflag_found
= 0;
2855 inst_env
->disable_interrupt
= 0;
2858 /* Handles the intructions that's not yet implemented, by setting
2859 inst_env->invalid to true. */
2862 not_implemented_op (unsigned short inst
, inst_env_type
*inst_env
)
2864 inst_env
->invalid
= 1;
2867 /* Handles the XOR instruction. */
2870 xor_op (unsigned short inst
, inst_env_type
*inst_env
)
2872 /* XOR can't have a prefix. */
2873 if (inst_env
->prefix_found
)
2875 inst_env
->invalid
= 1;
2879 /* Check if the PC is the target. */
2880 if (cris_get_operand2 (inst
) == REG_PC
)
2882 /* It's invalid to change the PC in a delay slot. */
2883 if (inst_env
->slot_needed
)
2885 inst_env
->invalid
= 1;
2888 inst_env
->reg
[REG_PC
] ^= inst_env
->reg
[cris_get_operand1 (inst
)];
2890 inst_env
->slot_needed
= 0;
2891 inst_env
->prefix_found
= 0;
2892 inst_env
->xflag_found
= 0;
2893 inst_env
->disable_interrupt
= 0;
2896 /* Handles the MULS instruction. */
2899 muls_op (unsigned short inst
, inst_env_type
*inst_env
)
2901 /* MULS/U can't have a prefix. */
2902 if (inst_env
->prefix_found
)
2904 inst_env
->invalid
= 1;
2908 /* Consider it invalid if the PC is the target. */
2909 if (cris_get_operand2 (inst
) == REG_PC
)
2911 inst_env
->invalid
= 1;
2914 inst_env
->slot_needed
= 0;
2915 inst_env
->prefix_found
= 0;
2916 inst_env
->xflag_found
= 0;
2917 inst_env
->disable_interrupt
= 0;
2920 /* Handles the MULU instruction. */
2923 mulu_op (unsigned short inst
, inst_env_type
*inst_env
)
2925 /* MULS/U can't have a prefix. */
2926 if (inst_env
->prefix_found
)
2928 inst_env
->invalid
= 1;
2932 /* Consider it invalid if the PC is the target. */
2933 if (cris_get_operand2 (inst
) == REG_PC
)
2935 inst_env
->invalid
= 1;
2938 inst_env
->slot_needed
= 0;
2939 inst_env
->prefix_found
= 0;
2940 inst_env
->xflag_found
= 0;
2941 inst_env
->disable_interrupt
= 0;
2944 /* Calculate the result of the instruction for ADD, SUB, CMP AND, OR and MOVE.
2945 The MOVE instruction is the move from source to register. */
2948 add_sub_cmp_and_or_move_action (unsigned short inst
, inst_env_type
*inst_env
,
2949 unsigned long source1
, unsigned long source2
)
2951 unsigned long pc_mask
;
2952 unsigned long operation_mask
;
2954 /* Find out how many bits the operation should apply to. */
2955 if (cris_get_size (inst
) == INST_BYTE_SIZE
)
2957 pc_mask
= 0xFFFFFF00;
2958 operation_mask
= 0xFF;
2960 else if (cris_get_size (inst
) == INST_WORD_SIZE
)
2962 pc_mask
= 0xFFFF0000;
2963 operation_mask
= 0xFFFF;
2965 else if (cris_get_size (inst
) == INST_DWORD_SIZE
)
2968 operation_mask
= 0xFFFFFFFF;
2972 /* The size is out of range. */
2973 inst_env
->invalid
= 1;
2977 /* The instruction just works on uw_operation_mask bits. */
2978 source2
&= operation_mask
;
2979 source1
&= operation_mask
;
2981 /* Now calculate the result. The opcode's 3 first bits separates
2982 the different actions. */
2983 switch (cris_get_opcode (inst
) & 7)
2993 case 2: /* subtract */
2997 case 3: /* compare */
3009 inst_env
->invalid
= 1;
3015 /* Make sure that the result doesn't contain more than the instruction
3017 source2
&= operation_mask
;
3019 /* Calculate the new breakpoint address. */
3020 inst_env
->reg
[REG_PC
] &= pc_mask
;
3021 inst_env
->reg
[REG_PC
] |= source1
;
3025 /* Extends the value from either byte or word size to a dword. If the mode
3026 is zero extend then the value is extended with zero. If instead the mode
3027 is signed extend the sign bit of the value is taken into consideration. */
3030 do_sign_or_zero_extend (unsigned long value
, unsigned short *inst
)
3032 /* The size can be either byte or word, check which one it is.
3033 Don't check the highest bit, it's indicating if it's a zero
3035 if (cris_get_size (*inst
) & INST_WORD_SIZE
)
3040 /* Check if the instruction is signed extend. If so, check if value has
3042 if (cris_is_signed_extend_bit_on (*inst
) && (value
& SIGNED_WORD_MASK
))
3044 value
|= SIGNED_WORD_EXTEND_MASK
;
3052 /* Check if the instruction is signed extend. If so, check if value has
3054 if (cris_is_signed_extend_bit_on (*inst
) && (value
& SIGNED_BYTE_MASK
))
3056 value
|= SIGNED_BYTE_EXTEND_MASK
;
3059 /* The size should now be dword. */
3060 cris_set_size_to_dword (inst
);
3064 /* Handles the register mode for the ADD, SUB, CMP, AND, OR and MOVE
3065 instruction. The MOVE instruction is the move from source to register. */
3068 reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst
,
3069 inst_env_type
*inst_env
)
3071 unsigned long operand1
;
3072 unsigned long operand2
;
3074 /* It's invalid to have a prefix to the instruction. This is a register
3075 mode instruction and can't have a prefix. */
3076 if (inst_env
->prefix_found
)
3078 inst_env
->invalid
= 1;
3081 /* Check if the instruction has PC as its target. */
3082 if (cris_get_operand2 (inst
) == REG_PC
)
3084 if (inst_env
->slot_needed
)
3086 inst_env
->invalid
= 1;
3089 /* The instruction has the PC as its target register. */
3090 operand1
= inst_env
->reg
[cris_get_operand1 (inst
)];
3091 operand2
= inst_env
->reg
[REG_PC
];
3093 /* Check if it's a extend, signed or zero instruction. */
3094 if (cris_get_opcode (inst
) < 4)
3096 operand1
= do_sign_or_zero_extend (operand1
, &inst
);
3098 /* Calculate the PC value after the instruction, i.e. where the
3099 breakpoint should be. The order of the udw_operands is vital. */
3100 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3102 inst_env
->slot_needed
= 0;
3103 inst_env
->prefix_found
= 0;
3104 inst_env
->xflag_found
= 0;
3105 inst_env
->disable_interrupt
= 0;
3108 /* Returns the data contained at address. The size of the data is derived from
3109 the size of the operation. If the instruction is a zero or signed
3110 extend instruction, the size field is changed in instruction. */
3113 get_data_from_address (unsigned short *inst
, CORE_ADDR address
)
3115 int size
= cris_get_size (*inst
);
3116 unsigned long value
;
3118 /* If it's an extend instruction we don't want the signed extend bit,
3119 because it influences the size. */
3120 if (cris_get_opcode (*inst
) < 4)
3122 size
&= ~SIGNED_EXTEND_BIT_MASK
;
3124 /* Is there a need for checking the size? Size should contain the number of
3127 value
= read_memory_unsigned_integer (address
, size
);
3129 /* Check if it's an extend, signed or zero instruction. */
3130 if (cris_get_opcode (*inst
) < 4)
3132 value
= do_sign_or_zero_extend (value
, inst
);
3137 /* Handles the assign addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
3138 instructions. The MOVE instruction is the move from source to register. */
3141 handle_prefix_assign_mode_for_aritm_op (unsigned short inst
,
3142 inst_env_type
*inst_env
)
3144 unsigned long operand2
;
3145 unsigned long operand3
;
3147 check_assign (inst
, inst_env
);
3148 if (cris_get_operand2 (inst
) == REG_PC
)
3150 operand2
= inst_env
->reg
[REG_PC
];
3152 /* Get the value of the third operand. */
3153 operand3
= get_data_from_address (&inst
, inst_env
->prefix_value
);
3155 /* Calculate the PC value after the instruction, i.e. where the
3156 breakpoint should be. The order of the udw_operands is vital. */
3157 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
3159 inst_env
->slot_needed
= 0;
3160 inst_env
->prefix_found
= 0;
3161 inst_env
->xflag_found
= 0;
3162 inst_env
->disable_interrupt
= 0;
3165 /* Handles the three-operand addressing mode for the ADD, SUB, CMP, AND and
3166 OR instructions. Note that for this to work as expected, the calling
3167 function must have made sure that there is a prefix to this instruction. */
3170 three_operand_add_sub_cmp_and_or_op (unsigned short inst
,
3171 inst_env_type
*inst_env
)
3173 unsigned long operand2
;
3174 unsigned long operand3
;
3176 if (cris_get_operand1 (inst
) == REG_PC
)
3178 /* The PC will be changed by the instruction. */
3179 operand2
= inst_env
->reg
[cris_get_operand2 (inst
)];
3181 /* Get the value of the third operand. */
3182 operand3
= get_data_from_address (&inst
, inst_env
->prefix_value
);
3184 /* Calculate the PC value after the instruction, i.e. where the
3185 breakpoint should be. */
3186 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
3188 inst_env
->slot_needed
= 0;
3189 inst_env
->prefix_found
= 0;
3190 inst_env
->xflag_found
= 0;
3191 inst_env
->disable_interrupt
= 0;
3194 /* Handles the index addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
3195 instructions. The MOVE instruction is the move from source to register. */
3198 handle_prefix_index_mode_for_aritm_op (unsigned short inst
,
3199 inst_env_type
*inst_env
)
3201 if (cris_get_operand1 (inst
) != cris_get_operand2 (inst
))
3203 /* If the instruction is MOVE it's invalid. If the instruction is ADD,
3204 SUB, AND or OR something weird is going on (if everything works these
3205 instructions should end up in the three operand version). */
3206 inst_env
->invalid
= 1;
3211 /* three_operand_add_sub_cmp_and_or does the same as we should do here
3213 three_operand_add_sub_cmp_and_or_op (inst
, inst_env
);
3215 inst_env
->slot_needed
= 0;
3216 inst_env
->prefix_found
= 0;
3217 inst_env
->xflag_found
= 0;
3218 inst_env
->disable_interrupt
= 0;
3221 /* Handles the autoincrement and indirect addresing mode for the ADD, SUB,
3222 CMP, AND OR and MOVE instruction. The MOVE instruction is the move from
3223 source to register. */
3226 handle_inc_and_index_mode_for_aritm_op (unsigned short inst
,
3227 inst_env_type
*inst_env
)
3229 unsigned long operand1
;
3230 unsigned long operand2
;
3231 unsigned long operand3
;
3234 /* The instruction is either an indirect or autoincrement addressing mode.
3235 Check if the destination register is the PC. */
3236 if (cris_get_operand2 (inst
) == REG_PC
)
3238 /* Must be done here, get_data_from_address may change the size
3240 size
= cris_get_size (inst
);
3241 operand2
= inst_env
->reg
[REG_PC
];
3243 /* Get the value of the third operand, i.e. the indirect operand. */
3244 operand1
= inst_env
->reg
[cris_get_operand1 (inst
)];
3245 operand3
= get_data_from_address (&inst
, operand1
);
3247 /* Calculate the PC value after the instruction, i.e. where the
3248 breakpoint should be. The order of the udw_operands is vital. */
3249 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
3251 /* If this is an autoincrement addressing mode, check if the increment
3253 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
3255 /* Get the size field. */
3256 size
= cris_get_size (inst
);
3258 /* If it's an extend instruction we don't want the signed extend bit,
3259 because it influences the size. */
3260 if (cris_get_opcode (inst
) < 4)
3262 size
&= ~SIGNED_EXTEND_BIT_MASK
;
3264 process_autoincrement (size
, inst
, inst_env
);
3266 inst_env
->slot_needed
= 0;
3267 inst_env
->prefix_found
= 0;
3268 inst_env
->xflag_found
= 0;
3269 inst_env
->disable_interrupt
= 0;
3272 /* Handles the two-operand addressing mode, all modes except register, for
3273 the ADD, SUB CMP, AND and OR instruction. */
3276 none_reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst
,
3277 inst_env_type
*inst_env
)
3279 if (inst_env
->prefix_found
)
3281 if (cris_get_mode (inst
) == PREFIX_INDEX_MODE
)
3283 handle_prefix_index_mode_for_aritm_op (inst
, inst_env
);
3285 else if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
3287 handle_prefix_assign_mode_for_aritm_op (inst
, inst_env
);
3291 /* The mode is invalid for a prefixed base instruction. */
3292 inst_env
->invalid
= 1;
3298 handle_inc_and_index_mode_for_aritm_op (inst
, inst_env
);
3302 /* Handles the quick addressing mode for the ADD and SUB instruction. */
3305 quick_mode_add_sub_op (unsigned short inst
, inst_env_type
*inst_env
)
3307 unsigned long operand1
;
3308 unsigned long operand2
;
3310 /* It's a bad idea to be in a prefix instruction now. This is a quick mode
3311 instruction and can't have a prefix. */
3312 if (inst_env
->prefix_found
)
3314 inst_env
->invalid
= 1;
3318 /* Check if the instruction has PC as its target. */
3319 if (cris_get_operand2 (inst
) == REG_PC
)
3321 if (inst_env
->slot_needed
)
3323 inst_env
->invalid
= 1;
3326 operand1
= cris_get_quick_value (inst
);
3327 operand2
= inst_env
->reg
[REG_PC
];
3329 /* The size should now be dword. */
3330 cris_set_size_to_dword (&inst
);
3332 /* Calculate the PC value after the instruction, i.e. where the
3333 breakpoint should be. */
3334 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3336 inst_env
->slot_needed
= 0;
3337 inst_env
->prefix_found
= 0;
3338 inst_env
->xflag_found
= 0;
3339 inst_env
->disable_interrupt
= 0;
3342 /* Handles the quick addressing mode for the CMP, AND and OR instruction. */
3345 quick_mode_and_cmp_move_or_op (unsigned short inst
, inst_env_type
*inst_env
)
3347 unsigned long operand1
;
3348 unsigned long operand2
;
3350 /* It's a bad idea to be in a prefix instruction now. This is a quick mode
3351 instruction and can't have a prefix. */
3352 if (inst_env
->prefix_found
)
3354 inst_env
->invalid
= 1;
3357 /* Check if the instruction has PC as its target. */
3358 if (cris_get_operand2 (inst
) == REG_PC
)
3360 if (inst_env
->slot_needed
)
3362 inst_env
->invalid
= 1;
3365 /* The instruction has the PC as its target register. */
3366 operand1
= cris_get_quick_value (inst
);
3367 operand2
= inst_env
->reg
[REG_PC
];
3369 /* The quick value is signed, so check if we must do a signed extend. */
3370 if (operand1
& SIGNED_QUICK_VALUE_MASK
)
3373 operand1
|= SIGNED_QUICK_VALUE_EXTEND_MASK
;
3375 /* The size should now be dword. */
3376 cris_set_size_to_dword (&inst
);
3378 /* Calculate the PC value after the instruction, i.e. where the
3379 breakpoint should be. */
3380 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3382 inst_env
->slot_needed
= 0;
3383 inst_env
->prefix_found
= 0;
3384 inst_env
->xflag_found
= 0;
3385 inst_env
->disable_interrupt
= 0;
3388 /* Translate op_type to a function and call it. */
3390 static void cris_gdb_func (enum cris_op_type op_type
, unsigned short inst
,
3391 inst_env_type
*inst_env
)
3395 case cris_not_implemented_op
:
3396 not_implemented_op (inst
, inst_env
);
3400 abs_op (inst
, inst_env
);
3404 addi_op (inst
, inst_env
);
3408 asr_op (inst
, inst_env
);
3412 asrq_op (inst
, inst_env
);
3415 case cris_ax_ei_setf_op
:
3416 ax_ei_setf_op (inst
, inst_env
);
3419 case cris_bdap_prefix
:
3420 bdap_prefix (inst
, inst_env
);
3423 case cris_biap_prefix
:
3424 biap_prefix (inst
, inst_env
);
3428 break_op (inst
, inst_env
);
3431 case cris_btst_nop_op
:
3432 btst_nop_op (inst
, inst_env
);
3435 case cris_clearf_di_op
:
3436 clearf_di_op (inst
, inst_env
);
3439 case cris_dip_prefix
:
3440 dip_prefix (inst
, inst_env
);
3443 case cris_dstep_logshift_mstep_neg_not_op
:
3444 dstep_logshift_mstep_neg_not_op (inst
, inst_env
);
3447 case cris_eight_bit_offset_branch_op
:
3448 eight_bit_offset_branch_op (inst
, inst_env
);
3451 case cris_move_mem_to_reg_movem_op
:
3452 move_mem_to_reg_movem_op (inst
, inst_env
);
3455 case cris_move_reg_to_mem_movem_op
:
3456 move_reg_to_mem_movem_op (inst
, inst_env
);
3459 case cris_move_to_preg_op
:
3460 move_to_preg_op (inst
, inst_env
);
3464 muls_op (inst
, inst_env
);
3468 mulu_op (inst
, inst_env
);
3471 case cris_none_reg_mode_add_sub_cmp_and_or_move_op
:
3472 none_reg_mode_add_sub_cmp_and_or_move_op (inst
, inst_env
);
3475 case cris_none_reg_mode_clear_test_op
:
3476 none_reg_mode_clear_test_op (inst
, inst_env
);
3479 case cris_none_reg_mode_jump_op
:
3480 none_reg_mode_jump_op (inst
, inst_env
);
3483 case cris_none_reg_mode_move_from_preg_op
:
3484 none_reg_mode_move_from_preg_op (inst
, inst_env
);
3487 case cris_quick_mode_add_sub_op
:
3488 quick_mode_add_sub_op (inst
, inst_env
);
3491 case cris_quick_mode_and_cmp_move_or_op
:
3492 quick_mode_and_cmp_move_or_op (inst
, inst_env
);
3495 case cris_quick_mode_bdap_prefix
:
3496 quick_mode_bdap_prefix (inst
, inst_env
);
3499 case cris_reg_mode_add_sub_cmp_and_or_move_op
:
3500 reg_mode_add_sub_cmp_and_or_move_op (inst
, inst_env
);
3503 case cris_reg_mode_clear_op
:
3504 reg_mode_clear_op (inst
, inst_env
);
3507 case cris_reg_mode_jump_op
:
3508 reg_mode_jump_op (inst
, inst_env
);
3511 case cris_reg_mode_move_from_preg_op
:
3512 reg_mode_move_from_preg_op (inst
, inst_env
);
3515 case cris_reg_mode_test_op
:
3516 reg_mode_test_op (inst
, inst_env
);
3520 scc_op (inst
, inst_env
);
3523 case cris_sixteen_bit_offset_branch_op
:
3524 sixteen_bit_offset_branch_op (inst
, inst_env
);
3527 case cris_three_operand_add_sub_cmp_and_or_op
:
3528 three_operand_add_sub_cmp_and_or_op (inst
, inst_env
);
3531 case cris_three_operand_bound_op
:
3532 three_operand_bound_op (inst
, inst_env
);
3535 case cris_two_operand_bound_op
:
3536 two_operand_bound_op (inst
, inst_env
);
3540 xor_op (inst
, inst_env
);
3545 /* This wrapper is to avoid cris_get_assembler being called before
3546 exec_bfd has been set. */
3549 cris_delayed_get_disassembler (bfd_vma addr
, disassemble_info
*info
)
3551 tm_print_insn
= cris_get_disassembler (exec_bfd
);
3552 return TARGET_PRINT_INSN (addr
, info
);
3555 /* Copied from <asm/elf.h>. */
3556 typedef unsigned long elf_greg_t
;
3558 /* Same as user_regs_struct struct in <asm/user.h>. */
3559 typedef elf_greg_t elf_gregset_t
[35];
3561 /* Unpack an elf_gregset_t into GDB's register cache. */
3564 supply_gregset (elf_gregset_t
*gregsetp
)
3567 elf_greg_t
*regp
= *gregsetp
;
3568 static char zerobuf
[4] = {0};
3570 /* The kernel dumps all 32 registers as unsigned longs, but supply_register
3571 knows about the actual size of each register so that's no problem. */
3572 for (i
= 0; i
< NUM_GENREGS
+ NUM_SPECREGS
; i
++)
3574 supply_register (i
, (char *)®p
[i
]);
3578 /* Use a local version of this function to get the correct types for
3579 regsets, until multi-arch core support is ready. */
3582 fetch_core_registers (char *core_reg_sect
, unsigned core_reg_size
,
3583 int which
, CORE_ADDR reg_addr
)
3585 elf_gregset_t gregset
;
3590 if (core_reg_size
!= sizeof (gregset
))
3592 warning ("wrong size gregset struct in core file");
3596 memcpy (&gregset
, core_reg_sect
, sizeof (gregset
));
3597 supply_gregset (&gregset
);
3601 /* We've covered all the kinds of registers we know about here,
3602 so this must be something we wouldn't know what to do with
3603 anyway. Just ignore it. */
3608 static struct core_fns cris_elf_core_fns
=
3610 bfd_target_elf_flavour
, /* core_flavour */
3611 default_check_format
, /* check_format */
3612 default_core_sniffer
, /* core_sniffer */
3613 fetch_core_registers
, /* core_read_registers */
3617 /* Fetch (and possibly build) an appropriate link_map_offsets
3618 structure for native GNU/Linux CRIS targets using the struct
3619 offsets defined in link.h (but without actual reference to that
3622 This makes it possible to access GNU/Linux CRIS shared libraries
3623 from a GDB that was not built on an GNU/Linux CRIS host (for cross
3626 See gdb/solib-svr4.h for an explanation of these fields. */
3628 struct link_map_offsets
*
3629 cris_linux_svr4_fetch_link_map_offsets (void)
3631 static struct link_map_offsets lmo
;
3632 static struct link_map_offsets
*lmp
= NULL
;
3638 lmo
.r_debug_size
= 8; /* The actual size is 20 bytes, but
3639 this is all we need. */
3640 lmo
.r_map_offset
= 4;
3643 lmo
.link_map_size
= 20;
3645 lmo
.l_addr_offset
= 0;
3646 lmo
.l_addr_size
= 4;
3648 lmo
.l_name_offset
= 4;
3649 lmo
.l_name_size
= 4;
3651 lmo
.l_next_offset
= 12;
3652 lmo
.l_next_size
= 4;
3654 lmo
.l_prev_offset
= 16;
3655 lmo
.l_prev_size
= 4;
3662 cris_fpless_backtrace (char *noargs
, int from_tty
)
3664 /* Points at the instruction after the jsr (except when in innermost frame
3665 where it points at the original pc). */
3668 /* Temporary variable, used for parsing from the start of the function that
3669 the pc is in, up to the pc. */
3670 CORE_ADDR tmp_pc
= 0;
3673 /* Information about current frame. */
3674 struct symtab_and_line sal
;
3677 /* Present instruction. */
3678 unsigned short insn
;
3680 /* Next instruction, lookahead. */
3681 unsigned short insn_next
;
3683 /* This is to store the offset between sp at start of function and until we
3684 reach push srp (if any). */
3685 int sp_add_later
= 0;
3686 int push_srp_found
= 0;
3690 /* Frame counter. */
3693 /* For the innermost frame, we want to look at srp in case it's a leaf
3694 function (since there's no push srp in that case). */
3695 int innermost_frame
= 1;
3697 deprecated_read_register_gen (PC_REGNUM
, (char *) &pc
);
3698 deprecated_read_register_gen (SP_REGNUM
, (char *) &sp
);
3700 /* We make an explicit return when we can't find an outer frame. */
3703 /* Get file name and line number. */
3704 sal
= find_pc_line (pc
, 0);
3706 /* Get function name. */
3707 find_pc_partial_function (pc
, &func_name
, (CORE_ADDR
*) NULL
,
3708 (CORE_ADDR
*) NULL
);
3710 /* Print information about current frame. */
3711 printf_unfiltered ("#%i 0x%08lx in %s", frame
++, pc
, func_name
);
3714 printf_unfiltered (" at %s:%i", sal
.symtab
->filename
, sal
.line
);
3716 printf_unfiltered ("\n");
3718 /* Get the start address of this function. */
3719 tmp_pc
= get_pc_function_start (pc
);
3721 /* Mini parser, only meant to find push sp and sub ...,sp from the start
3722 of the function, up to the pc. */
3725 insn
= read_memory_unsigned_integer (tmp_pc
, sizeof (short));
3726 tmp_pc
+= sizeof (short);
3729 /* push <reg> 32 bit instruction */
3730 insn_next
= read_memory_unsigned_integer (tmp_pc
,
3732 tmp_pc
+= sizeof (short);
3734 /* Recognize srp. */
3735 if (insn_next
== 0xBE7E)
3737 /* For subsequent (not this one though) push or sub which
3738 affects sp, adjust sp immediately. */
3741 /* Note: this will break if we ever encounter a
3742 push vr (1 byte) or push ccr (2 bytes). */
3747 /* Some other register was pushed. */
3758 else if (cris_get_operand2 (insn
) == SP_REGNUM
3759 && cris_get_mode (insn
) == 0x0000
3760 && cris_get_opcode (insn
) == 0x000A)
3763 val
= cris_get_quick_value (insn
);
3771 sp_add_later
+= val
;
3775 else if (cris_get_operand2 (insn
) == SP_REGNUM
3776 /* Autoincrement addressing mode. */
3777 && cris_get_mode (insn
) == 0x0003
3779 && ((insn
) & 0x03E0) >> 5 == 0x0004)
3782 val
= get_data_from_address (&insn
, tmp_pc
);
3790 sp_add_later
+= val
;
3793 else if (cris_get_operand2 (insn
) == SP_REGNUM
3794 && ((insn
& 0x0F00) >> 8) == 0x0001
3795 && (cris_get_signed_offset (insn
) < 0))
3797 /* Immediate byte offset addressing prefix word with sp as base
3798 register. Used for CRIS v8 i.e. ETRAX 100 and newer if <val>
3799 is between 64 and 128.
3800 movem r<regsave>,[sp=sp-<val>] */
3801 val
= -cris_get_signed_offset (insn
);
3802 insn_next
= read_memory_unsigned_integer (tmp_pc
,
3804 tmp_pc
+= sizeof (short);
3806 if (cris_get_mode (insn_next
) == PREFIX_ASSIGN_MODE
3807 && cris_get_opcode (insn_next
) == 0x000F
3808 && cris_get_size (insn_next
) == 0x0003
3809 && cris_get_operand1 (insn_next
) == SP_REGNUM
)
3817 sp_add_later
+= val
;
3828 /* sp should now point at where srp is stored on the stack. Update
3829 the pc to the srp. */
3830 pc
= read_memory_unsigned_integer (sp
, 4);
3832 else if (innermost_frame
)
3834 /* We couldn't find a push srp in the prologue, so this must be
3835 a leaf function, and thus we use the srp register directly.
3836 This should happen at most once, for the innermost function. */
3837 deprecated_read_register_gen (SRP_REGNUM
, (char *) &pc
);
3841 /* Couldn't find an outer frame. */
3845 /* Reset flag. (In case the innermost frame wasn't a leaf, we don't
3846 want to look at the srp register later either). */
3847 innermost_frame
= 0;
3849 /* Now, add the offset for everything up to, and including push srp,
3850 that was held back during the prologue parsing. */
3857 _initialize_cris_tdep (void)
3859 struct cmd_list_element
*c
;
3861 gdbarch_register (bfd_arch_cris
, cris_gdbarch_init
, cris_dump_tdep
);
3863 /* Used in disassembly. */
3864 tm_print_insn
= cris_delayed_get_disassembler
;
3866 /* CRIS-specific user-commands. */
3867 c
= add_set_cmd ("cris-version", class_support
, var_integer
,
3868 (char *) &usr_cmd_cris_version
,
3869 "Set the current CRIS version.", &setlist
);
3870 set_cmd_sfunc (c
, cris_version_update
);
3871 add_show_from_set (c
, &showlist
);
3873 c
= add_set_enum_cmd ("cris-mode", class_support
, cris_mode_enums
,
3875 "Set the current CRIS mode.", &setlist
);
3876 set_cmd_sfunc (c
, cris_mode_update
);
3877 add_show_from_set (c
, &showlist
);
3879 c
= add_set_enum_cmd ("cris-abi", class_support
, cris_abi_enums
,
3881 "Set the current CRIS ABI version.", &setlist
);
3882 set_cmd_sfunc (c
, cris_abi_update
);
3883 add_show_from_set (c
, &showlist
);
3885 c
= add_cmd ("cris-fpless-backtrace", class_support
, cris_fpless_backtrace
,
3886 "Display call chain using the subroutine return pointer.\n"
3887 "Note that this displays the address after the jump to the "
3888 "subroutine.", &cmdlist
);
3890 add_core_fns (&cris_elf_core_fns
);
3894 /* Prints out all target specific values. */
3897 cris_dump_tdep (struct gdbarch
*gdbarch
, struct ui_file
*file
)
3899 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3902 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_version = %i\n",
3903 tdep
->cris_version
);
3904 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_mode = %s\n",
3906 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_abi = %s\n",
3913 cris_version_update (char *ignore_args
, int from_tty
,
3914 struct cmd_list_element
*c
)
3916 struct gdbarch_info info
;
3918 /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones
3919 the set command passed as a parameter. The clone operation will
3920 include (BUG?) any ``set'' command callback, if present.
3921 Commands like ``info set'' call all the ``show'' command
3922 callbacks. Unfortunatly, for ``show'' commands cloned from
3923 ``set'', this includes callbacks belonging to ``set'' commands.
3924 Making this worse, this only occures if add_show_from_set() is
3925 called after add_cmd_sfunc() (BUG?). */
3927 /* From here on, trust the user's CRIS version setting. */
3928 if (cmd_type (c
) == set_cmd
)
3930 usr_cmd_cris_version_valid
= 1;
3932 /* Update the current architecture, if needed. */
3933 gdbarch_info_init (&info
);
3934 if (!gdbarch_update_p (info
))
3935 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
3940 cris_mode_update (char *ignore_args
, int from_tty
,
3941 struct cmd_list_element
*c
)
3943 struct gdbarch_info info
;
3945 /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones
3946 the set command passed as a parameter. The clone operation will
3947 include (BUG?) any ``set'' command callback, if present.
3948 Commands like ``info set'' call all the ``show'' command
3949 callbacks. Unfortunatly, for ``show'' commands cloned from
3950 ``set'', this includes callbacks belonging to ``set'' commands.
3951 Making this worse, this only occures if add_show_from_set() is
3952 called after add_cmd_sfunc() (BUG?). */
3954 /* From here on, trust the user's CRIS mode setting. */
3955 if (cmd_type (c
) == set_cmd
)
3957 usr_cmd_cris_mode_valid
= 1;
3959 /* Update the current architecture, if needed. */
3960 gdbarch_info_init (&info
);
3961 if (!gdbarch_update_p (info
))
3962 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
3967 cris_abi_update (char *ignore_args
, int from_tty
,
3968 struct cmd_list_element
*c
)
3970 struct gdbarch_info info
;
3972 /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones
3973 the set command passed as a parameter. The clone operation will
3974 include (BUG?) any ``set'' command callback, if present.
3975 Commands like ``info set'' call all the ``show'' command
3976 callbacks. Unfortunatly, for ``show'' commands cloned from
3977 ``set'', this includes callbacks belonging to ``set'' commands.
3978 Making this worse, this only occures if add_show_from_set() is
3979 called after add_cmd_sfunc() (BUG?). */
3981 /* From here on, trust the user's CRIS ABI setting. */
3982 if (cmd_type (c
) == set_cmd
)
3984 usr_cmd_cris_abi_valid
= 1;
3986 /* Update the current architecture, if needed. */
3987 gdbarch_info_init (&info
);
3988 if (!gdbarch_update_p (info
))
3989 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
3993 /* Copied from pa64solib.c, with a couple of minor changes. */
3996 bfd_lookup_symbol (bfd
*abfd
, const char *symname
)
3998 unsigned int storage_needed
;
4000 asymbol
**symbol_table
;
4001 unsigned int number_of_symbols
;
4003 struct cleanup
*back_to
;
4004 CORE_ADDR symaddr
= 0;
4006 storage_needed
= bfd_get_symtab_upper_bound (abfd
);
4008 if (storage_needed
> 0)
4010 symbol_table
= (asymbol
**) xmalloc (storage_needed
);
4011 back_to
= make_cleanup (free
, symbol_table
);
4012 number_of_symbols
= bfd_canonicalize_symtab (abfd
, symbol_table
);
4014 for (i
= 0; i
< number_of_symbols
; i
++)
4016 sym
= *symbol_table
++;
4017 if (!strcmp (sym
->name
, symname
))
4019 /* Bfd symbols are section relative. */
4020 symaddr
= sym
->value
+ sym
->section
->vma
;
4024 do_cleanups (back_to
);
4029 static struct gdbarch
*
4030 cris_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
4032 struct gdbarch
*gdbarch
;
4033 struct gdbarch_tdep
*tdep
;
4035 const char *cris_mode
;
4036 const char *cris_abi
;
4037 CORE_ADDR cris_abi_sym
= 0;
4040 if (usr_cmd_cris_version_valid
)
4042 /* Trust the user's CRIS version setting. */
4043 cris_version
= usr_cmd_cris_version
;
4047 /* Assume it's CRIS version 10. */
4051 if (usr_cmd_cris_mode_valid
)
4053 /* Trust the user's CRIS mode setting. */
4054 cris_mode
= usr_cmd_cris_mode
;
4056 else if (cris_version
== 10)
4058 /* Assume CRIS version 10 is in user mode. */
4059 cris_mode
= CRIS_MODE_USER
;
4063 /* Strictly speaking, older CRIS version don't have a supervisor mode,
4064 but we regard its only mode as supervisor mode. */
4065 cris_mode
= CRIS_MODE_SUPERVISOR
;
4068 if (usr_cmd_cris_abi_valid
)
4070 /* Trust the user's ABI setting. */
4071 cris_abi
= usr_cmd_cris_abi
;
4075 if (bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
4077 /* An elf target uses the new ABI. */
4078 cris_abi
= CRIS_ABI_V2
;
4080 else if (bfd_get_flavour (info
.abfd
) == bfd_target_aout_flavour
)
4082 /* An a.out target may use either ABI. Look for hints in the
4084 cris_abi_sym
= bfd_lookup_symbol (info
.abfd
, CRIS_ABI_SYMBOL
);
4085 cris_abi
= cris_abi_sym
? CRIS_ABI_V2
: CRIS_ABI_ORIGINAL
;
4089 /* Unknown bfd flavour. Assume it's the new ABI. */
4090 cris_abi
= CRIS_ABI_V2
;
4093 else if (arches
!= NULL
)
4095 /* No bfd available. Stick with the ABI from the most recently
4096 selected architecture of this same family (the head of arches
4097 always points to this). (This is to avoid changing the ABI
4098 when the user updates the architecture with the 'set
4099 cris-version' command.) */
4100 cris_abi
= gdbarch_tdep (arches
->gdbarch
)->cris_abi
;
4104 /* No bfd, and no previously selected architecture available.
4105 Assume it's the new ABI. */
4106 cris_abi
= CRIS_ABI_V2
;
4109 /* Make the current settings visible to the user. */
4110 usr_cmd_cris_version
= cris_version
;
4111 usr_cmd_cris_mode
= cris_mode
;
4112 usr_cmd_cris_abi
= cris_abi
;
4114 /* Find a candidate among the list of pre-declared architectures. Both
4115 CRIS version and ABI must match. */
4116 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
4118 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
4120 if ((gdbarch_tdep (arches
->gdbarch
)->cris_version
== cris_version
)
4121 && (gdbarch_tdep (arches
->gdbarch
)->cris_mode
== cris_mode
)
4122 && (gdbarch_tdep (arches
->gdbarch
)->cris_abi
== cris_abi
))
4123 return arches
->gdbarch
;
4126 /* No matching architecture was found. Create a new one. */
4127 tdep
= (struct gdbarch_tdep
*) xmalloc (sizeof (struct gdbarch_tdep
));
4128 gdbarch
= gdbarch_alloc (&info
, tdep
);
4130 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
4131 ready to unwind the PC first (see frame.c:get_prev_frame()). */
4132 set_gdbarch_deprecated_init_frame_pc (gdbarch
, init_frame_pc_default
);
4134 tdep
->cris_version
= cris_version
;
4135 tdep
->cris_mode
= cris_mode
;
4136 tdep
->cris_abi
= cris_abi
;
4138 /* INIT shall ensure that the INFO.BYTE_ORDER is non-zero. */
4139 switch (info
.byte_order
)
4141 case BFD_ENDIAN_LITTLE
:
4145 case BFD_ENDIAN_BIG
:
4146 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: big endian byte order in info");
4150 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown byte order in info");
4153 /* Initialize the ABI dependent things. */
4154 if (tdep
->cris_abi
== CRIS_ABI_ORIGINAL
)
4156 set_gdbarch_double_bit (gdbarch
, 32);
4157 set_gdbarch_deprecated_push_arguments (gdbarch
, cris_abi_original_push_arguments
);
4158 set_gdbarch_deprecated_store_return_value (gdbarch
,
4159 cris_abi_original_store_return_value
);
4160 set_gdbarch_deprecated_extract_return_value
4161 (gdbarch
, cris_abi_original_extract_return_value
);
4162 set_gdbarch_reg_struct_has_addr
4163 (gdbarch
, cris_abi_original_reg_struct_has_addr
);
4165 else if (tdep
->cris_abi
== CRIS_ABI_V2
)
4167 set_gdbarch_double_bit (gdbarch
, 64);
4168 set_gdbarch_deprecated_push_arguments (gdbarch
, cris_abi_v2_push_arguments
);
4169 set_gdbarch_deprecated_store_return_value (gdbarch
, cris_abi_v2_store_return_value
);
4170 set_gdbarch_deprecated_extract_return_value
4171 (gdbarch
, cris_abi_v2_extract_return_value
);
4172 set_gdbarch_reg_struct_has_addr (gdbarch
,
4173 cris_abi_v2_reg_struct_has_addr
);
4176 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown CRIS ABI");
4178 /* The default definition of a long double is 2 * TARGET_DOUBLE_BIT,
4179 which means we have to set this explicitly. */
4180 set_gdbarch_long_double_bit (gdbarch
, 64);
4182 /* There are 32 registers (some of which may not be implemented). */
4183 set_gdbarch_num_regs (gdbarch
, 32);
4184 set_gdbarch_sp_regnum (gdbarch
, 14);
4185 set_gdbarch_fp_regnum (gdbarch
, 8);
4186 set_gdbarch_pc_regnum (gdbarch
, 15);
4188 set_gdbarch_register_name (gdbarch
, cris_register_name
);
4190 /* Length of ordinary registers used in push_word and a few other places.
4191 REGISTER_RAW_SIZE is the real way to know how big a register is. */
4192 set_gdbarch_register_size (gdbarch
, 4);
4195 set_gdbarch_register_bytes_ok (gdbarch
, cris_register_bytes_ok
);
4196 set_gdbarch_software_single_step (gdbarch
, cris_software_single_step
);
4199 set_gdbarch_cannot_store_register (gdbarch
, cris_cannot_store_register
);
4200 set_gdbarch_cannot_fetch_register (gdbarch
, cris_cannot_fetch_register
);
4203 /* The total amount of space needed to store (in an array called registers)
4204 GDB's copy of the machine's register state. Note: We can not use
4205 cris_register_size at this point, since it relies on current_gdbarch
4207 switch (tdep
->cris_version
)
4213 /* Support for these may be added later. */
4214 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unsupported CRIS version");
4219 /* CRIS v8 and v9, a.k.a. ETRAX 100. General registers R0 - R15
4220 (32 bits), special registers P0 - P1 (8 bits), P4 - P5 (16 bits),
4221 and P8 - P14 (32 bits). */
4222 register_bytes
= (16 * 4) + (2 * 1) + (2 * 2) + (7 * 4);
4227 /* CRIS v10 and v11, a.k.a. ETRAX 100LX. In addition to ETRAX 100,
4228 P7 (32 bits), and P15 (32 bits) have been implemented. */
4229 register_bytes
= (16 * 4) + (2 * 1) + (2 * 2) + (9 * 4);
4233 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown CRIS version");
4236 set_gdbarch_register_bytes (gdbarch
, register_bytes
);
4238 /* Returns the register offset for the first byte of register regno's space
4239 in the saved register state. */
4240 set_gdbarch_register_byte (gdbarch
, cris_register_offset
);
4242 /* The length of the registers in the actual machine representation. */
4243 set_gdbarch_register_raw_size (gdbarch
, cris_register_size
);
4245 /* The largest value REGISTER_RAW_SIZE can have. */
4246 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, 32);
4248 /* The length of the registers in the program's representation. */
4249 set_gdbarch_register_virtual_size (gdbarch
, cris_register_size
);
4251 /* The largest value REGISTER_VIRTUAL_SIZE can have. */
4252 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, 32);
4254 set_gdbarch_register_virtual_type (gdbarch
, cris_register_virtual_type
);
4256 /* Use generic dummy frames. */
4258 /* Read all about dummy frames in blockframe.c. */
4259 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_at_entry_point
);
4261 /* Defined to 1 to indicate that the target supports inferior function
4263 set_gdbarch_call_dummy_words (gdbarch
, 0);
4264 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
4266 set_gdbarch_deprecated_get_saved_register (gdbarch
, deprecated_generic_get_saved_register
);
4268 /* No register requires conversion from raw format to virtual format. */
4269 set_gdbarch_register_convertible (gdbarch
, generic_register_convertible_not
);
4271 set_gdbarch_deprecated_push_return_address (gdbarch
, cris_push_return_address
);
4272 set_gdbarch_deprecated_pop_frame (gdbarch
, cris_pop_frame
);
4274 set_gdbarch_deprecated_store_struct_return (gdbarch
, cris_store_struct_return
);
4275 set_gdbarch_deprecated_extract_struct_value_address
4276 (gdbarch
, cris_extract_struct_value_address
);
4277 set_gdbarch_use_struct_convention (gdbarch
, cris_use_struct_convention
);
4279 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, cris_frame_init_saved_regs
);
4280 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, cris_init_extra_frame_info
);
4281 set_gdbarch_skip_prologue (gdbarch
, cris_skip_prologue
);
4282 set_gdbarch_prologue_frameless_p (gdbarch
, generic_prologue_frameless_p
);
4284 /* The stack grows downward. */
4285 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
4287 set_gdbarch_breakpoint_from_pc (gdbarch
, cris_breakpoint_from_pc
);
4289 /* The PC must not be decremented after a breakpoint. (The breakpoint
4290 handler takes care of that.) */
4291 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
4293 /* Offset from address of function to start of its code. */
4294 set_gdbarch_function_start_offset (gdbarch
, 0);
4296 /* The number of bytes at the start of arglist that are not really args,
4297 0 in the CRIS ABI. */
4298 set_gdbarch_frame_args_skip (gdbarch
, 0);
4299 set_gdbarch_frameless_function_invocation
4300 (gdbarch
, cris_frameless_function_invocation
);
4301 set_gdbarch_deprecated_frame_chain (gdbarch
, cris_frame_chain
);
4303 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, cris_frame_saved_pc
);
4304 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, cris_saved_pc_after_call
);
4306 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
4308 /* Helpful for backtracing and returning in a call dummy. */
4309 set_gdbarch_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
4311 /* Should be using push_dummy_call. */
4312 set_gdbarch_deprecated_dummy_write_sp (gdbarch
, generic_target_write_sp
);
4314 /* Use target_specific function to define link map offsets. */
4315 set_solib_svr4_fetch_link_map_offsets
4316 (gdbarch
, cris_linux_svr4_fetch_link_map_offsets
);