gdb/d10v-tdep.c

   1 /* Target-dependent code for MItsubishi D10V, for GDB.
   2    Copyright (C) 1996 Free Software Foundation, Inc.
   3 This file is part of GDB.
   4 This program is free software; you can redistribute it and/or modify
   5 it under the terms of the GNU General Public License as published by
   6 the Free Software Foundation; either version 2 of the License, or
   7 (at your option) any later version.
   8 This program is distributed in the hope that it will be useful,
   9 but WITHOUT ANY WARRANTY; without even the implied warranty of
  10 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11 GNU General Public License for more details.
  12 You should have received a copy of the GNU General Public License
  13 along with this program; if not, write to the Free Software
  14 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  15
  16 /*  Contributed by Martin Hunt, hunt@cygnus.com */
  17
  18 #include "defs.h"
  19 #include "frame.h"
  20 #include "obstack.h"
  21 #include "symtab.h"
  22 #include "gdbtypes.h"
  23 #include "gdbcmd.h"
  24 #include "gdbcore.h"
  25 #include "gdb_string.h"
  26 #include "value.h"
  27 #include "inferior.h"
  28 #include "dis-asm.h"
  29 #include "symfile.h"
  30 #include "objfiles.h"
  31
  32 void d10v_frame_find_saved_regs PARAMS ((struct frame_info *fi, struct frame_saved_regs *fsr));
  33 static void d10v_pop_dummy_frame PARAMS ((struct frame_info *fi));
  34
  35 /* Discard from the stack the innermost frame,
  36    restoring all saved registers.  */
  37
  38 void
  39 d10v_pop_frame ()
  40 {
  41   struct frame_info *frame = get_current_frame ();
  42   CORE_ADDR fp;
  43   int regnum;
  44   struct frame_saved_regs fsr;
  45   char raw_buffer[8];
  46
  47   fp = FRAME_FP (frame);
  48   if (frame->dummy)
  49     {
  50       d10v_pop_dummy_frame(frame);
  51       return;
  52     }
  53
  54   /* fill out fsr with the address of where each */
  55   /* register was stored in the frame */
  56   get_frame_saved_regs (frame, &fsr);
  57
  58   /* now update the current registers with the old values */
  59   for (regnum = A0_REGNUM; regnum < A0_REGNUM+2 ; regnum++)
  60     {
  61       if (fsr.regs[regnum])
  62         {
  63           read_memory (fsr.regs[regnum], raw_buffer, 8);
  64           write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 8);
  65         }
  66     }
  67   for (regnum = 0; regnum < SP_REGNUM; regnum++)
  68     {
  69       if (fsr.regs[regnum])
  70         {
  71           write_register (regnum, read_memory_unsigned_integer (fsr.regs[regnum], 2));
  72         }
  73     }
  74   if (fsr.regs[PSW_REGNUM])
  75     {
  76       write_register (PSW_REGNUM, read_memory_unsigned_integer (fsr.regs[PSW_REGNUM], 2));
  77     }
  78
  79   write_register (PC_REGNUM, read_register(13));
  80   write_register (SP_REGNUM, fp + frame->size);
  81   target_store_registers (-1);
  82   flush_cached_frames ();
  83 }
  84
  85 static int
  86 check_prologue (op)
  87      unsigned short op;
  88 {
  89   /* st  rn, @-sp */
  90   if ((op & 0x7E1F) == 0x6C1F)
  91     return 1;
  92
  93   /* st2w  rn, @-sp */
  94   if ((op & 0x7E3F) == 0x6E1F)
  95     return 1;
  96
  97   /* subi  sp, n */
  98   if ((op & 0x7FE1) == 0x01E1)
  99     return 1;
 100
 101   /* mv  r11, sp */
 102   if (op == 0x417E)
 103     return 1;
 104
 105   /* nop */
 106   if (op == 0x5E00)
 107     return 1;
 108
 109   /* st  rn, @sp */
 110   if ((op & 0x7E1F) == 0x681E)
 111     return 1;
 112
 113   /* st2w  rn, @sp */
 114  if ((op & 0x7E3F) == 0x3A1E)
 115    return 1;
 116
 117   return 0;
 118 }
 119
 120 CORE_ADDR
 121 d10v_skip_prologue (pc)
 122      CORE_ADDR pc;
 123 {
 124   unsigned long op;
 125   unsigned short op1, op2;
 126   CORE_ADDR func_addr, func_end;
 127   struct symtab_and_line sal;
 128
 129   /* If we have line debugging information, then the end of the */
 130   /* prologue should the first assembly instruction of  the first source line */
 131   if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
 132     {
 133       sal = find_pc_line (func_addr, 0);
 134       if (sal.end < func_end)
 135         return sal.end;
 136     }
 137
 138   if (target_read_memory (pc, (char *)&op, 4))
 139     return pc;                  /* Can't access it -- assume no prologue. */
 140
 141   while (1)
 142     {
 143       op = (unsigned long)read_memory_integer (pc, 4);
 144       if ((op & 0xC0000000) == 0xC0000000)
 145         {
 146           /* long instruction */
 147           if ( ((op & 0x3FFF0000) != 0x01FF0000) &&   /* add3 sp,sp,n */
 148                ((op & 0x3F0F0000) != 0x340F0000) &&   /* st  rn, @(offset,sp) */
 149                ((op & 0x3F1F0000) != 0x350F0000))     /* st2w  rn, @(offset,sp) */
 150             break;
 151         }
 152       else
 153         {
 154           /* short instructions */
 155           if ((op & 0xC0000000) == 0x80000000)
 156             {
 157               op2 = (op & 0x3FFF8000) >> 15;
 158               op1 = op & 0x7FFF;
 159             }
 160           else
 161             {
 162               op1 = (op & 0x3FFF8000) >> 15;
 163               op2 = op & 0x7FFF;
 164             }
 165           if (check_prologue(op1))
 166             {
 167               if (!check_prologue(op2))
 168                 {
 169                   /* if the previous opcode was really part of the prologue */
 170                   /* and not just a NOP, then we want to break after both instructions */
 171                   if (op1 != 0x5E00)
 172                     pc += 4;
 173                   break;
 174                 }
 175             }
 176           else
 177             break;
 178         }
 179       pc += 4;
 180     }
 181   return pc;
 182 }
 183
 184 /* Given a GDB frame, determine the address of the calling function's frame.
 185    This will be used to create a new GDB frame struct, and then
 186    INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
 187 */
 188
 189 CORE_ADDR
 190 d10v_frame_chain (frame)
 191      struct frame_info *frame;
 192 {
 193   struct frame_saved_regs fsr;
 194
 195   d10v_frame_find_saved_regs (frame, &fsr);
 196
 197   if (frame->return_pc == IMEM_START)
 198     return (CORE_ADDR)0;
 199
 200   if (!fsr.regs[FP_REGNUM])
 201     {
 202       if (!fsr.regs[SP_REGNUM] || fsr.regs[SP_REGNUM] == STACK_START)
 203         return (CORE_ADDR)0;
 204
 205       return fsr.regs[SP_REGNUM];
 206     }
 207
 208   if (!read_memory_unsigned_integer(fsr.regs[FP_REGNUM],2))
 209     return (CORE_ADDR)0;
 210
 211   return read_memory_unsigned_integer(fsr.regs[FP_REGNUM],2)| DMEM_START;
 212 }
 213
 214 static int next_addr, uses_frame;
 215
 216 static int
 217 prologue_find_regs (op, fsr, addr)
 218      unsigned short op;
 219      struct frame_saved_regs *fsr;
 220      CORE_ADDR addr;
 221 {
 222   int n;
 223
 224   /* st  rn, @-sp */
 225   if ((op & 0x7E1F) == 0x6C1F)
 226     {
 227       n = (op & 0x1E0) >> 5;
 228       next_addr -= 2;
 229       fsr->regs[n] = next_addr;
 230       return 1;
 231     }
 232
 233   /* st2w  rn, @-sp */
 234   else if ((op & 0x7E3F) == 0x6E1F)
 235     {
 236       n = (op & 0x1E0) >> 5;
 237       next_addr -= 4;
 238       fsr->regs[n] = next_addr;
 239       fsr->regs[n+1] = next_addr+2;
 240       return 1;
 241     }
 242
 243   /* subi  sp, n */
 244   if ((op & 0x7FE1) == 0x01E1)
 245     {
 246       n = (op & 0x1E) >> 1;
 247       if (n == 0)
 248         n = 16;
 249       next_addr -= n;
 250       return 1;
 251     }
 252
 253   /* mv  r11, sp */
 254   if (op == 0x417E)
 255     {
 256       uses_frame = 1;
 257       return 1;
 258     }
 259
 260   /* nop */
 261   if (op == 0x5E00)
 262     return 1;
 263
 264   /* st  rn, @sp */
 265   if ((op & 0x7E1F) == 0x681E)
 266     {
 267       n = (op & 0x1E0) >> 5;
 268       fsr->regs[n] = next_addr;
 269       return 1;
 270     }
 271
 272   /* st2w  rn, @sp */
 273   if ((op & 0x7E3F) == 0x3A1E)
 274     {
 275       n = (op & 0x1E0) >> 5;
 276       fsr->regs[n] = next_addr;
 277       fsr->regs[n+1] = next_addr+2;
 278       return 1;
 279     }
 280
 281   return 0;
 282 }
 283
 284 /* Put here the code to store, into a struct frame_saved_regs, the
 285    addresses of the saved registers of frame described by FRAME_INFO.
 286    This includes special registers such as pc and fp saved in special
 287    ways in the stack frame.  sp is even more special: the address we
 288    return for it IS the sp for the next frame. */
 289 void
 290 d10v_frame_find_saved_regs (fi, fsr)
 291      struct frame_info *fi;
 292      struct frame_saved_regs *fsr;
 293 {
 294   CORE_ADDR fp, pc;
 295   unsigned long op;
 296   unsigned short op1, op2;
 297   int i;
 298
 299   fp = fi->frame;
 300   memset (fsr, 0, sizeof (*fsr));
 301   next_addr = 0;
 302
 303   pc = get_pc_function_start (fi->pc);
 304
 305   uses_frame = 0;
 306   while (1)
 307     {
 308       op = (unsigned long)read_memory_integer (pc, 4);
 309       if ((op & 0xC0000000) == 0xC0000000)
 310         {
 311           /* long instruction */
 312           if ((op & 0x3FFF0000) == 0x01FF0000)
 313             {
 314               /* add3 sp,sp,n */
 315               short n = op & 0xFFFF;
 316               next_addr += n;
 317             }
 318           else if ((op & 0x3F0F0000) == 0x340F0000)
 319             {
 320               /* st  rn, @(offset,sp) */
 321               short offset = op & 0xFFFF;
 322               short n = (op >> 20) & 0xF;
 323               fsr->regs[n] = next_addr + offset;
 324             }
 325           else if ((op & 0x3F1F0000) == 0x350F0000)
 326             {
 327               /* st2w  rn, @(offset,sp) */
 328               short offset = op & 0xFFFF;
 329               short n = (op >> 20) & 0xF;
 330               fsr->regs[n] = next_addr + offset;
 331               fsr->regs[n+1] = next_addr + offset + 2;
 332             }
 333           else
 334             break;
 335         }
 336       else
 337         {
 338           /* short instructions */
 339           if ((op & 0xC0000000) == 0x80000000)
 340             {
 341               op2 = (op & 0x3FFF8000) >> 15;
 342               op1 = op & 0x7FFF;
 343             }
 344           else
 345             {
 346               op1 = (op & 0x3FFF8000) >> 15;
 347               op2 = op & 0x7FFF;
 348             }
 349           if (!prologue_find_regs(op1,fsr,pc) || !prologue_find_regs(op2,fsr,pc))
 350             break;
 351         }
 352       pc += 4;
 353     }
 354
 355   fi->size = -next_addr;
 356
 357   if (!(fp & 0xffff))
 358     fp = read_register(SP_REGNUM) | DMEM_START;
 359
 360   for (i=0; i<NUM_REGS-1; i++)
 361     if (fsr->regs[i])
 362       {
 363         fsr->regs[i] = fp - (next_addr - fsr->regs[i]);
 364       }
 365
 366   if (fsr->regs[LR_REGNUM])
 367     fi->return_pc = ((read_memory_unsigned_integer(fsr->regs[LR_REGNUM],2) - 1) << 2) | IMEM_START;
 368   else
 369     fi->return_pc = ((read_register(LR_REGNUM) - 1) << 2) | IMEM_START;
 370
 371   /* th SP is not normally (ever?) saved, but check anyway */
 372   if (!fsr->regs[SP_REGNUM])
 373     {
 374       /* if the FP was saved, that means the current FP is valid, */
 375       /* otherwise, it isn't being used, so we use the SP instead */
 376       if (uses_frame)
 377         fsr->regs[SP_REGNUM] = read_register(FP_REGNUM) + fi->size;
 378       else
 379         {
 380           fsr->regs[SP_REGNUM] = fp + fi->size;
 381           fi->frameless = 1;
 382           fsr->regs[FP_REGNUM] = 0;
 383         }
 384     }
 385 }
 386
 387 void
 388 d10v_init_extra_frame_info (fromleaf, fi)
 389      int fromleaf;
 390      struct frame_info *fi;
 391 {
 392   struct frame_saved_regs dummy;
 393
 394   if (fi->next && ((fi->pc & 0xffff) == 0))
 395     fi->pc = fi->next->return_pc;
 396
 397   d10v_frame_find_saved_regs (fi, &dummy);
 398 }
 399
 400 static void
 401 show_regs (args, from_tty)
 402      char *args;
 403      int from_tty;
 404 {
 405   long long num1, num2;
 406   printf_filtered ("PC=%04x (0x%x) PSW=%04x RPT_S=%04x RPT_E=%04x RPT_C=%04x\n",
 407                    read_register (PC_REGNUM), (read_register (PC_REGNUM) << 2) + IMEM_START,
 408                    read_register (PSW_REGNUM),
 409                    read_register (24),
 410                    read_register (25),
 411                    read_register (23));
 412   printf_filtered ("R0-R7  %04x %04x %04x %04x %04x %04x %04x %04x\n",
 413                    read_register (0),
 414                    read_register (1),
 415                    read_register (2),
 416                    read_register (3),
 417                    read_register (4),
 418                    read_register (5),
 419                    read_register (6),
 420                    read_register (7));
 421   printf_filtered ("R8-R15 %04x %04x %04x %04x %04x %04x %04x %04x\n",
 422                    read_register (8),
 423                    read_register (9),
 424                    read_register (10),
 425                    read_register (11),
 426                    read_register (12),
 427                    read_register (13),
 428                    read_register (14),
 429                    read_register (15));
 430   printf_filtered ("IMAP0 %04x    IMAP1 %04x    DMAP %04x\n",
 431                    read_register (IMAP0_REGNUM),
 432                    read_register (IMAP1_REGNUM),
 433                    read_register (DMAP_REGNUM));
 434   read_register_gen (A0_REGNUM, (char *)&num1);
 435   read_register_gen (A0_REGNUM+1, (char *)&num2);
 436   printf_filtered ("A0-A1  %010llx %010llx\n",num1, num2);
 437 }
 438
 439 void
 440 _initialize_d10v_tdep ()
 441 {
 442   tm_print_insn = print_insn_d10v;
 443   add_com ("regs", class_vars, show_regs, "Print all registers");
 444 }
 445
 446 static CORE_ADDR
 447 d10v_xlate_addr (addr)
 448      int addr;
 449 {
 450   int imap;
 451
 452   if (addr < 0x20000)
 453     imap = (int)read_register(IMAP0_REGNUM);
 454   else
 455     imap = (int)read_register(IMAP1_REGNUM);
 456
 457   if (imap & 0x1000)
 458     return (CORE_ADDR)(addr + 0x1000000);
 459   return (CORE_ADDR)(addr + (imap & 0xff)*0x20000);
 460 }
 461
 462
 463 CORE_ADDR
 464 d10v_read_pc (pid)
 465      int pid;
 466 {
 467   int save_pid, retval;
 468
 469   save_pid = inferior_pid;
 470   inferior_pid = pid;
 471   retval = (int)read_register (PC_REGNUM);
 472   inferior_pid = save_pid;
 473   return d10v_xlate_addr(retval << 2);
 474 }
 475
 476 void
 477 d10v_write_pc (val, pid)
 478      CORE_ADDR val;
 479      int pid;
 480 {
 481   int save_pid;
 482
 483   save_pid = inferior_pid;
 484   inferior_pid = pid;
 485   write_register (PC_REGNUM, (val & 0x3ffff) >> 2);
 486   inferior_pid = save_pid;
 487 }
 488
 489 CORE_ADDR
 490 d10v_read_sp ()
 491 {
 492   return (read_register(SP_REGNUM) | DMEM_START);
 493 }
 494
 495 void
 496 d10v_write_sp (val)
 497      CORE_ADDR val;
 498 {
 499   write_register (SP_REGNUM, (LONGEST)(val & 0xffff));
 500 }
 501
 502 CORE_ADDR
 503 d10v_fix_call_dummy (dummyname, start_sp, fun, nargs, args, type, gcc_p)
 504      char *dummyname;
 505      CORE_ADDR start_sp;
 506      CORE_ADDR fun;
 507      int nargs;
 508      value_ptr *args;
 509      struct type *type;
 510      int gcc_p;
 511 {
 512   int regnum;
 513   CORE_ADDR sp;
 514   char buffer[MAX_REGISTER_RAW_SIZE];
 515   struct frame_info *frame = get_current_frame ();
 516   frame->dummy = start_sp;
 517   start_sp |= DMEM_START;
 518
 519   sp = start_sp;
 520   for (regnum = 0; regnum < NUM_REGS; regnum++)
 521     {
 522       sp -= REGISTER_RAW_SIZE(regnum);
 523       store_address (buffer, REGISTER_RAW_SIZE(regnum), read_register(regnum));
 524       write_memory (sp, buffer, REGISTER_RAW_SIZE(regnum));
 525     }
 526   write_register (SP_REGNUM, (LONGEST)(sp & 0xffff));
 527   /* now we need to load LR with the return address */
 528   write_register (LR_REGNUM, (LONGEST)(d10v_call_dummy_address() & 0xffff) >> 2);
 529   return sp;
 530 }
 531
 532 static void
 533 d10v_pop_dummy_frame (fi)
 534      struct frame_info *fi;
 535 {
 536   CORE_ADDR sp = fi->dummy;
 537   int regnum;
 538
 539   for (regnum = 0; regnum < NUM_REGS; regnum++)
 540     {
 541       sp -= REGISTER_RAW_SIZE(regnum);
 542       write_register(regnum, read_memory_unsigned_integer (sp, REGISTER_RAW_SIZE(regnum)));
 543     }
 544   flush_cached_frames (); /* needed? */
 545 }
 546
 547
 548 CORE_ADDR
 549 d10v_push_arguments (nargs, args, sp, struct_return, struct_addr)
 550      int nargs;
 551      value_ptr *args;
 552      CORE_ADDR sp;
 553      int struct_return;
 554      CORE_ADDR struct_addr;
 555 {
 556   int i, len, index=0, regnum=2;
 557   char buffer[4], *contents;
 558   LONGEST val;
 559   CORE_ADDR ptrs[10];
 560
 561   /* Pass 1. Put all large args on stack */
 562   for (i = 0; i < nargs; i++)
 563     {
 564       value_ptr arg = args[i];
 565       struct type *arg_type = check_typedef (VALUE_TYPE (arg));
 566       len = TYPE_LENGTH (arg_type);
 567       contents = VALUE_CONTENTS(arg);
 568       val = extract_signed_integer (contents, len);
 569       if (len > 4)
 570         {
 571           /* put on stack and pass pointers */
 572           sp -= len;
 573           write_memory (sp, contents, len);
 574           ptrs[index++] = sp;
 575         }
 576     }
 577
 578   index = 0;
 579
 580   for (i = 0; i < nargs; i++)
 581     {
 582       value_ptr arg = args[i];
 583       struct type *arg_type = check_typedef (VALUE_TYPE (arg));
 584       len = TYPE_LENGTH (arg_type);
 585       contents = VALUE_CONTENTS(arg);
 586       val = extract_signed_integer (contents, len);
 587       if (len > 4)
 588         {
 589           /* use a pointer to previously saved data */
 590           if (regnum < 6)
 591             write_register (regnum++, ptrs[index++]);
 592           else
 593             {
 594               /* no more registers available.  put it on the stack */
 595               sp -= 2;
 596               store_address (buffer, 2, ptrs[index++]);
 597               write_memory (sp, buffer, 2);
 598             }
 599         }
 600       else
 601         {
 602           if (regnum < 6 )
 603             {
 604               if (len == 4)
 605                 write_register (regnum++, val>>16);
 606               write_register (regnum++, val & 0xffff);
 607             }
 608           else
 609             {
 610               sp -= len;
 611               store_address (buffer, len, val);
 612               write_memory (sp, buffer, len);
 613             }
 614         }
 615     }
 616   return sp;
 617 }
 618
 619
 620 /* pick an out-of-the-way place to set the return value */
 621 /* for an inferior function call.  The link register is set to this  */
 622 /* value and a momentary breakpoint is set there.  When the breakpoint */
 623 /* is hit, the dummy frame is popped and the previous environment is */
 624 /* restored. */
 625
 626 CORE_ADDR
 627 d10v_call_dummy_address ()
 628 {
 629   CORE_ADDR entry;
 630   struct minimal_symbol *sym;
 631
 632   entry = entry_point_address ();
 633
 634   if (entry != 0)
 635     return entry;
 636
 637   sym = lookup_minimal_symbol ("_start", NULL, symfile_objfile);
 638
 639   if (!sym || MSYMBOL_TYPE (sym) != mst_text)
 640     return 0;
 641   else
 642     return SYMBOL_VALUE_ADDRESS (sym);
 643 }
 644
 645 /* Given a return value in `regbuf' with a type `valtype',
 646    extract and copy its value into `valbuf'.  */
 647
 648 void
 649 d10v_extract_return_value (valtype, regbuf, valbuf)
 650      struct type *valtype;
 651      char regbuf[REGISTER_BYTES];
 652      char *valbuf;
 653 {
 654  memcpy (valbuf, regbuf + REGISTER_BYTE (2), TYPE_LENGTH (valtype));
 655 }