1 /* Target-dependent code for Mitsubishi D10V, for GDB.
2 Copyright (C) 1996, 1997, 2000, 2001 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* Contributed by Martin Hunt, hunt@cygnus.com */
30 #include "gdb_string.h"
37 #include "arch-utils.h"
40 #include "floatformat.h"
44 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
46 struct frame_extra_info
57 unsigned long (*dmap_register
) (int nr
);
58 unsigned long (*imap_register
) (int nr
);
61 /* These are the addresses the D10V-EVA board maps data and
62 instruction memory to. */
64 #define DMEM_START 0x2000000
65 #define IMEM_START 0x1000000
66 #define STACK_START 0x0007ffe
68 /* d10v register names. */
78 #define NR_DMAP_REGS (gdbarch_tdep (current_gdbarch)->nr_dmap_regs)
79 #define A0_REGNUM (gdbarch_tdep (current_gdbarch)->a0_regnum)
81 /* d10v calling convention. */
83 #define ARG1_REGNUM R0_REGNUM
85 #define RET1_REGNUM R0_REGNUM
89 extern void _initialize_d10v_tdep (void);
91 static void d10v_eva_prepare_to_trace (void);
93 static void d10v_eva_get_trace_data (void);
95 static int prologue_find_regs (unsigned short op
, struct frame_info
*fi
,
98 extern void d10v_frame_init_saved_regs (struct frame_info
*);
100 static void do_d10v_pop_frame (struct frame_info
*fi
);
103 d10v_frame_chain_valid (CORE_ADDR chain
, struct frame_info
*frame
)
105 return ((chain
) != 0 && (frame
) != 0 && (frame
)->pc
> IMEM_START
);
109 d10v_stack_align (CORE_ADDR len
)
111 return (len
+ 1) & ~1;
114 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
115 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
116 and TYPE is the type (which is known to be struct, union or array).
118 The d10v returns anything less than 8 bytes in size in
122 d10v_use_struct_convention (int gcc_p
, struct type
*type
)
124 return (TYPE_LENGTH (type
) > 8);
129 d10v_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
131 static unsigned char breakpoint
[] =
132 {0x2f, 0x90, 0x5e, 0x00};
133 *lenptr
= sizeof (breakpoint
);
137 /* Map the REG_NR onto an ascii name. Return NULL or an empty string
138 when the reg_nr isn't valid. */
142 TS2_IMAP0_REGNUM
= 32,
143 TS2_DMAP_REGNUM
= 34,
144 TS2_NR_DMAP_REGS
= 1,
149 d10v_ts2_register_name (int reg_nr
)
151 static char *register_names
[] =
153 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
154 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
155 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
156 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
157 "imap0", "imap1", "dmap", "a0", "a1"
161 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
163 return register_names
[reg_nr
];
168 TS3_IMAP0_REGNUM
= 36,
169 TS3_DMAP0_REGNUM
= 38,
170 TS3_NR_DMAP_REGS
= 4,
175 d10v_ts3_register_name (int reg_nr
)
177 static char *register_names
[] =
179 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
180 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
181 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
182 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
186 "dmap0", "dmap1", "dmap2", "dmap3"
190 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
192 return register_names
[reg_nr
];
195 /* Access the DMAP/IMAP registers in a target independent way. */
198 d10v_ts2_dmap_register (int reg_nr
)
206 return read_register (TS2_DMAP_REGNUM
);
213 d10v_ts3_dmap_register (int reg_nr
)
215 return read_register (TS3_DMAP0_REGNUM
+ reg_nr
);
219 d10v_dmap_register (int reg_nr
)
221 return gdbarch_tdep (current_gdbarch
)->dmap_register (reg_nr
);
225 d10v_ts2_imap_register (int reg_nr
)
227 return read_register (TS2_IMAP0_REGNUM
+ reg_nr
);
231 d10v_ts3_imap_register (int reg_nr
)
233 return read_register (TS3_IMAP0_REGNUM
+ reg_nr
);
237 d10v_imap_register (int reg_nr
)
239 return gdbarch_tdep (current_gdbarch
)->imap_register (reg_nr
);
242 /* MAP GDB's internal register numbering (determined by the layout fo
243 the REGISTER_BYTE array) onto the simulator's register
247 d10v_ts2_register_sim_regno (int nr
)
249 if (nr
>= TS2_IMAP0_REGNUM
250 && nr
< TS2_IMAP0_REGNUM
+ NR_IMAP_REGS
)
251 return nr
- TS2_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
252 if (nr
== TS2_DMAP_REGNUM
)
253 return nr
- TS2_DMAP_REGNUM
+ SIM_D10V_TS2_DMAP_REGNUM
;
254 if (nr
>= TS2_A0_REGNUM
255 && nr
< TS2_A0_REGNUM
+ NR_A_REGS
)
256 return nr
- TS2_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
261 d10v_ts3_register_sim_regno (int nr
)
263 if (nr
>= TS3_IMAP0_REGNUM
264 && nr
< TS3_IMAP0_REGNUM
+ NR_IMAP_REGS
)
265 return nr
- TS3_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
266 if (nr
>= TS3_DMAP0_REGNUM
267 && nr
< TS3_DMAP0_REGNUM
+ TS3_NR_DMAP_REGS
)
268 return nr
- TS3_DMAP0_REGNUM
+ SIM_D10V_DMAP0_REGNUM
;
269 if (nr
>= TS3_A0_REGNUM
270 && nr
< TS3_A0_REGNUM
+ NR_A_REGS
)
271 return nr
- TS3_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
275 /* Index within `registers' of the first byte of the space for
279 d10v_register_byte (int reg_nr
)
281 if (reg_nr
< A0_REGNUM
)
283 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
284 return (A0_REGNUM
* 2
285 + (reg_nr
- A0_REGNUM
) * 8);
287 return (A0_REGNUM
* 2
289 + (reg_nr
- A0_REGNUM
- NR_A_REGS
) * 2);
292 /* Number of bytes of storage in the actual machine representation for
296 d10v_register_raw_size (int reg_nr
)
298 if (reg_nr
< A0_REGNUM
)
300 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
306 /* Number of bytes of storage in the program's representation
310 d10v_register_virtual_size (int reg_nr
)
312 return TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (reg_nr
));
315 /* Return the GDB type object for the "standard" data type
316 of data in register N. */
319 d10v_register_virtual_type (int reg_nr
)
321 if (reg_nr
>= A0_REGNUM
322 && reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
323 return builtin_type_int64
;
324 else if (reg_nr
== PC_REGNUM
325 || reg_nr
== SP_REGNUM
)
326 return builtin_type_int32
;
328 return builtin_type_int16
;
331 /* convert $pc and $sp to/from virtual addresses */
333 d10v_register_convertible (int nr
)
335 return ((nr
) == PC_REGNUM
|| (nr
) == SP_REGNUM
);
339 d10v_register_convert_to_virtual (int regnum
, struct type
*type
, char *from
,
342 ULONGEST x
= extract_unsigned_integer (from
, REGISTER_RAW_SIZE (regnum
));
343 if (regnum
== PC_REGNUM
)
344 x
= (x
<< 2) | IMEM_START
;
347 store_unsigned_integer (to
, TYPE_LENGTH (type
), x
);
351 d10v_register_convert_to_raw (struct type
*type
, int regnum
, char *from
,
354 ULONGEST x
= extract_unsigned_integer (from
, TYPE_LENGTH (type
));
356 if (regnum
== PC_REGNUM
)
358 store_unsigned_integer (to
, 2, x
);
363 d10v_make_daddr (CORE_ADDR x
)
365 return ((x
) | DMEM_START
);
369 d10v_make_iaddr (CORE_ADDR x
)
371 return (((x
) << 2) | IMEM_START
);
375 d10v_daddr_p (CORE_ADDR x
)
377 return (((x
) & 0x3000000) == DMEM_START
);
381 d10v_iaddr_p (CORE_ADDR x
)
383 return (((x
) & 0x3000000) == IMEM_START
);
388 d10v_convert_iaddr_to_raw (CORE_ADDR x
)
390 return (((x
) >> 2) & 0xffff);
394 d10v_convert_daddr_to_raw (CORE_ADDR x
)
396 return ((x
) & 0xffff);
399 /* Store the address of the place in which to copy the structure the
400 subroutine will return. This is called from call_function.
402 We store structs through a pointer passed in the first Argument
406 d10v_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
408 write_register (ARG1_REGNUM
, (addr
));
411 /* Write into appropriate registers a function return value
412 of type TYPE, given in virtual format.
414 Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */
417 d10v_store_return_value (struct type
*type
, char *valbuf
)
419 write_register_bytes (REGISTER_BYTE (RET1_REGNUM
),
424 /* Extract from an array REGBUF containing the (raw) register state
425 the address in which a function should return its structure value,
426 as a CORE_ADDR (or an expression that can be used as one). */
429 d10v_extract_struct_value_address (char *regbuf
)
431 return (extract_address ((regbuf
) + REGISTER_BYTE (ARG1_REGNUM
),
432 REGISTER_RAW_SIZE (ARG1_REGNUM
))
437 d10v_frame_saved_pc (struct frame_info
*frame
)
439 return ((frame
)->extra_info
->return_pc
);
442 /* Immediately after a function call, return the saved pc. We can't
443 use frame->return_pc beause that is determined by reading R13 off
444 the stack and that may not be written yet. */
447 d10v_saved_pc_after_call (struct frame_info
*frame
)
449 return ((read_register (LR_REGNUM
) << 2)
453 /* Discard from the stack the innermost frame, restoring all saved
457 d10v_pop_frame (void)
459 generic_pop_current_frame (do_d10v_pop_frame
);
463 do_d10v_pop_frame (struct frame_info
*fi
)
470 /* fill out fsr with the address of where each */
471 /* register was stored in the frame */
472 d10v_frame_init_saved_regs (fi
);
474 /* now update the current registers with the old values */
475 for (regnum
= A0_REGNUM
; regnum
< A0_REGNUM
+ NR_A_REGS
; regnum
++)
477 if (fi
->saved_regs
[regnum
])
479 read_memory (fi
->saved_regs
[regnum
], raw_buffer
, REGISTER_RAW_SIZE (regnum
));
480 write_register_bytes (REGISTER_BYTE (regnum
), raw_buffer
, REGISTER_RAW_SIZE (regnum
));
483 for (regnum
= 0; regnum
< SP_REGNUM
; regnum
++)
485 if (fi
->saved_regs
[regnum
])
487 write_register (regnum
, read_memory_unsigned_integer (fi
->saved_regs
[regnum
], REGISTER_RAW_SIZE (regnum
)));
490 if (fi
->saved_regs
[PSW_REGNUM
])
492 write_register (PSW_REGNUM
, read_memory_unsigned_integer (fi
->saved_regs
[PSW_REGNUM
], REGISTER_RAW_SIZE (PSW_REGNUM
)));
495 write_register (PC_REGNUM
, read_register (LR_REGNUM
));
496 write_register (SP_REGNUM
, fp
+ fi
->extra_info
->size
);
497 target_store_registers (-1);
498 flush_cached_frames ();
502 check_prologue (unsigned short op
)
505 if ((op
& 0x7E1F) == 0x6C1F)
509 if ((op
& 0x7E3F) == 0x6E1F)
513 if ((op
& 0x7FE1) == 0x01E1)
525 if ((op
& 0x7E1F) == 0x681E)
529 if ((op
& 0x7E3F) == 0x3A1E)
536 d10v_skip_prologue (CORE_ADDR pc
)
539 unsigned short op1
, op2
;
540 CORE_ADDR func_addr
, func_end
;
541 struct symtab_and_line sal
;
543 /* If we have line debugging information, then the end of the */
544 /* prologue should the first assembly instruction of the first source line */
545 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
547 sal
= find_pc_line (func_addr
, 0);
548 if (sal
.end
&& sal
.end
< func_end
)
552 if (target_read_memory (pc
, (char *) &op
, 4))
553 return pc
; /* Can't access it -- assume no prologue. */
557 op
= (unsigned long) read_memory_integer (pc
, 4);
558 if ((op
& 0xC0000000) == 0xC0000000)
560 /* long instruction */
561 if (((op
& 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */
562 ((op
& 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */
563 ((op
& 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */
568 /* short instructions */
569 if ((op
& 0xC0000000) == 0x80000000)
571 op2
= (op
& 0x3FFF8000) >> 15;
576 op1
= (op
& 0x3FFF8000) >> 15;
579 if (check_prologue (op1
))
581 if (!check_prologue (op2
))
583 /* if the previous opcode was really part of the prologue */
584 /* and not just a NOP, then we want to break after both instructions */
598 /* Given a GDB frame, determine the address of the calling function's frame.
599 This will be used to create a new GDB frame struct, and then
600 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
604 d10v_frame_chain (struct frame_info
*fi
)
606 d10v_frame_init_saved_regs (fi
);
608 if (fi
->extra_info
->return_pc
== IMEM_START
609 || inside_entry_file (fi
->extra_info
->return_pc
))
610 return (CORE_ADDR
) 0;
612 if (!fi
->saved_regs
[FP_REGNUM
])
614 if (!fi
->saved_regs
[SP_REGNUM
]
615 || fi
->saved_regs
[SP_REGNUM
] == STACK_START
)
616 return (CORE_ADDR
) 0;
618 return fi
->saved_regs
[SP_REGNUM
];
621 if (!read_memory_unsigned_integer (fi
->saved_regs
[FP_REGNUM
],
622 REGISTER_RAW_SIZE (FP_REGNUM
)))
623 return (CORE_ADDR
) 0;
625 return D10V_MAKE_DADDR (read_memory_unsigned_integer (fi
->saved_regs
[FP_REGNUM
],
626 REGISTER_RAW_SIZE (FP_REGNUM
)));
629 static int next_addr
, uses_frame
;
632 prologue_find_regs (unsigned short op
, struct frame_info
*fi
, CORE_ADDR addr
)
637 if ((op
& 0x7E1F) == 0x6C1F)
639 n
= (op
& 0x1E0) >> 5;
641 fi
->saved_regs
[n
] = next_addr
;
646 else if ((op
& 0x7E3F) == 0x6E1F)
648 n
= (op
& 0x1E0) >> 5;
650 fi
->saved_regs
[n
] = next_addr
;
651 fi
->saved_regs
[n
+ 1] = next_addr
+ 2;
656 if ((op
& 0x7FE1) == 0x01E1)
658 n
= (op
& 0x1E) >> 1;
677 if ((op
& 0x7E1F) == 0x681E)
679 n
= (op
& 0x1E0) >> 5;
680 fi
->saved_regs
[n
] = next_addr
;
685 if ((op
& 0x7E3F) == 0x3A1E)
687 n
= (op
& 0x1E0) >> 5;
688 fi
->saved_regs
[n
] = next_addr
;
689 fi
->saved_regs
[n
+ 1] = next_addr
+ 2;
696 /* Put here the code to store, into fi->saved_regs, the addresses of
697 the saved registers of frame described by FRAME_INFO. This
698 includes special registers such as pc and fp saved in special ways
699 in the stack frame. sp is even more special: the address we return
700 for it IS the sp for the next frame. */
703 d10v_frame_init_saved_regs (struct frame_info
*fi
)
707 unsigned short op1
, op2
;
711 memset (fi
->saved_regs
, 0, SIZEOF_FRAME_SAVED_REGS
);
714 pc
= get_pc_function_start (fi
->pc
);
719 op
= (unsigned long) read_memory_integer (pc
, 4);
720 if ((op
& 0xC0000000) == 0xC0000000)
722 /* long instruction */
723 if ((op
& 0x3FFF0000) == 0x01FF0000)
726 short n
= op
& 0xFFFF;
729 else if ((op
& 0x3F0F0000) == 0x340F0000)
731 /* st rn, @(offset,sp) */
732 short offset
= op
& 0xFFFF;
733 short n
= (op
>> 20) & 0xF;
734 fi
->saved_regs
[n
] = next_addr
+ offset
;
736 else if ((op
& 0x3F1F0000) == 0x350F0000)
738 /* st2w rn, @(offset,sp) */
739 short offset
= op
& 0xFFFF;
740 short n
= (op
>> 20) & 0xF;
741 fi
->saved_regs
[n
] = next_addr
+ offset
;
742 fi
->saved_regs
[n
+ 1] = next_addr
+ offset
+ 2;
749 /* short instructions */
750 if ((op
& 0xC0000000) == 0x80000000)
752 op2
= (op
& 0x3FFF8000) >> 15;
757 op1
= (op
& 0x3FFF8000) >> 15;
760 if (!prologue_find_regs (op1
, fi
, pc
) || !prologue_find_regs (op2
, fi
, pc
))
766 fi
->extra_info
->size
= -next_addr
;
769 fp
= D10V_MAKE_DADDR (read_register (SP_REGNUM
));
771 for (i
= 0; i
< NUM_REGS
- 1; i
++)
772 if (fi
->saved_regs
[i
])
774 fi
->saved_regs
[i
] = fp
- (next_addr
- fi
->saved_regs
[i
]);
777 if (fi
->saved_regs
[LR_REGNUM
])
779 CORE_ADDR return_pc
= read_memory_unsigned_integer (fi
->saved_regs
[LR_REGNUM
], REGISTER_RAW_SIZE (LR_REGNUM
));
780 fi
->extra_info
->return_pc
= D10V_MAKE_IADDR (return_pc
);
784 fi
->extra_info
->return_pc
= D10V_MAKE_IADDR (read_register (LR_REGNUM
));
787 /* th SP is not normally (ever?) saved, but check anyway */
788 if (!fi
->saved_regs
[SP_REGNUM
])
790 /* if the FP was saved, that means the current FP is valid, */
791 /* otherwise, it isn't being used, so we use the SP instead */
793 fi
->saved_regs
[SP_REGNUM
] = read_register (FP_REGNUM
) + fi
->extra_info
->size
;
796 fi
->saved_regs
[SP_REGNUM
] = fp
+ fi
->extra_info
->size
;
797 fi
->extra_info
->frameless
= 1;
798 fi
->saved_regs
[FP_REGNUM
] = 0;
804 d10v_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
806 fi
->extra_info
= (struct frame_extra_info
*)
807 frame_obstack_alloc (sizeof (struct frame_extra_info
));
808 frame_saved_regs_zalloc (fi
);
810 fi
->extra_info
->frameless
= 0;
811 fi
->extra_info
->size
= 0;
812 fi
->extra_info
->return_pc
= 0;
814 /* The call dummy doesn't save any registers on the stack, so we can
816 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
822 d10v_frame_init_saved_regs (fi
);
827 show_regs (char *args
, int from_tty
)
830 printf_filtered ("PC=%04lx (0x%lx) PSW=%04lx RPT_S=%04lx RPT_E=%04lx RPT_C=%04lx\n",
831 (long) read_register (PC_REGNUM
),
832 (long) D10V_MAKE_IADDR (read_register (PC_REGNUM
)),
833 (long) read_register (PSW_REGNUM
),
834 (long) read_register (24),
835 (long) read_register (25),
836 (long) read_register (23));
837 printf_filtered ("R0-R7 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
838 (long) read_register (0),
839 (long) read_register (1),
840 (long) read_register (2),
841 (long) read_register (3),
842 (long) read_register (4),
843 (long) read_register (5),
844 (long) read_register (6),
845 (long) read_register (7));
846 printf_filtered ("R8-R15 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
847 (long) read_register (8),
848 (long) read_register (9),
849 (long) read_register (10),
850 (long) read_register (11),
851 (long) read_register (12),
852 (long) read_register (13),
853 (long) read_register (14),
854 (long) read_register (15));
855 for (a
= 0; a
< NR_IMAP_REGS
; a
++)
858 printf_filtered (" ");
859 printf_filtered ("IMAP%d %04lx", a
, d10v_imap_register (a
));
861 if (NR_DMAP_REGS
== 1)
862 printf_filtered (" DMAP %04lx\n", d10v_dmap_register (2));
865 for (a
= 0; a
< NR_DMAP_REGS
; a
++)
867 printf_filtered (" DMAP%d %04lx", a
, d10v_dmap_register (a
));
869 printf_filtered ("\n");
871 printf_filtered ("A0-A%d", NR_A_REGS
- 1);
872 for (a
= A0_REGNUM
; a
< A0_REGNUM
+ NR_A_REGS
; a
++)
874 char num
[MAX_REGISTER_RAW_SIZE
];
876 printf_filtered (" ");
877 read_register_gen (a
, (char *) &num
);
878 for (i
= 0; i
< MAX_REGISTER_RAW_SIZE
; i
++)
880 printf_filtered ("%02x", (num
[i
] & 0xff));
883 printf_filtered ("\n");
887 d10v_read_pc (int pid
)
893 save_pid
= inferior_pid
;
895 pc
= (int) read_register (PC_REGNUM
);
896 inferior_pid
= save_pid
;
897 retval
= D10V_MAKE_IADDR (pc
);
902 d10v_write_pc (CORE_ADDR val
, int pid
)
906 save_pid
= inferior_pid
;
908 write_register (PC_REGNUM
, D10V_CONVERT_IADDR_TO_RAW (val
));
909 inferior_pid
= save_pid
;
915 return (D10V_MAKE_DADDR (read_register (SP_REGNUM
)));
919 d10v_write_sp (CORE_ADDR val
)
921 write_register (SP_REGNUM
, D10V_CONVERT_DADDR_TO_RAW (val
));
925 d10v_write_fp (CORE_ADDR val
)
927 write_register (FP_REGNUM
, D10V_CONVERT_DADDR_TO_RAW (val
));
933 return (D10V_MAKE_DADDR (read_register (FP_REGNUM
)));
936 /* Function: push_return_address (pc)
937 Set up the return address for the inferior function call.
938 Needed for targets where we don't actually execute a JSR/BSR instruction */
941 d10v_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
943 write_register (LR_REGNUM
, D10V_CONVERT_IADDR_TO_RAW (CALL_DUMMY_ADDRESS ()));
948 /* When arguments must be pushed onto the stack, they go on in reverse
949 order. The below implements a FILO (stack) to do this. */
954 struct stack_item
*prev
;
958 static struct stack_item
*push_stack_item (struct stack_item
*prev
,
959 void *contents
, int len
);
960 static struct stack_item
*
961 push_stack_item (struct stack_item
*prev
, void *contents
, int len
)
963 struct stack_item
*si
;
964 si
= xmalloc (sizeof (struct stack_item
));
965 si
->data
= xmalloc (len
);
968 memcpy (si
->data
, contents
, len
);
972 static struct stack_item
*pop_stack_item (struct stack_item
*si
);
973 static struct stack_item
*
974 pop_stack_item (struct stack_item
*si
)
976 struct stack_item
*dead
= si
;
985 d10v_push_arguments (int nargs
, value_ptr
*args
, CORE_ADDR sp
,
986 int struct_return
, CORE_ADDR struct_addr
)
989 int regnum
= ARG1_REGNUM
;
990 struct stack_item
*si
= NULL
;
992 /* Fill in registers and arg lists */
993 for (i
= 0; i
< nargs
; i
++)
995 value_ptr arg
= args
[i
];
996 struct type
*type
= check_typedef (VALUE_TYPE (arg
));
997 char *contents
= VALUE_CONTENTS (arg
);
998 int len
= TYPE_LENGTH (type
);
999 /* printf ("push: type=%d len=%d\n", type->code, len); */
1000 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
1002 /* pointers require special handling - first convert and
1004 long val
= extract_signed_integer (contents
, len
);
1006 if (TYPE_TARGET_TYPE (type
)
1007 && (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
))
1009 /* function pointer */
1010 val
= D10V_CONVERT_IADDR_TO_RAW (val
);
1012 else if (D10V_IADDR_P (val
))
1014 /* also function pointer! */
1015 val
= D10V_CONVERT_DADDR_TO_RAW (val
);
1022 if (regnum
<= ARGN_REGNUM
)
1023 write_register (regnum
++, val
& 0xffff);
1027 /* arg will go onto stack */
1028 store_address (ptr
, 2, val
& 0xffff);
1029 si
= push_stack_item (si
, ptr
, 2);
1034 int aligned_regnum
= (regnum
+ 1) & ~1;
1035 if (len
<= 2 && regnum
<= ARGN_REGNUM
)
1036 /* fits in a single register, do not align */
1038 long val
= extract_unsigned_integer (contents
, len
);
1039 write_register (regnum
++, val
);
1041 else if (len
<= (ARGN_REGNUM
- aligned_regnum
+ 1) * 2)
1042 /* value fits in remaining registers, store keeping left
1046 regnum
= aligned_regnum
;
1047 for (b
= 0; b
< (len
& ~1); b
+= 2)
1049 long val
= extract_unsigned_integer (&contents
[b
], 2);
1050 write_register (regnum
++, val
);
1054 long val
= extract_unsigned_integer (&contents
[b
], 1);
1055 write_register (regnum
++, (val
<< 8));
1060 /* arg will go onto stack */
1061 regnum
= ARGN_REGNUM
+ 1;
1062 si
= push_stack_item (si
, contents
, len
);
1069 sp
= (sp
- si
->len
) & ~1;
1070 write_memory (sp
, si
->data
, si
->len
);
1071 si
= pop_stack_item (si
);
1078 /* Given a return value in `regbuf' with a type `valtype',
1079 extract and copy its value into `valbuf'. */
1082 d10v_extract_return_value (struct type
*type
, char regbuf
[REGISTER_BYTES
],
1086 /* printf("RET: TYPE=%d len=%d r%d=0x%x\n",type->code, TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM, (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM))); */
1087 if (TYPE_CODE (type
) == TYPE_CODE_PTR
1088 && TYPE_TARGET_TYPE (type
)
1089 && (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
))
1091 /* pointer to function */
1094 snum
= extract_address (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1095 store_address (valbuf
, 4, D10V_MAKE_IADDR (snum
));
1097 else if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
1099 /* pointer to data */
1102 snum
= extract_address (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1103 store_address (valbuf
, 4, D10V_MAKE_DADDR (snum
));
1107 len
= TYPE_LENGTH (type
);
1110 unsigned short c
= extract_unsigned_integer (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1111 store_unsigned_integer (valbuf
, 1, c
);
1113 else if ((len
& 1) == 0)
1114 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
), len
);
1117 /* For return values of odd size, the first byte is in the
1118 least significant part of the first register. The
1119 remaining bytes in remaining registers. Interestingly,
1120 when such values are passed in, the last byte is in the
1121 most significant byte of that same register - wierd. */
1122 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
) + 1, len
);
1127 /* Translate a GDB virtual ADDR/LEN into a format the remote target
1128 understands. Returns number of bytes that can be transfered
1129 starting at TARG_ADDR. Return ZERO if no bytes can be transfered
1130 (segmentation fault). Since the simulator knows all about how the
1131 VM system works, we just call that to do the translation. */
1134 remote_d10v_translate_xfer_address (CORE_ADDR memaddr
, int nr_bytes
,
1135 CORE_ADDR
*targ_addr
, int *targ_len
)
1139 out_len
= sim_d10v_translate_addr (memaddr
, nr_bytes
,
1142 d10v_imap_register
);
1143 *targ_addr
= out_addr
;
1144 *targ_len
= out_len
;
1148 /* The following code implements access to, and display of, the D10V's
1149 instruction trace buffer. The buffer consists of 64K or more
1150 4-byte words of data, of which each words includes an 8-bit count,
1151 an 8-bit segment number, and a 16-bit instruction address.
1153 In theory, the trace buffer is continuously capturing instruction
1154 data that the CPU presents on its "debug bus", but in practice, the
1155 ROMified GDB stub only enables tracing when it continues or steps
1156 the program, and stops tracing when the program stops; so it
1157 actually works for GDB to read the buffer counter out of memory and
1158 then read each trace word. The counter records where the tracing
1159 stops, but there is no record of where it started, so we remember
1160 the PC when we resumed and then search backwards in the trace
1161 buffer for a word that includes that address. This is not perfect,
1162 because you will miss trace data if the resumption PC is the target
1163 of a branch. (The value of the buffer counter is semi-random, any
1164 trace data from a previous program stop is gone.) */
1166 /* The address of the last word recorded in the trace buffer. */
1168 #define DBBC_ADDR (0xd80000)
1170 /* The base of the trace buffer, at least for the "Board_0". */
1172 #define TRACE_BUFFER_BASE (0xf40000)
1174 static void trace_command (char *, int);
1176 static void untrace_command (char *, int);
1178 static void trace_info (char *, int);
1180 static void tdisassemble_command (char *, int);
1182 static void display_trace (int, int);
1184 /* True when instruction traces are being collected. */
1188 /* Remembered PC. */
1190 static CORE_ADDR last_pc
;
1192 /* True when trace output should be displayed whenever program stops. */
1194 static int trace_display
;
1196 /* True when trace listing should include source lines. */
1198 static int default_trace_show_source
= 1;
1209 trace_command (char *args
, int from_tty
)
1211 /* Clear the host-side trace buffer, allocating space if needed. */
1212 trace_data
.size
= 0;
1213 if (trace_data
.counts
== NULL
)
1214 trace_data
.counts
= (short *) xmalloc (65536 * sizeof (short));
1215 if (trace_data
.addrs
== NULL
)
1216 trace_data
.addrs
= (CORE_ADDR
*) xmalloc (65536 * sizeof (CORE_ADDR
));
1220 printf_filtered ("Tracing is now on.\n");
1224 untrace_command (char *args
, int from_tty
)
1228 printf_filtered ("Tracing is now off.\n");
1232 trace_info (char *args
, int from_tty
)
1236 if (trace_data
.size
)
1238 printf_filtered ("%d entries in trace buffer:\n", trace_data
.size
);
1240 for (i
= 0; i
< trace_data
.size
; ++i
)
1242 printf_filtered ("%d: %d instruction%s at 0x%s\n",
1244 trace_data
.counts
[i
],
1245 (trace_data
.counts
[i
] == 1 ? "" : "s"),
1246 paddr_nz (trace_data
.addrs
[i
]));
1250 printf_filtered ("No entries in trace buffer.\n");
1252 printf_filtered ("Tracing is currently %s.\n", (tracing
? "on" : "off"));
1255 /* Print the instruction at address MEMADDR in debugged memory,
1256 on STREAM. Returns length of the instruction, in bytes. */
1259 print_insn (CORE_ADDR memaddr
, struct ui_file
*stream
)
1261 /* If there's no disassembler, something is very wrong. */
1262 if (tm_print_insn
== NULL
)
1263 internal_error (__FILE__
, __LINE__
,
1264 "print_insn: no disassembler");
1266 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
1267 tm_print_insn_info
.endian
= BFD_ENDIAN_BIG
;
1269 tm_print_insn_info
.endian
= BFD_ENDIAN_LITTLE
;
1270 return (*tm_print_insn
) (memaddr
, &tm_print_insn_info
);
1274 d10v_eva_prepare_to_trace (void)
1279 last_pc
= read_register (PC_REGNUM
);
1282 /* Collect trace data from the target board and format it into a form
1283 more useful for display. */
1286 d10v_eva_get_trace_data (void)
1288 int count
, i
, j
, oldsize
;
1289 int trace_addr
, trace_seg
, trace_cnt
, next_cnt
;
1290 unsigned int last_trace
, trace_word
, next_word
;
1291 unsigned int *tmpspace
;
1296 tmpspace
= xmalloc (65536 * sizeof (unsigned int));
1298 last_trace
= read_memory_unsigned_integer (DBBC_ADDR
, 2) << 2;
1300 /* Collect buffer contents from the target, stopping when we reach
1301 the word recorded when execution resumed. */
1304 while (last_trace
> 0)
1308 read_memory_unsigned_integer (TRACE_BUFFER_BASE
+ last_trace
, 4);
1309 trace_addr
= trace_word
& 0xffff;
1311 /* Ignore an apparently nonsensical entry. */
1312 if (trace_addr
== 0xffd5)
1314 tmpspace
[count
++] = trace_word
;
1315 if (trace_addr
== last_pc
)
1321 /* Move the data to the host-side trace buffer, adjusting counts to
1322 include the last instruction executed and transforming the address
1323 into something that GDB likes. */
1325 for (i
= 0; i
< count
; ++i
)
1327 trace_word
= tmpspace
[i
];
1328 next_word
= ((i
== 0) ? 0 : tmpspace
[i
- 1]);
1329 trace_addr
= trace_word
& 0xffff;
1330 next_cnt
= (next_word
>> 24) & 0xff;
1331 j
= trace_data
.size
+ count
- i
- 1;
1332 trace_data
.addrs
[j
] = (trace_addr
<< 2) + 0x1000000;
1333 trace_data
.counts
[j
] = next_cnt
+ 1;
1336 oldsize
= trace_data
.size
;
1337 trace_data
.size
+= count
;
1342 display_trace (oldsize
, trace_data
.size
);
1346 tdisassemble_command (char *arg
, int from_tty
)
1349 CORE_ADDR low
, high
;
1355 high
= trace_data
.size
;
1357 else if (!(space_index
= (char *) strchr (arg
, ' ')))
1359 low
= parse_and_eval_address (arg
);
1364 /* Two arguments. */
1365 *space_index
= '\0';
1366 low
= parse_and_eval_address (arg
);
1367 high
= parse_and_eval_address (space_index
+ 1);
1372 printf_filtered ("Dump of trace from %s to %s:\n", paddr_u (low
), paddr_u (high
));
1374 display_trace (low
, high
);
1376 printf_filtered ("End of trace dump.\n");
1377 gdb_flush (gdb_stdout
);
1381 display_trace (int low
, int high
)
1383 int i
, count
, trace_show_source
, first
, suppress
;
1384 CORE_ADDR next_address
;
1386 trace_show_source
= default_trace_show_source
;
1387 if (!have_full_symbols () && !have_partial_symbols ())
1389 trace_show_source
= 0;
1390 printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
1391 printf_filtered ("Trace will not display any source.\n");
1396 for (i
= low
; i
< high
; ++i
)
1398 next_address
= trace_data
.addrs
[i
];
1399 count
= trace_data
.counts
[i
];
1403 if (trace_show_source
)
1405 struct symtab_and_line sal
, sal_prev
;
1407 sal_prev
= find_pc_line (next_address
- 4, 0);
1408 sal
= find_pc_line (next_address
, 0);
1412 if (first
|| sal
.line
!= sal_prev
.line
)
1413 print_source_lines (sal
.symtab
, sal
.line
, sal
.line
+ 1, 0);
1419 /* FIXME-32x64--assumes sal.pc fits in long. */
1420 printf_filtered ("No source file for address %s.\n",
1421 local_hex_string ((unsigned long) sal
.pc
));
1426 print_address (next_address
, gdb_stdout
);
1427 printf_filtered (":");
1428 printf_filtered ("\t");
1430 next_address
= next_address
+ print_insn (next_address
, gdb_stdout
);
1431 printf_filtered ("\n");
1432 gdb_flush (gdb_stdout
);
1438 static gdbarch_init_ftype d10v_gdbarch_init
;
1440 static struct gdbarch
*
1441 d10v_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1443 static LONGEST d10v_call_dummy_words
[] =
1445 struct gdbarch
*gdbarch
;
1447 struct gdbarch_tdep
*tdep
;
1448 gdbarch_register_name_ftype
*d10v_register_name
;
1449 gdbarch_register_sim_regno_ftype
*d10v_register_sim_regno
;
1451 /* Find a candidate among the list of pre-declared architectures. */
1452 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1454 return arches
->gdbarch
;
1456 /* None found, create a new architecture from the information
1458 tdep
= XMALLOC (struct gdbarch_tdep
);
1459 gdbarch
= gdbarch_alloc (&info
, tdep
);
1461 switch (info
.bfd_arch_info
->mach
)
1463 case bfd_mach_d10v_ts2
:
1465 d10v_register_name
= d10v_ts2_register_name
;
1466 d10v_register_sim_regno
= d10v_ts2_register_sim_regno
;
1467 tdep
->a0_regnum
= TS2_A0_REGNUM
;
1468 tdep
->nr_dmap_regs
= TS2_NR_DMAP_REGS
;
1469 tdep
->dmap_register
= d10v_ts2_dmap_register
;
1470 tdep
->imap_register
= d10v_ts2_imap_register
;
1473 case bfd_mach_d10v_ts3
:
1475 d10v_register_name
= d10v_ts3_register_name
;
1476 d10v_register_sim_regno
= d10v_ts3_register_sim_regno
;
1477 tdep
->a0_regnum
= TS3_A0_REGNUM
;
1478 tdep
->nr_dmap_regs
= TS3_NR_DMAP_REGS
;
1479 tdep
->dmap_register
= d10v_ts3_dmap_register
;
1480 tdep
->imap_register
= d10v_ts3_imap_register
;
1484 set_gdbarch_read_pc (gdbarch
, d10v_read_pc
);
1485 set_gdbarch_write_pc (gdbarch
, d10v_write_pc
);
1486 set_gdbarch_read_fp (gdbarch
, d10v_read_fp
);
1487 set_gdbarch_write_fp (gdbarch
, d10v_write_fp
);
1488 set_gdbarch_read_sp (gdbarch
, d10v_read_sp
);
1489 set_gdbarch_write_sp (gdbarch
, d10v_write_sp
);
1491 set_gdbarch_num_regs (gdbarch
, d10v_num_regs
);
1492 set_gdbarch_sp_regnum (gdbarch
, 15);
1493 set_gdbarch_fp_regnum (gdbarch
, 11);
1494 set_gdbarch_pc_regnum (gdbarch
, 18);
1495 set_gdbarch_register_name (gdbarch
, d10v_register_name
);
1496 set_gdbarch_register_size (gdbarch
, 2);
1497 set_gdbarch_register_bytes (gdbarch
, (d10v_num_regs
- 2) * 2 + 16);
1498 set_gdbarch_register_byte (gdbarch
, d10v_register_byte
);
1499 set_gdbarch_register_raw_size (gdbarch
, d10v_register_raw_size
);
1500 set_gdbarch_max_register_raw_size (gdbarch
, 8);
1501 set_gdbarch_register_virtual_size (gdbarch
, d10v_register_virtual_size
);
1502 set_gdbarch_max_register_virtual_size (gdbarch
, 8);
1503 set_gdbarch_register_virtual_type (gdbarch
, d10v_register_virtual_type
);
1505 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1506 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1507 set_gdbarch_int_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1508 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1509 set_gdbarch_long_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1510 /* NOTE: The d10v as a 32 bit ``float'' and ``double''. ``long
1511 double'' is 64 bits. */
1512 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1513 set_gdbarch_double_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1514 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1515 switch (info
.byte_order
)
1518 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_big
);
1519 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_single_big
);
1520 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_big
);
1523 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_little
);
1524 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_single_little
);
1525 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_little
);
1528 internal_error (__FILE__
, __LINE__
,
1529 "d10v_gdbarch_init: bad byte order for float format");
1532 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
1533 set_gdbarch_call_dummy_length (gdbarch
, 0);
1534 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
1535 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
1536 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
1537 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
1538 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
1539 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
1540 set_gdbarch_call_dummy_words (gdbarch
, d10v_call_dummy_words
);
1541 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (d10v_call_dummy_words
));
1542 set_gdbarch_call_dummy_p (gdbarch
, 1);
1543 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
1544 set_gdbarch_get_saved_register (gdbarch
, generic_get_saved_register
);
1545 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
1547 set_gdbarch_register_convertible (gdbarch
, d10v_register_convertible
);
1548 set_gdbarch_register_convert_to_virtual (gdbarch
, d10v_register_convert_to_virtual
);
1549 set_gdbarch_register_convert_to_raw (gdbarch
, d10v_register_convert_to_raw
);
1551 set_gdbarch_extract_return_value (gdbarch
, d10v_extract_return_value
);
1552 set_gdbarch_push_arguments (gdbarch
, d10v_push_arguments
);
1553 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
1554 set_gdbarch_push_return_address (gdbarch
, d10v_push_return_address
);
1556 set_gdbarch_d10v_make_daddr (gdbarch
, d10v_make_daddr
);
1557 set_gdbarch_d10v_make_iaddr (gdbarch
, d10v_make_iaddr
);
1558 set_gdbarch_d10v_daddr_p (gdbarch
, d10v_daddr_p
);
1559 set_gdbarch_d10v_iaddr_p (gdbarch
, d10v_iaddr_p
);
1560 set_gdbarch_d10v_convert_daddr_to_raw (gdbarch
, d10v_convert_daddr_to_raw
);
1561 set_gdbarch_d10v_convert_iaddr_to_raw (gdbarch
, d10v_convert_iaddr_to_raw
);
1563 set_gdbarch_store_struct_return (gdbarch
, d10v_store_struct_return
);
1564 set_gdbarch_store_return_value (gdbarch
, d10v_store_return_value
);
1565 set_gdbarch_extract_struct_value_address (gdbarch
, d10v_extract_struct_value_address
);
1566 set_gdbarch_use_struct_convention (gdbarch
, d10v_use_struct_convention
);
1568 set_gdbarch_frame_init_saved_regs (gdbarch
, d10v_frame_init_saved_regs
);
1569 set_gdbarch_init_extra_frame_info (gdbarch
, d10v_init_extra_frame_info
);
1571 set_gdbarch_pop_frame (gdbarch
, d10v_pop_frame
);
1573 set_gdbarch_skip_prologue (gdbarch
, d10v_skip_prologue
);
1574 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1575 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
1576 set_gdbarch_function_start_offset (gdbarch
, 0);
1577 set_gdbarch_breakpoint_from_pc (gdbarch
, d10v_breakpoint_from_pc
);
1579 set_gdbarch_remote_translate_xfer_address (gdbarch
, remote_d10v_translate_xfer_address
);
1581 set_gdbarch_frame_args_skip (gdbarch
, 0);
1582 set_gdbarch_frameless_function_invocation (gdbarch
, frameless_look_for_prologue
);
1583 set_gdbarch_frame_chain (gdbarch
, d10v_frame_chain
);
1584 set_gdbarch_frame_chain_valid (gdbarch
, d10v_frame_chain_valid
);
1585 set_gdbarch_frame_saved_pc (gdbarch
, d10v_frame_saved_pc
);
1586 set_gdbarch_frame_args_address (gdbarch
, default_frame_address
);
1587 set_gdbarch_frame_locals_address (gdbarch
, default_frame_address
);
1588 set_gdbarch_saved_pc_after_call (gdbarch
, d10v_saved_pc_after_call
);
1589 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
1590 set_gdbarch_stack_align (gdbarch
, d10v_stack_align
);
1592 set_gdbarch_register_sim_regno (gdbarch
, d10v_register_sim_regno
);
1593 set_gdbarch_extra_stack_alignment_needed (gdbarch
, 0);
1599 extern void (*target_resume_hook
) (void);
1600 extern void (*target_wait_loop_hook
) (void);
1603 _initialize_d10v_tdep (void)
1605 register_gdbarch_init (bfd_arch_d10v
, d10v_gdbarch_init
);
1607 tm_print_insn
= print_insn_d10v
;
1609 target_resume_hook
= d10v_eva_prepare_to_trace
;
1610 target_wait_loop_hook
= d10v_eva_get_trace_data
;
1612 add_com ("regs", class_vars
, show_regs
, "Print all registers");
1614 add_com ("itrace", class_support
, trace_command
,
1615 "Enable tracing of instruction execution.");
1617 add_com ("iuntrace", class_support
, untrace_command
,
1618 "Disable tracing of instruction execution.");
1620 add_com ("itdisassemble", class_vars
, tdisassemble_command
,
1621 "Disassemble the trace buffer.\n\
1622 Two optional arguments specify a range of trace buffer entries\n\
1623 as reported by info trace (NOT addresses!).");
1625 add_info ("itrace", trace_info
,
1626 "Display info about the trace data buffer.");
1628 add_show_from_set (add_set_cmd ("itracedisplay", no_class
,
1629 var_integer
, (char *) &trace_display
,
1630 "Set automatic display of trace.\n", &setlist
),
1632 add_show_from_set (add_set_cmd ("itracesource", no_class
,
1633 var_integer
, (char *) &default_trace_show_source
,
1634 "Set display of source code with trace.\n", &setlist
),