gdb/d10v-tdep.c

   1 /* Target-dependent code for MItsubishi D10V, for GDB.
   2    Copyright (C) 1996 Free Software Foundation, Inc.
   3 This file is part of GDB.
   4 This program is free software; you can redistribute it and/or modify
   5 it under the terms of the GNU General Public License as published by
   6 the Free Software Foundation; either version 2 of the License, or
   7 (at your option) any later version.
   8 This program is distributed in the hope that it will be useful,
   9 but WITHOUT ANY WARRANTY; without even the implied warranty of
  10 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11 GNU General Public License for more details.
  12 You should have received a copy of the GNU General Public License
  13 along with this program; if not, write to the Free Software
  14 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  15
  16 /*  Contributed by Martin Hunt, hunt@cygnus.com */
  17
  18 #include "defs.h"
  19 #include "frame.h"
  20 #include "obstack.h"
  21 #include "symtab.h"
  22 #include "gdbtypes.h"
  23 #include "gdbcmd.h"
  24 #include "gdbcore.h"
  25 #include "gdb_string.h"
  26 #include "value.h"
  27 #include "inferior.h"
  28 #include "dis-asm.h"
  29
  30 void d10v_frame_find_saved_regs PARAMS ((struct frame_info *fi, struct frame_saved_regs *fsr));
  31
  32 /* Discard from the stack the innermost frame,
  33    restoring all saved registers.  */
  34
  35 void
  36 d10v_pop_frame ()
  37 {
  38   struct frame_info *frame = get_current_frame ();
  39   CORE_ADDR fp;
  40   int regnum;
  41   struct frame_saved_regs fsr;
  42   char raw_buffer[8];
  43
  44   fp = FRAME_FP (frame);
  45
  46   /* fill out fsr with the address of where each */
  47   /* register was stored in the frame */
  48   get_frame_saved_regs (frame, &fsr);
  49
  50   /* now update the current registers with the old values */
  51   for (regnum = A0_REGNUM; regnum < A0_REGNUM+2 ; regnum++)
  52     {
  53       if (fsr.regs[regnum])
  54         {
  55           read_memory (fsr.regs[regnum], raw_buffer, 8);
  56           write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 8);
  57         }
  58     }
  59   for (regnum = 0; regnum < SP_REGNUM; regnum++)
  60     {
  61       if (fsr.regs[regnum])
  62         {
  63           write_register (regnum, read_memory_unsigned_integer (fsr.regs[regnum], 2));
  64         }
  65     }
  66   if (fsr.regs[PSW_REGNUM])
  67     {
  68       write_register (PSW_REGNUM, read_memory_unsigned_integer (fsr.regs[PSW_REGNUM], 2));
  69     }
  70
  71   write_register (PC_REGNUM, read_register(13));
  72   write_register (SP_REGNUM, fp + frame->size);
  73   target_store_registers (-1);
  74   flush_cached_frames ();
  75 }
  76
  77 static int
  78 check_prologue (op)
  79      unsigned short op;
  80 {
  81   /* st  rn, @-sp */
  82   if ((op & 0x7E1F) == 0x6C1F)
  83     return 1;
  84
  85   /* st2w  rn, @-sp */
  86   if ((op & 0x7E3F) == 0x6E1F)
  87     return 1;
  88
  89   /* subi  sp, n */
  90   if ((op & 0x7FE1) == 0x01E1)
  91     return 1;
  92
  93   /* mv  r11, sp */
  94   if (op == 0x417E)
  95     return 1;
  96
  97   /* nop */
  98   if (op == 0x5E00)
  99     return 1;
 100
 101   /* st  rn, @sp */
 102   if ((op & 0x7E1F) == 0x681E)
 103     return 1;
 104
 105   /* st2w  rn, @sp */
 106  if ((op & 0x7E3F) == 0x3A1E)
 107    return 1;
 108
 109   return 0;
 110 }
 111
 112 CORE_ADDR
 113 d10v_skip_prologue (pc)
 114      CORE_ADDR pc;
 115 {
 116   unsigned long op;
 117   unsigned short op1, op2;
 118
 119   if (target_read_memory (pc, (char *)&op, 4))
 120     return pc;                  /* Can't access it -- assume no prologue. */
 121
 122   while (1)
 123     {
 124       op = (unsigned long)read_memory_integer (pc, 4);
 125       if ((op & 0xC0000000) == 0xC0000000)
 126         {
 127           /* long instruction */
 128           if ( ((op & 0x3FFF0000) != 0x01FF0000) &&   /* add3 sp,sp,n */
 129                ((op & 0x3F0F0000) != 0x340F0000) &&   /* st  rn, @(offset,sp) */
 130                ((op & 0x3F1F0000) != 0x350F0000))     /* st2w  rn, @(offset,sp) */
 131             break;
 132         }
 133       else
 134         {
 135           /* short instructions */
 136           op1 = (op & 0x3FFF8000) >> 15;
 137           op2 = op & 0x7FFF;
 138           if (!check_prologue(op1) || !check_prologue(op2))
 139             break;
 140         }
 141       pc += 4;
 142     }
 143   return pc;
 144 }
 145
 146 /* Given a GDB frame, determine the address of the calling function's frame.
 147    This will be used to create a new GDB frame struct, and then
 148    INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
 149 */
 150
 151 CORE_ADDR
 152 d10v_frame_chain (frame)
 153      struct frame_info *frame;
 154 {
 155   struct frame_saved_regs fsr;
 156   d10v_frame_find_saved_regs (frame, &fsr);
 157   return read_memory_unsigned_integer(fsr.regs[FP_REGNUM],2);
 158 }
 159
 160 static int next_addr;
 161
 162 static int
 163 prologue_find_regs (op, fsr, addr)
 164      unsigned short op;
 165      struct frame_saved_regs *fsr;
 166      CORE_ADDR addr;
 167 {
 168   int n;
 169
 170   /* st  rn, @-sp */
 171   if ((op & 0x7E1F) == 0x6C1F)
 172     {
 173       n = (op & 0x1E0) >> 5;
 174       next_addr -= 2;
 175       fsr->regs[n] = next_addr;
 176       return 1;
 177     }
 178
 179   /* st2w  rn, @-sp */
 180   else if ((op & 0x7E3F) == 0x6E1F)
 181     {
 182       n = (op & 0x1E0) >> 5;
 183       next_addr -= 4;
 184       fsr->regs[n] = next_addr;
 185       fsr->regs[n+1] = next_addr+2;
 186       return 1;
 187     }
 188
 189   /* subi  sp, n */
 190   if ((op & 0x7FE1) == 0x01E1)
 191     {
 192       n = (op & 0x1E) >> 1;
 193       if (n == 0)
 194         n = 16;
 195       next_addr -= n;
 196       return 1;
 197     }
 198
 199   /* mv  r11, sp */
 200   if (op == 0x417E)
 201     return 1;
 202
 203   /* nop */
 204   if (op == 0x5E00)
 205     return 1;
 206
 207   /* st  rn, @sp */
 208   if ((op & 0x7E1F) == 0x681E)
 209     {
 210       n = (op & 0x1E0) >> 5;
 211       fsr->regs[n] = next_addr;
 212       return 1;
 213     }
 214
 215   /* st2w  rn, @sp */
 216   if ((op & 0x7E3F) == 0x3A1E)
 217     {
 218       n = (op & 0x1E0) >> 5;
 219       fsr->regs[n] = next_addr;
 220       fsr->regs[n+1] = next_addr+2;
 221       return 1;
 222     }
 223
 224   return 0;
 225 }
 226
 227 /* Put here the code to store, into a struct frame_saved_regs, the
 228    addresses of the saved registers of frame described by FRAME_INFO.
 229    This includes special registers such as pc and fp saved in special
 230    ways in the stack frame.  sp is even more special: the address we
 231    return for it IS the sp for the next frame. */
 232 void
 233 d10v_frame_find_saved_regs (fi, fsr)
 234      struct frame_info *fi;
 235      struct frame_saved_regs *fsr;
 236 {
 237   CORE_ADDR fp, pc;
 238   unsigned long op;
 239   unsigned short op1, op2;
 240   int i;
 241
 242   fp = fi->frame;
 243   memset (fsr, 0, sizeof (*fsr));
 244   next_addr = 0;
 245
 246   pc = get_pc_function_start (fi->pc);
 247
 248   while (1)
 249     {
 250       op = (unsigned long)read_memory_integer (pc, 4);
 251       if ((op & 0xC0000000) == 0xC0000000)
 252         {
 253           /* long instruction */
 254           if ((op & 0x3FFF0000) == 0x01FF0000)
 255             {
 256               /* add3 sp,sp,n */
 257               short n = op & 0xFFFF;
 258               next_addr += n;
 259             }
 260           else if ((op & 0x3F0F0000) == 0x340F0000)
 261             {
 262               /* st  rn, @(offset,sp) */
 263               short offset = op & 0xFFFF;
 264               short n = (op >> 20) & 0xF;
 265               fsr->regs[n] = next_addr + offset;
 266             }
 267           else if ((op & 0x3F1F0000) == 0x350F0000)
 268             {
 269               /* st2w  rn, @(offset,sp) */
 270               short offset = op & 0xFFFF;
 271               short n = (op >> 20) & 0xF;
 272               fsr->regs[n] = next_addr + offset;
 273               fsr->regs[n+1] = next_addr + offset + 2;
 274             }
 275           else
 276             break;
 277         }
 278       else
 279         {
 280           /* short instructions */
 281           op1 = (op & 0x3FFF8000) >> 15;
 282           op2 = op & 0x7FFF;
 283           if (!prologue_find_regs(op1,fsr,pc) || !prologue_find_regs(op2,fsr,pc))
 284             break;
 285         }
 286       pc += 4;
 287     }
 288
 289   fi->size = -next_addr;
 290
 291   for (i=0; i<NUM_REGS; i++)
 292     if (fsr->regs[i])
 293       {
 294         fsr->regs[i] = fp - (next_addr - fsr->regs[i]);
 295       }
 296
 297   if (fsr->regs[13])
 298     fi->return_pc = (read_memory_unsigned_integer(fsr->regs[13],2)-1) << 2;
 299   else
 300     fi->return_pc = (read_register(13) - 1)  << 2;
 301
 302   if (!fsr->regs[SP_REGNUM])
 303     fsr->regs[SP_REGNUM] = read_register(FP_REGNUM) + fi->size;
 304 }
 305
 306 void
 307 d10v_init_extra_frame_info (fromleaf, fi)
 308      int fromleaf;
 309      struct frame_info *fi;
 310 {
 311   struct frame_saved_regs dummy;
 312
 313   if (fi->next && (fi->pc == 0))
 314     fi->pc = fi->next->return_pc;
 315
 316   d10v_frame_find_saved_regs (fi, &dummy);
 317 }
 318
 319 static void
 320 show_regs (args, from_tty)
 321      char *args;
 322      int from_tty;
 323 {
 324   long long num1, num2;
 325   printf_filtered ("PC=%04x (0x%x) PSW=%04x RPT_S=%04x RPT_E=%04x RPT_C=%04x\n",
 326                    read_register (PC_REGNUM), read_register (PC_REGNUM) << 2,
 327                    read_register (PSW_REGNUM),
 328                    read_register (24),
 329                    read_register (25),
 330                    read_register (23));
 331   printf_filtered ("R0-R7  %04x %04x %04x %04x %04x %04x %04x %04x\n",
 332                    read_register (0),
 333                    read_register (1),
 334                    read_register (2),
 335                    read_register (3),
 336                    read_register (4),
 337                    read_register (5),
 338                    read_register (6),
 339                    read_register (7));
 340   printf_filtered ("R8-R15 %04x %04x %04x %04x %04x %04x %04x %04x\n",
 341                    read_register (8),
 342                    read_register (9),
 343                    read_register (10),
 344                    read_register (11),
 345                    read_register (12),
 346                    read_register (13),
 347                    read_register (14),
 348                    read_register (15));
 349   read_register_gen (A0_REGNUM, (char *)&num1);
 350   read_register_gen (A0_REGNUM+1, (char *)&num2);
 351   printf_filtered ("A0-A1  %010llx %010llx\n",num1, num2);
 352 }
 353
 354 void
 355 _initialize_d10v_tdep ()
 356 {
 357   tm_print_insn = print_insn_d10v;
 358   add_com ("regs", class_vars, show_regs, "Print all registers");
 359 }
 360
 361 CORE_ADDR
 362 d10v_read_register_pid (regno, pid)
 363      int regno, pid;
 364 {
 365   int save_pid;
 366   CORE_ADDR retval;
 367
 368   if (pid == inferior_pid)
 369     return (read_register(regno)) << 2;
 370
 371   save_pid = inferior_pid;
 372   inferior_pid = pid;
 373   retval = read_register (regno);
 374   inferior_pid = save_pid;
 375   return (retval << 2);
 376 }
 377
 378 void
 379 d10v_write_register_pid (regno, val, pid)
 380      int regno;
 381      LONGEST val;
 382      int pid;
 383 {
 384   int save_pid;
 385
 386   val >>= 2;
 387
 388   if (pid == inferior_pid)
 389     {
 390       write_register (regno, val);
 391       return;
 392     }
 393
 394   save_pid = inferior_pid;
 395   inferior_pid = pid;
 396   write_register (regno, val);
 397   inferior_pid = save_pid;
 398 }