1 /* Target-dependent code for Mitsubishi D10V, for GDB.
3 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* Contributed by Martin Hunt, hunt@cygnus.com */
31 #include "gdb_string.h"
38 #include "arch-utils.h"
41 #include "floatformat.h"
42 #include "gdb/sim-d10v.h"
43 #include "sim-regno.h"
45 struct frame_extra_info
56 unsigned long (*dmap_register
) (int nr
);
57 unsigned long (*imap_register
) (int nr
);
60 /* These are the addresses the D10V-EVA board maps data and
61 instruction memory to. */
64 DMEM_START
= 0x2000000,
65 IMEM_START
= 0x1000000,
66 STACK_START
= 0x200bffe
69 /* d10v register names. */
84 /* d10v calling convention. */
85 ARG1_REGNUM
= R0_REGNUM
,
86 ARGN_REGNUM
= R3_REGNUM
,
87 RET1_REGNUM
= R0_REGNUM
,
90 #define NR_DMAP_REGS (gdbarch_tdep (current_gdbarch)->nr_dmap_regs)
91 #define A0_REGNUM (gdbarch_tdep (current_gdbarch)->a0_regnum)
95 extern void _initialize_d10v_tdep (void);
97 static CORE_ADDR
d10v_read_sp (void);
99 static CORE_ADDR
d10v_read_fp (void);
101 static void d10v_eva_prepare_to_trace (void);
103 static void d10v_eva_get_trace_data (void);
105 static int prologue_find_regs (unsigned short op
, struct frame_info
*fi
,
108 static void d10v_frame_init_saved_regs (struct frame_info
*);
110 static void do_d10v_pop_frame (struct frame_info
*fi
);
113 d10v_frame_chain_valid (CORE_ADDR chain
, struct frame_info
*frame
)
115 return (get_frame_pc (frame
) > IMEM_START
);
119 d10v_stack_align (CORE_ADDR len
)
121 return (len
+ 1) & ~1;
124 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
125 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
126 and TYPE is the type (which is known to be struct, union or array).
128 The d10v returns anything less than 8 bytes in size in
132 d10v_use_struct_convention (int gcc_p
, struct type
*type
)
136 /* The d10v only passes a struct in a register when that structure
137 has an alignment that matches the size of a register. */
138 /* If the structure doesn't fit in 4 registers, put it on the
140 if (TYPE_LENGTH (type
) > 8)
142 /* If the struct contains only one field, don't put it on the stack
143 - gcc can fit it in one or more registers. */
144 if (TYPE_NFIELDS (type
) == 1)
146 alignment
= TYPE_LENGTH (TYPE_FIELD_TYPE (type
, 0));
147 for (i
= 1; i
< TYPE_NFIELDS (type
); i
++)
149 /* If the alignment changes, just assume it goes on the
151 if (TYPE_LENGTH (TYPE_FIELD_TYPE (type
, i
)) != alignment
)
154 /* If the alignment is suitable for the d10v's 16 bit registers,
155 don't put it on the stack. */
156 if (alignment
== 2 || alignment
== 4)
162 static const unsigned char *
163 d10v_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
165 static unsigned char breakpoint
[] =
166 {0x2f, 0x90, 0x5e, 0x00};
167 *lenptr
= sizeof (breakpoint
);
171 /* Map the REG_NR onto an ascii name. Return NULL or an empty string
172 when the reg_nr isn't valid. */
176 TS2_IMAP0_REGNUM
= 32,
177 TS2_DMAP_REGNUM
= 34,
178 TS2_NR_DMAP_REGS
= 1,
183 d10v_ts2_register_name (int reg_nr
)
185 static char *register_names
[] =
187 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
188 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
189 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
190 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
191 "imap0", "imap1", "dmap", "a0", "a1"
195 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
197 return register_names
[reg_nr
];
202 TS3_IMAP0_REGNUM
= 36,
203 TS3_DMAP0_REGNUM
= 38,
204 TS3_NR_DMAP_REGS
= 4,
209 d10v_ts3_register_name (int reg_nr
)
211 static char *register_names
[] =
213 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
214 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
215 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
216 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
220 "dmap0", "dmap1", "dmap2", "dmap3"
224 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
226 return register_names
[reg_nr
];
229 /* Access the DMAP/IMAP registers in a target independent way.
231 Divide the D10V's 64k data space into four 16k segments:
232 0x0000 -- 0x3fff, 0x4000 -- 0x7fff, 0x8000 -- 0xbfff, and
235 On the TS2, the first two segments (0x0000 -- 0x3fff, 0x4000 --
236 0x7fff) always map to the on-chip data RAM, and the fourth always
237 maps to I/O space. The third (0x8000 - 0xbfff) can be mapped into
238 unified memory or instruction memory, under the control of the
239 single DMAP register.
241 On the TS3, there are four DMAP registers, each of which controls
242 one of the segments. */
245 d10v_ts2_dmap_register (int reg_nr
)
253 return read_register (TS2_DMAP_REGNUM
);
260 d10v_ts3_dmap_register (int reg_nr
)
262 return read_register (TS3_DMAP0_REGNUM
+ reg_nr
);
266 d10v_dmap_register (int reg_nr
)
268 return gdbarch_tdep (current_gdbarch
)->dmap_register (reg_nr
);
272 d10v_ts2_imap_register (int reg_nr
)
274 return read_register (TS2_IMAP0_REGNUM
+ reg_nr
);
278 d10v_ts3_imap_register (int reg_nr
)
280 return read_register (TS3_IMAP0_REGNUM
+ reg_nr
);
284 d10v_imap_register (int reg_nr
)
286 return gdbarch_tdep (current_gdbarch
)->imap_register (reg_nr
);
289 /* MAP GDB's internal register numbering (determined by the layout fo
290 the REGISTER_BYTE array) onto the simulator's register
294 d10v_ts2_register_sim_regno (int nr
)
296 if (legacy_register_sim_regno (nr
) < 0)
297 return legacy_register_sim_regno (nr
);
298 if (nr
>= TS2_IMAP0_REGNUM
299 && nr
< TS2_IMAP0_REGNUM
+ NR_IMAP_REGS
)
300 return nr
- TS2_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
301 if (nr
== TS2_DMAP_REGNUM
)
302 return nr
- TS2_DMAP_REGNUM
+ SIM_D10V_TS2_DMAP_REGNUM
;
303 if (nr
>= TS2_A0_REGNUM
304 && nr
< TS2_A0_REGNUM
+ NR_A_REGS
)
305 return nr
- TS2_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
310 d10v_ts3_register_sim_regno (int nr
)
312 if (legacy_register_sim_regno (nr
) < 0)
313 return legacy_register_sim_regno (nr
);
314 if (nr
>= TS3_IMAP0_REGNUM
315 && nr
< TS3_IMAP0_REGNUM
+ NR_IMAP_REGS
)
316 return nr
- TS3_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
317 if (nr
>= TS3_DMAP0_REGNUM
318 && nr
< TS3_DMAP0_REGNUM
+ TS3_NR_DMAP_REGS
)
319 return nr
- TS3_DMAP0_REGNUM
+ SIM_D10V_DMAP0_REGNUM
;
320 if (nr
>= TS3_A0_REGNUM
321 && nr
< TS3_A0_REGNUM
+ NR_A_REGS
)
322 return nr
- TS3_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
326 /* Index within `registers' of the first byte of the space for
330 d10v_register_byte (int reg_nr
)
332 if (reg_nr
< A0_REGNUM
)
334 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
335 return (A0_REGNUM
* 2
336 + (reg_nr
- A0_REGNUM
) * 8);
338 return (A0_REGNUM
* 2
340 + (reg_nr
- A0_REGNUM
- NR_A_REGS
) * 2);
343 /* Number of bytes of storage in the actual machine representation for
347 d10v_register_raw_size (int reg_nr
)
349 if (reg_nr
< A0_REGNUM
)
351 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
357 /* Return the GDB type object for the "standard" data type
358 of data in register N. */
361 d10v_register_virtual_type (int reg_nr
)
363 if (reg_nr
== PC_REGNUM
)
364 return builtin_type_void_func_ptr
;
365 if (reg_nr
== _SP_REGNUM
|| reg_nr
== _FP_REGNUM
)
366 return builtin_type_void_data_ptr
;
367 else if (reg_nr
>= A0_REGNUM
368 && reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
369 return builtin_type_int64
;
371 return builtin_type_int16
;
375 d10v_daddr_p (CORE_ADDR x
)
377 return (((x
) & 0x3000000) == DMEM_START
);
381 d10v_iaddr_p (CORE_ADDR x
)
383 return (((x
) & 0x3000000) == IMEM_START
);
387 d10v_make_daddr (CORE_ADDR x
)
389 return ((x
) | DMEM_START
);
393 d10v_make_iaddr (CORE_ADDR x
)
395 if (d10v_iaddr_p (x
))
396 return x
; /* Idempotency -- x is already in the IMEM space. */
398 return (((x
) << 2) | IMEM_START
);
402 d10v_convert_iaddr_to_raw (CORE_ADDR x
)
404 return (((x
) >> 2) & 0xffff);
408 d10v_convert_daddr_to_raw (CORE_ADDR x
)
410 return ((x
) & 0xffff);
414 d10v_address_to_pointer (struct type
*type
, void *buf
, CORE_ADDR addr
)
416 /* Is it a code address? */
417 if (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
418 || TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_METHOD
)
420 store_unsigned_integer (buf
, TYPE_LENGTH (type
),
421 d10v_convert_iaddr_to_raw (addr
));
425 /* Strip off any upper segment bits. */
426 store_unsigned_integer (buf
, TYPE_LENGTH (type
),
427 d10v_convert_daddr_to_raw (addr
));
432 d10v_pointer_to_address (struct type
*type
, const void *buf
)
434 CORE_ADDR addr
= extract_address (buf
, TYPE_LENGTH (type
));
436 /* Is it a code address? */
437 if (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
438 || TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_METHOD
439 || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type
)))
440 return d10v_make_iaddr (addr
);
442 return d10v_make_daddr (addr
);
445 /* Don't do anything if we have an integer, this way users can type 'x
446 <addr>' w/o having gdb outsmart them. The internal gdb conversions
447 to the correct space are taken care of in the pointer_to_address
448 function. If we don't do this, 'x $fp' wouldn't work. */
450 d10v_integer_to_address (struct type
*type
, void *buf
)
453 val
= unpack_long (type
, buf
);
457 /* Store the address of the place in which to copy the structure the
458 subroutine will return. This is called from call_function.
460 We store structs through a pointer passed in the first Argument
464 d10v_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
466 write_register (ARG1_REGNUM
, (addr
));
469 /* Write into appropriate registers a function return value
470 of type TYPE, given in virtual format.
472 Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */
475 d10v_store_return_value (struct type
*type
, char *valbuf
)
478 /* Only char return values need to be shifted right within R0. */
479 if (TYPE_LENGTH (type
) == 1
480 && TYPE_CODE (type
) == TYPE_CODE_INT
)
482 /* zero the high byte */
483 deprecated_write_register_bytes (REGISTER_BYTE (RET1_REGNUM
), &tmp
, 1);
484 /* copy the low byte */
485 deprecated_write_register_bytes (REGISTER_BYTE (RET1_REGNUM
) + 1,
489 deprecated_write_register_bytes (REGISTER_BYTE (RET1_REGNUM
),
490 valbuf
, TYPE_LENGTH (type
));
493 /* Extract from an array REGBUF containing the (raw) register state
494 the address in which a function should return its structure value,
495 as a CORE_ADDR (or an expression that can be used as one). */
498 d10v_extract_struct_value_address (char *regbuf
)
500 return (extract_address ((regbuf
) + REGISTER_BYTE (ARG1_REGNUM
),
501 REGISTER_RAW_SIZE (ARG1_REGNUM
))
506 d10v_frame_saved_pc (struct frame_info
*frame
)
508 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
), frame
->frame
, frame
->frame
))
509 return d10v_make_iaddr (deprecated_read_register_dummy (get_frame_pc (frame
),
513 return ((frame
)->extra_info
->return_pc
);
516 /* Immediately after a function call, return the saved pc. We can't
517 use frame->return_pc beause that is determined by reading R13 off
518 the stack and that may not be written yet. */
521 d10v_saved_pc_after_call (struct frame_info
*frame
)
523 return ((read_register (LR_REGNUM
) << 2)
527 /* Discard from the stack the innermost frame, restoring all saved
531 d10v_pop_frame (void)
533 generic_pop_current_frame (do_d10v_pop_frame
);
537 do_d10v_pop_frame (struct frame_info
*fi
)
543 fp
= get_frame_base (fi
);
544 /* fill out fsr with the address of where each */
545 /* register was stored in the frame */
546 d10v_frame_init_saved_regs (fi
);
548 /* now update the current registers with the old values */
549 for (regnum
= A0_REGNUM
; regnum
< A0_REGNUM
+ NR_A_REGS
; regnum
++)
551 if (get_frame_saved_regs (fi
)[regnum
])
553 read_memory (get_frame_saved_regs (fi
)[regnum
], raw_buffer
, REGISTER_RAW_SIZE (regnum
));
554 deprecated_write_register_bytes (REGISTER_BYTE (regnum
), raw_buffer
,
555 REGISTER_RAW_SIZE (regnum
));
558 for (regnum
= 0; regnum
< SP_REGNUM
; regnum
++)
560 if (get_frame_saved_regs (fi
)[regnum
])
562 write_register (regnum
, read_memory_unsigned_integer (get_frame_saved_regs (fi
)[regnum
], REGISTER_RAW_SIZE (regnum
)));
565 if (get_frame_saved_regs (fi
)[PSW_REGNUM
])
567 write_register (PSW_REGNUM
, read_memory_unsigned_integer (get_frame_saved_regs (fi
)[PSW_REGNUM
], REGISTER_RAW_SIZE (PSW_REGNUM
)));
570 write_register (PC_REGNUM
, read_register (LR_REGNUM
));
571 write_register (SP_REGNUM
, fp
+ fi
->extra_info
->size
);
572 target_store_registers (-1);
573 flush_cached_frames ();
577 check_prologue (unsigned short op
)
580 if ((op
& 0x7E1F) == 0x6C1F)
584 if ((op
& 0x7E3F) == 0x6E1F)
588 if ((op
& 0x7FE1) == 0x01E1)
600 if ((op
& 0x7E1F) == 0x681E)
604 if ((op
& 0x7E3F) == 0x3A1E)
611 d10v_skip_prologue (CORE_ADDR pc
)
614 unsigned short op1
, op2
;
615 CORE_ADDR func_addr
, func_end
;
616 struct symtab_and_line sal
;
618 /* If we have line debugging information, then the end of the */
619 /* prologue should the first assembly instruction of the first source line */
620 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
622 sal
= find_pc_line (func_addr
, 0);
623 if (sal
.end
&& sal
.end
< func_end
)
627 if (target_read_memory (pc
, (char *) &op
, 4))
628 return pc
; /* Can't access it -- assume no prologue. */
632 op
= (unsigned long) read_memory_integer (pc
, 4);
633 if ((op
& 0xC0000000) == 0xC0000000)
635 /* long instruction */
636 if (((op
& 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */
637 ((op
& 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */
638 ((op
& 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */
643 /* short instructions */
644 if ((op
& 0xC0000000) == 0x80000000)
646 op2
= (op
& 0x3FFF8000) >> 15;
651 op1
= (op
& 0x3FFF8000) >> 15;
654 if (check_prologue (op1
))
656 if (!check_prologue (op2
))
658 /* if the previous opcode was really part of the prologue */
659 /* and not just a NOP, then we want to break after both instructions */
673 /* Given a GDB frame, determine the address of the calling function's
674 frame. This will be used to create a new GDB frame struct, and
675 then INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC will be
676 called for the new frame. */
679 d10v_frame_chain (struct frame_info
*fi
)
683 /* A generic call dummy's frame is the same as caller's. */
684 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), fi
->frame
, fi
->frame
))
687 d10v_frame_init_saved_regs (fi
);
690 if (fi
->extra_info
->return_pc
== IMEM_START
691 || inside_entry_file (fi
->extra_info
->return_pc
))
693 /* This is meant to halt the backtrace at "_start".
694 Make sure we don't halt it at a generic dummy frame. */
695 if (!DEPRECATED_PC_IN_CALL_DUMMY (fi
->extra_info
->return_pc
, 0, 0))
696 return (CORE_ADDR
) 0;
699 if (!get_frame_saved_regs (fi
)[FP_REGNUM
])
701 if (!get_frame_saved_regs (fi
)[SP_REGNUM
]
702 || get_frame_saved_regs (fi
)[SP_REGNUM
] == STACK_START
)
703 return (CORE_ADDR
) 0;
705 return get_frame_saved_regs (fi
)[SP_REGNUM
];
708 addr
= read_memory_unsigned_integer (get_frame_saved_regs (fi
)[FP_REGNUM
],
709 REGISTER_RAW_SIZE (FP_REGNUM
));
711 return (CORE_ADDR
) 0;
713 return d10v_make_daddr (addr
);
716 static int next_addr
, uses_frame
;
719 prologue_find_regs (unsigned short op
, struct frame_info
*fi
, CORE_ADDR addr
)
724 if ((op
& 0x7E1F) == 0x6C1F)
726 n
= (op
& 0x1E0) >> 5;
728 get_frame_saved_regs (fi
)[n
] = next_addr
;
733 else if ((op
& 0x7E3F) == 0x6E1F)
735 n
= (op
& 0x1E0) >> 5;
737 get_frame_saved_regs (fi
)[n
] = next_addr
;
738 get_frame_saved_regs (fi
)[n
+ 1] = next_addr
+ 2;
743 if ((op
& 0x7FE1) == 0x01E1)
745 n
= (op
& 0x1E) >> 1;
764 if ((op
& 0x7E1F) == 0x681E)
766 n
= (op
& 0x1E0) >> 5;
767 get_frame_saved_regs (fi
)[n
] = next_addr
;
772 if ((op
& 0x7E3F) == 0x3A1E)
774 n
= (op
& 0x1E0) >> 5;
775 get_frame_saved_regs (fi
)[n
] = next_addr
;
776 get_frame_saved_regs (fi
)[n
+ 1] = next_addr
+ 2;
783 /* Put here the code to store, into fi->saved_regs, the addresses of
784 the saved registers of frame described by FRAME_INFO. This
785 includes special registers such as pc and fp saved in special ways
786 in the stack frame. sp is even more special: the address we return
787 for it IS the sp for the next frame. */
790 d10v_frame_init_saved_regs (struct frame_info
*fi
)
794 unsigned short op1
, op2
;
798 memset (get_frame_saved_regs (fi
), 0, SIZEOF_FRAME_SAVED_REGS
);
801 pc
= get_pc_function_start (get_frame_pc (fi
));
806 op
= (unsigned long) read_memory_integer (pc
, 4);
807 if ((op
& 0xC0000000) == 0xC0000000)
809 /* long instruction */
810 if ((op
& 0x3FFF0000) == 0x01FF0000)
813 short n
= op
& 0xFFFF;
816 else if ((op
& 0x3F0F0000) == 0x340F0000)
818 /* st rn, @(offset,sp) */
819 short offset
= op
& 0xFFFF;
820 short n
= (op
>> 20) & 0xF;
821 get_frame_saved_regs (fi
)[n
] = next_addr
+ offset
;
823 else if ((op
& 0x3F1F0000) == 0x350F0000)
825 /* st2w rn, @(offset,sp) */
826 short offset
= op
& 0xFFFF;
827 short n
= (op
>> 20) & 0xF;
828 get_frame_saved_regs (fi
)[n
] = next_addr
+ offset
;
829 get_frame_saved_regs (fi
)[n
+ 1] = next_addr
+ offset
+ 2;
836 /* short instructions */
837 if ((op
& 0xC0000000) == 0x80000000)
839 op2
= (op
& 0x3FFF8000) >> 15;
844 op1
= (op
& 0x3FFF8000) >> 15;
847 if (!prologue_find_regs (op1
, fi
, pc
)
848 || !prologue_find_regs (op2
, fi
, pc
))
854 fi
->extra_info
->size
= -next_addr
;
857 fp
= d10v_read_sp ();
859 for (i
= 0; i
< NUM_REGS
- 1; i
++)
860 if (get_frame_saved_regs (fi
)[i
])
862 get_frame_saved_regs (fi
)[i
] = fp
- (next_addr
- get_frame_saved_regs (fi
)[i
]);
865 if (get_frame_saved_regs (fi
)[LR_REGNUM
])
868 = read_memory_unsigned_integer (get_frame_saved_regs (fi
)[LR_REGNUM
],
869 REGISTER_RAW_SIZE (LR_REGNUM
));
870 fi
->extra_info
->return_pc
= d10v_make_iaddr (return_pc
);
874 fi
->extra_info
->return_pc
= d10v_make_iaddr (read_register (LR_REGNUM
));
877 /* The SP is not normally (ever?) saved, but check anyway */
878 if (!get_frame_saved_regs (fi
)[SP_REGNUM
])
880 /* if the FP was saved, that means the current FP is valid, */
881 /* otherwise, it isn't being used, so we use the SP instead */
883 get_frame_saved_regs (fi
)[SP_REGNUM
]
884 = d10v_read_fp () + fi
->extra_info
->size
;
887 get_frame_saved_regs (fi
)[SP_REGNUM
] = fp
+ fi
->extra_info
->size
;
888 fi
->extra_info
->frameless
= 1;
889 get_frame_saved_regs (fi
)[FP_REGNUM
] = 0;
895 d10v_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
897 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
898 frame_saved_regs_zalloc (fi
);
900 fi
->extra_info
->frameless
= 0;
901 fi
->extra_info
->size
= 0;
902 fi
->extra_info
->return_pc
= 0;
904 /* If get_frame_pc (fi) is zero, but this is not the outermost frame,
905 then let's snatch the return_pc from the callee, so that
906 DEPRECATED_PC_IN_CALL_DUMMY will work. */
907 if (get_frame_pc (fi
) == 0 && fi
->level
!= 0 && fi
->next
!= NULL
)
908 deprecated_update_frame_pc_hack (fi
, d10v_frame_saved_pc (fi
->next
));
910 /* The call dummy doesn't save any registers on the stack, so we can
912 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), fi
->frame
, fi
->frame
))
918 d10v_frame_init_saved_regs (fi
);
923 show_regs (char *args
, int from_tty
)
926 printf_filtered ("PC=%04lx (0x%lx) PSW=%04lx RPT_S=%04lx RPT_E=%04lx RPT_C=%04lx\n",
927 (long) read_register (PC_REGNUM
),
928 (long) d10v_make_iaddr (read_register (PC_REGNUM
)),
929 (long) read_register (PSW_REGNUM
),
930 (long) read_register (24),
931 (long) read_register (25),
932 (long) read_register (23));
933 printf_filtered ("R0-R7 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
934 (long) read_register (0),
935 (long) read_register (1),
936 (long) read_register (2),
937 (long) read_register (3),
938 (long) read_register (4),
939 (long) read_register (5),
940 (long) read_register (6),
941 (long) read_register (7));
942 printf_filtered ("R8-R15 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
943 (long) read_register (8),
944 (long) read_register (9),
945 (long) read_register (10),
946 (long) read_register (11),
947 (long) read_register (12),
948 (long) read_register (13),
949 (long) read_register (14),
950 (long) read_register (15));
951 for (a
= 0; a
< NR_IMAP_REGS
; a
++)
954 printf_filtered (" ");
955 printf_filtered ("IMAP%d %04lx", a
, d10v_imap_register (a
));
957 if (NR_DMAP_REGS
== 1)
958 printf_filtered (" DMAP %04lx\n", d10v_dmap_register (2));
961 for (a
= 0; a
< NR_DMAP_REGS
; a
++)
963 printf_filtered (" DMAP%d %04lx", a
, d10v_dmap_register (a
));
965 printf_filtered ("\n");
967 printf_filtered ("A0-A%d", NR_A_REGS
- 1);
968 for (a
= A0_REGNUM
; a
< A0_REGNUM
+ NR_A_REGS
; a
++)
970 char num
[MAX_REGISTER_RAW_SIZE
];
972 printf_filtered (" ");
973 deprecated_read_register_gen (a
, (char *) &num
);
974 for (i
= 0; i
< MAX_REGISTER_RAW_SIZE
; i
++)
976 printf_filtered ("%02x", (num
[i
] & 0xff));
979 printf_filtered ("\n");
983 d10v_read_pc (ptid_t ptid
)
989 save_ptid
= inferior_ptid
;
990 inferior_ptid
= ptid
;
991 pc
= (int) read_register (PC_REGNUM
);
992 inferior_ptid
= save_ptid
;
993 retval
= d10v_make_iaddr (pc
);
998 d10v_write_pc (CORE_ADDR val
, ptid_t ptid
)
1002 save_ptid
= inferior_ptid
;
1003 inferior_ptid
= ptid
;
1004 write_register (PC_REGNUM
, d10v_convert_iaddr_to_raw (val
));
1005 inferior_ptid
= save_ptid
;
1011 return (d10v_make_daddr (read_register (SP_REGNUM
)));
1015 d10v_write_sp (CORE_ADDR val
)
1017 write_register (SP_REGNUM
, d10v_convert_daddr_to_raw (val
));
1023 return (d10v_make_daddr (read_register (FP_REGNUM
)));
1026 /* Function: push_return_address (pc)
1027 Set up the return address for the inferior function call.
1028 Needed for targets where we don't actually execute a JSR/BSR instruction */
1031 d10v_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1033 write_register (LR_REGNUM
, d10v_convert_iaddr_to_raw (CALL_DUMMY_ADDRESS ()));
1038 /* When arguments must be pushed onto the stack, they go on in reverse
1039 order. The below implements a FILO (stack) to do this. */
1044 struct stack_item
*prev
;
1048 static struct stack_item
*push_stack_item (struct stack_item
*prev
,
1049 void *contents
, int len
);
1050 static struct stack_item
*
1051 push_stack_item (struct stack_item
*prev
, void *contents
, int len
)
1053 struct stack_item
*si
;
1054 si
= xmalloc (sizeof (struct stack_item
));
1055 si
->data
= xmalloc (len
);
1058 memcpy (si
->data
, contents
, len
);
1062 static struct stack_item
*pop_stack_item (struct stack_item
*si
);
1063 static struct stack_item
*
1064 pop_stack_item (struct stack_item
*si
)
1066 struct stack_item
*dead
= si
;
1075 d10v_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1076 int struct_return
, CORE_ADDR struct_addr
)
1079 int regnum
= ARG1_REGNUM
;
1080 struct stack_item
*si
= NULL
;
1083 /* If struct_return is true, then the struct return address will
1084 consume one argument-passing register. No need to actually
1085 write the value to the register -- that's done by
1086 d10v_store_struct_return(). */
1091 /* Fill in registers and arg lists */
1092 for (i
= 0; i
< nargs
; i
++)
1094 struct value
*arg
= args
[i
];
1095 struct type
*type
= check_typedef (VALUE_TYPE (arg
));
1096 char *contents
= VALUE_CONTENTS (arg
);
1097 int len
= TYPE_LENGTH (type
);
1098 int aligned_regnum
= (regnum
+ 1) & ~1;
1100 /* printf ("push: type=%d len=%d\n", TYPE_CODE (type), len); */
1101 if (len
<= 2 && regnum
<= ARGN_REGNUM
)
1102 /* fits in a single register, do not align */
1104 val
= extract_unsigned_integer (contents
, len
);
1105 write_register (regnum
++, val
);
1107 else if (len
<= (ARGN_REGNUM
- aligned_regnum
+ 1) * 2)
1108 /* value fits in remaining registers, store keeping left
1112 regnum
= aligned_regnum
;
1113 for (b
= 0; b
< (len
& ~1); b
+= 2)
1115 val
= extract_unsigned_integer (&contents
[b
], 2);
1116 write_register (regnum
++, val
);
1120 val
= extract_unsigned_integer (&contents
[b
], 1);
1121 write_register (regnum
++, (val
<< 8));
1126 /* arg will go onto stack */
1127 regnum
= ARGN_REGNUM
+ 1;
1128 si
= push_stack_item (si
, contents
, len
);
1134 sp
= (sp
- si
->len
) & ~1;
1135 write_memory (sp
, si
->data
, si
->len
);
1136 si
= pop_stack_item (si
);
1143 /* Given a return value in `regbuf' with a type `valtype',
1144 extract and copy its value into `valbuf'. */
1147 d10v_extract_return_value (struct type
*type
, char regbuf
[REGISTER_BYTES
],
1152 printf("RET: TYPE=%d len=%d r%d=0x%x\n", TYPE_CODE (type
),
1153 TYPE_LENGTH (type
), RET1_REGNUM
- R0_REGNUM
,
1154 (int) extract_unsigned_integer (regbuf
+ REGISTER_BYTE(RET1_REGNUM
),
1155 REGISTER_RAW_SIZE (RET1_REGNUM
)));
1157 len
= TYPE_LENGTH (type
);
1162 c
= extract_unsigned_integer (regbuf
+ REGISTER_BYTE (RET1_REGNUM
),
1163 REGISTER_RAW_SIZE (RET1_REGNUM
));
1164 store_unsigned_integer (valbuf
, 1, c
);
1166 else if ((len
& 1) == 0)
1167 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
), len
);
1170 /* For return values of odd size, the first byte is in the
1171 least significant part of the first register. The
1172 remaining bytes in remaining registers. Interestingly,
1173 when such values are passed in, the last byte is in the
1174 most significant byte of that same register - wierd. */
1175 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
) + 1, len
);
1179 /* Translate a GDB virtual ADDR/LEN into a format the remote target
1180 understands. Returns number of bytes that can be transfered
1181 starting at TARG_ADDR. Return ZERO if no bytes can be transfered
1182 (segmentation fault). Since the simulator knows all about how the
1183 VM system works, we just call that to do the translation. */
1186 remote_d10v_translate_xfer_address (CORE_ADDR memaddr
, int nr_bytes
,
1187 CORE_ADDR
*targ_addr
, int *targ_len
)
1191 out_len
= sim_d10v_translate_addr (memaddr
, nr_bytes
,
1194 d10v_imap_register
);
1195 *targ_addr
= out_addr
;
1196 *targ_len
= out_len
;
1200 /* The following code implements access to, and display of, the D10V's
1201 instruction trace buffer. The buffer consists of 64K or more
1202 4-byte words of data, of which each words includes an 8-bit count,
1203 an 8-bit segment number, and a 16-bit instruction address.
1205 In theory, the trace buffer is continuously capturing instruction
1206 data that the CPU presents on its "debug bus", but in practice, the
1207 ROMified GDB stub only enables tracing when it continues or steps
1208 the program, and stops tracing when the program stops; so it
1209 actually works for GDB to read the buffer counter out of memory and
1210 then read each trace word. The counter records where the tracing
1211 stops, but there is no record of where it started, so we remember
1212 the PC when we resumed and then search backwards in the trace
1213 buffer for a word that includes that address. This is not perfect,
1214 because you will miss trace data if the resumption PC is the target
1215 of a branch. (The value of the buffer counter is semi-random, any
1216 trace data from a previous program stop is gone.) */
1218 /* The address of the last word recorded in the trace buffer. */
1220 #define DBBC_ADDR (0xd80000)
1222 /* The base of the trace buffer, at least for the "Board_0". */
1224 #define TRACE_BUFFER_BASE (0xf40000)
1226 static void trace_command (char *, int);
1228 static void untrace_command (char *, int);
1230 static void trace_info (char *, int);
1232 static void tdisassemble_command (char *, int);
1234 static void display_trace (int, int);
1236 /* True when instruction traces are being collected. */
1240 /* Remembered PC. */
1242 static CORE_ADDR last_pc
;
1244 /* True when trace output should be displayed whenever program stops. */
1246 static int trace_display
;
1248 /* True when trace listing should include source lines. */
1250 static int default_trace_show_source
= 1;
1261 trace_command (char *args
, int from_tty
)
1263 /* Clear the host-side trace buffer, allocating space if needed. */
1264 trace_data
.size
= 0;
1265 if (trace_data
.counts
== NULL
)
1266 trace_data
.counts
= (short *) xmalloc (65536 * sizeof (short));
1267 if (trace_data
.addrs
== NULL
)
1268 trace_data
.addrs
= (CORE_ADDR
*) xmalloc (65536 * sizeof (CORE_ADDR
));
1272 printf_filtered ("Tracing is now on.\n");
1276 untrace_command (char *args
, int from_tty
)
1280 printf_filtered ("Tracing is now off.\n");
1284 trace_info (char *args
, int from_tty
)
1288 if (trace_data
.size
)
1290 printf_filtered ("%d entries in trace buffer:\n", trace_data
.size
);
1292 for (i
= 0; i
< trace_data
.size
; ++i
)
1294 printf_filtered ("%d: %d instruction%s at 0x%s\n",
1296 trace_data
.counts
[i
],
1297 (trace_data
.counts
[i
] == 1 ? "" : "s"),
1298 paddr_nz (trace_data
.addrs
[i
]));
1302 printf_filtered ("No entries in trace buffer.\n");
1304 printf_filtered ("Tracing is currently %s.\n", (tracing
? "on" : "off"));
1307 /* Print the instruction at address MEMADDR in debugged memory,
1308 on STREAM. Returns length of the instruction, in bytes. */
1311 print_insn (CORE_ADDR memaddr
, struct ui_file
*stream
)
1313 /* If there's no disassembler, something is very wrong. */
1314 if (tm_print_insn
== NULL
)
1315 internal_error (__FILE__
, __LINE__
,
1316 "print_insn: no disassembler");
1318 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1319 tm_print_insn_info
.endian
= BFD_ENDIAN_BIG
;
1321 tm_print_insn_info
.endian
= BFD_ENDIAN_LITTLE
;
1322 return TARGET_PRINT_INSN (memaddr
, &tm_print_insn_info
);
1326 d10v_eva_prepare_to_trace (void)
1331 last_pc
= read_register (PC_REGNUM
);
1334 /* Collect trace data from the target board and format it into a form
1335 more useful for display. */
1338 d10v_eva_get_trace_data (void)
1340 int count
, i
, j
, oldsize
;
1341 int trace_addr
, trace_seg
, trace_cnt
, next_cnt
;
1342 unsigned int last_trace
, trace_word
, next_word
;
1343 unsigned int *tmpspace
;
1348 tmpspace
= xmalloc (65536 * sizeof (unsigned int));
1350 last_trace
= read_memory_unsigned_integer (DBBC_ADDR
, 2) << 2;
1352 /* Collect buffer contents from the target, stopping when we reach
1353 the word recorded when execution resumed. */
1356 while (last_trace
> 0)
1360 read_memory_unsigned_integer (TRACE_BUFFER_BASE
+ last_trace
, 4);
1361 trace_addr
= trace_word
& 0xffff;
1363 /* Ignore an apparently nonsensical entry. */
1364 if (trace_addr
== 0xffd5)
1366 tmpspace
[count
++] = trace_word
;
1367 if (trace_addr
== last_pc
)
1373 /* Move the data to the host-side trace buffer, adjusting counts to
1374 include the last instruction executed and transforming the address
1375 into something that GDB likes. */
1377 for (i
= 0; i
< count
; ++i
)
1379 trace_word
= tmpspace
[i
];
1380 next_word
= ((i
== 0) ? 0 : tmpspace
[i
- 1]);
1381 trace_addr
= trace_word
& 0xffff;
1382 next_cnt
= (next_word
>> 24) & 0xff;
1383 j
= trace_data
.size
+ count
- i
- 1;
1384 trace_data
.addrs
[j
] = (trace_addr
<< 2) + 0x1000000;
1385 trace_data
.counts
[j
] = next_cnt
+ 1;
1388 oldsize
= trace_data
.size
;
1389 trace_data
.size
+= count
;
1394 display_trace (oldsize
, trace_data
.size
);
1398 tdisassemble_command (char *arg
, int from_tty
)
1401 CORE_ADDR low
, high
;
1407 high
= trace_data
.size
;
1409 else if (!(space_index
= (char *) strchr (arg
, ' ')))
1411 low
= parse_and_eval_address (arg
);
1416 /* Two arguments. */
1417 *space_index
= '\0';
1418 low
= parse_and_eval_address (arg
);
1419 high
= parse_and_eval_address (space_index
+ 1);
1424 printf_filtered ("Dump of trace from %s to %s:\n", paddr_u (low
), paddr_u (high
));
1426 display_trace (low
, high
);
1428 printf_filtered ("End of trace dump.\n");
1429 gdb_flush (gdb_stdout
);
1433 display_trace (int low
, int high
)
1435 int i
, count
, trace_show_source
, first
, suppress
;
1436 CORE_ADDR next_address
;
1438 trace_show_source
= default_trace_show_source
;
1439 if (!have_full_symbols () && !have_partial_symbols ())
1441 trace_show_source
= 0;
1442 printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
1443 printf_filtered ("Trace will not display any source.\n");
1448 for (i
= low
; i
< high
; ++i
)
1450 next_address
= trace_data
.addrs
[i
];
1451 count
= trace_data
.counts
[i
];
1455 if (trace_show_source
)
1457 struct symtab_and_line sal
, sal_prev
;
1459 sal_prev
= find_pc_line (next_address
- 4, 0);
1460 sal
= find_pc_line (next_address
, 0);
1464 if (first
|| sal
.line
!= sal_prev
.line
)
1465 print_source_lines (sal
.symtab
, sal
.line
, sal
.line
+ 1, 0);
1471 /* FIXME-32x64--assumes sal.pc fits in long. */
1472 printf_filtered ("No source file for address %s.\n",
1473 local_hex_string ((unsigned long) sal
.pc
));
1478 print_address (next_address
, gdb_stdout
);
1479 printf_filtered (":");
1480 printf_filtered ("\t");
1482 next_address
= next_address
+ print_insn (next_address
, gdb_stdout
);
1483 printf_filtered ("\n");
1484 gdb_flush (gdb_stdout
);
1490 static gdbarch_init_ftype d10v_gdbarch_init
;
1492 static struct gdbarch
*
1493 d10v_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1495 static LONGEST d10v_call_dummy_words
[] =
1497 struct gdbarch
*gdbarch
;
1499 struct gdbarch_tdep
*tdep
;
1500 gdbarch_register_name_ftype
*d10v_register_name
;
1501 gdbarch_register_sim_regno_ftype
*d10v_register_sim_regno
;
1503 /* Find a candidate among the list of pre-declared architectures. */
1504 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1506 return arches
->gdbarch
;
1508 /* None found, create a new architecture from the information
1510 tdep
= XMALLOC (struct gdbarch_tdep
);
1511 gdbarch
= gdbarch_alloc (&info
, tdep
);
1513 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1514 ready to unwind the PC first (see frame.c:get_prev_frame()). */
1515 set_gdbarch_deprecated_init_frame_pc (gdbarch
, init_frame_pc_default
);
1517 switch (info
.bfd_arch_info
->mach
)
1519 case bfd_mach_d10v_ts2
:
1521 d10v_register_name
= d10v_ts2_register_name
;
1522 d10v_register_sim_regno
= d10v_ts2_register_sim_regno
;
1523 tdep
->a0_regnum
= TS2_A0_REGNUM
;
1524 tdep
->nr_dmap_regs
= TS2_NR_DMAP_REGS
;
1525 tdep
->dmap_register
= d10v_ts2_dmap_register
;
1526 tdep
->imap_register
= d10v_ts2_imap_register
;
1529 case bfd_mach_d10v_ts3
:
1531 d10v_register_name
= d10v_ts3_register_name
;
1532 d10v_register_sim_regno
= d10v_ts3_register_sim_regno
;
1533 tdep
->a0_regnum
= TS3_A0_REGNUM
;
1534 tdep
->nr_dmap_regs
= TS3_NR_DMAP_REGS
;
1535 tdep
->dmap_register
= d10v_ts3_dmap_register
;
1536 tdep
->imap_register
= d10v_ts3_imap_register
;
1540 set_gdbarch_read_pc (gdbarch
, d10v_read_pc
);
1541 set_gdbarch_write_pc (gdbarch
, d10v_write_pc
);
1542 set_gdbarch_read_fp (gdbarch
, d10v_read_fp
);
1543 set_gdbarch_read_sp (gdbarch
, d10v_read_sp
);
1544 set_gdbarch_write_sp (gdbarch
, d10v_write_sp
);
1546 set_gdbarch_num_regs (gdbarch
, d10v_num_regs
);
1547 set_gdbarch_sp_regnum (gdbarch
, 15);
1548 set_gdbarch_fp_regnum (gdbarch
, 11);
1549 set_gdbarch_pc_regnum (gdbarch
, 18);
1550 set_gdbarch_register_name (gdbarch
, d10v_register_name
);
1551 set_gdbarch_register_size (gdbarch
, 2);
1552 set_gdbarch_register_bytes (gdbarch
, (d10v_num_regs
- 2) * 2 + 16);
1553 set_gdbarch_register_byte (gdbarch
, d10v_register_byte
);
1554 set_gdbarch_register_raw_size (gdbarch
, d10v_register_raw_size
);
1555 set_gdbarch_max_register_raw_size (gdbarch
, 8);
1556 set_gdbarch_register_virtual_size (gdbarch
, generic_register_size
);
1557 set_gdbarch_max_register_virtual_size (gdbarch
, 8);
1558 set_gdbarch_register_virtual_type (gdbarch
, d10v_register_virtual_type
);
1560 set_gdbarch_ptr_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1561 set_gdbarch_addr_bit (gdbarch
, 32);
1562 set_gdbarch_address_to_pointer (gdbarch
, d10v_address_to_pointer
);
1563 set_gdbarch_pointer_to_address (gdbarch
, d10v_pointer_to_address
);
1564 set_gdbarch_integer_to_address (gdbarch
, d10v_integer_to_address
);
1565 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1566 set_gdbarch_int_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1567 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1568 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1569 /* NOTE: The d10v as a 32 bit ``float'' and ``double''. ``long
1570 double'' is 64 bits. */
1571 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1572 set_gdbarch_double_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1573 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1574 switch (info
.byte_order
)
1576 case BFD_ENDIAN_BIG
:
1577 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_big
);
1578 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_single_big
);
1579 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_big
);
1581 case BFD_ENDIAN_LITTLE
:
1582 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_little
);
1583 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_single_little
);
1584 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_little
);
1587 internal_error (__FILE__
, __LINE__
,
1588 "d10v_gdbarch_init: bad byte order for float format");
1591 set_gdbarch_call_dummy_length (gdbarch
, 0);
1592 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
1593 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
1594 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
1595 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
1596 set_gdbarch_call_dummy_words (gdbarch
, d10v_call_dummy_words
);
1597 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (d10v_call_dummy_words
));
1598 set_gdbarch_call_dummy_p (gdbarch
, 1);
1599 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
1600 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
1602 set_gdbarch_deprecated_extract_return_value (gdbarch
, d10v_extract_return_value
);
1603 set_gdbarch_push_arguments (gdbarch
, d10v_push_arguments
);
1604 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
1605 set_gdbarch_push_return_address (gdbarch
, d10v_push_return_address
);
1607 set_gdbarch_store_struct_return (gdbarch
, d10v_store_struct_return
);
1608 set_gdbarch_deprecated_store_return_value (gdbarch
, d10v_store_return_value
);
1609 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, d10v_extract_struct_value_address
);
1610 set_gdbarch_use_struct_convention (gdbarch
, d10v_use_struct_convention
);
1612 set_gdbarch_frame_init_saved_regs (gdbarch
, d10v_frame_init_saved_regs
);
1613 set_gdbarch_init_extra_frame_info (gdbarch
, d10v_init_extra_frame_info
);
1615 set_gdbarch_pop_frame (gdbarch
, d10v_pop_frame
);
1617 set_gdbarch_skip_prologue (gdbarch
, d10v_skip_prologue
);
1618 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1619 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
1620 set_gdbarch_function_start_offset (gdbarch
, 0);
1621 set_gdbarch_breakpoint_from_pc (gdbarch
, d10v_breakpoint_from_pc
);
1623 set_gdbarch_remote_translate_xfer_address (gdbarch
, remote_d10v_translate_xfer_address
);
1625 set_gdbarch_frame_args_skip (gdbarch
, 0);
1626 set_gdbarch_frameless_function_invocation (gdbarch
, frameless_look_for_prologue
);
1627 set_gdbarch_frame_chain (gdbarch
, d10v_frame_chain
);
1628 set_gdbarch_frame_chain_valid (gdbarch
, d10v_frame_chain_valid
);
1629 set_gdbarch_frame_saved_pc (gdbarch
, d10v_frame_saved_pc
);
1631 set_gdbarch_saved_pc_after_call (gdbarch
, d10v_saved_pc_after_call
);
1632 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
1633 set_gdbarch_stack_align (gdbarch
, d10v_stack_align
);
1635 set_gdbarch_register_sim_regno (gdbarch
, d10v_register_sim_regno
);
1636 set_gdbarch_extra_stack_alignment_needed (gdbarch
, 0);
1642 extern void (*target_resume_hook
) (void);
1643 extern void (*target_wait_loop_hook
) (void);
1646 _initialize_d10v_tdep (void)
1648 register_gdbarch_init (bfd_arch_d10v
, d10v_gdbarch_init
);
1650 tm_print_insn
= print_insn_d10v
;
1652 target_resume_hook
= d10v_eva_prepare_to_trace
;
1653 target_wait_loop_hook
= d10v_eva_get_trace_data
;
1655 add_com ("regs", class_vars
, show_regs
, "Print all registers");
1657 add_com ("itrace", class_support
, trace_command
,
1658 "Enable tracing of instruction execution.");
1660 add_com ("iuntrace", class_support
, untrace_command
,
1661 "Disable tracing of instruction execution.");
1663 add_com ("itdisassemble", class_vars
, tdisassemble_command
,
1664 "Disassemble the trace buffer.\n\
1665 Two optional arguments specify a range of trace buffer entries\n\
1666 as reported by info trace (NOT addresses!).");
1668 add_info ("itrace", trace_info
,
1669 "Display info about the trace data buffer.");
1671 add_show_from_set (add_set_cmd ("itracedisplay", no_class
,
1672 var_integer
, (char *) &trace_display
,
1673 "Set automatic display of trace.\n", &setlist
),
1675 add_show_from_set (add_set_cmd ("itracesource", no_class
,
1676 var_integer
, (char *) &default_trace_show_source
,
1677 "Set display of source code with trace.\n", &setlist
),