1 /* Target-dependent code for Mitsubishi D10V, for GDB.
3 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* Contributed by Martin Hunt, hunt@cygnus.com */
31 #include "gdb_string.h"
38 #include "arch-utils.h"
41 #include "floatformat.h"
42 #include "gdb/sim-d10v.h"
43 #include "sim-regno.h"
45 struct frame_extra_info
56 unsigned long (*dmap_register
) (int nr
);
57 unsigned long (*imap_register
) (int nr
);
60 /* These are the addresses the D10V-EVA board maps data and
61 instruction memory to. */
64 DMEM_START
= 0x2000000,
65 IMEM_START
= 0x1000000,
66 STACK_START
= 0x200bffe
69 /* d10v register names. */
84 /* d10v calling convention. */
85 ARG1_REGNUM
= R0_REGNUM
,
86 ARGN_REGNUM
= R3_REGNUM
,
87 RET1_REGNUM
= R0_REGNUM
,
90 #define NR_DMAP_REGS (gdbarch_tdep (current_gdbarch)->nr_dmap_regs)
91 #define A0_REGNUM (gdbarch_tdep (current_gdbarch)->a0_regnum)
95 extern void _initialize_d10v_tdep (void);
97 static CORE_ADDR
d10v_read_sp (void);
99 static CORE_ADDR
d10v_read_fp (void);
101 static void d10v_eva_prepare_to_trace (void);
103 static void d10v_eva_get_trace_data (void);
105 static int prologue_find_regs (unsigned short op
, struct frame_info
*fi
,
108 static void d10v_frame_init_saved_regs (struct frame_info
*);
110 static void do_d10v_pop_frame (struct frame_info
*fi
);
113 d10v_frame_chain_valid (CORE_ADDR chain
, struct frame_info
*frame
)
115 if (chain
!= 0 && frame
!= NULL
)
117 if (DEPRECATED_PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
118 return 1; /* Path back from a call dummy must be valid. */
119 return ((frame
)->pc
> IMEM_START
120 && !inside_main_func (frame
->pc
));
126 d10v_stack_align (CORE_ADDR len
)
128 return (len
+ 1) & ~1;
131 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
132 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
133 and TYPE is the type (which is known to be struct, union or array).
135 The d10v returns anything less than 8 bytes in size in
139 d10v_use_struct_convention (int gcc_p
, struct type
*type
)
143 /* The d10v only passes a struct in a register when that structure
144 has an alignment that matches the size of a register. */
145 /* If the structure doesn't fit in 4 registers, put it on the
147 if (TYPE_LENGTH (type
) > 8)
149 /* If the struct contains only one field, don't put it on the stack
150 - gcc can fit it in one or more registers. */
151 if (TYPE_NFIELDS (type
) == 1)
153 alignment
= TYPE_LENGTH (TYPE_FIELD_TYPE (type
, 0));
154 for (i
= 1; i
< TYPE_NFIELDS (type
); i
++)
156 /* If the alignment changes, just assume it goes on the
158 if (TYPE_LENGTH (TYPE_FIELD_TYPE (type
, i
)) != alignment
)
161 /* If the alignment is suitable for the d10v's 16 bit registers,
162 don't put it on the stack. */
163 if (alignment
== 2 || alignment
== 4)
169 static const unsigned char *
170 d10v_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
172 static unsigned char breakpoint
[] =
173 {0x2f, 0x90, 0x5e, 0x00};
174 *lenptr
= sizeof (breakpoint
);
178 /* Map the REG_NR onto an ascii name. Return NULL or an empty string
179 when the reg_nr isn't valid. */
183 TS2_IMAP0_REGNUM
= 32,
184 TS2_DMAP_REGNUM
= 34,
185 TS2_NR_DMAP_REGS
= 1,
190 d10v_ts2_register_name (int reg_nr
)
192 static char *register_names
[] =
194 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
195 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
196 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
197 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
198 "imap0", "imap1", "dmap", "a0", "a1"
202 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
204 return register_names
[reg_nr
];
209 TS3_IMAP0_REGNUM
= 36,
210 TS3_DMAP0_REGNUM
= 38,
211 TS3_NR_DMAP_REGS
= 4,
216 d10v_ts3_register_name (int reg_nr
)
218 static char *register_names
[] =
220 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
221 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
222 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
223 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
227 "dmap0", "dmap1", "dmap2", "dmap3"
231 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
233 return register_names
[reg_nr
];
236 /* Access the DMAP/IMAP registers in a target independent way.
238 Divide the D10V's 64k data space into four 16k segments:
239 0x0000 -- 0x3fff, 0x4000 -- 0x7fff, 0x8000 -- 0xbfff, and
242 On the TS2, the first two segments (0x0000 -- 0x3fff, 0x4000 --
243 0x7fff) always map to the on-chip data RAM, and the fourth always
244 maps to I/O space. The third (0x8000 - 0xbfff) can be mapped into
245 unified memory or instruction memory, under the control of the
246 single DMAP register.
248 On the TS3, there are four DMAP registers, each of which controls
249 one of the segments. */
252 d10v_ts2_dmap_register (int reg_nr
)
260 return read_register (TS2_DMAP_REGNUM
);
267 d10v_ts3_dmap_register (int reg_nr
)
269 return read_register (TS3_DMAP0_REGNUM
+ reg_nr
);
273 d10v_dmap_register (int reg_nr
)
275 return gdbarch_tdep (current_gdbarch
)->dmap_register (reg_nr
);
279 d10v_ts2_imap_register (int reg_nr
)
281 return read_register (TS2_IMAP0_REGNUM
+ reg_nr
);
285 d10v_ts3_imap_register (int reg_nr
)
287 return read_register (TS3_IMAP0_REGNUM
+ reg_nr
);
291 d10v_imap_register (int reg_nr
)
293 return gdbarch_tdep (current_gdbarch
)->imap_register (reg_nr
);
296 /* MAP GDB's internal register numbering (determined by the layout fo
297 the REGISTER_BYTE array) onto the simulator's register
301 d10v_ts2_register_sim_regno (int nr
)
303 if (legacy_register_sim_regno (nr
) < 0)
304 return legacy_register_sim_regno (nr
);
305 if (nr
>= TS2_IMAP0_REGNUM
306 && nr
< TS2_IMAP0_REGNUM
+ NR_IMAP_REGS
)
307 return nr
- TS2_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
308 if (nr
== TS2_DMAP_REGNUM
)
309 return nr
- TS2_DMAP_REGNUM
+ SIM_D10V_TS2_DMAP_REGNUM
;
310 if (nr
>= TS2_A0_REGNUM
311 && nr
< TS2_A0_REGNUM
+ NR_A_REGS
)
312 return nr
- TS2_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
317 d10v_ts3_register_sim_regno (int nr
)
319 if (legacy_register_sim_regno (nr
) < 0)
320 return legacy_register_sim_regno (nr
);
321 if (nr
>= TS3_IMAP0_REGNUM
322 && nr
< TS3_IMAP0_REGNUM
+ NR_IMAP_REGS
)
323 return nr
- TS3_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
324 if (nr
>= TS3_DMAP0_REGNUM
325 && nr
< TS3_DMAP0_REGNUM
+ TS3_NR_DMAP_REGS
)
326 return nr
- TS3_DMAP0_REGNUM
+ SIM_D10V_DMAP0_REGNUM
;
327 if (nr
>= TS3_A0_REGNUM
328 && nr
< TS3_A0_REGNUM
+ NR_A_REGS
)
329 return nr
- TS3_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
333 /* Index within `registers' of the first byte of the space for
337 d10v_register_byte (int reg_nr
)
339 if (reg_nr
< A0_REGNUM
)
341 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
342 return (A0_REGNUM
* 2
343 + (reg_nr
- A0_REGNUM
) * 8);
345 return (A0_REGNUM
* 2
347 + (reg_nr
- A0_REGNUM
- NR_A_REGS
) * 2);
350 /* Number of bytes of storage in the actual machine representation for
354 d10v_register_raw_size (int reg_nr
)
356 if (reg_nr
< A0_REGNUM
)
358 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
364 /* Return the GDB type object for the "standard" data type
365 of data in register N. */
368 d10v_register_virtual_type (int reg_nr
)
370 if (reg_nr
== PC_REGNUM
)
371 return builtin_type_void_func_ptr
;
372 if (reg_nr
== _SP_REGNUM
|| reg_nr
== _FP_REGNUM
)
373 return builtin_type_void_data_ptr
;
374 else if (reg_nr
>= A0_REGNUM
375 && reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
376 return builtin_type_int64
;
378 return builtin_type_int16
;
382 d10v_daddr_p (CORE_ADDR x
)
384 return (((x
) & 0x3000000) == DMEM_START
);
388 d10v_iaddr_p (CORE_ADDR x
)
390 return (((x
) & 0x3000000) == IMEM_START
);
394 d10v_make_daddr (CORE_ADDR x
)
396 return ((x
) | DMEM_START
);
400 d10v_make_iaddr (CORE_ADDR x
)
402 if (d10v_iaddr_p (x
))
403 return x
; /* Idempotency -- x is already in the IMEM space. */
405 return (((x
) << 2) | IMEM_START
);
409 d10v_convert_iaddr_to_raw (CORE_ADDR x
)
411 return (((x
) >> 2) & 0xffff);
415 d10v_convert_daddr_to_raw (CORE_ADDR x
)
417 return ((x
) & 0xffff);
421 d10v_address_to_pointer (struct type
*type
, void *buf
, CORE_ADDR addr
)
423 /* Is it a code address? */
424 if (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
425 || TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_METHOD
)
427 store_unsigned_integer (buf
, TYPE_LENGTH (type
),
428 d10v_convert_iaddr_to_raw (addr
));
432 /* Strip off any upper segment bits. */
433 store_unsigned_integer (buf
, TYPE_LENGTH (type
),
434 d10v_convert_daddr_to_raw (addr
));
439 d10v_pointer_to_address (struct type
*type
, void *buf
)
441 CORE_ADDR addr
= extract_address (buf
, TYPE_LENGTH (type
));
443 /* Is it a code address? */
444 if (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
445 || TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_METHOD
446 || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type
)))
447 return d10v_make_iaddr (addr
);
449 return d10v_make_daddr (addr
);
452 /* Don't do anything if we have an integer, this way users can type 'x
453 <addr>' w/o having gdb outsmart them. The internal gdb conversions
454 to the correct space are taken care of in the pointer_to_address
455 function. If we don't do this, 'x $fp' wouldn't work. */
457 d10v_integer_to_address (struct type
*type
, void *buf
)
460 val
= unpack_long (type
, buf
);
464 /* Store the address of the place in which to copy the structure the
465 subroutine will return. This is called from call_function.
467 We store structs through a pointer passed in the first Argument
471 d10v_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
473 write_register (ARG1_REGNUM
, (addr
));
476 /* Write into appropriate registers a function return value
477 of type TYPE, given in virtual format.
479 Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */
482 d10v_store_return_value (struct type
*type
, char *valbuf
)
485 /* Only char return values need to be shifted right within R0. */
486 if (TYPE_LENGTH (type
) == 1
487 && TYPE_CODE (type
) == TYPE_CODE_INT
)
489 /* zero the high byte */
490 deprecated_write_register_bytes (REGISTER_BYTE (RET1_REGNUM
), &tmp
, 1);
491 /* copy the low byte */
492 deprecated_write_register_bytes (REGISTER_BYTE (RET1_REGNUM
) + 1,
496 deprecated_write_register_bytes (REGISTER_BYTE (RET1_REGNUM
),
497 valbuf
, TYPE_LENGTH (type
));
500 /* Extract from an array REGBUF containing the (raw) register state
501 the address in which a function should return its structure value,
502 as a CORE_ADDR (or an expression that can be used as one). */
505 d10v_extract_struct_value_address (char *regbuf
)
507 return (extract_address ((regbuf
) + REGISTER_BYTE (ARG1_REGNUM
),
508 REGISTER_RAW_SIZE (ARG1_REGNUM
))
513 d10v_frame_saved_pc (struct frame_info
*frame
)
515 if (DEPRECATED_PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
516 return d10v_make_iaddr (deprecated_read_register_dummy (frame
->pc
,
520 return ((frame
)->extra_info
->return_pc
);
523 /* Immediately after a function call, return the saved pc. We can't
524 use frame->return_pc beause that is determined by reading R13 off
525 the stack and that may not be written yet. */
528 d10v_saved_pc_after_call (struct frame_info
*frame
)
530 return ((read_register (LR_REGNUM
) << 2)
534 /* Discard from the stack the innermost frame, restoring all saved
538 d10v_pop_frame (void)
540 generic_pop_current_frame (do_d10v_pop_frame
);
544 do_d10v_pop_frame (struct frame_info
*fi
)
550 fp
= get_frame_base (fi
);
551 /* fill out fsr with the address of where each */
552 /* register was stored in the frame */
553 d10v_frame_init_saved_regs (fi
);
555 /* now update the current registers with the old values */
556 for (regnum
= A0_REGNUM
; regnum
< A0_REGNUM
+ NR_A_REGS
; regnum
++)
558 if (fi
->saved_regs
[regnum
])
560 read_memory (fi
->saved_regs
[regnum
], raw_buffer
, REGISTER_RAW_SIZE (regnum
));
561 deprecated_write_register_bytes (REGISTER_BYTE (regnum
), raw_buffer
,
562 REGISTER_RAW_SIZE (regnum
));
565 for (regnum
= 0; regnum
< SP_REGNUM
; regnum
++)
567 if (fi
->saved_regs
[regnum
])
569 write_register (regnum
, read_memory_unsigned_integer (fi
->saved_regs
[regnum
], REGISTER_RAW_SIZE (regnum
)));
572 if (fi
->saved_regs
[PSW_REGNUM
])
574 write_register (PSW_REGNUM
, read_memory_unsigned_integer (fi
->saved_regs
[PSW_REGNUM
], REGISTER_RAW_SIZE (PSW_REGNUM
)));
577 write_register (PC_REGNUM
, read_register (LR_REGNUM
));
578 write_register (SP_REGNUM
, fp
+ fi
->extra_info
->size
);
579 target_store_registers (-1);
580 flush_cached_frames ();
584 check_prologue (unsigned short op
)
587 if ((op
& 0x7E1F) == 0x6C1F)
591 if ((op
& 0x7E3F) == 0x6E1F)
595 if ((op
& 0x7FE1) == 0x01E1)
607 if ((op
& 0x7E1F) == 0x681E)
611 if ((op
& 0x7E3F) == 0x3A1E)
618 d10v_skip_prologue (CORE_ADDR pc
)
621 unsigned short op1
, op2
;
622 CORE_ADDR func_addr
, func_end
;
623 struct symtab_and_line sal
;
625 /* If we have line debugging information, then the end of the */
626 /* prologue should the first assembly instruction of the first source line */
627 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
629 sal
= find_pc_line (func_addr
, 0);
630 if (sal
.end
&& sal
.end
< func_end
)
634 if (target_read_memory (pc
, (char *) &op
, 4))
635 return pc
; /* Can't access it -- assume no prologue. */
639 op
= (unsigned long) read_memory_integer (pc
, 4);
640 if ((op
& 0xC0000000) == 0xC0000000)
642 /* long instruction */
643 if (((op
& 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */
644 ((op
& 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */
645 ((op
& 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */
650 /* short instructions */
651 if ((op
& 0xC0000000) == 0x80000000)
653 op2
= (op
& 0x3FFF8000) >> 15;
658 op1
= (op
& 0x3FFF8000) >> 15;
661 if (check_prologue (op1
))
663 if (!check_prologue (op2
))
665 /* if the previous opcode was really part of the prologue */
666 /* and not just a NOP, then we want to break after both instructions */
680 /* Given a GDB frame, determine the address of the calling function's frame.
681 This will be used to create a new GDB frame struct, and then
682 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
686 d10v_frame_chain (struct frame_info
*fi
)
690 /* A generic call dummy's frame is the same as caller's. */
691 if (DEPRECATED_PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
694 d10v_frame_init_saved_regs (fi
);
697 if (fi
->extra_info
->return_pc
== IMEM_START
698 || inside_entry_file (fi
->extra_info
->return_pc
))
700 /* This is meant to halt the backtrace at "_start".
701 Make sure we don't halt it at a generic dummy frame. */
702 if (!DEPRECATED_PC_IN_CALL_DUMMY (fi
->extra_info
->return_pc
, 0, 0))
703 return (CORE_ADDR
) 0;
706 if (!fi
->saved_regs
[FP_REGNUM
])
708 if (!fi
->saved_regs
[SP_REGNUM
]
709 || fi
->saved_regs
[SP_REGNUM
] == STACK_START
)
710 return (CORE_ADDR
) 0;
712 return fi
->saved_regs
[SP_REGNUM
];
715 addr
= read_memory_unsigned_integer (fi
->saved_regs
[FP_REGNUM
],
716 REGISTER_RAW_SIZE (FP_REGNUM
));
718 return (CORE_ADDR
) 0;
720 return d10v_make_daddr (addr
);
723 static int next_addr
, uses_frame
;
726 prologue_find_regs (unsigned short op
, struct frame_info
*fi
, CORE_ADDR addr
)
731 if ((op
& 0x7E1F) == 0x6C1F)
733 n
= (op
& 0x1E0) >> 5;
735 fi
->saved_regs
[n
] = next_addr
;
740 else if ((op
& 0x7E3F) == 0x6E1F)
742 n
= (op
& 0x1E0) >> 5;
744 fi
->saved_regs
[n
] = next_addr
;
745 fi
->saved_regs
[n
+ 1] = next_addr
+ 2;
750 if ((op
& 0x7FE1) == 0x01E1)
752 n
= (op
& 0x1E) >> 1;
771 if ((op
& 0x7E1F) == 0x681E)
773 n
= (op
& 0x1E0) >> 5;
774 fi
->saved_regs
[n
] = next_addr
;
779 if ((op
& 0x7E3F) == 0x3A1E)
781 n
= (op
& 0x1E0) >> 5;
782 fi
->saved_regs
[n
] = next_addr
;
783 fi
->saved_regs
[n
+ 1] = next_addr
+ 2;
790 /* Put here the code to store, into fi->saved_regs, the addresses of
791 the saved registers of frame described by FRAME_INFO. This
792 includes special registers such as pc and fp saved in special ways
793 in the stack frame. sp is even more special: the address we return
794 for it IS the sp for the next frame. */
797 d10v_frame_init_saved_regs (struct frame_info
*fi
)
801 unsigned short op1
, op2
;
805 memset (fi
->saved_regs
, 0, SIZEOF_FRAME_SAVED_REGS
);
808 pc
= get_pc_function_start (fi
->pc
);
813 op
= (unsigned long) read_memory_integer (pc
, 4);
814 if ((op
& 0xC0000000) == 0xC0000000)
816 /* long instruction */
817 if ((op
& 0x3FFF0000) == 0x01FF0000)
820 short n
= op
& 0xFFFF;
823 else if ((op
& 0x3F0F0000) == 0x340F0000)
825 /* st rn, @(offset,sp) */
826 short offset
= op
& 0xFFFF;
827 short n
= (op
>> 20) & 0xF;
828 fi
->saved_regs
[n
] = next_addr
+ offset
;
830 else if ((op
& 0x3F1F0000) == 0x350F0000)
832 /* st2w rn, @(offset,sp) */
833 short offset
= op
& 0xFFFF;
834 short n
= (op
>> 20) & 0xF;
835 fi
->saved_regs
[n
] = next_addr
+ offset
;
836 fi
->saved_regs
[n
+ 1] = next_addr
+ offset
+ 2;
843 /* short instructions */
844 if ((op
& 0xC0000000) == 0x80000000)
846 op2
= (op
& 0x3FFF8000) >> 15;
851 op1
= (op
& 0x3FFF8000) >> 15;
854 if (!prologue_find_regs (op1
, fi
, pc
)
855 || !prologue_find_regs (op2
, fi
, pc
))
861 fi
->extra_info
->size
= -next_addr
;
864 fp
= d10v_read_sp ();
866 for (i
= 0; i
< NUM_REGS
- 1; i
++)
867 if (fi
->saved_regs
[i
])
869 fi
->saved_regs
[i
] = fp
- (next_addr
- fi
->saved_regs
[i
]);
872 if (fi
->saved_regs
[LR_REGNUM
])
875 = read_memory_unsigned_integer (fi
->saved_regs
[LR_REGNUM
],
876 REGISTER_RAW_SIZE (LR_REGNUM
));
877 fi
->extra_info
->return_pc
= d10v_make_iaddr (return_pc
);
881 fi
->extra_info
->return_pc
= d10v_make_iaddr (read_register (LR_REGNUM
));
884 /* The SP is not normally (ever?) saved, but check anyway */
885 if (!fi
->saved_regs
[SP_REGNUM
])
887 /* if the FP was saved, that means the current FP is valid, */
888 /* otherwise, it isn't being used, so we use the SP instead */
890 fi
->saved_regs
[SP_REGNUM
]
891 = d10v_read_fp () + fi
->extra_info
->size
;
894 fi
->saved_regs
[SP_REGNUM
] = fp
+ fi
->extra_info
->size
;
895 fi
->extra_info
->frameless
= 1;
896 fi
->saved_regs
[FP_REGNUM
] = 0;
902 d10v_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
904 fi
->extra_info
= (struct frame_extra_info
*)
905 frame_obstack_alloc (sizeof (struct frame_extra_info
));
906 frame_saved_regs_zalloc (fi
);
908 fi
->extra_info
->frameless
= 0;
909 fi
->extra_info
->size
= 0;
910 fi
->extra_info
->return_pc
= 0;
912 /* If fi->pc is zero, but this is not the outermost frame,
913 then let's snatch the return_pc from the callee, so that
914 DEPRECATED_PC_IN_CALL_DUMMY will work. */
915 if (fi
->pc
== 0 && fi
->level
!= 0 && fi
->next
!= NULL
)
916 fi
->pc
= d10v_frame_saved_pc (fi
->next
);
918 /* The call dummy doesn't save any registers on the stack, so we can
920 if (DEPRECATED_PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
926 d10v_frame_init_saved_regs (fi
);
931 show_regs (char *args
, int from_tty
)
934 printf_filtered ("PC=%04lx (0x%lx) PSW=%04lx RPT_S=%04lx RPT_E=%04lx RPT_C=%04lx\n",
935 (long) read_register (PC_REGNUM
),
936 (long) d10v_make_iaddr (read_register (PC_REGNUM
)),
937 (long) read_register (PSW_REGNUM
),
938 (long) read_register (24),
939 (long) read_register (25),
940 (long) read_register (23));
941 printf_filtered ("R0-R7 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
942 (long) read_register (0),
943 (long) read_register (1),
944 (long) read_register (2),
945 (long) read_register (3),
946 (long) read_register (4),
947 (long) read_register (5),
948 (long) read_register (6),
949 (long) read_register (7));
950 printf_filtered ("R8-R15 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
951 (long) read_register (8),
952 (long) read_register (9),
953 (long) read_register (10),
954 (long) read_register (11),
955 (long) read_register (12),
956 (long) read_register (13),
957 (long) read_register (14),
958 (long) read_register (15));
959 for (a
= 0; a
< NR_IMAP_REGS
; a
++)
962 printf_filtered (" ");
963 printf_filtered ("IMAP%d %04lx", a
, d10v_imap_register (a
));
965 if (NR_DMAP_REGS
== 1)
966 printf_filtered (" DMAP %04lx\n", d10v_dmap_register (2));
969 for (a
= 0; a
< NR_DMAP_REGS
; a
++)
971 printf_filtered (" DMAP%d %04lx", a
, d10v_dmap_register (a
));
973 printf_filtered ("\n");
975 printf_filtered ("A0-A%d", NR_A_REGS
- 1);
976 for (a
= A0_REGNUM
; a
< A0_REGNUM
+ NR_A_REGS
; a
++)
978 char num
[MAX_REGISTER_RAW_SIZE
];
980 printf_filtered (" ");
981 deprecated_read_register_gen (a
, (char *) &num
);
982 for (i
= 0; i
< MAX_REGISTER_RAW_SIZE
; i
++)
984 printf_filtered ("%02x", (num
[i
] & 0xff));
987 printf_filtered ("\n");
991 d10v_read_pc (ptid_t ptid
)
997 save_ptid
= inferior_ptid
;
998 inferior_ptid
= ptid
;
999 pc
= (int) read_register (PC_REGNUM
);
1000 inferior_ptid
= save_ptid
;
1001 retval
= d10v_make_iaddr (pc
);
1006 d10v_write_pc (CORE_ADDR val
, ptid_t ptid
)
1010 save_ptid
= inferior_ptid
;
1011 inferior_ptid
= ptid
;
1012 write_register (PC_REGNUM
, d10v_convert_iaddr_to_raw (val
));
1013 inferior_ptid
= save_ptid
;
1019 return (d10v_make_daddr (read_register (SP_REGNUM
)));
1023 d10v_write_sp (CORE_ADDR val
)
1025 write_register (SP_REGNUM
, d10v_convert_daddr_to_raw (val
));
1031 return (d10v_make_daddr (read_register (FP_REGNUM
)));
1034 /* Function: push_return_address (pc)
1035 Set up the return address for the inferior function call.
1036 Needed for targets where we don't actually execute a JSR/BSR instruction */
1039 d10v_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1041 write_register (LR_REGNUM
, d10v_convert_iaddr_to_raw (CALL_DUMMY_ADDRESS ()));
1046 /* When arguments must be pushed onto the stack, they go on in reverse
1047 order. The below implements a FILO (stack) to do this. */
1052 struct stack_item
*prev
;
1056 static struct stack_item
*push_stack_item (struct stack_item
*prev
,
1057 void *contents
, int len
);
1058 static struct stack_item
*
1059 push_stack_item (struct stack_item
*prev
, void *contents
, int len
)
1061 struct stack_item
*si
;
1062 si
= xmalloc (sizeof (struct stack_item
));
1063 si
->data
= xmalloc (len
);
1066 memcpy (si
->data
, contents
, len
);
1070 static struct stack_item
*pop_stack_item (struct stack_item
*si
);
1071 static struct stack_item
*
1072 pop_stack_item (struct stack_item
*si
)
1074 struct stack_item
*dead
= si
;
1083 d10v_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1084 int struct_return
, CORE_ADDR struct_addr
)
1087 int regnum
= ARG1_REGNUM
;
1088 struct stack_item
*si
= NULL
;
1091 /* If struct_return is true, then the struct return address will
1092 consume one argument-passing register. No need to actually
1093 write the value to the register -- that's done by
1094 d10v_store_struct_return(). */
1099 /* Fill in registers and arg lists */
1100 for (i
= 0; i
< nargs
; i
++)
1102 struct value
*arg
= args
[i
];
1103 struct type
*type
= check_typedef (VALUE_TYPE (arg
));
1104 char *contents
= VALUE_CONTENTS (arg
);
1105 int len
= TYPE_LENGTH (type
);
1106 int aligned_regnum
= (regnum
+ 1) & ~1;
1108 /* printf ("push: type=%d len=%d\n", TYPE_CODE (type), len); */
1109 if (len
<= 2 && regnum
<= ARGN_REGNUM
)
1110 /* fits in a single register, do not align */
1112 val
= extract_unsigned_integer (contents
, len
);
1113 write_register (regnum
++, val
);
1115 else if (len
<= (ARGN_REGNUM
- aligned_regnum
+ 1) * 2)
1116 /* value fits in remaining registers, store keeping left
1120 regnum
= aligned_regnum
;
1121 for (b
= 0; b
< (len
& ~1); b
+= 2)
1123 val
= extract_unsigned_integer (&contents
[b
], 2);
1124 write_register (regnum
++, val
);
1128 val
= extract_unsigned_integer (&contents
[b
], 1);
1129 write_register (regnum
++, (val
<< 8));
1134 /* arg will go onto stack */
1135 regnum
= ARGN_REGNUM
+ 1;
1136 si
= push_stack_item (si
, contents
, len
);
1142 sp
= (sp
- si
->len
) & ~1;
1143 write_memory (sp
, si
->data
, si
->len
);
1144 si
= pop_stack_item (si
);
1151 /* Given a return value in `regbuf' with a type `valtype',
1152 extract and copy its value into `valbuf'. */
1155 d10v_extract_return_value (struct type
*type
, char regbuf
[REGISTER_BYTES
],
1160 printf("RET: TYPE=%d len=%d r%d=0x%x\n", TYPE_CODE (type
),
1161 TYPE_LENGTH (type
), RET1_REGNUM
- R0_REGNUM
,
1162 (int) extract_unsigned_integer (regbuf
+ REGISTER_BYTE(RET1_REGNUM
),
1163 REGISTER_RAW_SIZE (RET1_REGNUM
)));
1165 len
= TYPE_LENGTH (type
);
1170 c
= extract_unsigned_integer (regbuf
+ REGISTER_BYTE (RET1_REGNUM
),
1171 REGISTER_RAW_SIZE (RET1_REGNUM
));
1172 store_unsigned_integer (valbuf
, 1, c
);
1174 else if ((len
& 1) == 0)
1175 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
), len
);
1178 /* For return values of odd size, the first byte is in the
1179 least significant part of the first register. The
1180 remaining bytes in remaining registers. Interestingly,
1181 when such values are passed in, the last byte is in the
1182 most significant byte of that same register - wierd. */
1183 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
) + 1, len
);
1187 /* Translate a GDB virtual ADDR/LEN into a format the remote target
1188 understands. Returns number of bytes that can be transfered
1189 starting at TARG_ADDR. Return ZERO if no bytes can be transfered
1190 (segmentation fault). Since the simulator knows all about how the
1191 VM system works, we just call that to do the translation. */
1194 remote_d10v_translate_xfer_address (CORE_ADDR memaddr
, int nr_bytes
,
1195 CORE_ADDR
*targ_addr
, int *targ_len
)
1199 out_len
= sim_d10v_translate_addr (memaddr
, nr_bytes
,
1202 d10v_imap_register
);
1203 *targ_addr
= out_addr
;
1204 *targ_len
= out_len
;
1208 /* The following code implements access to, and display of, the D10V's
1209 instruction trace buffer. The buffer consists of 64K or more
1210 4-byte words of data, of which each words includes an 8-bit count,
1211 an 8-bit segment number, and a 16-bit instruction address.
1213 In theory, the trace buffer is continuously capturing instruction
1214 data that the CPU presents on its "debug bus", but in practice, the
1215 ROMified GDB stub only enables tracing when it continues or steps
1216 the program, and stops tracing when the program stops; so it
1217 actually works for GDB to read the buffer counter out of memory and
1218 then read each trace word. The counter records where the tracing
1219 stops, but there is no record of where it started, so we remember
1220 the PC when we resumed and then search backwards in the trace
1221 buffer for a word that includes that address. This is not perfect,
1222 because you will miss trace data if the resumption PC is the target
1223 of a branch. (The value of the buffer counter is semi-random, any
1224 trace data from a previous program stop is gone.) */
1226 /* The address of the last word recorded in the trace buffer. */
1228 #define DBBC_ADDR (0xd80000)
1230 /* The base of the trace buffer, at least for the "Board_0". */
1232 #define TRACE_BUFFER_BASE (0xf40000)
1234 static void trace_command (char *, int);
1236 static void untrace_command (char *, int);
1238 static void trace_info (char *, int);
1240 static void tdisassemble_command (char *, int);
1242 static void display_trace (int, int);
1244 /* True when instruction traces are being collected. */
1248 /* Remembered PC. */
1250 static CORE_ADDR last_pc
;
1252 /* True when trace output should be displayed whenever program stops. */
1254 static int trace_display
;
1256 /* True when trace listing should include source lines. */
1258 static int default_trace_show_source
= 1;
1269 trace_command (char *args
, int from_tty
)
1271 /* Clear the host-side trace buffer, allocating space if needed. */
1272 trace_data
.size
= 0;
1273 if (trace_data
.counts
== NULL
)
1274 trace_data
.counts
= (short *) xmalloc (65536 * sizeof (short));
1275 if (trace_data
.addrs
== NULL
)
1276 trace_data
.addrs
= (CORE_ADDR
*) xmalloc (65536 * sizeof (CORE_ADDR
));
1280 printf_filtered ("Tracing is now on.\n");
1284 untrace_command (char *args
, int from_tty
)
1288 printf_filtered ("Tracing is now off.\n");
1292 trace_info (char *args
, int from_tty
)
1296 if (trace_data
.size
)
1298 printf_filtered ("%d entries in trace buffer:\n", trace_data
.size
);
1300 for (i
= 0; i
< trace_data
.size
; ++i
)
1302 printf_filtered ("%d: %d instruction%s at 0x%s\n",
1304 trace_data
.counts
[i
],
1305 (trace_data
.counts
[i
] == 1 ? "" : "s"),
1306 paddr_nz (trace_data
.addrs
[i
]));
1310 printf_filtered ("No entries in trace buffer.\n");
1312 printf_filtered ("Tracing is currently %s.\n", (tracing
? "on" : "off"));
1315 /* Print the instruction at address MEMADDR in debugged memory,
1316 on STREAM. Returns length of the instruction, in bytes. */
1319 print_insn (CORE_ADDR memaddr
, struct ui_file
*stream
)
1321 /* If there's no disassembler, something is very wrong. */
1322 if (tm_print_insn
== NULL
)
1323 internal_error (__FILE__
, __LINE__
,
1324 "print_insn: no disassembler");
1326 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1327 tm_print_insn_info
.endian
= BFD_ENDIAN_BIG
;
1329 tm_print_insn_info
.endian
= BFD_ENDIAN_LITTLE
;
1330 return TARGET_PRINT_INSN (memaddr
, &tm_print_insn_info
);
1334 d10v_eva_prepare_to_trace (void)
1339 last_pc
= read_register (PC_REGNUM
);
1342 /* Collect trace data from the target board and format it into a form
1343 more useful for display. */
1346 d10v_eva_get_trace_data (void)
1348 int count
, i
, j
, oldsize
;
1349 int trace_addr
, trace_seg
, trace_cnt
, next_cnt
;
1350 unsigned int last_trace
, trace_word
, next_word
;
1351 unsigned int *tmpspace
;
1356 tmpspace
= xmalloc (65536 * sizeof (unsigned int));
1358 last_trace
= read_memory_unsigned_integer (DBBC_ADDR
, 2) << 2;
1360 /* Collect buffer contents from the target, stopping when we reach
1361 the word recorded when execution resumed. */
1364 while (last_trace
> 0)
1368 read_memory_unsigned_integer (TRACE_BUFFER_BASE
+ last_trace
, 4);
1369 trace_addr
= trace_word
& 0xffff;
1371 /* Ignore an apparently nonsensical entry. */
1372 if (trace_addr
== 0xffd5)
1374 tmpspace
[count
++] = trace_word
;
1375 if (trace_addr
== last_pc
)
1381 /* Move the data to the host-side trace buffer, adjusting counts to
1382 include the last instruction executed and transforming the address
1383 into something that GDB likes. */
1385 for (i
= 0; i
< count
; ++i
)
1387 trace_word
= tmpspace
[i
];
1388 next_word
= ((i
== 0) ? 0 : tmpspace
[i
- 1]);
1389 trace_addr
= trace_word
& 0xffff;
1390 next_cnt
= (next_word
>> 24) & 0xff;
1391 j
= trace_data
.size
+ count
- i
- 1;
1392 trace_data
.addrs
[j
] = (trace_addr
<< 2) + 0x1000000;
1393 trace_data
.counts
[j
] = next_cnt
+ 1;
1396 oldsize
= trace_data
.size
;
1397 trace_data
.size
+= count
;
1402 display_trace (oldsize
, trace_data
.size
);
1406 tdisassemble_command (char *arg
, int from_tty
)
1409 CORE_ADDR low
, high
;
1415 high
= trace_data
.size
;
1417 else if (!(space_index
= (char *) strchr (arg
, ' ')))
1419 low
= parse_and_eval_address (arg
);
1424 /* Two arguments. */
1425 *space_index
= '\0';
1426 low
= parse_and_eval_address (arg
);
1427 high
= parse_and_eval_address (space_index
+ 1);
1432 printf_filtered ("Dump of trace from %s to %s:\n", paddr_u (low
), paddr_u (high
));
1434 display_trace (low
, high
);
1436 printf_filtered ("End of trace dump.\n");
1437 gdb_flush (gdb_stdout
);
1441 display_trace (int low
, int high
)
1443 int i
, count
, trace_show_source
, first
, suppress
;
1444 CORE_ADDR next_address
;
1446 trace_show_source
= default_trace_show_source
;
1447 if (!have_full_symbols () && !have_partial_symbols ())
1449 trace_show_source
= 0;
1450 printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
1451 printf_filtered ("Trace will not display any source.\n");
1456 for (i
= low
; i
< high
; ++i
)
1458 next_address
= trace_data
.addrs
[i
];
1459 count
= trace_data
.counts
[i
];
1463 if (trace_show_source
)
1465 struct symtab_and_line sal
, sal_prev
;
1467 sal_prev
= find_pc_line (next_address
- 4, 0);
1468 sal
= find_pc_line (next_address
, 0);
1472 if (first
|| sal
.line
!= sal_prev
.line
)
1473 print_source_lines (sal
.symtab
, sal
.line
, sal
.line
+ 1, 0);
1479 /* FIXME-32x64--assumes sal.pc fits in long. */
1480 printf_filtered ("No source file for address %s.\n",
1481 local_hex_string ((unsigned long) sal
.pc
));
1486 print_address (next_address
, gdb_stdout
);
1487 printf_filtered (":");
1488 printf_filtered ("\t");
1490 next_address
= next_address
+ print_insn (next_address
, gdb_stdout
);
1491 printf_filtered ("\n");
1492 gdb_flush (gdb_stdout
);
1498 static gdbarch_init_ftype d10v_gdbarch_init
;
1500 static struct gdbarch
*
1501 d10v_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1503 static LONGEST d10v_call_dummy_words
[] =
1505 struct gdbarch
*gdbarch
;
1507 struct gdbarch_tdep
*tdep
;
1508 gdbarch_register_name_ftype
*d10v_register_name
;
1509 gdbarch_register_sim_regno_ftype
*d10v_register_sim_regno
;
1511 /* Find a candidate among the list of pre-declared architectures. */
1512 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1514 return arches
->gdbarch
;
1516 /* None found, create a new architecture from the information
1518 tdep
= XMALLOC (struct gdbarch_tdep
);
1519 gdbarch
= gdbarch_alloc (&info
, tdep
);
1521 switch (info
.bfd_arch_info
->mach
)
1523 case bfd_mach_d10v_ts2
:
1525 d10v_register_name
= d10v_ts2_register_name
;
1526 d10v_register_sim_regno
= d10v_ts2_register_sim_regno
;
1527 tdep
->a0_regnum
= TS2_A0_REGNUM
;
1528 tdep
->nr_dmap_regs
= TS2_NR_DMAP_REGS
;
1529 tdep
->dmap_register
= d10v_ts2_dmap_register
;
1530 tdep
->imap_register
= d10v_ts2_imap_register
;
1533 case bfd_mach_d10v_ts3
:
1535 d10v_register_name
= d10v_ts3_register_name
;
1536 d10v_register_sim_regno
= d10v_ts3_register_sim_regno
;
1537 tdep
->a0_regnum
= TS3_A0_REGNUM
;
1538 tdep
->nr_dmap_regs
= TS3_NR_DMAP_REGS
;
1539 tdep
->dmap_register
= d10v_ts3_dmap_register
;
1540 tdep
->imap_register
= d10v_ts3_imap_register
;
1544 set_gdbarch_read_pc (gdbarch
, d10v_read_pc
);
1545 set_gdbarch_write_pc (gdbarch
, d10v_write_pc
);
1546 set_gdbarch_read_fp (gdbarch
, d10v_read_fp
);
1547 set_gdbarch_read_sp (gdbarch
, d10v_read_sp
);
1548 set_gdbarch_write_sp (gdbarch
, d10v_write_sp
);
1550 set_gdbarch_num_regs (gdbarch
, d10v_num_regs
);
1551 set_gdbarch_sp_regnum (gdbarch
, 15);
1552 set_gdbarch_fp_regnum (gdbarch
, 11);
1553 set_gdbarch_pc_regnum (gdbarch
, 18);
1554 set_gdbarch_register_name (gdbarch
, d10v_register_name
);
1555 set_gdbarch_register_size (gdbarch
, 2);
1556 set_gdbarch_register_bytes (gdbarch
, (d10v_num_regs
- 2) * 2 + 16);
1557 set_gdbarch_register_byte (gdbarch
, d10v_register_byte
);
1558 set_gdbarch_register_raw_size (gdbarch
, d10v_register_raw_size
);
1559 set_gdbarch_max_register_raw_size (gdbarch
, 8);
1560 set_gdbarch_register_virtual_size (gdbarch
, generic_register_size
);
1561 set_gdbarch_max_register_virtual_size (gdbarch
, 8);
1562 set_gdbarch_register_virtual_type (gdbarch
, d10v_register_virtual_type
);
1564 set_gdbarch_ptr_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1565 set_gdbarch_addr_bit (gdbarch
, 32);
1566 set_gdbarch_address_to_pointer (gdbarch
, d10v_address_to_pointer
);
1567 set_gdbarch_pointer_to_address (gdbarch
, d10v_pointer_to_address
);
1568 set_gdbarch_integer_to_address (gdbarch
, d10v_integer_to_address
);
1569 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1570 set_gdbarch_int_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1571 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1572 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1573 /* NOTE: The d10v as a 32 bit ``float'' and ``double''. ``long
1574 double'' is 64 bits. */
1575 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1576 set_gdbarch_double_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1577 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1578 switch (info
.byte_order
)
1580 case BFD_ENDIAN_BIG
:
1581 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_big
);
1582 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_single_big
);
1583 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_big
);
1585 case BFD_ENDIAN_LITTLE
:
1586 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_little
);
1587 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_single_little
);
1588 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_little
);
1591 internal_error (__FILE__
, __LINE__
,
1592 "d10v_gdbarch_init: bad byte order for float format");
1595 set_gdbarch_call_dummy_length (gdbarch
, 0);
1596 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
1597 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
1598 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
1599 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
1600 set_gdbarch_call_dummy_words (gdbarch
, d10v_call_dummy_words
);
1601 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (d10v_call_dummy_words
));
1602 set_gdbarch_call_dummy_p (gdbarch
, 1);
1603 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
1604 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
1606 set_gdbarch_deprecated_extract_return_value (gdbarch
, d10v_extract_return_value
);
1607 set_gdbarch_push_arguments (gdbarch
, d10v_push_arguments
);
1608 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
1609 set_gdbarch_push_return_address (gdbarch
, d10v_push_return_address
);
1611 set_gdbarch_store_struct_return (gdbarch
, d10v_store_struct_return
);
1612 set_gdbarch_deprecated_store_return_value (gdbarch
, d10v_store_return_value
);
1613 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, d10v_extract_struct_value_address
);
1614 set_gdbarch_use_struct_convention (gdbarch
, d10v_use_struct_convention
);
1616 set_gdbarch_frame_init_saved_regs (gdbarch
, d10v_frame_init_saved_regs
);
1617 set_gdbarch_init_extra_frame_info (gdbarch
, d10v_init_extra_frame_info
);
1619 set_gdbarch_pop_frame (gdbarch
, d10v_pop_frame
);
1621 set_gdbarch_skip_prologue (gdbarch
, d10v_skip_prologue
);
1622 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1623 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
1624 set_gdbarch_function_start_offset (gdbarch
, 0);
1625 set_gdbarch_breakpoint_from_pc (gdbarch
, d10v_breakpoint_from_pc
);
1627 set_gdbarch_remote_translate_xfer_address (gdbarch
, remote_d10v_translate_xfer_address
);
1629 set_gdbarch_frame_args_skip (gdbarch
, 0);
1630 set_gdbarch_frameless_function_invocation (gdbarch
, frameless_look_for_prologue
);
1631 set_gdbarch_frame_chain (gdbarch
, d10v_frame_chain
);
1632 set_gdbarch_frame_chain_valid (gdbarch
, d10v_frame_chain_valid
);
1633 set_gdbarch_frame_saved_pc (gdbarch
, d10v_frame_saved_pc
);
1635 set_gdbarch_saved_pc_after_call (gdbarch
, d10v_saved_pc_after_call
);
1636 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
1637 set_gdbarch_stack_align (gdbarch
, d10v_stack_align
);
1639 set_gdbarch_register_sim_regno (gdbarch
, d10v_register_sim_regno
);
1640 set_gdbarch_extra_stack_alignment_needed (gdbarch
, 0);
1646 extern void (*target_resume_hook
) (void);
1647 extern void (*target_wait_loop_hook
) (void);
1650 _initialize_d10v_tdep (void)
1652 register_gdbarch_init (bfd_arch_d10v
, d10v_gdbarch_init
);
1654 tm_print_insn
= print_insn_d10v
;
1656 target_resume_hook
= d10v_eva_prepare_to_trace
;
1657 target_wait_loop_hook
= d10v_eva_get_trace_data
;
1659 add_com ("regs", class_vars
, show_regs
, "Print all registers");
1661 add_com ("itrace", class_support
, trace_command
,
1662 "Enable tracing of instruction execution.");
1664 add_com ("iuntrace", class_support
, untrace_command
,
1665 "Disable tracing of instruction execution.");
1667 add_com ("itdisassemble", class_vars
, tdisassemble_command
,
1668 "Disassemble the trace buffer.\n\
1669 Two optional arguments specify a range of trace buffer entries\n\
1670 as reported by info trace (NOT addresses!).");
1672 add_info ("itrace", trace_info
,
1673 "Display info about the trace data buffer.");
1675 add_show_from_set (add_set_cmd ("itracedisplay", no_class
,
1676 var_integer
, (char *) &trace_display
,
1677 "Set automatic display of trace.\n", &setlist
),
1679 add_show_from_set (add_set_cmd ("itracesource", no_class
,
1680 var_integer
, (char *) &default_trace_show_source
,
1681 "Set display of source code with trace.\n", &setlist
),