1 /* Target-dependent code for Mitsubishi D10V, for GDB.
2 Copyright (C) 1996, 1997, 2000 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* Contributed by Martin Hunt, hunt@cygnus.com */
30 #include "gdb_string.h"
37 #include "arch-utils.h"
39 #include "floatformat.h"
43 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
45 struct frame_extra_info
56 unsigned long (*dmap_register
) (int nr
);
57 unsigned long (*imap_register
) (int nr
);
60 /* These are the addresses the D10V-EVA board maps data and
61 instruction memory to. */
63 #define DMEM_START 0x2000000
64 #define IMEM_START 0x1000000
65 #define STACK_START 0x0007ffe
67 /* d10v register names. */
77 #define NR_DMAP_REGS (gdbarch_tdep (current_gdbarch)->nr_dmap_regs)
78 #define A0_REGNUM (gdbarch_tdep (current_gdbarch)->a0_regnum)
80 /* d10v calling convention. */
82 #define ARG1_REGNUM R0_REGNUM
84 #define RET1_REGNUM R0_REGNUM
88 extern void _initialize_d10v_tdep (void);
90 static void d10v_eva_prepare_to_trace (void);
92 static void d10v_eva_get_trace_data (void);
94 static int prologue_find_regs (unsigned short op
, struct frame_info
*fi
,
97 extern void d10v_frame_init_saved_regs (struct frame_info
*);
99 static void do_d10v_pop_frame (struct frame_info
*fi
);
102 d10v_frame_chain_valid (chain
, frame
)
104 struct frame_info
*frame
; /* not used here */
106 return ((chain
) != 0 && (frame
) != 0 && (frame
)->pc
> IMEM_START
);
110 d10v_stack_align (CORE_ADDR len
)
112 return (len
+ 1) & ~1;
115 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
116 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
117 and TYPE is the type (which is known to be struct, union or array).
119 The d10v returns anything less than 8 bytes in size in
123 d10v_use_struct_convention (int gcc_p
, struct type
*type
)
125 return (TYPE_LENGTH (type
) > 8);
130 d10v_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
132 static unsigned char breakpoint
[] =
133 {0x2f, 0x90, 0x5e, 0x00};
134 *lenptr
= sizeof (breakpoint
);
138 /* Map the REG_NR onto an ascii name. Return NULL or an empty string
139 when the reg_nr isn't valid. */
143 TS2_IMAP0_REGNUM
= 32,
144 TS2_DMAP_REGNUM
= 34,
145 TS2_NR_DMAP_REGS
= 1,
150 d10v_ts2_register_name (int reg_nr
)
152 static char *register_names
[] =
154 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
155 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
156 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
157 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
158 "imap0", "imap1", "dmap", "a0", "a1"
162 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
164 return register_names
[reg_nr
];
169 TS3_IMAP0_REGNUM
= 36,
170 TS3_DMAP0_REGNUM
= 38,
171 TS3_NR_DMAP_REGS
= 4,
176 d10v_ts3_register_name (int reg_nr
)
178 static char *register_names
[] =
180 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
181 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
182 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
183 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
187 "dmap0", "dmap1", "dmap2", "dmap3"
191 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
193 return register_names
[reg_nr
];
196 /* Access the DMAP/IMAP registers in a target independant way. */
199 d10v_ts2_dmap_register (int reg_nr
)
207 return read_register (TS2_DMAP_REGNUM
);
214 d10v_ts3_dmap_register (int reg_nr
)
216 return read_register (TS3_DMAP0_REGNUM
+ reg_nr
);
220 d10v_dmap_register (int reg_nr
)
222 return gdbarch_tdep (current_gdbarch
)->dmap_register (reg_nr
);
226 d10v_ts2_imap_register (int reg_nr
)
228 return read_register (TS2_IMAP0_REGNUM
+ reg_nr
);
232 d10v_ts3_imap_register (int reg_nr
)
234 return read_register (TS3_IMAP0_REGNUM
+ reg_nr
);
238 d10v_imap_register (int reg_nr
)
240 return gdbarch_tdep (current_gdbarch
)->imap_register (reg_nr
);
243 /* MAP GDB's internal register numbering (determined by the layout fo
244 the REGISTER_BYTE array) onto the simulator's register
248 d10v_ts2_register_sim_regno (int nr
)
250 if (nr
>= TS2_IMAP0_REGNUM
251 && nr
< TS2_IMAP0_REGNUM
+ NR_IMAP_REGS
)
252 return nr
- TS2_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
253 if (nr
== TS2_DMAP_REGNUM
)
254 return nr
- TS2_DMAP_REGNUM
+ SIM_D10V_TS2_DMAP_REGNUM
;
255 if (nr
>= TS2_A0_REGNUM
256 && nr
< TS2_A0_REGNUM
+ NR_A_REGS
)
257 return nr
- TS2_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
262 d10v_ts3_register_sim_regno (int nr
)
264 if (nr
>= TS3_IMAP0_REGNUM
265 && nr
< TS3_IMAP0_REGNUM
+ NR_IMAP_REGS
)
266 return nr
- TS3_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
267 if (nr
>= TS3_DMAP0_REGNUM
268 && nr
< TS3_DMAP0_REGNUM
+ TS3_NR_DMAP_REGS
)
269 return nr
- TS3_DMAP0_REGNUM
+ SIM_D10V_DMAP0_REGNUM
;
270 if (nr
>= TS3_A0_REGNUM
271 && nr
< TS3_A0_REGNUM
+ NR_A_REGS
)
272 return nr
- TS3_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
276 /* Index within `registers' of the first byte of the space for
280 d10v_register_byte (int reg_nr
)
282 if (reg_nr
< A0_REGNUM
)
284 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
285 return (A0_REGNUM
* 2
286 + (reg_nr
- A0_REGNUM
) * 8);
288 return (A0_REGNUM
* 2
290 + (reg_nr
- A0_REGNUM
- NR_A_REGS
) * 2);
293 /* Number of bytes of storage in the actual machine representation for
297 d10v_register_raw_size (int reg_nr
)
299 if (reg_nr
< A0_REGNUM
)
301 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
307 /* Number of bytes of storage in the program's representation
311 d10v_register_virtual_size (int reg_nr
)
313 return TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (reg_nr
));
316 /* Return the GDB type object for the "standard" data type
317 of data in register N. */
320 d10v_register_virtual_type (int reg_nr
)
322 if (reg_nr
>= A0_REGNUM
323 && reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
324 return builtin_type_int64
;
325 else if (reg_nr
== PC_REGNUM
326 || reg_nr
== SP_REGNUM
)
327 return builtin_type_int32
;
329 return builtin_type_int16
;
332 /* convert $pc and $sp to/from virtual addresses */
334 d10v_register_convertible (int nr
)
336 return ((nr
) == PC_REGNUM
|| (nr
) == SP_REGNUM
);
340 d10v_register_convert_to_virtual (int regnum
, struct type
*type
, char *from
,
343 ULONGEST x
= extract_unsigned_integer (from
, REGISTER_RAW_SIZE (regnum
));
344 if (regnum
== PC_REGNUM
)
345 x
= (x
<< 2) | IMEM_START
;
348 store_unsigned_integer (to
, TYPE_LENGTH (type
), x
);
352 d10v_register_convert_to_raw (struct type
*type
, int regnum
, char *from
,
355 ULONGEST x
= extract_unsigned_integer (from
, TYPE_LENGTH (type
));
357 if (regnum
== PC_REGNUM
)
359 store_unsigned_integer (to
, 2, x
);
364 d10v_make_daddr (CORE_ADDR x
)
366 return ((x
) | DMEM_START
);
370 d10v_make_iaddr (CORE_ADDR x
)
372 return (((x
) << 2) | IMEM_START
);
376 d10v_daddr_p (CORE_ADDR x
)
378 return (((x
) & 0x3000000) == DMEM_START
);
382 d10v_iaddr_p (CORE_ADDR x
)
384 return (((x
) & 0x3000000) == IMEM_START
);
389 d10v_convert_iaddr_to_raw (CORE_ADDR x
)
391 return (((x
) >> 2) & 0xffff);
395 d10v_convert_daddr_to_raw (CORE_ADDR x
)
397 return ((x
) & 0xffff);
400 /* Store the address of the place in which to copy the structure the
401 subroutine will return. This is called from call_function.
403 We store structs through a pointer passed in the first Argument
407 d10v_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
409 write_register (ARG1_REGNUM
, (addr
));
412 /* Write into appropriate registers a function return value
413 of type TYPE, given in virtual format.
415 Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */
418 d10v_store_return_value (struct type
*type
, char *valbuf
)
420 write_register_bytes (REGISTER_BYTE (RET1_REGNUM
),
425 /* Extract from an array REGBUF containing the (raw) register state
426 the address in which a function should return its structure value,
427 as a CORE_ADDR (or an expression that can be used as one). */
430 d10v_extract_struct_value_address (char *regbuf
)
432 return (extract_address ((regbuf
) + REGISTER_BYTE (ARG1_REGNUM
),
433 REGISTER_RAW_SIZE (ARG1_REGNUM
))
438 d10v_frame_saved_pc (struct frame_info
*frame
)
440 return ((frame
)->extra_info
->return_pc
);
444 d10v_frame_args_address (struct frame_info
*fi
)
450 d10v_frame_locals_address (struct frame_info
*fi
)
455 /* Immediately after a function call, return the saved pc. We can't
456 use frame->return_pc beause that is determined by reading R13 off
457 the stack and that may not be written yet. */
460 d10v_saved_pc_after_call (struct frame_info
*frame
)
462 return ((read_register (LR_REGNUM
) << 2)
466 /* Discard from the stack the innermost frame, restoring all saved
470 d10v_pop_frame (void)
472 generic_pop_current_frame (do_d10v_pop_frame
);
476 do_d10v_pop_frame (struct frame_info
*fi
)
483 /* fill out fsr with the address of where each */
484 /* register was stored in the frame */
485 d10v_frame_init_saved_regs (fi
);
487 /* now update the current registers with the old values */
488 for (regnum
= A0_REGNUM
; regnum
< A0_REGNUM
+ NR_A_REGS
; regnum
++)
490 if (fi
->saved_regs
[regnum
])
492 read_memory (fi
->saved_regs
[regnum
], raw_buffer
, REGISTER_RAW_SIZE (regnum
));
493 write_register_bytes (REGISTER_BYTE (regnum
), raw_buffer
, REGISTER_RAW_SIZE (regnum
));
496 for (regnum
= 0; regnum
< SP_REGNUM
; regnum
++)
498 if (fi
->saved_regs
[regnum
])
500 write_register (regnum
, read_memory_unsigned_integer (fi
->saved_regs
[regnum
], REGISTER_RAW_SIZE (regnum
)));
503 if (fi
->saved_regs
[PSW_REGNUM
])
505 write_register (PSW_REGNUM
, read_memory_unsigned_integer (fi
->saved_regs
[PSW_REGNUM
], REGISTER_RAW_SIZE (PSW_REGNUM
)));
508 write_register (PC_REGNUM
, read_register (LR_REGNUM
));
509 write_register (SP_REGNUM
, fp
+ fi
->extra_info
->size
);
510 target_store_registers (-1);
511 flush_cached_frames ();
515 check_prologue (unsigned short op
)
518 if ((op
& 0x7E1F) == 0x6C1F)
522 if ((op
& 0x7E3F) == 0x6E1F)
526 if ((op
& 0x7FE1) == 0x01E1)
538 if ((op
& 0x7E1F) == 0x681E)
542 if ((op
& 0x7E3F) == 0x3A1E)
549 d10v_skip_prologue (CORE_ADDR pc
)
552 unsigned short op1
, op2
;
553 CORE_ADDR func_addr
, func_end
;
554 struct symtab_and_line sal
;
556 /* If we have line debugging information, then the end of the */
557 /* prologue should the first assembly instruction of the first source line */
558 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
560 sal
= find_pc_line (func_addr
, 0);
561 if (sal
.end
&& sal
.end
< func_end
)
565 if (target_read_memory (pc
, (char *) &op
, 4))
566 return pc
; /* Can't access it -- assume no prologue. */
570 op
= (unsigned long) read_memory_integer (pc
, 4);
571 if ((op
& 0xC0000000) == 0xC0000000)
573 /* long instruction */
574 if (((op
& 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */
575 ((op
& 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */
576 ((op
& 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */
581 /* short instructions */
582 if ((op
& 0xC0000000) == 0x80000000)
584 op2
= (op
& 0x3FFF8000) >> 15;
589 op1
= (op
& 0x3FFF8000) >> 15;
592 if (check_prologue (op1
))
594 if (!check_prologue (op2
))
596 /* if the previous opcode was really part of the prologue */
597 /* and not just a NOP, then we want to break after both instructions */
611 /* Given a GDB frame, determine the address of the calling function's frame.
612 This will be used to create a new GDB frame struct, and then
613 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
617 d10v_frame_chain (struct frame_info
*fi
)
619 d10v_frame_init_saved_regs (fi
);
621 if (fi
->extra_info
->return_pc
== IMEM_START
622 || inside_entry_file (fi
->extra_info
->return_pc
))
623 return (CORE_ADDR
) 0;
625 if (!fi
->saved_regs
[FP_REGNUM
])
627 if (!fi
->saved_regs
[SP_REGNUM
]
628 || fi
->saved_regs
[SP_REGNUM
] == STACK_START
)
629 return (CORE_ADDR
) 0;
631 return fi
->saved_regs
[SP_REGNUM
];
634 if (!read_memory_unsigned_integer (fi
->saved_regs
[FP_REGNUM
],
635 REGISTER_RAW_SIZE (FP_REGNUM
)))
636 return (CORE_ADDR
) 0;
638 return D10V_MAKE_DADDR (read_memory_unsigned_integer (fi
->saved_regs
[FP_REGNUM
],
639 REGISTER_RAW_SIZE (FP_REGNUM
)));
642 static int next_addr
, uses_frame
;
645 prologue_find_regs (unsigned short op
, struct frame_info
*fi
, CORE_ADDR addr
)
650 if ((op
& 0x7E1F) == 0x6C1F)
652 n
= (op
& 0x1E0) >> 5;
654 fi
->saved_regs
[n
] = next_addr
;
659 else if ((op
& 0x7E3F) == 0x6E1F)
661 n
= (op
& 0x1E0) >> 5;
663 fi
->saved_regs
[n
] = next_addr
;
664 fi
->saved_regs
[n
+ 1] = next_addr
+ 2;
669 if ((op
& 0x7FE1) == 0x01E1)
671 n
= (op
& 0x1E) >> 1;
690 if ((op
& 0x7E1F) == 0x681E)
692 n
= (op
& 0x1E0) >> 5;
693 fi
->saved_regs
[n
] = next_addr
;
698 if ((op
& 0x7E3F) == 0x3A1E)
700 n
= (op
& 0x1E0) >> 5;
701 fi
->saved_regs
[n
] = next_addr
;
702 fi
->saved_regs
[n
+ 1] = next_addr
+ 2;
709 /* Put here the code to store, into fi->saved_regs, the addresses of
710 the saved registers of frame described by FRAME_INFO. This
711 includes special registers such as pc and fp saved in special ways
712 in the stack frame. sp is even more special: the address we return
713 for it IS the sp for the next frame. */
716 d10v_frame_init_saved_regs (struct frame_info
*fi
)
720 unsigned short op1
, op2
;
724 memset (fi
->saved_regs
, 0, SIZEOF_FRAME_SAVED_REGS
);
727 pc
= get_pc_function_start (fi
->pc
);
732 op
= (unsigned long) read_memory_integer (pc
, 4);
733 if ((op
& 0xC0000000) == 0xC0000000)
735 /* long instruction */
736 if ((op
& 0x3FFF0000) == 0x01FF0000)
739 short n
= op
& 0xFFFF;
742 else if ((op
& 0x3F0F0000) == 0x340F0000)
744 /* st rn, @(offset,sp) */
745 short offset
= op
& 0xFFFF;
746 short n
= (op
>> 20) & 0xF;
747 fi
->saved_regs
[n
] = next_addr
+ offset
;
749 else if ((op
& 0x3F1F0000) == 0x350F0000)
751 /* st2w rn, @(offset,sp) */
752 short offset
= op
& 0xFFFF;
753 short n
= (op
>> 20) & 0xF;
754 fi
->saved_regs
[n
] = next_addr
+ offset
;
755 fi
->saved_regs
[n
+ 1] = next_addr
+ offset
+ 2;
762 /* short instructions */
763 if ((op
& 0xC0000000) == 0x80000000)
765 op2
= (op
& 0x3FFF8000) >> 15;
770 op1
= (op
& 0x3FFF8000) >> 15;
773 if (!prologue_find_regs (op1
, fi
, pc
) || !prologue_find_regs (op2
, fi
, pc
))
779 fi
->extra_info
->size
= -next_addr
;
782 fp
= D10V_MAKE_DADDR (read_register (SP_REGNUM
));
784 for (i
= 0; i
< NUM_REGS
- 1; i
++)
785 if (fi
->saved_regs
[i
])
787 fi
->saved_regs
[i
] = fp
- (next_addr
- fi
->saved_regs
[i
]);
790 if (fi
->saved_regs
[LR_REGNUM
])
792 CORE_ADDR return_pc
= read_memory_unsigned_integer (fi
->saved_regs
[LR_REGNUM
], REGISTER_RAW_SIZE (LR_REGNUM
));
793 fi
->extra_info
->return_pc
= D10V_MAKE_IADDR (return_pc
);
797 fi
->extra_info
->return_pc
= D10V_MAKE_IADDR (read_register (LR_REGNUM
));
800 /* th SP is not normally (ever?) saved, but check anyway */
801 if (!fi
->saved_regs
[SP_REGNUM
])
803 /* if the FP was saved, that means the current FP is valid, */
804 /* otherwise, it isn't being used, so we use the SP instead */
806 fi
->saved_regs
[SP_REGNUM
] = read_register (FP_REGNUM
) + fi
->extra_info
->size
;
809 fi
->saved_regs
[SP_REGNUM
] = fp
+ fi
->extra_info
->size
;
810 fi
->extra_info
->frameless
= 1;
811 fi
->saved_regs
[FP_REGNUM
] = 0;
817 d10v_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
819 fi
->extra_info
= (struct frame_extra_info
*)
820 frame_obstack_alloc (sizeof (struct frame_extra_info
));
821 frame_saved_regs_zalloc (fi
);
823 fi
->extra_info
->frameless
= 0;
824 fi
->extra_info
->size
= 0;
825 fi
->extra_info
->return_pc
= 0;
827 /* The call dummy doesn't save any registers on the stack, so we can
829 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
835 d10v_frame_init_saved_regs (fi
);
840 show_regs (char *args
, int from_tty
)
843 printf_filtered ("PC=%04lx (0x%lx) PSW=%04lx RPT_S=%04lx RPT_E=%04lx RPT_C=%04lx\n",
844 (long) read_register (PC_REGNUM
),
845 (long) D10V_MAKE_IADDR (read_register (PC_REGNUM
)),
846 (long) read_register (PSW_REGNUM
),
847 (long) read_register (24),
848 (long) read_register (25),
849 (long) read_register (23));
850 printf_filtered ("R0-R7 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
851 (long) read_register (0),
852 (long) read_register (1),
853 (long) read_register (2),
854 (long) read_register (3),
855 (long) read_register (4),
856 (long) read_register (5),
857 (long) read_register (6),
858 (long) read_register (7));
859 printf_filtered ("R8-R15 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
860 (long) read_register (8),
861 (long) read_register (9),
862 (long) read_register (10),
863 (long) read_register (11),
864 (long) read_register (12),
865 (long) read_register (13),
866 (long) read_register (14),
867 (long) read_register (15));
868 for (a
= 0; a
< NR_IMAP_REGS
; a
++)
871 printf_filtered (" ");
872 printf_filtered ("IMAP%d %04lx", a
, d10v_imap_register (a
));
874 if (NR_DMAP_REGS
== 1)
875 printf_filtered (" DMAP %04lx\n", d10v_dmap_register (2));
878 for (a
= 0; a
< NR_DMAP_REGS
; a
++)
880 printf_filtered (" DMAP%d %04lx", a
, d10v_dmap_register (a
));
882 printf_filtered ("\n");
884 printf_filtered ("A0-A%d", NR_A_REGS
- 1);
885 for (a
= A0_REGNUM
; a
< A0_REGNUM
+ NR_A_REGS
; a
++)
887 char num
[MAX_REGISTER_RAW_SIZE
];
889 printf_filtered (" ");
890 read_register_gen (a
, (char *) &num
);
891 for (i
= 0; i
< MAX_REGISTER_RAW_SIZE
; i
++)
893 printf_filtered ("%02x", (num
[i
] & 0xff));
896 printf_filtered ("\n");
900 d10v_read_pc (int pid
)
906 save_pid
= inferior_pid
;
908 pc
= (int) read_register (PC_REGNUM
);
909 inferior_pid
= save_pid
;
910 retval
= D10V_MAKE_IADDR (pc
);
915 d10v_write_pc (CORE_ADDR val
, int pid
)
919 save_pid
= inferior_pid
;
921 write_register (PC_REGNUM
, D10V_CONVERT_IADDR_TO_RAW (val
));
922 inferior_pid
= save_pid
;
928 return (D10V_MAKE_DADDR (read_register (SP_REGNUM
)));
932 d10v_write_sp (CORE_ADDR val
)
934 write_register (SP_REGNUM
, D10V_CONVERT_DADDR_TO_RAW (val
));
938 d10v_write_fp (CORE_ADDR val
)
940 write_register (FP_REGNUM
, D10V_CONVERT_DADDR_TO_RAW (val
));
946 return (D10V_MAKE_DADDR (read_register (FP_REGNUM
)));
949 /* Function: push_return_address (pc)
950 Set up the return address for the inferior function call.
951 Needed for targets where we don't actually execute a JSR/BSR instruction */
954 d10v_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
956 write_register (LR_REGNUM
, D10V_CONVERT_IADDR_TO_RAW (CALL_DUMMY_ADDRESS ()));
961 /* When arguments must be pushed onto the stack, they go on in reverse
962 order. The below implements a FILO (stack) to do this. */
967 struct stack_item
*prev
;
971 static struct stack_item
*push_stack_item (struct stack_item
*prev
,
972 void *contents
, int len
);
973 static struct stack_item
*
974 push_stack_item (struct stack_item
*prev
, void *contents
, int len
)
976 struct stack_item
*si
;
977 si
= xmalloc (sizeof (struct stack_item
));
978 si
->data
= xmalloc (len
);
981 memcpy (si
->data
, contents
, len
);
985 static struct stack_item
*pop_stack_item (struct stack_item
*si
);
986 static struct stack_item
*
987 pop_stack_item (struct stack_item
*si
)
989 struct stack_item
*dead
= si
;
998 d10v_push_arguments (int nargs
, value_ptr
*args
, CORE_ADDR sp
,
999 int struct_return
, CORE_ADDR struct_addr
)
1002 int regnum
= ARG1_REGNUM
;
1003 struct stack_item
*si
= NULL
;
1005 /* Fill in registers and arg lists */
1006 for (i
= 0; i
< nargs
; i
++)
1008 value_ptr arg
= args
[i
];
1009 struct type
*type
= check_typedef (VALUE_TYPE (arg
));
1010 char *contents
= VALUE_CONTENTS (arg
);
1011 int len
= TYPE_LENGTH (type
);
1012 /* printf ("push: type=%d len=%d\n", type->code, len); */
1013 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
1015 /* pointers require special handling - first convert and
1017 long val
= extract_signed_integer (contents
, len
);
1019 if (TYPE_TARGET_TYPE (type
)
1020 && (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
))
1022 /* function pointer */
1023 val
= D10V_CONVERT_IADDR_TO_RAW (val
);
1025 else if (D10V_IADDR_P (val
))
1027 /* also function pointer! */
1028 val
= D10V_CONVERT_DADDR_TO_RAW (val
);
1035 if (regnum
<= ARGN_REGNUM
)
1036 write_register (regnum
++, val
& 0xffff);
1040 /* arg will go onto stack */
1041 store_address (ptr
, 2, val
& 0xffff);
1042 si
= push_stack_item (si
, ptr
, 2);
1047 int aligned_regnum
= (regnum
+ 1) & ~1;
1048 if (len
<= 2 && regnum
<= ARGN_REGNUM
)
1049 /* fits in a single register, do not align */
1051 long val
= extract_unsigned_integer (contents
, len
);
1052 write_register (regnum
++, val
);
1054 else if (len
<= (ARGN_REGNUM
- aligned_regnum
+ 1) * 2)
1055 /* value fits in remaining registers, store keeping left
1059 regnum
= aligned_regnum
;
1060 for (b
= 0; b
< (len
& ~1); b
+= 2)
1062 long val
= extract_unsigned_integer (&contents
[b
], 2);
1063 write_register (regnum
++, val
);
1067 long val
= extract_unsigned_integer (&contents
[b
], 1);
1068 write_register (regnum
++, (val
<< 8));
1073 /* arg will go onto stack */
1074 regnum
= ARGN_REGNUM
+ 1;
1075 si
= push_stack_item (si
, contents
, len
);
1082 sp
= (sp
- si
->len
) & ~1;
1083 write_memory (sp
, si
->data
, si
->len
);
1084 si
= pop_stack_item (si
);
1091 /* Given a return value in `regbuf' with a type `valtype',
1092 extract and copy its value into `valbuf'. */
1095 d10v_extract_return_value (type
, regbuf
, valbuf
)
1097 char regbuf
[REGISTER_BYTES
];
1101 /* printf("RET: TYPE=%d len=%d r%d=0x%x\n",type->code, TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM, (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM))); */
1102 if (TYPE_CODE (type
) == TYPE_CODE_PTR
1103 && TYPE_TARGET_TYPE (type
)
1104 && (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
))
1106 /* pointer to function */
1109 snum
= extract_address (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1110 store_address (valbuf
, 4, D10V_MAKE_IADDR (snum
));
1112 else if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
1114 /* pointer to data */
1117 snum
= extract_address (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1118 store_address (valbuf
, 4, D10V_MAKE_DADDR (snum
));
1122 len
= TYPE_LENGTH (type
);
1125 unsigned short c
= extract_unsigned_integer (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1126 store_unsigned_integer (valbuf
, 1, c
);
1128 else if ((len
& 1) == 0)
1129 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
), len
);
1132 /* For return values of odd size, the first byte is in the
1133 least significant part of the first register. The
1134 remaining bytes in remaining registers. Interestingly,
1135 when such values are passed in, the last byte is in the
1136 most significant byte of that same register - wierd. */
1137 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
) + 1, len
);
1142 /* Translate a GDB virtual ADDR/LEN into a format the remote target
1143 understands. Returns number of bytes that can be transfered
1144 starting at TARG_ADDR. Return ZERO if no bytes can be transfered
1145 (segmentation fault). Since the simulator knows all about how the
1146 VM system works, we just call that to do the translation. */
1149 remote_d10v_translate_xfer_address (CORE_ADDR memaddr
, int nr_bytes
,
1150 CORE_ADDR
*targ_addr
, int *targ_len
)
1154 out_len
= sim_d10v_translate_addr (memaddr
, nr_bytes
,
1157 d10v_imap_register
);
1158 *targ_addr
= out_addr
;
1159 *targ_len
= out_len
;
1163 /* The following code implements access to, and display of, the D10V's
1164 instruction trace buffer. The buffer consists of 64K or more
1165 4-byte words of data, of which each words includes an 8-bit count,
1166 an 8-bit segment number, and a 16-bit instruction address.
1168 In theory, the trace buffer is continuously capturing instruction
1169 data that the CPU presents on its "debug bus", but in practice, the
1170 ROMified GDB stub only enables tracing when it continues or steps
1171 the program, and stops tracing when the program stops; so it
1172 actually works for GDB to read the buffer counter out of memory and
1173 then read each trace word. The counter records where the tracing
1174 stops, but there is no record of where it started, so we remember
1175 the PC when we resumed and then search backwards in the trace
1176 buffer for a word that includes that address. This is not perfect,
1177 because you will miss trace data if the resumption PC is the target
1178 of a branch. (The value of the buffer counter is semi-random, any
1179 trace data from a previous program stop is gone.) */
1181 /* The address of the last word recorded in the trace buffer. */
1183 #define DBBC_ADDR (0xd80000)
1185 /* The base of the trace buffer, at least for the "Board_0". */
1187 #define TRACE_BUFFER_BASE (0xf40000)
1189 static void trace_command (char *, int);
1191 static void untrace_command (char *, int);
1193 static void trace_info (char *, int);
1195 static void tdisassemble_command (char *, int);
1197 static void display_trace (int, int);
1199 /* True when instruction traces are being collected. */
1203 /* Remembered PC. */
1205 static CORE_ADDR last_pc
;
1207 /* True when trace output should be displayed whenever program stops. */
1209 static int trace_display
;
1211 /* True when trace listing should include source lines. */
1213 static int default_trace_show_source
= 1;
1224 trace_command (char *args
, int from_tty
)
1226 /* Clear the host-side trace buffer, allocating space if needed. */
1227 trace_data
.size
= 0;
1228 if (trace_data
.counts
== NULL
)
1229 trace_data
.counts
= (short *) xmalloc (65536 * sizeof (short));
1230 if (trace_data
.addrs
== NULL
)
1231 trace_data
.addrs
= (CORE_ADDR
*) xmalloc (65536 * sizeof (CORE_ADDR
));
1235 printf_filtered ("Tracing is now on.\n");
1239 untrace_command (char *args
, int from_tty
)
1243 printf_filtered ("Tracing is now off.\n");
1247 trace_info (char *args
, int from_tty
)
1251 if (trace_data
.size
)
1253 printf_filtered ("%d entries in trace buffer:\n", trace_data
.size
);
1255 for (i
= 0; i
< trace_data
.size
; ++i
)
1257 printf_filtered ("%d: %d instruction%s at 0x%s\n",
1259 trace_data
.counts
[i
],
1260 (trace_data
.counts
[i
] == 1 ? "" : "s"),
1261 paddr_nz (trace_data
.addrs
[i
]));
1265 printf_filtered ("No entries in trace buffer.\n");
1267 printf_filtered ("Tracing is currently %s.\n", (tracing
? "on" : "off"));
1270 /* Print the instruction at address MEMADDR in debugged memory,
1271 on STREAM. Returns length of the instruction, in bytes. */
1274 print_insn (CORE_ADDR memaddr
, struct ui_file
*stream
)
1276 /* If there's no disassembler, something is very wrong. */
1277 if (tm_print_insn
== NULL
)
1278 internal_error ("print_insn: no disassembler");
1280 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
1281 tm_print_insn_info
.endian
= BFD_ENDIAN_BIG
;
1283 tm_print_insn_info
.endian
= BFD_ENDIAN_LITTLE
;
1284 return (*tm_print_insn
) (memaddr
, &tm_print_insn_info
);
1288 d10v_eva_prepare_to_trace (void)
1293 last_pc
= read_register (PC_REGNUM
);
1296 /* Collect trace data from the target board and format it into a form
1297 more useful for display. */
1300 d10v_eva_get_trace_data (void)
1302 int count
, i
, j
, oldsize
;
1303 int trace_addr
, trace_seg
, trace_cnt
, next_cnt
;
1304 unsigned int last_trace
, trace_word
, next_word
;
1305 unsigned int *tmpspace
;
1310 tmpspace
= xmalloc (65536 * sizeof (unsigned int));
1312 last_trace
= read_memory_unsigned_integer (DBBC_ADDR
, 2) << 2;
1314 /* Collect buffer contents from the target, stopping when we reach
1315 the word recorded when execution resumed. */
1318 while (last_trace
> 0)
1322 read_memory_unsigned_integer (TRACE_BUFFER_BASE
+ last_trace
, 4);
1323 trace_addr
= trace_word
& 0xffff;
1325 /* Ignore an apparently nonsensical entry. */
1326 if (trace_addr
== 0xffd5)
1328 tmpspace
[count
++] = trace_word
;
1329 if (trace_addr
== last_pc
)
1335 /* Move the data to the host-side trace buffer, adjusting counts to
1336 include the last instruction executed and transforming the address
1337 into something that GDB likes. */
1339 for (i
= 0; i
< count
; ++i
)
1341 trace_word
= tmpspace
[i
];
1342 next_word
= ((i
== 0) ? 0 : tmpspace
[i
- 1]);
1343 trace_addr
= trace_word
& 0xffff;
1344 next_cnt
= (next_word
>> 24) & 0xff;
1345 j
= trace_data
.size
+ count
- i
- 1;
1346 trace_data
.addrs
[j
] = (trace_addr
<< 2) + 0x1000000;
1347 trace_data
.counts
[j
] = next_cnt
+ 1;
1350 oldsize
= trace_data
.size
;
1351 trace_data
.size
+= count
;
1356 display_trace (oldsize
, trace_data
.size
);
1360 tdisassemble_command (char *arg
, int from_tty
)
1363 CORE_ADDR low
, high
;
1369 high
= trace_data
.size
;
1371 else if (!(space_index
= (char *) strchr (arg
, ' ')))
1373 low
= parse_and_eval_address (arg
);
1378 /* Two arguments. */
1379 *space_index
= '\0';
1380 low
= parse_and_eval_address (arg
);
1381 high
= parse_and_eval_address (space_index
+ 1);
1386 printf_filtered ("Dump of trace from %s to %s:\n", paddr_u (low
), paddr_u (high
));
1388 display_trace (low
, high
);
1390 printf_filtered ("End of trace dump.\n");
1391 gdb_flush (gdb_stdout
);
1395 display_trace (int low
, int high
)
1397 int i
, count
, trace_show_source
, first
, suppress
;
1398 CORE_ADDR next_address
;
1400 trace_show_source
= default_trace_show_source
;
1401 if (!have_full_symbols () && !have_partial_symbols ())
1403 trace_show_source
= 0;
1404 printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
1405 printf_filtered ("Trace will not display any source.\n");
1410 for (i
= low
; i
< high
; ++i
)
1412 next_address
= trace_data
.addrs
[i
];
1413 count
= trace_data
.counts
[i
];
1417 if (trace_show_source
)
1419 struct symtab_and_line sal
, sal_prev
;
1421 sal_prev
= find_pc_line (next_address
- 4, 0);
1422 sal
= find_pc_line (next_address
, 0);
1426 if (first
|| sal
.line
!= sal_prev
.line
)
1427 print_source_lines (sal
.symtab
, sal
.line
, sal
.line
+ 1, 0);
1433 /* FIXME-32x64--assumes sal.pc fits in long. */
1434 printf_filtered ("No source file for address %s.\n",
1435 local_hex_string ((unsigned long) sal
.pc
));
1440 print_address (next_address
, gdb_stdout
);
1441 printf_filtered (":");
1442 printf_filtered ("\t");
1444 next_address
= next_address
+ print_insn (next_address
, gdb_stdout
);
1445 printf_filtered ("\n");
1446 gdb_flush (gdb_stdout
);
1452 static gdbarch_init_ftype d10v_gdbarch_init
;
1454 static struct gdbarch
*
1455 d10v_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1457 static LONGEST d10v_call_dummy_words
[] =
1459 struct gdbarch
*gdbarch
;
1461 struct gdbarch_tdep
*tdep
;
1462 gdbarch_register_name_ftype
*d10v_register_name
;
1463 gdbarch_register_sim_regno_ftype
*d10v_register_sim_regno
;
1465 /* Find a candidate among the list of pre-declared architectures. */
1466 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1468 return arches
->gdbarch
;
1470 /* None found, create a new architecture from the information
1472 tdep
= XMALLOC (struct gdbarch_tdep
);
1473 gdbarch
= gdbarch_alloc (&info
, tdep
);
1475 switch (info
.bfd_arch_info
->mach
)
1477 case bfd_mach_d10v_ts2
:
1479 d10v_register_name
= d10v_ts2_register_name
;
1480 d10v_register_sim_regno
= d10v_ts2_register_sim_regno
;
1481 tdep
->a0_regnum
= TS2_A0_REGNUM
;
1482 tdep
->nr_dmap_regs
= TS2_NR_DMAP_REGS
;
1483 tdep
->dmap_register
= d10v_ts2_dmap_register
;
1484 tdep
->imap_register
= d10v_ts2_imap_register
;
1487 case bfd_mach_d10v_ts3
:
1489 d10v_register_name
= d10v_ts3_register_name
;
1490 d10v_register_sim_regno
= d10v_ts3_register_sim_regno
;
1491 tdep
->a0_regnum
= TS3_A0_REGNUM
;
1492 tdep
->nr_dmap_regs
= TS3_NR_DMAP_REGS
;
1493 tdep
->dmap_register
= d10v_ts3_dmap_register
;
1494 tdep
->imap_register
= d10v_ts3_imap_register
;
1498 set_gdbarch_read_pc (gdbarch
, d10v_read_pc
);
1499 set_gdbarch_write_pc (gdbarch
, d10v_write_pc
);
1500 set_gdbarch_read_fp (gdbarch
, d10v_read_fp
);
1501 set_gdbarch_write_fp (gdbarch
, d10v_write_fp
);
1502 set_gdbarch_read_sp (gdbarch
, d10v_read_sp
);
1503 set_gdbarch_write_sp (gdbarch
, d10v_write_sp
);
1505 set_gdbarch_num_regs (gdbarch
, d10v_num_regs
);
1506 set_gdbarch_sp_regnum (gdbarch
, 15);
1507 set_gdbarch_fp_regnum (gdbarch
, 11);
1508 set_gdbarch_pc_regnum (gdbarch
, 18);
1509 set_gdbarch_register_name (gdbarch
, d10v_register_name
);
1510 set_gdbarch_register_size (gdbarch
, 2);
1511 set_gdbarch_register_bytes (gdbarch
, (d10v_num_regs
- 2) * 2 + 16);
1512 set_gdbarch_register_byte (gdbarch
, d10v_register_byte
);
1513 set_gdbarch_register_raw_size (gdbarch
, d10v_register_raw_size
);
1514 set_gdbarch_max_register_raw_size (gdbarch
, 8);
1515 set_gdbarch_register_virtual_size (gdbarch
, d10v_register_virtual_size
);
1516 set_gdbarch_max_register_virtual_size (gdbarch
, 8);
1517 set_gdbarch_register_virtual_type (gdbarch
, d10v_register_virtual_type
);
1519 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1520 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1521 set_gdbarch_int_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1522 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1523 set_gdbarch_long_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1524 /* NOTE: The d10v as a 32 bit ``float'' and ``double''. ``long
1525 double'' is 64 bits. */
1526 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1527 set_gdbarch_double_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1528 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1529 switch (info
.byte_order
)
1532 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_big
);
1533 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_single_big
);
1534 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_big
);
1537 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_little
);
1538 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_single_little
);
1539 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_little
);
1542 internal_error ("d10v_gdbarch_init: bad byte order for float format");
1545 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
1546 set_gdbarch_call_dummy_length (gdbarch
, 0);
1547 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
1548 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
1549 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
1550 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
1551 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
1552 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
1553 set_gdbarch_call_dummy_words (gdbarch
, d10v_call_dummy_words
);
1554 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (d10v_call_dummy_words
));
1555 set_gdbarch_call_dummy_p (gdbarch
, 1);
1556 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
1557 set_gdbarch_get_saved_register (gdbarch
, generic_get_saved_register
);
1558 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
1560 set_gdbarch_register_convertible (gdbarch
, d10v_register_convertible
);
1561 set_gdbarch_register_convert_to_virtual (gdbarch
, d10v_register_convert_to_virtual
);
1562 set_gdbarch_register_convert_to_raw (gdbarch
, d10v_register_convert_to_raw
);
1564 set_gdbarch_extract_return_value (gdbarch
, d10v_extract_return_value
);
1565 set_gdbarch_push_arguments (gdbarch
, d10v_push_arguments
);
1566 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
1567 set_gdbarch_push_return_address (gdbarch
, d10v_push_return_address
);
1569 set_gdbarch_d10v_make_daddr (gdbarch
, d10v_make_daddr
);
1570 set_gdbarch_d10v_make_iaddr (gdbarch
, d10v_make_iaddr
);
1571 set_gdbarch_d10v_daddr_p (gdbarch
, d10v_daddr_p
);
1572 set_gdbarch_d10v_iaddr_p (gdbarch
, d10v_iaddr_p
);
1573 set_gdbarch_d10v_convert_daddr_to_raw (gdbarch
, d10v_convert_daddr_to_raw
);
1574 set_gdbarch_d10v_convert_iaddr_to_raw (gdbarch
, d10v_convert_iaddr_to_raw
);
1576 set_gdbarch_store_struct_return (gdbarch
, d10v_store_struct_return
);
1577 set_gdbarch_store_return_value (gdbarch
, d10v_store_return_value
);
1578 set_gdbarch_extract_struct_value_address (gdbarch
, d10v_extract_struct_value_address
);
1579 set_gdbarch_use_struct_convention (gdbarch
, d10v_use_struct_convention
);
1581 set_gdbarch_frame_init_saved_regs (gdbarch
, d10v_frame_init_saved_regs
);
1582 set_gdbarch_init_extra_frame_info (gdbarch
, d10v_init_extra_frame_info
);
1584 set_gdbarch_pop_frame (gdbarch
, d10v_pop_frame
);
1586 set_gdbarch_skip_prologue (gdbarch
, d10v_skip_prologue
);
1587 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1588 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
1589 set_gdbarch_function_start_offset (gdbarch
, 0);
1590 set_gdbarch_breakpoint_from_pc (gdbarch
, d10v_breakpoint_from_pc
);
1592 set_gdbarch_remote_translate_xfer_address (gdbarch
, remote_d10v_translate_xfer_address
);
1594 set_gdbarch_frame_args_skip (gdbarch
, 0);
1595 set_gdbarch_frameless_function_invocation (gdbarch
, frameless_look_for_prologue
);
1596 set_gdbarch_frame_chain (gdbarch
, d10v_frame_chain
);
1597 set_gdbarch_frame_chain_valid (gdbarch
, d10v_frame_chain_valid
);
1598 set_gdbarch_frame_saved_pc (gdbarch
, d10v_frame_saved_pc
);
1599 set_gdbarch_frame_args_address (gdbarch
, d10v_frame_args_address
);
1600 set_gdbarch_frame_locals_address (gdbarch
, d10v_frame_locals_address
);
1601 set_gdbarch_saved_pc_after_call (gdbarch
, d10v_saved_pc_after_call
);
1602 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
1603 set_gdbarch_stack_align (gdbarch
, d10v_stack_align
);
1605 set_gdbarch_register_sim_regno (gdbarch
, d10v_register_sim_regno
);
1611 extern void (*target_resume_hook
) (void);
1612 extern void (*target_wait_loop_hook
) (void);
1615 _initialize_d10v_tdep (void)
1617 register_gdbarch_init (bfd_arch_d10v
, d10v_gdbarch_init
);
1619 tm_print_insn
= print_insn_d10v
;
1621 target_resume_hook
= d10v_eva_prepare_to_trace
;
1622 target_wait_loop_hook
= d10v_eva_get_trace_data
;
1624 add_com ("regs", class_vars
, show_regs
, "Print all registers");
1626 add_com ("itrace", class_support
, trace_command
,
1627 "Enable tracing of instruction execution.");
1629 add_com ("iuntrace", class_support
, untrace_command
,
1630 "Disable tracing of instruction execution.");
1632 add_com ("itdisassemble", class_vars
, tdisassemble_command
,
1633 "Disassemble the trace buffer.\n\
1634 Two optional arguments specify a range of trace buffer entries\n\
1635 as reported by info trace (NOT addresses!).");
1637 add_info ("itrace", trace_info
,
1638 "Display info about the trace data buffer.");
1640 add_show_from_set (add_set_cmd ("itracedisplay", no_class
,
1641 var_integer
, (char *) &trace_display
,
1642 "Set automatic display of trace.\n", &setlist
),
1644 add_show_from_set (add_set_cmd ("itracesource", no_class
,
1645 var_integer
, (char *) &default_trace_show_source
,
1646 "Set display of source code with trace.\n", &setlist
),