gdb/d10v-tdep.c

   1 /* Target-dependent code for MItsubishi D10V, for GDB.
   2    Copyright (C) 1996 Free Software Foundation, Inc.
   3 This file is part of GDB.
   4 This program is free software; you can redistribute it and/or modify
   5 it under the terms of the GNU General Public License as published by
   6 the Free Software Foundation; either version 2 of the License, or
   7 (at your option) any later version.
   8 This program is distributed in the hope that it will be useful,
   9 but WITHOUT ANY WARRANTY; without even the implied warranty of
  10 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11 GNU General Public License for more details.
  12 You should have received a copy of the GNU General Public License
  13 along with this program; if not, write to the Free Software
  14 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  15
  16 /*  Contributed by Martin Hunt, hunt@cygnus.com */
  17
  18 #include "defs.h"
  19 #include "frame.h"
  20 #include "obstack.h"
  21 #include "symtab.h"
  22 #include "gdbtypes.h"
  23 #include "gdbcmd.h"
  24 #include "gdbcore.h"
  25 #include "gdb_string.h"
  26 #include "value.h"
  27 #include "inferior.h"
  28 #include "dis-asm.h"
  29 #include "symfile.h"
  30 #include "objfiles.h"
  31
  32 void d10v_frame_find_saved_regs PARAMS ((struct frame_info *fi, struct frame_saved_regs *fsr));
  33 static void d10v_pop_dummy_frame PARAMS ((struct frame_info *fi));
  34
  35 /* Discard from the stack the innermost frame,
  36    restoring all saved registers.  */
  37
  38 void
  39 d10v_pop_frame ()
  40 {
  41   struct frame_info *frame = get_current_frame ();
  42   CORE_ADDR fp;
  43   int regnum;
  44   struct frame_saved_regs fsr;
  45   char raw_buffer[8];
  46
  47   fp = FRAME_FP (frame);
  48   if (frame->dummy)
  49     {
  50       d10v_pop_dummy_frame(frame);
  51       return;
  52     }
  53
  54   /* fill out fsr with the address of where each */
  55   /* register was stored in the frame */
  56   get_frame_saved_regs (frame, &fsr);
  57
  58   /* now update the current registers with the old values */
  59   for (regnum = A0_REGNUM; regnum < A0_REGNUM+2 ; regnum++)
  60     {
  61       if (fsr.regs[regnum])
  62         {
  63           read_memory (fsr.regs[regnum], raw_buffer, 8);
  64           write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 8);
  65         }
  66     }
  67   for (regnum = 0; regnum < SP_REGNUM; regnum++)
  68     {
  69       if (fsr.regs[regnum])
  70         {
  71           write_register (regnum, read_memory_unsigned_integer (fsr.regs[regnum], 2));
  72         }
  73     }
  74   if (fsr.regs[PSW_REGNUM])
  75     {
  76       write_register (PSW_REGNUM, read_memory_unsigned_integer (fsr.regs[PSW_REGNUM], 2));
  77     }
  78
  79   write_register (PC_REGNUM, read_register(13));
  80   write_register (SP_REGNUM, fp + frame->size);
  81   target_store_registers (-1);
  82   flush_cached_frames ();
  83 }
  84
  85 static int
  86 check_prologue (op)
  87      unsigned short op;
  88 {
  89   /* st  rn, @-sp */
  90   if ((op & 0x7E1F) == 0x6C1F)
  91     return 1;
  92
  93   /* st2w  rn, @-sp */
  94   if ((op & 0x7E3F) == 0x6E1F)
  95     return 1;
  96
  97   /* subi  sp, n */
  98   if ((op & 0x7FE1) == 0x01E1)
  99     return 1;
 100
 101   /* mv  r11, sp */
 102   if (op == 0x417E)
 103     return 1;
 104
 105   /* nop */
 106   if (op == 0x5E00)
 107     return 1;
 108
 109   /* st  rn, @sp */
 110   if ((op & 0x7E1F) == 0x681E)
 111     return 1;
 112
 113   /* st2w  rn, @sp */
 114  if ((op & 0x7E3F) == 0x3A1E)
 115    return 1;
 116
 117   return 0;
 118 }
 119
 120 CORE_ADDR
 121 d10v_skip_prologue (pc)
 122      CORE_ADDR pc;
 123 {
 124   unsigned long op;
 125   unsigned short op1, op2;
 126
 127   if (target_read_memory (pc, (char *)&op, 4))
 128     return pc;                  /* Can't access it -- assume no prologue. */
 129
 130   while (1)
 131     {
 132       op = (unsigned long)read_memory_integer (pc, 4);
 133       if ((op & 0xC0000000) == 0xC0000000)
 134         {
 135           /* long instruction */
 136           if ( ((op & 0x3FFF0000) != 0x01FF0000) &&   /* add3 sp,sp,n */
 137                ((op & 0x3F0F0000) != 0x340F0000) &&   /* st  rn, @(offset,sp) */
 138                ((op & 0x3F1F0000) != 0x350F0000))     /* st2w  rn, @(offset,sp) */
 139             break;
 140         }
 141       else
 142         {
 143           /* short instructions */
 144           if ((op & 0xC0000000) == 0x80000000)
 145             {
 146               op2 = (op & 0x3FFF8000) >> 15;
 147               op1 = op & 0x7FFF;
 148             }
 149           else
 150             {
 151               op1 = (op & 0x3FFF8000) >> 15;
 152               op2 = op & 0x7FFF;
 153             }
 154           if (check_prologue(op1))
 155             {
 156               if (!check_prologue(op2))
 157                 {
 158                   /* if the previous opcode was really part of the prologue */
 159                   /* and not just a NOP, then we want to break after both instructions */
 160                   if (op1 != 0x5E00)
 161                     pc += 4;
 162                   break;
 163                 }
 164             }
 165           else
 166             break;
 167         }
 168       pc += 4;
 169     }
 170   return pc;
 171 }
 172
 173 /* Given a GDB frame, determine the address of the calling function's frame.
 174    This will be used to create a new GDB frame struct, and then
 175    INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
 176 */
 177
 178 CORE_ADDR
 179 d10v_frame_chain (frame)
 180      struct frame_info *frame;
 181 {
 182   struct frame_saved_regs fsr;
 183
 184   d10v_frame_find_saved_regs (frame, &fsr);
 185
 186   if (frame->return_pc == IMEM_START)
 187     return (CORE_ADDR)0;
 188
 189   if (!fsr.regs[FP_REGNUM])
 190     {
 191       if (!fsr.regs[SP_REGNUM] || fsr.regs[SP_REGNUM] == STACK_START)
 192         return (CORE_ADDR)0;
 193
 194       return fsr.regs[SP_REGNUM];
 195     }
 196
 197   if (!read_memory_unsigned_integer(fsr.regs[FP_REGNUM],2))
 198     return (CORE_ADDR)0;
 199
 200   return read_memory_unsigned_integer(fsr.regs[FP_REGNUM],2)| DMEM_START;
 201 }
 202
 203 static int next_addr, uses_frame;
 204
 205 static int
 206 prologue_find_regs (op, fsr, addr)
 207      unsigned short op;
 208      struct frame_saved_regs *fsr;
 209      CORE_ADDR addr;
 210 {
 211   int n;
 212
 213   /* st  rn, @-sp */
 214   if ((op & 0x7E1F) == 0x6C1F)
 215     {
 216       n = (op & 0x1E0) >> 5;
 217       next_addr -= 2;
 218       fsr->regs[n] = next_addr;
 219       return 1;
 220     }
 221
 222   /* st2w  rn, @-sp */
 223   else if ((op & 0x7E3F) == 0x6E1F)
 224     {
 225       n = (op & 0x1E0) >> 5;
 226       next_addr -= 4;
 227       fsr->regs[n] = next_addr;
 228       fsr->regs[n+1] = next_addr+2;
 229       return 1;
 230     }
 231
 232   /* subi  sp, n */
 233   if ((op & 0x7FE1) == 0x01E1)
 234     {
 235       n = (op & 0x1E) >> 1;
 236       if (n == 0)
 237         n = 16;
 238       next_addr -= n;
 239       return 1;
 240     }
 241
 242   /* mv  r11, sp */
 243   if (op == 0x417E)
 244     {
 245       uses_frame = 1;
 246       return 1;
 247     }
 248
 249   /* nop */
 250   if (op == 0x5E00)
 251     return 1;
 252
 253   /* st  rn, @sp */
 254   if ((op & 0x7E1F) == 0x681E)
 255     {
 256       n = (op & 0x1E0) >> 5;
 257       fsr->regs[n] = next_addr;
 258       return 1;
 259     }
 260
 261   /* st2w  rn, @sp */
 262   if ((op & 0x7E3F) == 0x3A1E)
 263     {
 264       n = (op & 0x1E0) >> 5;
 265       fsr->regs[n] = next_addr;
 266       fsr->regs[n+1] = next_addr+2;
 267       return 1;
 268     }
 269
 270   return 0;
 271 }
 272
 273 /* Put here the code to store, into a struct frame_saved_regs, the
 274    addresses of the saved registers of frame described by FRAME_INFO.
 275    This includes special registers such as pc and fp saved in special
 276    ways in the stack frame.  sp is even more special: the address we
 277    return for it IS the sp for the next frame. */
 278 void
 279 d10v_frame_find_saved_regs (fi, fsr)
 280      struct frame_info *fi;
 281      struct frame_saved_regs *fsr;
 282 {
 283   CORE_ADDR fp, pc;
 284   unsigned long op;
 285   unsigned short op1, op2;
 286   int i;
 287
 288   fp = fi->frame;
 289   memset (fsr, 0, sizeof (*fsr));
 290   next_addr = 0;
 291
 292   pc = get_pc_function_start (fi->pc);
 293
 294   uses_frame = 0;
 295   while (1)
 296     {
 297       op = (unsigned long)read_memory_integer (pc, 4);
 298       if ((op & 0xC0000000) == 0xC0000000)
 299         {
 300           /* long instruction */
 301           if ((op & 0x3FFF0000) == 0x01FF0000)
 302             {
 303               /* add3 sp,sp,n */
 304               short n = op & 0xFFFF;
 305               next_addr += n;
 306             }
 307           else if ((op & 0x3F0F0000) == 0x340F0000)
 308             {
 309               /* st  rn, @(offset,sp) */
 310               short offset = op & 0xFFFF;
 311               short n = (op >> 20) & 0xF;
 312               fsr->regs[n] = next_addr + offset;
 313             }
 314           else if ((op & 0x3F1F0000) == 0x350F0000)
 315             {
 316               /* st2w  rn, @(offset,sp) */
 317               short offset = op & 0xFFFF;
 318               short n = (op >> 20) & 0xF;
 319               fsr->regs[n] = next_addr + offset;
 320               fsr->regs[n+1] = next_addr + offset + 2;
 321             }
 322           else
 323             break;
 324         }
 325       else
 326         {
 327           /* short instructions */
 328           if ((op & 0xC0000000) == 0x80000000)
 329             {
 330               op2 = (op & 0x3FFF8000) >> 15;
 331               op1 = op & 0x7FFF;
 332             }
 333           else
 334             {
 335               op1 = (op & 0x3FFF8000) >> 15;
 336               op2 = op & 0x7FFF;
 337             }
 338           if (!prologue_find_regs(op1,fsr,pc) || !prologue_find_regs(op2,fsr,pc))
 339             break;
 340         }
 341       pc += 4;
 342     }
 343
 344   fi->size = -next_addr;
 345
 346   if (!(fp & 0xffff))
 347     fp = read_register(SP_REGNUM) | DMEM_START;
 348
 349   for (i=0; i<NUM_REGS-1; i++)
 350     if (fsr->regs[i])
 351       {
 352         fsr->regs[i] = fp - (next_addr - fsr->regs[i]);
 353       }
 354
 355   if (fsr->regs[LR_REGNUM])
 356     fi->return_pc = ((read_memory_unsigned_integer(fsr->regs[LR_REGNUM],2) - 1) << 2) | IMEM_START;
 357   else
 358     fi->return_pc = ((read_register(LR_REGNUM) - 1) << 2) | IMEM_START;
 359
 360   /* th SP is not normally (ever?) saved, but check anyway */
 361   if (!fsr->regs[SP_REGNUM])
 362     {
 363       /* if the FP was saved, that means the current FP is valid, */
 364       /* otherwise, it isn't being used, so we use the SP instead */
 365       if (uses_frame)
 366         fsr->regs[SP_REGNUM] = read_register(FP_REGNUM) + fi->size;
 367       else
 368         {
 369           fsr->regs[SP_REGNUM] = fp + fi->size;
 370           fi->frameless = 1;
 371           fsr->regs[FP_REGNUM] = 0;
 372         }
 373     }
 374 }
 375
 376 void
 377 d10v_init_extra_frame_info (fromleaf, fi)
 378      int fromleaf;
 379      struct frame_info *fi;
 380 {
 381   struct frame_saved_regs dummy;
 382
 383   if (fi->next && ((fi->pc & 0xffff) == 0))
 384     fi->pc = fi->next->return_pc;
 385
 386   d10v_frame_find_saved_regs (fi, &dummy);
 387 }
 388
 389 static void
 390 show_regs (args, from_tty)
 391      char *args;
 392      int from_tty;
 393 {
 394   long long num1, num2;
 395   printf_filtered ("PC=%04x (0x%x) PSW=%04x RPT_S=%04x RPT_E=%04x RPT_C=%04x\n",
 396                    read_register (PC_REGNUM), (read_register (PC_REGNUM) << 2) + IMEM_START,
 397                    read_register (PSW_REGNUM),
 398                    read_register (24),
 399                    read_register (25),
 400                    read_register (23));
 401   printf_filtered ("R0-R7  %04x %04x %04x %04x %04x %04x %04x %04x\n",
 402                    read_register (0),
 403                    read_register (1),
 404                    read_register (2),
 405                    read_register (3),
 406                    read_register (4),
 407                    read_register (5),
 408                    read_register (6),
 409                    read_register (7));
 410   printf_filtered ("R8-R15 %04x %04x %04x %04x %04x %04x %04x %04x\n",
 411                    read_register (8),
 412                    read_register (9),
 413                    read_register (10),
 414                    read_register (11),
 415                    read_register (12),
 416                    read_register (13),
 417                    read_register (14),
 418                    read_register (15));
 419   printf_filtered ("IMAP0 %04x    IMAP1 %04x    DMAP %04x\n",
 420                    read_register (IMAP0_REGNUM),
 421                    read_register (IMAP1_REGNUM),
 422                    read_register (DMAP_REGNUM));
 423   read_register_gen (A0_REGNUM, (char *)&num1);
 424   read_register_gen (A0_REGNUM+1, (char *)&num2);
 425   printf_filtered ("A0-A1  %010llx %010llx\n",num1, num2);
 426 }
 427
 428 void
 429 _initialize_d10v_tdep ()
 430 {
 431   tm_print_insn = print_insn_d10v;
 432   add_com ("regs", class_vars, show_regs, "Print all registers");
 433 }
 434
 435 static CORE_ADDR
 436 d10v_xlate_addr (addr)
 437      int addr;
 438 {
 439   int imap;
 440
 441   if (addr < 0x20000)
 442     imap = (int)read_register(IMAP0_REGNUM);
 443   else
 444     imap = (int)read_register(IMAP1_REGNUM);
 445
 446   if (imap & 0x1000)
 447     return (CORE_ADDR)(addr + 0x1000000);
 448   return (CORE_ADDR)(addr + (imap & 0xff)*0x20000);
 449 }
 450
 451
 452 CORE_ADDR
 453 d10v_read_pc (pid)
 454      int pid;
 455 {
 456   int save_pid, retval;
 457
 458   save_pid = inferior_pid;
 459   inferior_pid = pid;
 460   retval = (int)read_register (PC_REGNUM);
 461   inferior_pid = save_pid;
 462   return d10v_xlate_addr(retval << 2);
 463 }
 464
 465 void
 466 d10v_write_pc (val, pid)
 467      CORE_ADDR val;
 468      int pid;
 469 {
 470   int save_pid;
 471
 472   save_pid = inferior_pid;
 473   inferior_pid = pid;
 474   write_register (PC_REGNUM, (val & 0x3ffff) >> 2);
 475   inferior_pid = save_pid;
 476 }
 477
 478 CORE_ADDR
 479 d10v_read_sp ()
 480 {
 481   return (read_register(SP_REGNUM) | DMEM_START);
 482 }
 483
 484 void
 485 d10v_write_sp (val)
 486      CORE_ADDR val;
 487 {
 488   write_register (SP_REGNUM, (LONGEST)(val & 0xffff));
 489 }
 490
 491 CORE_ADDR
 492 d10v_fix_call_dummy (dummyname, start_sp, fun, nargs, args, type, gcc_p)
 493      char *dummyname;
 494      CORE_ADDR start_sp;
 495      CORE_ADDR fun;
 496      int nargs;
 497      value_ptr *args;
 498      struct type *type;
 499      int gcc_p;
 500 {
 501   int regnum;
 502   CORE_ADDR sp;
 503   char buffer[MAX_REGISTER_RAW_SIZE];
 504   struct frame_info *frame = get_current_frame ();
 505   frame->dummy = start_sp;
 506   start_sp |= DMEM_START;
 507
 508   sp = start_sp;
 509   for (regnum = 0; regnum < NUM_REGS; regnum++)
 510     {
 511       sp -= REGISTER_RAW_SIZE(regnum);
 512       store_address (buffer, REGISTER_RAW_SIZE(regnum), read_register(regnum));
 513       write_memory (sp, buffer, REGISTER_RAW_SIZE(regnum));
 514     }
 515   write_register (SP_REGNUM, (LONGEST)(sp & 0xffff));
 516   /* now we need to load LR with the return address */
 517   write_register (LR_REGNUM, (LONGEST)(d10v_call_dummy_address() & 0xffff) >> 2);
 518   return sp;
 519 }
 520
 521 static void
 522 d10v_pop_dummy_frame (fi)
 523      struct frame_info *fi;
 524 {
 525   CORE_ADDR sp = fi->dummy;
 526   int regnum;
 527
 528   for (regnum = 0; regnum < NUM_REGS; regnum++)
 529     {
 530       sp -= REGISTER_RAW_SIZE(regnum);
 531       write_register(regnum, read_memory_unsigned_integer (sp, REGISTER_RAW_SIZE(regnum)));
 532     }
 533   flush_cached_frames (); /* needed? */
 534 }
 535
 536
 537 CORE_ADDR
 538 d10v_push_arguments (nargs, args, sp, struct_return, struct_addr)
 539      int nargs;
 540      value_ptr *args;
 541      CORE_ADDR sp;
 542      int struct_return;
 543      CORE_ADDR struct_addr;
 544 {
 545   int i, len, index=0, regnum=2;
 546   char buffer[4], *contents;
 547   LONGEST val;
 548   CORE_ADDR ptrs[10];
 549
 550   /* Pass 1. Put all large args on stack */
 551   for (i = 0; i < nargs; i++)
 552     {
 553       value_ptr arg = args[i];
 554       struct type *arg_type = check_typedef (VALUE_TYPE (arg));
 555       len = TYPE_LENGTH (arg_type);
 556       contents = VALUE_CONTENTS(arg);
 557       val = extract_signed_integer (contents, len);
 558       if (len > 4)
 559         {
 560           /* put on stack and pass pointers */
 561           sp -= len;
 562           write_memory (sp, contents, len);
 563           ptrs[index++] = sp;
 564         }
 565     }
 566
 567   index = 0;
 568
 569   for (i = 0; i < nargs; i++)
 570     {
 571       value_ptr arg = args[i];
 572       struct type *arg_type = check_typedef (VALUE_TYPE (arg));
 573       len = TYPE_LENGTH (arg_type);
 574       contents = VALUE_CONTENTS(arg);
 575       val = extract_signed_integer (contents, len);
 576       if (len > 4)
 577         {
 578           /* use a pointer to previously saved data */
 579           if (regnum < 6)
 580             write_register (regnum++, ptrs[index++]);
 581           else
 582             {
 583               /* no more registers available.  put it on the stack */
 584               sp -= 2;
 585               store_address (buffer, 2, ptrs[index++]);
 586               write_memory (sp, buffer, 2);
 587             }
 588         }
 589       else
 590         {
 591           if (regnum < 6 )
 592             {
 593               if (len == 4)
 594                 write_register (regnum++, val>>16);
 595               write_register (regnum++, val & 0xffff);
 596             }
 597           else
 598             {
 599               sp -= len;
 600               store_address (buffer, len, val);
 601               write_memory (sp, buffer, len);
 602             }
 603         }
 604     }
 605   return sp;
 606 }
 607
 608
 609 /* pick an out-of-the-way place to set the return value */
 610 /* for an inferior function call.  The link register is set to this  */
 611 /* value and a momentary breakpoint is set there.  When the breakpoint */
 612 /* is hit, the dummy frame is popped and the previous environment is */
 613 /* restored. */
 614
 615 CORE_ADDR
 616 d10v_call_dummy_address ()
 617 {
 618   CORE_ADDR entry;
 619   struct minimal_symbol *sym;
 620
 621   entry = entry_point_address ();
 622
 623   if (entry != 0)
 624     return entry;
 625
 626   sym = lookup_minimal_symbol ("_start", NULL, symfile_objfile);
 627
 628   if (!sym || MSYMBOL_TYPE (sym) != mst_text)
 629     return 0;
 630   else
 631     return SYMBOL_VALUE_ADDRESS (sym);
 632 }
 633
 634 /* Given a return value in `regbuf' with a type `valtype',
 635    extract and copy its value into `valbuf'.  */
 636
 637 void
 638 d10v_extract_return_value (valtype, regbuf, valbuf)
 639      struct type *valtype;
 640      char regbuf[REGISTER_BYTES];
 641      char *valbuf;
 642 {
 643  memcpy (valbuf, regbuf + REGISTER_BYTE (2), TYPE_LENGTH (valtype));
 644 }