1 /* Target-dependent code for Mitsubishi D30V, for GDB.
3 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* Contributed by Martin Hunt, hunt@cygnus.com */
32 #include "gdb_string.h"
40 #include "language.h" /* For local_hex_string() */
42 void d30v_frame_find_saved_regs (struct frame_info
*fi
,
43 struct frame_saved_regs
*fsr
);
44 void d30v_frame_find_saved_regs_offsets (struct frame_info
*fi
,
45 struct frame_saved_regs
*fsr
);
46 static void d30v_pop_dummy_frame (struct frame_info
*fi
);
47 static void d30v_print_flags (void);
48 static void print_flags_command (char *, int);
50 /* the following defines assume:
51 fp is r61, lr is r62, sp is r63, and ?? is r22
52 if that changes, they will need to be updated */
54 #define OP_MASK_ALL_BUT_RA 0x0ffc0fff /* throw away Ra, keep the rest */
56 #define OP_STW_SPM 0x054c0fc0 /* stw Ra, @(sp-) */
57 #define OP_STW_SP_R0 0x05400fc0 /* stw Ra, @(sp,r0) */
58 #define OP_STW_SP_IMM0 0x05480fc0 /* st Ra, @(sp, 0x0) */
59 #define OP_STW_R22P_R0 0x05440580 /* stw Ra, @(r22+,r0) */
61 #define OP_ST2W_SPM 0x056c0fc0 /* st2w Ra, @(sp-) */
62 #define OP_ST2W_SP_R0 0x05600fc0 /* st2w Ra, @(sp, r0) */
63 #define OP_ST2W_SP_IMM0 0x05680fc0 /* st2w Ra, @(sp, 0x0) */
64 #define OP_ST2W_R22P_R0 0x05640580 /* st2w Ra, @(r22+, r0) */
66 #define OP_MASK_OPCODE 0x0ffc0000 /* just the opcode, ign operands */
67 #define OP_NOP 0x00f00000 /* nop */
69 #define OP_MASK_ALL_BUT_IMM 0x0fffffc0 /* throw away imm, keep the rest */
70 #define OP_SUB_SP_IMM 0x082bffc0 /* sub sp,sp,imm */
71 #define OP_ADD_SP_IMM 0x080bffc0 /* add sp,sp,imm */
72 #define OP_ADD_R22_SP_IMM 0x08096fc0 /* add r22,sp,imm */
73 #define OP_STW_FP_SP_IMM 0x054bdfc0 /* stw fp,@(sp,imm) */
74 #define OP_OR_SP_R0_IMM 0x03abf000 /* or sp,r0,imm */
77 #define OP_OR_FP_R0_SP 0x03a3d03f /* or fp,r0,sp */
78 #define OP_OR_FP_SP_R0 0x03a3dfc0 /* or fp,sp,r0 */
79 #define OP_OR_FP_IMM0_SP 0x03abd03f /* or fp,0x0,sp */
80 #define OP_STW_FP_R22P_R0 0x0547d580 /* stw fp,@(r22+,r0) */
81 #define OP_STW_LR_R22P_R0 0x0547e580 /* stw lr,@(r22+,r0) */
83 #define OP_MASK_OP_AND_RB 0x0ff80fc0 /* keep op and rb,throw away rest */
84 #define OP_STW_SP_IMM 0x05480fc0 /* stw Ra,@(sp,imm) */
85 #define OP_ST2W_SP_IMM 0x05680fc0 /* st2w Ra,@(sp,imm) */
86 #define OP_STW_FP_IMM 0x05480f40 /* stw Ra,@(fp,imm) */
87 #define OP_STW_FP_R0 0x05400f40 /* stw Ra,@(fp,r0) */
89 #define OP_MASK_FM_BIT 0x80000000
90 #define OP_MASK_CC_BITS 0x70000000
91 #define OP_MASK_SUB_INST 0x0fffffff
93 #define EXTRACT_RA(op) (((op) >> 12) & 0x3f)
94 #define EXTRACT_RB(op) (((op) >> 6) & 0x3f)
95 #define EXTRACT_RC(op) (((op) & 0x3f)
96 #define EXTRACT_UIMM6(op) ((op) & 0x3f)
97 #define EXTRACT_IMM6(op) ((((int)EXTRACT_UIMM6(op)) << 26) >> 26)
98 #define EXTRACT_IMM26(op) ((((op)&0x0ff00000) >> 2) | ((op)&0x0003ffff))
99 #define EXTRACT_IMM32(opl, opr) ((EXTRACT_UIMM6(opl) << 26)|EXTRACT_IMM26(opr))
103 d30v_frame_chain_valid (CORE_ADDR chain
, struct frame_info
*fi
)
106 return ((chain
) != 0 && (fi
) != 0 && (fi
)->return_pc
!= 0);
108 return ((chain
) != 0 && (fi
) != 0 && (fi
)->frame
<= chain
);
112 /* Discard from the stack the innermost frame, restoring all saved
116 d30v_pop_frame (void)
118 struct frame_info
*frame
= get_current_frame ();
121 struct frame_saved_regs fsr
;
124 fp
= FRAME_FP (frame
);
127 d30v_pop_dummy_frame (frame
);
131 /* fill out fsr with the address of where each */
132 /* register was stored in the frame */
133 get_frame_saved_regs (frame
, &fsr
);
135 /* now update the current registers with the old values */
136 for (regnum
= A0_REGNUM
; regnum
< A0_REGNUM
+ 2; regnum
++)
138 if (fsr
.regs
[regnum
])
140 read_memory (fsr
.regs
[regnum
], raw_buffer
, 8);
141 write_register_bytes (REGISTER_BYTE (regnum
), raw_buffer
, 8);
144 for (regnum
= 0; regnum
< SP_REGNUM
; regnum
++)
146 if (fsr
.regs
[regnum
])
148 write_register (regnum
, read_memory_unsigned_integer (fsr
.regs
[regnum
], 4));
151 if (fsr
.regs
[PSW_REGNUM
])
153 write_register (PSW_REGNUM
, read_memory_unsigned_integer (fsr
.regs
[PSW_REGNUM
], 4));
156 write_register (PC_REGNUM
, read_register (LR_REGNUM
));
157 write_register (SP_REGNUM
, fp
+ frame
->size
);
158 target_store_registers (-1);
159 flush_cached_frames ();
163 check_prologue (unsigned long op
)
165 /* add sp,sp,imm -- observed */
166 if ((op
& OP_MASK_ALL_BUT_IMM
) == OP_ADD_SP_IMM
)
169 /* add r22,sp,imm -- observed */
170 if ((op
& OP_MASK_ALL_BUT_IMM
) == OP_ADD_R22_SP_IMM
)
173 /* or fp,r0,sp -- observed */
174 if (op
== OP_OR_FP_R0_SP
)
178 if ((op
& OP_MASK_OPCODE
) == OP_NOP
)
181 /* stw Ra,@(sp,r0) */
182 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_SP_R0
)
185 /* stw Ra,@(sp,0x0) */
186 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_SP_IMM0
)
189 /* st2w Ra,@(sp,r0) */
190 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_ST2W_SP_R0
)
193 /* st2w Ra,@(sp,0x0) */
194 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_ST2W_SP_IMM0
)
197 /* stw fp, @(r22+,r0) -- observed */
198 if (op
== OP_STW_FP_R22P_R0
)
201 /* stw r62, @(r22+,r0) -- observed */
202 if (op
== OP_STW_LR_R22P_R0
)
205 /* stw Ra, @(fp,r0) -- observed */
206 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_FP_R0
)
207 return 1; /* first arg */
209 /* stw Ra, @(fp,imm) -- observed */
210 if ((op
& OP_MASK_OP_AND_RB
) == OP_STW_FP_IMM
)
211 return 1; /* second and subsequent args */
213 /* stw fp,@(sp,imm) -- observed */
214 if ((op
& OP_MASK_ALL_BUT_IMM
) == OP_STW_FP_SP_IMM
)
217 /* st2w Ra,@(r22+,r0) */
218 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_ST2W_R22P_R0
)
222 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_SPM
)
225 /* st2w Ra, @(sp-) */
226 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_ST2W_SPM
)
229 /* sub.? sp,sp,imm */
230 if ((op
& OP_MASK_ALL_BUT_IMM
) == OP_SUB_SP_IMM
)
237 d30v_skip_prologue (CORE_ADDR pc
)
240 unsigned long opl
, opr
; /* left / right sub operations */
241 unsigned long fm0
, fm1
; /* left / right mode bits */
242 unsigned long cc0
, cc1
;
243 unsigned long op1
, op2
;
244 CORE_ADDR func_addr
, func_end
;
245 struct symtab_and_line sal
;
247 /* If we have line debugging information, then the end of the */
248 /* prologue should the first assembly instruction of the first source line */
249 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
251 sal
= find_pc_line (func_addr
, 0);
252 if (sal
.end
&& sal
.end
< func_end
)
256 if (target_read_memory (pc
, (char *) &op
[0], 8))
257 return pc
; /* Can't access it -- assume no prologue. */
261 opl
= (unsigned long) read_memory_integer (pc
, 4);
262 opr
= (unsigned long) read_memory_integer (pc
+ 4, 4);
264 fm0
= (opl
& OP_MASK_FM_BIT
);
265 fm1
= (opr
& OP_MASK_FM_BIT
);
267 cc0
= (opl
& OP_MASK_CC_BITS
);
268 cc1
= (opr
& OP_MASK_CC_BITS
);
270 opl
= (opl
& OP_MASK_SUB_INST
);
271 opr
= (opr
& OP_MASK_SUB_INST
);
275 /* long instruction (opl contains the opcode) */
276 if (((opl
& OP_MASK_ALL_BUT_IMM
) != OP_ADD_SP_IMM
) && /* add sp,sp,imm */
277 ((opl
& OP_MASK_ALL_BUT_IMM
) != OP_ADD_R22_SP_IMM
) && /* add r22,sp,imm */
278 ((opl
& OP_MASK_OP_AND_RB
) != OP_STW_SP_IMM
) && /* stw Ra, @(sp,imm) */
279 ((opl
& OP_MASK_OP_AND_RB
) != OP_ST2W_SP_IMM
)) /* st2w Ra, @(sp,imm) */
284 /* short instructions */
295 if (check_prologue (op1
))
297 if (!check_prologue (op2
))
299 /* if the previous opcode was really part of the prologue */
300 /* and not just a NOP, then we want to break after both instructions */
301 if ((op1
& OP_MASK_OPCODE
) != OP_NOP
)
314 static int end_of_stack
;
316 /* Given a GDB frame, determine the address of the calling function's frame.
317 This will be used to create a new GDB frame struct, and then
318 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
322 d30v_frame_chain (struct frame_info
*frame
)
324 struct frame_saved_regs fsr
;
326 d30v_frame_find_saved_regs (frame
, &fsr
);
329 return (CORE_ADDR
) 0;
331 if (frame
->return_pc
== IMEM_START
)
332 return (CORE_ADDR
) 0;
334 if (!fsr
.regs
[FP_REGNUM
])
336 if (!fsr
.regs
[SP_REGNUM
] || fsr
.regs
[SP_REGNUM
] == STACK_START
)
337 return (CORE_ADDR
) 0;
339 return fsr
.regs
[SP_REGNUM
];
342 if (!read_memory_unsigned_integer (fsr
.regs
[FP_REGNUM
], 4))
343 return (CORE_ADDR
) 0;
345 return read_memory_unsigned_integer (fsr
.regs
[FP_REGNUM
], 4);
348 static int next_addr
, uses_frame
;
349 static int frame_size
;
352 prologue_find_regs (unsigned long op
, struct frame_saved_regs
*fsr
,
358 /* add sp,sp,imm -- observed */
359 if ((op
& OP_MASK_ALL_BUT_IMM
) == OP_ADD_SP_IMM
)
361 offset
= EXTRACT_IMM6 (op
);
362 /*next_addr += offset; */
363 frame_size
+= -offset
;
367 /* add r22,sp,imm -- observed */
368 if ((op
& OP_MASK_ALL_BUT_IMM
) == OP_ADD_R22_SP_IMM
)
370 offset
= EXTRACT_IMM6 (op
);
371 next_addr
= (offset
- frame_size
);
375 /* stw Ra, @(fp, offset) -- observed */
376 if ((op
& OP_MASK_OP_AND_RB
) == OP_STW_FP_IMM
)
379 offset
= EXTRACT_IMM6 (op
);
380 fsr
->regs
[n
] = (offset
- frame_size
);
384 /* stw Ra, @(fp, r0) -- observed */
385 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_FP_R0
)
388 fsr
->regs
[n
] = (-frame_size
);
392 /* or fp,0,sp -- observed */
393 if ((op
== OP_OR_FP_R0_SP
) ||
394 (op
== OP_OR_FP_SP_R0
) ||
395 (op
== OP_OR_FP_IMM0_SP
))
402 if ((op
& OP_MASK_OPCODE
) == OP_NOP
)
405 /* stw Ra,@(r22+,r0) -- observed */
406 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_R22P_R0
)
409 fsr
->regs
[n
] = next_addr
;
413 #if 0 /* subsumed in pattern above */
414 /* stw fp,@(r22+,r0) -- observed */
415 if (op
== OP_STW_FP_R22P_R0
)
417 fsr
->regs
[FP_REGNUM
] = next_addr
; /* XXX */
422 /* stw r62,@(r22+,r0) -- observed */
423 if (op
== OP_STW_LR_R22P_R0
)
425 fsr
->regs
[LR_REGNUM
] = next_addr
;
430 /* st2w Ra,@(r22+,r0) -- observed */
431 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_ST2W_R22P_R0
)
434 fsr
->regs
[n
] = next_addr
;
435 fsr
->regs
[n
+ 1] = next_addr
+ 4;
441 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_SPM
)
444 fsr
->regs
[n
] = next_addr
;
449 /* st2w Ra, @(sp-) */
450 else if ((op
& OP_MASK_ALL_BUT_RA
) == OP_ST2W_SPM
)
453 fsr
->regs
[n
] = next_addr
;
454 fsr
->regs
[n
+ 1] = next_addr
+ 4;
460 if ((op
& OP_MASK_ALL_BUT_IMM
) == OP_SUB_SP_IMM
)
462 offset
= EXTRACT_IMM6 (op
);
463 frame_size
+= -offset
;
467 /* st rn, @(sp,0) -- observed */
468 if (((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_SP_R0
) ||
469 ((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_SP_IMM0
))
472 fsr
->regs
[n
] = (-frame_size
);
476 /* st2w rn, @(sp,0) */
477 if (((op
& OP_MASK_ALL_BUT_RA
) == OP_ST2W_SP_R0
) ||
478 ((op
& OP_MASK_ALL_BUT_RA
) == OP_ST2W_SP_IMM0
))
481 fsr
->regs
[n
] = (-frame_size
);
482 fsr
->regs
[n
+ 1] = (-frame_size
) + 4;
486 /* stw fp,@(sp,imm) -- observed */
487 if ((op
& OP_MASK_ALL_BUT_IMM
) == OP_STW_FP_SP_IMM
)
489 offset
= EXTRACT_IMM6 (op
);
490 fsr
->regs
[FP_REGNUM
] = (offset
- frame_size
);
496 /* Put here the code to store, into a struct frame_saved_regs, the
497 addresses of the saved registers of frame described by FRAME_INFO.
498 This includes special registers such as pc and fp saved in special
499 ways in the stack frame. sp is even more special: the address we
500 return for it IS the sp for the next frame. */
502 d30v_frame_find_saved_regs (struct frame_info
*fi
, struct frame_saved_regs
*fsr
)
505 unsigned long opl
, opr
;
506 unsigned long op1
, op2
;
507 unsigned long fm0
, fm1
;
511 memset (fsr
, 0, sizeof (*fsr
));
518 d30v_frame_find_saved_regs_offsets (fi
, fsr
);
520 fi
->size
= frame_size
;
523 fp
= read_register (SP_REGNUM
);
525 for (i
= 0; i
< NUM_REGS
- 1; i
++)
528 fsr
->regs
[i
] = fsr
->regs
[i
] + fp
+ frame_size
;
531 if (fsr
->regs
[LR_REGNUM
])
532 fi
->return_pc
= read_memory_unsigned_integer (fsr
->regs
[LR_REGNUM
], 4);
534 fi
->return_pc
= read_register (LR_REGNUM
);
536 /* the SP is not normally (ever?) saved, but check anyway */
537 if (!fsr
->regs
[SP_REGNUM
])
539 /* if the FP was saved, that means the current FP is valid, */
540 /* otherwise, it isn't being used, so we use the SP instead */
542 fsr
->regs
[SP_REGNUM
] = read_register (FP_REGNUM
) + fi
->size
;
545 fsr
->regs
[SP_REGNUM
] = fp
+ fi
->size
;
547 fsr
->regs
[FP_REGNUM
] = 0;
553 d30v_frame_find_saved_regs_offsets (struct frame_info
*fi
,
554 struct frame_saved_regs
*fsr
)
557 unsigned long opl
, opr
;
558 unsigned long op1
, op2
;
559 unsigned long fm0
, fm1
;
563 memset (fsr
, 0, sizeof (*fsr
));
568 pc
= get_pc_function_start (fi
->pc
);
573 opl
= (unsigned long) read_memory_integer (pc
, 4);
574 opr
= (unsigned long) read_memory_integer (pc
+ 4, 4);
576 fm0
= (opl
& OP_MASK_FM_BIT
);
577 fm1
= (opr
& OP_MASK_FM_BIT
);
579 opl
= (opl
& OP_MASK_SUB_INST
);
580 opr
= (opr
& OP_MASK_SUB_INST
);
584 /* long instruction */
585 if ((opl
& OP_MASK_ALL_BUT_IMM
) == OP_ADD_SP_IMM
)
588 long offset
= EXTRACT_IMM32 (opl
, opr
);
589 frame_size
+= -offset
;
591 else if ((opl
& OP_MASK_ALL_BUT_IMM
) == OP_ADD_R22_SP_IMM
)
593 /* add r22,sp,offset */
594 long offset
= EXTRACT_IMM32 (opl
, opr
);
595 next_addr
= (offset
- frame_size
);
597 else if ((opl
& OP_MASK_OP_AND_RB
) == OP_STW_SP_IMM
)
599 /* st Ra, @(sp,imm) */
600 long offset
= EXTRACT_IMM32 (opl
, opr
);
601 short n
= EXTRACT_RA (opl
);
602 fsr
->regs
[n
] = (offset
- frame_size
);
604 else if ((opl
& OP_MASK_OP_AND_RB
) == OP_ST2W_SP_IMM
)
606 /* st2w Ra, @(sp,offset) */
607 long offset
= EXTRACT_IMM32 (opl
, opr
);
608 short n
= EXTRACT_RA (opl
);
609 fsr
->regs
[n
] = (offset
- frame_size
);
610 fsr
->regs
[n
+ 1] = (offset
- frame_size
) + 4;
612 else if ((opl
& OP_MASK_ALL_BUT_IMM
) == OP_OR_SP_R0_IMM
)
621 /* short instructions */
632 if (!prologue_find_regs (op1
, fsr
, pc
) || !prologue_find_regs (op2
, fsr
, pc
))
639 fi
->size
= frame_size
;
642 fp
= read_register (SP_REGNUM
);
644 for (i
= 0; i
< NUM_REGS
- 1; i
++)
647 fsr
->regs
[i
] = fsr
->regs
[i
] + fp
+ frame_size
;
650 if (fsr
->regs
[LR_REGNUM
])
651 fi
->return_pc
= read_memory_unsigned_integer (fsr
->regs
[LR_REGNUM
], 4);
653 fi
->return_pc
= read_register (LR_REGNUM
);
655 /* the SP is not normally (ever?) saved, but check anyway */
656 if (!fsr
->regs
[SP_REGNUM
])
658 /* if the FP was saved, that means the current FP is valid, */
659 /* otherwise, it isn't being used, so we use the SP instead */
661 fsr
->regs
[SP_REGNUM
] = read_register (FP_REGNUM
) + fi
->size
;
664 fsr
->regs
[SP_REGNUM
] = fp
+ fi
->size
;
666 fsr
->regs
[FP_REGNUM
] = 0;
673 d30v_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
675 struct frame_saved_regs dummy
;
677 if (fi
->next
&& (fi
->pc
== 0))
678 fi
->pc
= fi
->next
->return_pc
;
680 d30v_frame_find_saved_regs_offsets (fi
, &dummy
);
687 if ((fi
->next
== 0) && (uses_frame
== 0))
688 /* innermost frame and it's "frameless",
689 so the fi->frame field is wrong, fix it! */
690 fi
->frame
= read_sp ();
692 if (dummy
.regs
[LR_REGNUM
])
694 /* it was saved, grab it! */
695 dummy
.regs
[LR_REGNUM
] += (fi
->frame
+ frame_size
);
696 fi
->return_pc
= read_memory_unsigned_integer (dummy
.regs
[LR_REGNUM
], 4);
699 fi
->return_pc
= read_register (LR_REGNUM
);
703 d30v_init_frame_pc (int fromleaf
, struct frame_info
*prev
)
705 /* default value, put here so we can breakpoint on it and
706 see if the default value is really the right thing to use */
707 prev
->pc
= (fromleaf
? SAVED_PC_AFTER_CALL (prev
->next
) : \
708 prev
->next
? FRAME_SAVED_PC (prev
->next
) : read_pc ());
711 static void d30v_print_register (int regnum
, int tabular
);
714 d30v_print_register (int regnum
, int tabular
)
716 if (regnum
< A0_REGNUM
)
719 printf_filtered ("%08lx", (long) read_register (regnum
));
721 printf_filtered ("0x%lx %ld",
722 (long) read_register (regnum
),
723 (long) read_register (regnum
));
727 char regbuf
[MAX_REGISTER_RAW_SIZE
];
729 frame_register_read (selected_frame
, regnum
, regbuf
);
731 val_print (REGISTER_VIRTUAL_TYPE (regnum
), regbuf
, 0, 0,
732 gdb_stdout
, 'x', 1, 0, Val_pretty_default
);
736 printf_filtered (" ");
737 val_print (REGISTER_VIRTUAL_TYPE (regnum
), regbuf
, 0, 0,
738 gdb_stdout
, 'd', 1, 0, Val_pretty_default
);
744 d30v_print_flags (void)
746 long psw
= read_register (PSW_REGNUM
);
747 printf_filtered ("flags #1");
748 printf_filtered (" (sm) %d", (psw
& PSW_SM
) != 0);
749 printf_filtered (" (ea) %d", (psw
& PSW_EA
) != 0);
750 printf_filtered (" (db) %d", (psw
& PSW_DB
) != 0);
751 printf_filtered (" (ds) %d", (psw
& PSW_DS
) != 0);
752 printf_filtered (" (ie) %d", (psw
& PSW_IE
) != 0);
753 printf_filtered (" (rp) %d", (psw
& PSW_RP
) != 0);
754 printf_filtered (" (md) %d\n", (psw
& PSW_MD
) != 0);
756 printf_filtered ("flags #2");
757 printf_filtered (" (f0) %d", (psw
& PSW_F0
) != 0);
758 printf_filtered (" (f1) %d", (psw
& PSW_F1
) != 0);
759 printf_filtered (" (f2) %d", (psw
& PSW_F2
) != 0);
760 printf_filtered (" (f3) %d", (psw
& PSW_F3
) != 0);
761 printf_filtered (" (s) %d", (psw
& PSW_S
) != 0);
762 printf_filtered (" (v) %d", (psw
& PSW_V
) != 0);
763 printf_filtered (" (va) %d", (psw
& PSW_VA
) != 0);
764 printf_filtered (" (c) %d\n", (psw
& PSW_C
) != 0);
768 print_flags_command (char *args
, int from_tty
)
774 d30v_do_registers_info (int regnum
, int fpregs
)
776 long long num1
, num2
;
781 if (REGISTER_NAME (0) == NULL
|| REGISTER_NAME (0)[0] == '\000')
784 printf_filtered ("%s ", REGISTER_NAME (regnum
));
785 d30v_print_register (regnum
, 0);
787 printf_filtered ("\n");
791 /* Have to print all the registers. Format them nicely. */
793 printf_filtered ("PC=");
794 print_address (read_pc (), gdb_stdout
);
796 printf_filtered (" PSW=");
797 d30v_print_register (PSW_REGNUM
, 1);
799 printf_filtered (" BPC=");
800 print_address (read_register (BPC_REGNUM
), gdb_stdout
);
802 printf_filtered (" BPSW=");
803 d30v_print_register (BPSW_REGNUM
, 1);
804 printf_filtered ("\n");
806 printf_filtered ("DPC=");
807 print_address (read_register (DPC_REGNUM
), gdb_stdout
);
809 printf_filtered (" DPSW=");
810 d30v_print_register (DPSW_REGNUM
, 1);
812 printf_filtered (" IBA=");
813 print_address (read_register (IBA_REGNUM
), gdb_stdout
);
814 printf_filtered ("\n");
816 printf_filtered ("RPT_C=");
817 d30v_print_register (RPT_C_REGNUM
, 1);
819 printf_filtered (" RPT_S=");
820 print_address (read_register (RPT_S_REGNUM
), gdb_stdout
);
822 printf_filtered (" RPT_E=");
823 print_address (read_register (RPT_E_REGNUM
), gdb_stdout
);
824 printf_filtered ("\n");
826 printf_filtered ("MOD_S=");
827 print_address (read_register (MOD_S_REGNUM
), gdb_stdout
);
829 printf_filtered (" MOD_E=");
830 print_address (read_register (MOD_E_REGNUM
), gdb_stdout
);
831 printf_filtered ("\n");
833 printf_filtered ("EIT_VB=");
834 print_address (read_register (EIT_VB_REGNUM
), gdb_stdout
);
836 printf_filtered (" INT_S=");
837 d30v_print_register (INT_S_REGNUM
, 1);
839 printf_filtered (" INT_M=");
840 d30v_print_register (INT_M_REGNUM
, 1);
841 printf_filtered ("\n");
844 for (regnum
= 0; regnum
<= 63;)
848 printf_filtered ("R%d-R%d ", regnum
, regnum
+ 7);
850 printf_filtered (" ");
852 printf_filtered (" ");
854 for (i
= 0; i
< 8; i
++)
856 printf_filtered (" ");
857 d30v_print_register (regnum
++, 1);
860 printf_filtered ("\n");
863 printf_filtered ("A0-A1 ");
865 d30v_print_register (A0_REGNUM
, 1);
866 printf_filtered (" ");
867 d30v_print_register (A1_REGNUM
, 1);
868 printf_filtered ("\n");
872 d30v_fix_call_dummy (char *dummyname
, CORE_ADDR start_sp
, CORE_ADDR fun
,
873 int nargs
, struct value
**args
,
874 struct type
*type
, int gcc_p
)
878 char buffer
[MAX_REGISTER_RAW_SIZE
];
879 struct frame_info
*frame
= get_current_frame ();
880 frame
->dummy
= start_sp
;
881 /*start_sp |= DMEM_START; */
884 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
886 sp
-= REGISTER_RAW_SIZE (regnum
);
887 store_address (buffer
, REGISTER_RAW_SIZE (regnum
), read_register (regnum
));
888 write_memory (sp
, buffer
, REGISTER_RAW_SIZE (regnum
));
890 write_register (SP_REGNUM
, (LONGEST
) sp
);
891 /* now we need to load LR with the return address */
892 write_register (LR_REGNUM
, (LONGEST
) d30v_call_dummy_address ());
897 d30v_pop_dummy_frame (struct frame_info
*fi
)
899 CORE_ADDR sp
= fi
->dummy
;
902 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
904 sp
-= REGISTER_RAW_SIZE (regnum
);
905 write_register (regnum
, read_memory_unsigned_integer (sp
, REGISTER_RAW_SIZE (regnum
)));
907 flush_cached_frames (); /* needed? */
912 d30v_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
913 int struct_return
, CORE_ADDR struct_addr
)
915 int i
, len
, index
= 0, regnum
= 2;
916 char buffer
[4], *contents
;
921 /* Pass 1. Put all large args on stack */
922 for (i
= 0; i
< nargs
; i
++)
924 struct value
*arg
= args
[i
];
925 struct type
*arg_type
= check_typedef (VALUE_TYPE (arg
));
926 len
= TYPE_LENGTH (arg_type
);
927 contents
= VALUE_CONTENTS (arg
);
928 val
= extract_signed_integer (contents
, len
);
931 /* put on stack and pass pointers */
933 write_memory (sp
, contents
, len
);
940 for (i
= 0; i
< nargs
; i
++)
942 struct value
*arg
= args
[i
];
943 struct type
*arg_type
= check_typedef (VALUE_TYPE (arg
));
944 len
= TYPE_LENGTH (arg_type
);
945 contents
= VALUE_CONTENTS (arg
);
948 /* we need multiple registers */
951 for (ndx
= 0; len
> 0; ndx
+= 8, len
-= 8)
954 regnum
++; /* all args > 4 bytes start in even register */
958 val
= extract_signed_integer (&contents
[ndx
], 4);
959 write_register (regnum
++, val
);
962 val
= extract_signed_integer (&contents
[ndx
+ 4], 4);
964 val
= extract_signed_integer (&contents
[ndx
+ 4], len
- 4);
965 write_register (regnum
++, val
);
969 /* no more registers available. put it on the stack */
971 /* all args > 4 bytes are padded to a multiple of 8 bytes
972 and start on an 8 byte boundary */
974 sp
-= (sp
& 7); /* align it */
976 sp
-= ((len
+ 7) & ~7); /* allocate space */
977 write_memory (sp
, &contents
[ndx
], len
);
986 val
= extract_signed_integer (contents
, len
);
987 write_register (regnum
++, val
);
991 /* all args are padded to a multiple of 4 bytes (at least) */
992 sp
-= ((len
+ 3) & ~3);
993 write_memory (sp
, contents
, len
);
998 /* stack pointer is not on an 8 byte boundary -- align it */
1004 /* pick an out-of-the-way place to set the return value */
1005 /* for an inferior function call. The link register is set to this */
1006 /* value and a momentary breakpoint is set there. When the breakpoint */
1007 /* is hit, the dummy frame is popped and the previous environment is */
1011 d30v_call_dummy_address (void)
1014 struct minimal_symbol
*sym
;
1016 entry
= entry_point_address ();
1021 sym
= lookup_minimal_symbol ("_start", NULL
, symfile_objfile
);
1023 if (!sym
|| MSYMBOL_TYPE (sym
) != mst_text
)
1026 return SYMBOL_VALUE_ADDRESS (sym
);
1029 /* Given a return value in `regbuf' with a type `valtype',
1030 extract and copy its value into `valbuf'. */
1033 d30v_extract_return_value (struct type
*valtype
, char regbuf
[REGISTER_BYTES
],
1036 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (2), TYPE_LENGTH (valtype
));
1039 /* The following code implements access to, and display of, the D30V's
1040 instruction trace buffer. The buffer consists of 64K or more
1041 4-byte words of data, of which each words includes an 8-bit count,
1042 an 8-bit segment number, and a 16-bit instruction address.
1044 In theory, the trace buffer is continuously capturing instruction
1045 data that the CPU presents on its "debug bus", but in practice, the
1046 ROMified GDB stub only enables tracing when it continues or steps
1047 the program, and stops tracing when the program stops; so it
1048 actually works for GDB to read the buffer counter out of memory and
1049 then read each trace word. The counter records where the tracing
1050 stops, but there is no record of where it started, so we remember
1051 the PC when we resumed and then search backwards in the trace
1052 buffer for a word that includes that address. This is not perfect,
1053 because you will miss trace data if the resumption PC is the target
1054 of a branch. (The value of the buffer counter is semi-random, any
1055 trace data from a previous program stop is gone.) */
1057 /* The address of the last word recorded in the trace buffer. */
1059 #define DBBC_ADDR (0xd80000)
1061 /* The base of the trace buffer, at least for the "Board_0". */
1063 #define TRACE_BUFFER_BASE (0xf40000)
1065 static void trace_command (char *, int);
1067 static void untrace_command (char *, int);
1069 static void trace_info (char *, int);
1071 static void tdisassemble_command (char *, int);
1073 static void display_trace (int, int);
1075 /* True when instruction traces are being collected. */
1079 /* Remembered PC. */
1081 static CORE_ADDR last_pc
;
1083 /* True when trace output should be displayed whenever program stops. */
1085 static int trace_display
;
1087 /* True when trace listing should include source lines. */
1089 static int default_trace_show_source
= 1;
1100 trace_command (char *args
, int from_tty
)
1102 /* Clear the host-side trace buffer, allocating space if needed. */
1103 trace_data
.size
= 0;
1104 if (trace_data
.counts
== NULL
)
1105 trace_data
.counts
= (short *) xmalloc (65536 * sizeof (short));
1106 if (trace_data
.addrs
== NULL
)
1107 trace_data
.addrs
= (CORE_ADDR
*) xmalloc (65536 * sizeof (CORE_ADDR
));
1111 printf_filtered ("Tracing is now on.\n");
1115 untrace_command (char *args
, int from_tty
)
1119 printf_filtered ("Tracing is now off.\n");
1123 trace_info (char *args
, int from_tty
)
1127 if (trace_data
.size
)
1129 printf_filtered ("%d entries in trace buffer:\n", trace_data
.size
);
1131 for (i
= 0; i
< trace_data
.size
; ++i
)
1133 printf_filtered ("%d: %d instruction%s at 0x%s\n",
1134 i
, trace_data
.counts
[i
],
1135 (trace_data
.counts
[i
] == 1 ? "" : "s"),
1136 paddr_nz (trace_data
.addrs
[i
]));
1140 printf_filtered ("No entries in trace buffer.\n");
1142 printf_filtered ("Tracing is currently %s.\n", (tracing
? "on" : "off"));
1145 /* Print the instruction at address MEMADDR in debugged memory,
1146 on STREAM. Returns length of the instruction, in bytes. */
1149 print_insn (CORE_ADDR memaddr
, struct ui_file
*stream
)
1151 /* If there's no disassembler, something is very wrong. */
1152 if (tm_print_insn
== NULL
)
1153 internal_error (__FILE__
, __LINE__
,
1154 "print_insn: no disassembler");
1156 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1157 tm_print_insn_info
.endian
= BFD_ENDIAN_BIG
;
1159 tm_print_insn_info
.endian
= BFD_ENDIAN_LITTLE
;
1160 return TARGET_PRINT_INSN (memaddr
, &tm_print_insn_info
);
1164 d30v_eva_prepare_to_trace (void)
1169 last_pc
= read_register (PC_REGNUM
);
1172 /* Collect trace data from the target board and format it into a form
1173 more useful for display. */
1176 d30v_eva_get_trace_data (void)
1178 int count
, i
, j
, oldsize
;
1179 int trace_addr
, trace_seg
, trace_cnt
, next_cnt
;
1180 unsigned int last_trace
, trace_word
, next_word
;
1181 unsigned int *tmpspace
;
1186 tmpspace
= xmalloc (65536 * sizeof (unsigned int));
1188 last_trace
= read_memory_unsigned_integer (DBBC_ADDR
, 2) << 2;
1190 /* Collect buffer contents from the target, stopping when we reach
1191 the word recorded when execution resumed. */
1194 while (last_trace
> 0)
1198 read_memory_unsigned_integer (TRACE_BUFFER_BASE
+ last_trace
, 4);
1199 trace_addr
= trace_word
& 0xffff;
1201 /* Ignore an apparently nonsensical entry. */
1202 if (trace_addr
== 0xffd5)
1204 tmpspace
[count
++] = trace_word
;
1205 if (trace_addr
== last_pc
)
1211 /* Move the data to the host-side trace buffer, adjusting counts to
1212 include the last instruction executed and transforming the address
1213 into something that GDB likes. */
1215 for (i
= 0; i
< count
; ++i
)
1217 trace_word
= tmpspace
[i
];
1218 next_word
= ((i
== 0) ? 0 : tmpspace
[i
- 1]);
1219 trace_addr
= trace_word
& 0xffff;
1220 next_cnt
= (next_word
>> 24) & 0xff;
1221 j
= trace_data
.size
+ count
- i
- 1;
1222 trace_data
.addrs
[j
] = (trace_addr
<< 2) + 0x1000000;
1223 trace_data
.counts
[j
] = next_cnt
+ 1;
1226 oldsize
= trace_data
.size
;
1227 trace_data
.size
+= count
;
1232 display_trace (oldsize
, trace_data
.size
);
1236 tdisassemble_command (char *arg
, int from_tty
)
1239 CORE_ADDR low
, high
;
1245 high
= trace_data
.size
;
1247 else if (!(space_index
= (char *) strchr (arg
, ' ')))
1249 low
= parse_and_eval_address (arg
);
1254 /* Two arguments. */
1255 *space_index
= '\0';
1256 low
= parse_and_eval_address (arg
);
1257 high
= parse_and_eval_address (space_index
+ 1);
1262 printf_filtered ("Dump of trace from %s to %s:\n",
1266 display_trace (low
, high
);
1268 printf_filtered ("End of trace dump.\n");
1269 gdb_flush (gdb_stdout
);
1273 display_trace (int low
, int high
)
1275 int i
, count
, trace_show_source
, first
, suppress
;
1276 CORE_ADDR next_address
;
1278 trace_show_source
= default_trace_show_source
;
1279 if (!have_full_symbols () && !have_partial_symbols ())
1281 trace_show_source
= 0;
1282 printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
1283 printf_filtered ("Trace will not display any source.\n");
1288 for (i
= low
; i
< high
; ++i
)
1290 next_address
= trace_data
.addrs
[i
];
1291 count
= trace_data
.counts
[i
];
1295 if (trace_show_source
)
1297 struct symtab_and_line sal
, sal_prev
;
1299 sal_prev
= find_pc_line (next_address
- 4, 0);
1300 sal
= find_pc_line (next_address
, 0);
1304 if (first
|| sal
.line
!= sal_prev
.line
)
1305 print_source_lines (sal
.symtab
, sal
.line
, sal
.line
+ 1, 0);
1311 /* FIXME-32x64--assumes sal.pc fits in long. */
1312 printf_filtered ("No source file for address %s.\n",
1313 local_hex_string ((unsigned long) sal
.pc
));
1318 print_address (next_address
, gdb_stdout
);
1319 printf_filtered (":");
1320 printf_filtered ("\t");
1322 next_address
= next_address
+ print_insn (next_address
, gdb_stdout
);
1323 printf_filtered ("\n");
1324 gdb_flush (gdb_stdout
);
1329 extern void (*target_resume_hook
) (void);
1330 extern void (*target_wait_loop_hook
) (void);
1333 _initialize_d30v_tdep (void)
1335 tm_print_insn
= print_insn_d30v
;
1337 target_resume_hook
= d30v_eva_prepare_to_trace
;
1338 target_wait_loop_hook
= d30v_eva_get_trace_data
;
1340 add_info ("flags", print_flags_command
, "Print d30v flags.");
1342 add_com ("trace", class_support
, trace_command
,
1343 "Enable tracing of instruction execution.");
1345 add_com ("untrace", class_support
, untrace_command
,
1346 "Disable tracing of instruction execution.");
1348 add_com ("tdisassemble", class_vars
, tdisassemble_command
,
1349 "Disassemble the trace buffer.\n\
1350 Two optional arguments specify a range of trace buffer entries\n\
1351 as reported by info trace (NOT addresses!).");
1353 add_info ("trace", trace_info
,
1354 "Display info about the trace data buffer.");
1356 add_show_from_set (add_set_cmd ("tracedisplay", no_class
,
1357 var_integer
, (char *) &trace_display
,
1358 "Set automatic display of trace.\n", &setlist
),
1360 add_show_from_set (add_set_cmd ("tracesource", no_class
,
1361 var_integer
, (char *) &default_trace_show_source
,
1362 "Set display of source code with trace.\n", &setlist
),