1 /* Target-dependent code for Mitsubishi D30V, for GDB.
2 Copyright (C) 1996, 1997, 2000 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* Contributed by Martin Hunt, hunt@cygnus.com */
30 #include "gdb_string.h"
37 #include "language.h" /* For local_hex_string() */
39 void d30v_frame_find_saved_regs (struct frame_info
*fi
,
40 struct frame_saved_regs
*fsr
);
41 void d30v_frame_find_saved_regs_offsets (struct frame_info
*fi
,
42 struct frame_saved_regs
*fsr
);
43 static void d30v_pop_dummy_frame (struct frame_info
*fi
);
44 static void d30v_print_flags (void);
45 static void print_flags_command (char *, int);
47 /* the following defines assume:
48 fp is r61, lr is r62, sp is r63, and ?? is r22
49 if that changes, they will need to be updated */
51 #define OP_MASK_ALL_BUT_RA 0x0ffc0fff /* throw away Ra, keep the rest */
53 #define OP_STW_SPM 0x054c0fc0 /* stw Ra, @(sp-) */
54 #define OP_STW_SP_R0 0x05400fc0 /* stw Ra, @(sp,r0) */
55 #define OP_STW_SP_IMM0 0x05480fc0 /* st Ra, @(sp, 0x0) */
56 #define OP_STW_R22P_R0 0x05440580 /* stw Ra, @(r22+,r0) */
58 #define OP_ST2W_SPM 0x056c0fc0 /* st2w Ra, @(sp-) */
59 #define OP_ST2W_SP_R0 0x05600fc0 /* st2w Ra, @(sp, r0) */
60 #define OP_ST2W_SP_IMM0 0x05680fc0 /* st2w Ra, @(sp, 0x0) */
61 #define OP_ST2W_R22P_R0 0x05640580 /* st2w Ra, @(r22+, r0) */
63 #define OP_MASK_OPCODE 0x0ffc0000 /* just the opcode, ign operands */
64 #define OP_NOP 0x00f00000 /* nop */
66 #define OP_MASK_ALL_BUT_IMM 0x0fffffc0 /* throw away imm, keep the rest */
67 #define OP_SUB_SP_IMM 0x082bffc0 /* sub sp,sp,imm */
68 #define OP_ADD_SP_IMM 0x080bffc0 /* add sp,sp,imm */
69 #define OP_ADD_R22_SP_IMM 0x08096fc0 /* add r22,sp,imm */
70 #define OP_STW_FP_SP_IMM 0x054bdfc0 /* stw fp,@(sp,imm) */
71 #define OP_OR_SP_R0_IMM 0x03abf000 /* or sp,r0,imm */
74 #define OP_OR_FP_R0_SP 0x03a3d03f /* or fp,r0,sp */
75 #define OP_OR_FP_SP_R0 0x03a3dfc0 /* or fp,sp,r0 */
76 #define OP_OR_FP_IMM0_SP 0x03abd03f /* or fp,0x0,sp */
77 #define OP_STW_FP_R22P_R0 0x0547d580 /* stw fp,@(r22+,r0) */
78 #define OP_STW_LR_R22P_R0 0x0547e580 /* stw lr,@(r22+,r0) */
80 #define OP_MASK_OP_AND_RB 0x0ff80fc0 /* keep op and rb,throw away rest */
81 #define OP_STW_SP_IMM 0x05480fc0 /* stw Ra,@(sp,imm) */
82 #define OP_ST2W_SP_IMM 0x05680fc0 /* st2w Ra,@(sp,imm) */
83 #define OP_STW_FP_IMM 0x05480f40 /* stw Ra,@(fp,imm) */
84 #define OP_STW_FP_R0 0x05400f40 /* stw Ra,@(fp,r0) */
86 #define OP_MASK_FM_BIT 0x80000000
87 #define OP_MASK_CC_BITS 0x70000000
88 #define OP_MASK_SUB_INST 0x0fffffff
90 #define EXTRACT_RA(op) (((op) >> 12) & 0x3f)
91 #define EXTRACT_RB(op) (((op) >> 6) & 0x3f)
92 #define EXTRACT_RC(op) (((op) & 0x3f)
93 #define EXTRACT_UIMM6(op) ((op) & 0x3f)
94 #define EXTRACT_IMM6(op) ((((int)EXTRACT_UIMM6(op)) << 26) >> 26)
95 #define EXTRACT_IMM26(op) ((((op)&0x0ff00000) >> 2) | ((op)&0x0003ffff))
96 #define EXTRACT_IMM32(opl, opr) ((EXTRACT_UIMM6(opl) << 26)|EXTRACT_IMM26(opr))
100 d30v_frame_chain_valid (chain
, fi
)
102 struct frame_info
*fi
; /* not used here */
105 return ((chain
) != 0 && (fi
) != 0 && (fi
)->return_pc
!= 0);
107 return ((chain
) != 0 && (fi
) != 0 && (fi
)->frame
<= chain
);
111 /* Discard from the stack the innermost frame, restoring all saved
115 d30v_pop_frame (void)
117 struct frame_info
*frame
= get_current_frame ();
120 struct frame_saved_regs fsr
;
123 fp
= FRAME_FP (frame
);
126 d30v_pop_dummy_frame (frame
);
130 /* fill out fsr with the address of where each */
131 /* register was stored in the frame */
132 get_frame_saved_regs (frame
, &fsr
);
134 /* now update the current registers with the old values */
135 for (regnum
= A0_REGNUM
; regnum
< A0_REGNUM
+ 2; regnum
++)
137 if (fsr
.regs
[regnum
])
139 read_memory (fsr
.regs
[regnum
], raw_buffer
, 8);
140 write_register_bytes (REGISTER_BYTE (regnum
), raw_buffer
, 8);
143 for (regnum
= 0; regnum
< SP_REGNUM
; regnum
++)
145 if (fsr
.regs
[regnum
])
147 write_register (regnum
, read_memory_unsigned_integer (fsr
.regs
[regnum
], 4));
150 if (fsr
.regs
[PSW_REGNUM
])
152 write_register (PSW_REGNUM
, read_memory_unsigned_integer (fsr
.regs
[PSW_REGNUM
], 4));
155 write_register (PC_REGNUM
, read_register (LR_REGNUM
));
156 write_register (SP_REGNUM
, fp
+ frame
->size
);
157 target_store_registers (-1);
158 flush_cached_frames ();
162 check_prologue (unsigned long op
)
164 /* add sp,sp,imm -- observed */
165 if ((op
& OP_MASK_ALL_BUT_IMM
) == OP_ADD_SP_IMM
)
168 /* add r22,sp,imm -- observed */
169 if ((op
& OP_MASK_ALL_BUT_IMM
) == OP_ADD_R22_SP_IMM
)
172 /* or fp,r0,sp -- observed */
173 if (op
== OP_OR_FP_R0_SP
)
177 if ((op
& OP_MASK_OPCODE
) == OP_NOP
)
180 /* stw Ra,@(sp,r0) */
181 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_SP_R0
)
184 /* stw Ra,@(sp,0x0) */
185 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_SP_IMM0
)
188 /* st2w Ra,@(sp,r0) */
189 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_ST2W_SP_R0
)
192 /* st2w Ra,@(sp,0x0) */
193 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_ST2W_SP_IMM0
)
196 /* stw fp, @(r22+,r0) -- observed */
197 if (op
== OP_STW_FP_R22P_R0
)
200 /* stw r62, @(r22+,r0) -- observed */
201 if (op
== OP_STW_LR_R22P_R0
)
204 /* stw Ra, @(fp,r0) -- observed */
205 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_FP_R0
)
206 return 1; /* first arg */
208 /* stw Ra, @(fp,imm) -- observed */
209 if ((op
& OP_MASK_OP_AND_RB
) == OP_STW_FP_IMM
)
210 return 1; /* second and subsequent args */
212 /* stw fp,@(sp,imm) -- observed */
213 if ((op
& OP_MASK_ALL_BUT_IMM
) == OP_STW_FP_SP_IMM
)
216 /* st2w Ra,@(r22+,r0) */
217 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_ST2W_R22P_R0
)
221 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_SPM
)
224 /* st2w Ra, @(sp-) */
225 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_ST2W_SPM
)
228 /* sub.? sp,sp,imm */
229 if ((op
& OP_MASK_ALL_BUT_IMM
) == OP_SUB_SP_IMM
)
236 d30v_skip_prologue (CORE_ADDR pc
)
239 unsigned long opl
, opr
; /* left / right sub operations */
240 unsigned long fm0
, fm1
; /* left / right mode bits */
241 unsigned long cc0
, cc1
;
242 unsigned long op1
, op2
;
243 CORE_ADDR func_addr
, func_end
;
244 struct symtab_and_line sal
;
246 /* If we have line debugging information, then the end of the */
247 /* prologue should the first assembly instruction of the first source line */
248 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
250 sal
= find_pc_line (func_addr
, 0);
251 if (sal
.end
&& sal
.end
< func_end
)
255 if (target_read_memory (pc
, (char *) &op
[0], 8))
256 return pc
; /* Can't access it -- assume no prologue. */
260 opl
= (unsigned long) read_memory_integer (pc
, 4);
261 opr
= (unsigned long) read_memory_integer (pc
+ 4, 4);
263 fm0
= (opl
& OP_MASK_FM_BIT
);
264 fm1
= (opr
& OP_MASK_FM_BIT
);
266 cc0
= (opl
& OP_MASK_CC_BITS
);
267 cc1
= (opr
& OP_MASK_CC_BITS
);
269 opl
= (opl
& OP_MASK_SUB_INST
);
270 opr
= (opr
& OP_MASK_SUB_INST
);
274 /* long instruction (opl contains the opcode) */
275 if (((opl
& OP_MASK_ALL_BUT_IMM
) != OP_ADD_SP_IMM
) && /* add sp,sp,imm */
276 ((opl
& OP_MASK_ALL_BUT_IMM
) != OP_ADD_R22_SP_IMM
) && /* add r22,sp,imm */
277 ((opl
& OP_MASK_OP_AND_RB
) != OP_STW_SP_IMM
) && /* stw Ra, @(sp,imm) */
278 ((opl
& OP_MASK_OP_AND_RB
) != OP_ST2W_SP_IMM
)) /* st2w Ra, @(sp,imm) */
283 /* short instructions */
294 if (check_prologue (op1
))
296 if (!check_prologue (op2
))
298 /* if the previous opcode was really part of the prologue */
299 /* and not just a NOP, then we want to break after both instructions */
300 if ((op1
& OP_MASK_OPCODE
) != OP_NOP
)
313 static int end_of_stack
;
315 /* Given a GDB frame, determine the address of the calling function's frame.
316 This will be used to create a new GDB frame struct, and then
317 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
321 d30v_frame_chain (struct frame_info
*frame
)
323 struct frame_saved_regs fsr
;
325 d30v_frame_find_saved_regs (frame
, &fsr
);
328 return (CORE_ADDR
) 0;
330 if (frame
->return_pc
== IMEM_START
)
331 return (CORE_ADDR
) 0;
333 if (!fsr
.regs
[FP_REGNUM
])
335 if (!fsr
.regs
[SP_REGNUM
] || fsr
.regs
[SP_REGNUM
] == STACK_START
)
336 return (CORE_ADDR
) 0;
338 return fsr
.regs
[SP_REGNUM
];
341 if (!read_memory_unsigned_integer (fsr
.regs
[FP_REGNUM
], 4))
342 return (CORE_ADDR
) 0;
344 return read_memory_unsigned_integer (fsr
.regs
[FP_REGNUM
], 4);
347 static int next_addr
, uses_frame
;
348 static int frame_size
;
351 prologue_find_regs (unsigned long op
, struct frame_saved_regs
*fsr
,
357 /* add sp,sp,imm -- observed */
358 if ((op
& OP_MASK_ALL_BUT_IMM
) == OP_ADD_SP_IMM
)
360 offset
= EXTRACT_IMM6 (op
);
361 /*next_addr += offset; */
362 frame_size
+= -offset
;
366 /* add r22,sp,imm -- observed */
367 if ((op
& OP_MASK_ALL_BUT_IMM
) == OP_ADD_R22_SP_IMM
)
369 offset
= EXTRACT_IMM6 (op
);
370 next_addr
= (offset
- frame_size
);
374 /* stw Ra, @(fp, offset) -- observed */
375 if ((op
& OP_MASK_OP_AND_RB
) == OP_STW_FP_IMM
)
378 offset
= EXTRACT_IMM6 (op
);
379 fsr
->regs
[n
] = (offset
- frame_size
);
383 /* stw Ra, @(fp, r0) -- observed */
384 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_FP_R0
)
387 fsr
->regs
[n
] = (-frame_size
);
391 /* or fp,0,sp -- observed */
392 if ((op
== OP_OR_FP_R0_SP
) ||
393 (op
== OP_OR_FP_SP_R0
) ||
394 (op
== OP_OR_FP_IMM0_SP
))
401 if ((op
& OP_MASK_OPCODE
) == OP_NOP
)
404 /* stw Ra,@(r22+,r0) -- observed */
405 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_R22P_R0
)
408 fsr
->regs
[n
] = next_addr
;
412 #if 0 /* subsumed in pattern above */
413 /* stw fp,@(r22+,r0) -- observed */
414 if (op
== OP_STW_FP_R22P_R0
)
416 fsr
->regs
[FP_REGNUM
] = next_addr
; /* XXX */
421 /* stw r62,@(r22+,r0) -- observed */
422 if (op
== OP_STW_LR_R22P_R0
)
424 fsr
->regs
[LR_REGNUM
] = next_addr
;
429 /* st2w Ra,@(r22+,r0) -- observed */
430 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_ST2W_R22P_R0
)
433 fsr
->regs
[n
] = next_addr
;
434 fsr
->regs
[n
+ 1] = next_addr
+ 4;
440 if ((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_SPM
)
443 fsr
->regs
[n
] = next_addr
;
448 /* st2w Ra, @(sp-) */
449 else if ((op
& OP_MASK_ALL_BUT_RA
) == OP_ST2W_SPM
)
452 fsr
->regs
[n
] = next_addr
;
453 fsr
->regs
[n
+ 1] = next_addr
+ 4;
459 if ((op
& OP_MASK_ALL_BUT_IMM
) == OP_SUB_SP_IMM
)
461 offset
= EXTRACT_IMM6 (op
);
462 frame_size
+= -offset
;
466 /* st rn, @(sp,0) -- observed */
467 if (((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_SP_R0
) ||
468 ((op
& OP_MASK_ALL_BUT_RA
) == OP_STW_SP_IMM0
))
471 fsr
->regs
[n
] = (-frame_size
);
475 /* st2w rn, @(sp,0) */
476 if (((op
& OP_MASK_ALL_BUT_RA
) == OP_ST2W_SP_R0
) ||
477 ((op
& OP_MASK_ALL_BUT_RA
) == OP_ST2W_SP_IMM0
))
480 fsr
->regs
[n
] = (-frame_size
);
481 fsr
->regs
[n
+ 1] = (-frame_size
) + 4;
485 /* stw fp,@(sp,imm) -- observed */
486 if ((op
& OP_MASK_ALL_BUT_IMM
) == OP_STW_FP_SP_IMM
)
488 offset
= EXTRACT_IMM6 (op
);
489 fsr
->regs
[FP_REGNUM
] = (offset
- frame_size
);
495 /* Put here the code to store, into a struct frame_saved_regs, the
496 addresses of the saved registers of frame described by FRAME_INFO.
497 This includes special registers such as pc and fp saved in special
498 ways in the stack frame. sp is even more special: the address we
499 return for it IS the sp for the next frame. */
501 d30v_frame_find_saved_regs (struct frame_info
*fi
, struct frame_saved_regs
*fsr
)
504 unsigned long opl
, opr
;
505 unsigned long op1
, op2
;
506 unsigned long fm0
, fm1
;
510 memset (fsr
, 0, sizeof (*fsr
));
517 d30v_frame_find_saved_regs_offsets (fi
, fsr
);
519 fi
->size
= frame_size
;
522 fp
= read_register (SP_REGNUM
);
524 for (i
= 0; i
< NUM_REGS
- 1; i
++)
527 fsr
->regs
[i
] = fsr
->regs
[i
] + fp
+ frame_size
;
530 if (fsr
->regs
[LR_REGNUM
])
531 fi
->return_pc
= read_memory_unsigned_integer (fsr
->regs
[LR_REGNUM
], 4);
533 fi
->return_pc
= read_register (LR_REGNUM
);
535 /* the SP is not normally (ever?) saved, but check anyway */
536 if (!fsr
->regs
[SP_REGNUM
])
538 /* if the FP was saved, that means the current FP is valid, */
539 /* otherwise, it isn't being used, so we use the SP instead */
541 fsr
->regs
[SP_REGNUM
] = read_register (FP_REGNUM
) + fi
->size
;
544 fsr
->regs
[SP_REGNUM
] = fp
+ fi
->size
;
546 fsr
->regs
[FP_REGNUM
] = 0;
552 d30v_frame_find_saved_regs_offsets (struct frame_info
*fi
,
553 struct frame_saved_regs
*fsr
)
556 unsigned long opl
, opr
;
557 unsigned long op1
, op2
;
558 unsigned long fm0
, fm1
;
562 memset (fsr
, 0, sizeof (*fsr
));
567 pc
= get_pc_function_start (fi
->pc
);
572 opl
= (unsigned long) read_memory_integer (pc
, 4);
573 opr
= (unsigned long) read_memory_integer (pc
+ 4, 4);
575 fm0
= (opl
& OP_MASK_FM_BIT
);
576 fm1
= (opr
& OP_MASK_FM_BIT
);
578 opl
= (opl
& OP_MASK_SUB_INST
);
579 opr
= (opr
& OP_MASK_SUB_INST
);
583 /* long instruction */
584 if ((opl
& OP_MASK_ALL_BUT_IMM
) == OP_ADD_SP_IMM
)
587 long offset
= EXTRACT_IMM32 (opl
, opr
);
588 frame_size
+= -offset
;
590 else if ((opl
& OP_MASK_ALL_BUT_IMM
) == OP_ADD_R22_SP_IMM
)
592 /* add r22,sp,offset */
593 long offset
= EXTRACT_IMM32 (opl
, opr
);
594 next_addr
= (offset
- frame_size
);
596 else if ((opl
& OP_MASK_OP_AND_RB
) == OP_STW_SP_IMM
)
598 /* st Ra, @(sp,imm) */
599 long offset
= EXTRACT_IMM32 (opl
, opr
);
600 short n
= EXTRACT_RA (opl
);
601 fsr
->regs
[n
] = (offset
- frame_size
);
603 else if ((opl
& OP_MASK_OP_AND_RB
) == OP_ST2W_SP_IMM
)
605 /* st2w Ra, @(sp,offset) */
606 long offset
= EXTRACT_IMM32 (opl
, opr
);
607 short n
= EXTRACT_RA (opl
);
608 fsr
->regs
[n
] = (offset
- frame_size
);
609 fsr
->regs
[n
+ 1] = (offset
- frame_size
) + 4;
611 else if ((opl
& OP_MASK_ALL_BUT_IMM
) == OP_OR_SP_R0_IMM
)
620 /* short instructions */
631 if (!prologue_find_regs (op1
, fsr
, pc
) || !prologue_find_regs (op2
, fsr
, pc
))
638 fi
->size
= frame_size
;
641 fp
= read_register (SP_REGNUM
);
643 for (i
= 0; i
< NUM_REGS
- 1; i
++)
646 fsr
->regs
[i
] = fsr
->regs
[i
] + fp
+ frame_size
;
649 if (fsr
->regs
[LR_REGNUM
])
650 fi
->return_pc
= read_memory_unsigned_integer (fsr
->regs
[LR_REGNUM
], 4);
652 fi
->return_pc
= read_register (LR_REGNUM
);
654 /* the SP is not normally (ever?) saved, but check anyway */
655 if (!fsr
->regs
[SP_REGNUM
])
657 /* if the FP was saved, that means the current FP is valid, */
658 /* otherwise, it isn't being used, so we use the SP instead */
660 fsr
->regs
[SP_REGNUM
] = read_register (FP_REGNUM
) + fi
->size
;
663 fsr
->regs
[SP_REGNUM
] = fp
+ fi
->size
;
665 fsr
->regs
[FP_REGNUM
] = 0;
672 d30v_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
674 struct frame_saved_regs dummy
;
676 if (fi
->next
&& (fi
->pc
== 0))
677 fi
->pc
= fi
->next
->return_pc
;
679 d30v_frame_find_saved_regs_offsets (fi
, &dummy
);
686 if ((fi
->next
== 0) && (uses_frame
== 0))
687 /* innermost frame and it's "frameless",
688 so the fi->frame field is wrong, fix it! */
689 fi
->frame
= read_sp ();
691 if (dummy
.regs
[LR_REGNUM
])
693 /* it was saved, grab it! */
694 dummy
.regs
[LR_REGNUM
] += (fi
->frame
+ frame_size
);
695 fi
->return_pc
= read_memory_unsigned_integer (dummy
.regs
[LR_REGNUM
], 4);
698 fi
->return_pc
= read_register (LR_REGNUM
);
702 d30v_init_frame_pc (int fromleaf
, struct frame_info
*prev
)
704 /* default value, put here so we can breakpoint on it and
705 see if the default value is really the right thing to use */
706 prev
->pc
= (fromleaf
? SAVED_PC_AFTER_CALL (prev
->next
) : \
707 prev
->next
? FRAME_SAVED_PC (prev
->next
) : read_pc ());
710 static void d30v_print_register (int regnum
, int tabular
);
713 d30v_print_register (int regnum
, int tabular
)
715 if (regnum
< A0_REGNUM
)
718 printf_filtered ("%08lx", (long) read_register (regnum
));
720 printf_filtered ("0x%lx %ld",
721 (long) read_register (regnum
),
722 (long) read_register (regnum
));
726 char regbuf
[MAX_REGISTER_RAW_SIZE
];
728 read_relative_register_raw_bytes (regnum
, regbuf
);
730 val_print (REGISTER_VIRTUAL_TYPE (regnum
), regbuf
, 0, 0,
731 gdb_stdout
, 'x', 1, 0, Val_pretty_default
);
735 printf_filtered (" ");
736 val_print (REGISTER_VIRTUAL_TYPE (regnum
), regbuf
, 0, 0,
737 gdb_stdout
, 'd', 1, 0, Val_pretty_default
);
743 d30v_print_flags (void)
745 long psw
= read_register (PSW_REGNUM
);
746 printf_filtered ("flags #1");
747 printf_filtered (" (sm) %d", (psw
& PSW_SM
) != 0);
748 printf_filtered (" (ea) %d", (psw
& PSW_EA
) != 0);
749 printf_filtered (" (db) %d", (psw
& PSW_DB
) != 0);
750 printf_filtered (" (ds) %d", (psw
& PSW_DS
) != 0);
751 printf_filtered (" (ie) %d", (psw
& PSW_IE
) != 0);
752 printf_filtered (" (rp) %d", (psw
& PSW_RP
) != 0);
753 printf_filtered (" (md) %d\n", (psw
& PSW_MD
) != 0);
755 printf_filtered ("flags #2");
756 printf_filtered (" (f0) %d", (psw
& PSW_F0
) != 0);
757 printf_filtered (" (f1) %d", (psw
& PSW_F1
) != 0);
758 printf_filtered (" (f2) %d", (psw
& PSW_F2
) != 0);
759 printf_filtered (" (f3) %d", (psw
& PSW_F3
) != 0);
760 printf_filtered (" (s) %d", (psw
& PSW_S
) != 0);
761 printf_filtered (" (v) %d", (psw
& PSW_V
) != 0);
762 printf_filtered (" (va) %d", (psw
& PSW_VA
) != 0);
763 printf_filtered (" (c) %d\n", (psw
& PSW_C
) != 0);
767 print_flags_command (char *args
, int from_tty
)
773 d30v_do_registers_info (int regnum
, int fpregs
)
775 long long num1
, num2
;
780 if (REGISTER_NAME (0) == NULL
|| REGISTER_NAME (0)[0] == '\000')
783 printf_filtered ("%s ", REGISTER_NAME (regnum
));
784 d30v_print_register (regnum
, 0);
786 printf_filtered ("\n");
790 /* Have to print all the registers. Format them nicely. */
792 printf_filtered ("PC=");
793 print_address (read_pc (), gdb_stdout
);
795 printf_filtered (" PSW=");
796 d30v_print_register (PSW_REGNUM
, 1);
798 printf_filtered (" BPC=");
799 print_address (read_register (BPC_REGNUM
), gdb_stdout
);
801 printf_filtered (" BPSW=");
802 d30v_print_register (BPSW_REGNUM
, 1);
803 printf_filtered ("\n");
805 printf_filtered ("DPC=");
806 print_address (read_register (DPC_REGNUM
), gdb_stdout
);
808 printf_filtered (" DPSW=");
809 d30v_print_register (DPSW_REGNUM
, 1);
811 printf_filtered (" IBA=");
812 print_address (read_register (IBA_REGNUM
), gdb_stdout
);
813 printf_filtered ("\n");
815 printf_filtered ("RPT_C=");
816 d30v_print_register (RPT_C_REGNUM
, 1);
818 printf_filtered (" RPT_S=");
819 print_address (read_register (RPT_S_REGNUM
), gdb_stdout
);
821 printf_filtered (" RPT_E=");
822 print_address (read_register (RPT_E_REGNUM
), gdb_stdout
);
823 printf_filtered ("\n");
825 printf_filtered ("MOD_S=");
826 print_address (read_register (MOD_S_REGNUM
), gdb_stdout
);
828 printf_filtered (" MOD_E=");
829 print_address (read_register (MOD_E_REGNUM
), gdb_stdout
);
830 printf_filtered ("\n");
832 printf_filtered ("EIT_VB=");
833 print_address (read_register (EIT_VB_REGNUM
), gdb_stdout
);
835 printf_filtered (" INT_S=");
836 d30v_print_register (INT_S_REGNUM
, 1);
838 printf_filtered (" INT_M=");
839 d30v_print_register (INT_M_REGNUM
, 1);
840 printf_filtered ("\n");
843 for (regnum
= 0; regnum
<= 63;)
847 printf_filtered ("R%d-R%d ", regnum
, regnum
+ 7);
849 printf_filtered (" ");
851 printf_filtered (" ");
853 for (i
= 0; i
< 8; i
++)
855 printf_filtered (" ");
856 d30v_print_register (regnum
++, 1);
859 printf_filtered ("\n");
862 printf_filtered ("A0-A1 ");
864 d30v_print_register (A0_REGNUM
, 1);
865 printf_filtered (" ");
866 d30v_print_register (A1_REGNUM
, 1);
867 printf_filtered ("\n");
871 d30v_fix_call_dummy (char *dummyname
, CORE_ADDR start_sp
, CORE_ADDR fun
,
872 int nargs
, value_ptr
*args
, struct type
*type
, int gcc_p
)
876 char buffer
[MAX_REGISTER_RAW_SIZE
];
877 struct frame_info
*frame
= get_current_frame ();
878 frame
->dummy
= start_sp
;
879 /*start_sp |= DMEM_START; */
882 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
884 sp
-= REGISTER_RAW_SIZE (regnum
);
885 store_address (buffer
, REGISTER_RAW_SIZE (regnum
), read_register (regnum
));
886 write_memory (sp
, buffer
, REGISTER_RAW_SIZE (regnum
));
888 write_register (SP_REGNUM
, (LONGEST
) sp
);
889 /* now we need to load LR with the return address */
890 write_register (LR_REGNUM
, (LONGEST
) d30v_call_dummy_address ());
895 d30v_pop_dummy_frame (struct frame_info
*fi
)
897 CORE_ADDR sp
= fi
->dummy
;
900 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
902 sp
-= REGISTER_RAW_SIZE (regnum
);
903 write_register (regnum
, read_memory_unsigned_integer (sp
, REGISTER_RAW_SIZE (regnum
)));
905 flush_cached_frames (); /* needed? */
910 d30v_push_arguments (int nargs
, value_ptr
*args
, CORE_ADDR sp
,
911 int struct_return
, CORE_ADDR struct_addr
)
913 int i
, len
, index
= 0, regnum
= 2;
914 char buffer
[4], *contents
;
919 /* Pass 1. Put all large args on stack */
920 for (i
= 0; i
< nargs
; i
++)
922 value_ptr arg
= args
[i
];
923 struct type
*arg_type
= check_typedef (VALUE_TYPE (arg
));
924 len
= TYPE_LENGTH (arg_type
);
925 contents
= VALUE_CONTENTS (arg
);
926 val
= extract_signed_integer (contents
, len
);
929 /* put on stack and pass pointers */
931 write_memory (sp
, contents
, len
);
938 for (i
= 0; i
< nargs
; i
++)
940 value_ptr arg
= args
[i
];
941 struct type
*arg_type
= check_typedef (VALUE_TYPE (arg
));
942 len
= TYPE_LENGTH (arg_type
);
943 contents
= VALUE_CONTENTS (arg
);
946 /* we need multiple registers */
949 for (ndx
= 0; len
> 0; ndx
+= 8, len
-= 8)
952 regnum
++; /* all args > 4 bytes start in even register */
956 val
= extract_signed_integer (&contents
[ndx
], 4);
957 write_register (regnum
++, val
);
960 val
= extract_signed_integer (&contents
[ndx
+ 4], 4);
962 val
= extract_signed_integer (&contents
[ndx
+ 4], len
- 4);
963 write_register (regnum
++, val
);
967 /* no more registers available. put it on the stack */
969 /* all args > 4 bytes are padded to a multiple of 8 bytes
970 and start on an 8 byte boundary */
972 sp
-= (sp
& 7); /* align it */
974 sp
-= ((len
+ 7) & ~7); /* allocate space */
975 write_memory (sp
, &contents
[ndx
], len
);
984 val
= extract_signed_integer (contents
, len
);
985 write_register (regnum
++, val
);
989 /* all args are padded to a multiple of 4 bytes (at least) */
990 sp
-= ((len
+ 3) & ~3);
991 write_memory (sp
, contents
, len
);
996 /* stack pointer is not on an 8 byte boundary -- align it */
1002 /* pick an out-of-the-way place to set the return value */
1003 /* for an inferior function call. The link register is set to this */
1004 /* value and a momentary breakpoint is set there. When the breakpoint */
1005 /* is hit, the dummy frame is popped and the previous environment is */
1009 d30v_call_dummy_address (void)
1012 struct minimal_symbol
*sym
;
1014 entry
= entry_point_address ();
1019 sym
= lookup_minimal_symbol ("_start", NULL
, symfile_objfile
);
1021 if (!sym
|| MSYMBOL_TYPE (sym
) != mst_text
)
1024 return SYMBOL_VALUE_ADDRESS (sym
);
1027 /* Given a return value in `regbuf' with a type `valtype',
1028 extract and copy its value into `valbuf'. */
1031 d30v_extract_return_value (valtype
, regbuf
, valbuf
)
1032 struct type
*valtype
;
1033 char regbuf
[REGISTER_BYTES
];
1036 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (2), TYPE_LENGTH (valtype
));
1039 /* The following code implements access to, and display of, the D30V's
1040 instruction trace buffer. The buffer consists of 64K or more
1041 4-byte words of data, of which each words includes an 8-bit count,
1042 an 8-bit segment number, and a 16-bit instruction address.
1044 In theory, the trace buffer is continuously capturing instruction
1045 data that the CPU presents on its "debug bus", but in practice, the
1046 ROMified GDB stub only enables tracing when it continues or steps
1047 the program, and stops tracing when the program stops; so it
1048 actually works for GDB to read the buffer counter out of memory and
1049 then read each trace word. The counter records where the tracing
1050 stops, but there is no record of where it started, so we remember
1051 the PC when we resumed and then search backwards in the trace
1052 buffer for a word that includes that address. This is not perfect,
1053 because you will miss trace data if the resumption PC is the target
1054 of a branch. (The value of the buffer counter is semi-random, any
1055 trace data from a previous program stop is gone.) */
1057 /* The address of the last word recorded in the trace buffer. */
1059 #define DBBC_ADDR (0xd80000)
1061 /* The base of the trace buffer, at least for the "Board_0". */
1063 #define TRACE_BUFFER_BASE (0xf40000)
1065 static void trace_command (char *, int);
1067 static void untrace_command (char *, int);
1069 static void trace_info (char *, int);
1071 static void tdisassemble_command (char *, int);
1073 static void display_trace (int, int);
1075 /* True when instruction traces are being collected. */
1079 /* Remembered PC. */
1081 static CORE_ADDR last_pc
;
1083 /* True when trace output should be displayed whenever program stops. */
1085 static int trace_display
;
1087 /* True when trace listing should include source lines. */
1089 static int default_trace_show_source
= 1;
1100 trace_command (char *args
, int from_tty
)
1102 /* Clear the host-side trace buffer, allocating space if needed. */
1103 trace_data
.size
= 0;
1104 if (trace_data
.counts
== NULL
)
1105 trace_data
.counts
= (short *) xmalloc (65536 * sizeof (short));
1106 if (trace_data
.addrs
== NULL
)
1107 trace_data
.addrs
= (CORE_ADDR
*) xmalloc (65536 * sizeof (CORE_ADDR
));
1111 printf_filtered ("Tracing is now on.\n");
1115 untrace_command (char *args
, int from_tty
)
1119 printf_filtered ("Tracing is now off.\n");
1123 trace_info (char *args
, int from_tty
)
1127 if (trace_data
.size
)
1129 printf_filtered ("%d entries in trace buffer:\n", trace_data
.size
);
1131 for (i
= 0; i
< trace_data
.size
; ++i
)
1133 printf_filtered ("%d: %d instruction%s at 0x%s\n",
1134 i
, trace_data
.counts
[i
],
1135 (trace_data
.counts
[i
] == 1 ? "" : "s"),
1136 paddr_nz (trace_data
.addrs
[i
]));
1140 printf_filtered ("No entries in trace buffer.\n");
1142 printf_filtered ("Tracing is currently %s.\n", (tracing
? "on" : "off"));
1145 /* Print the instruction at address MEMADDR in debugged memory,
1146 on STREAM. Returns length of the instruction, in bytes. */
1149 print_insn (CORE_ADDR memaddr
, struct ui_file
*stream
)
1151 /* If there's no disassembler, something is very wrong. */
1152 if (tm_print_insn
== NULL
)
1153 internal_error ("print_insn: no disassembler");
1155 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
1156 tm_print_insn_info
.endian
= BFD_ENDIAN_BIG
;
1158 tm_print_insn_info
.endian
= BFD_ENDIAN_LITTLE
;
1159 return (*tm_print_insn
) (memaddr
, &tm_print_insn_info
);
1163 d30v_eva_prepare_to_trace (void)
1168 last_pc
= read_register (PC_REGNUM
);
1171 /* Collect trace data from the target board and format it into a form
1172 more useful for display. */
1175 d30v_eva_get_trace_data (void)
1177 int count
, i
, j
, oldsize
;
1178 int trace_addr
, trace_seg
, trace_cnt
, next_cnt
;
1179 unsigned int last_trace
, trace_word
, next_word
;
1180 unsigned int *tmpspace
;
1185 tmpspace
= xmalloc (65536 * sizeof (unsigned int));
1187 last_trace
= read_memory_unsigned_integer (DBBC_ADDR
, 2) << 2;
1189 /* Collect buffer contents from the target, stopping when we reach
1190 the word recorded when execution resumed. */
1193 while (last_trace
> 0)
1197 read_memory_unsigned_integer (TRACE_BUFFER_BASE
+ last_trace
, 4);
1198 trace_addr
= trace_word
& 0xffff;
1200 /* Ignore an apparently nonsensical entry. */
1201 if (trace_addr
== 0xffd5)
1203 tmpspace
[count
++] = trace_word
;
1204 if (trace_addr
== last_pc
)
1210 /* Move the data to the host-side trace buffer, adjusting counts to
1211 include the last instruction executed and transforming the address
1212 into something that GDB likes. */
1214 for (i
= 0; i
< count
; ++i
)
1216 trace_word
= tmpspace
[i
];
1217 next_word
= ((i
== 0) ? 0 : tmpspace
[i
- 1]);
1218 trace_addr
= trace_word
& 0xffff;
1219 next_cnt
= (next_word
>> 24) & 0xff;
1220 j
= trace_data
.size
+ count
- i
- 1;
1221 trace_data
.addrs
[j
] = (trace_addr
<< 2) + 0x1000000;
1222 trace_data
.counts
[j
] = next_cnt
+ 1;
1225 oldsize
= trace_data
.size
;
1226 trace_data
.size
+= count
;
1231 display_trace (oldsize
, trace_data
.size
);
1235 tdisassemble_command (char *arg
, int from_tty
)
1238 CORE_ADDR low
, high
;
1244 high
= trace_data
.size
;
1246 else if (!(space_index
= (char *) strchr (arg
, ' ')))
1248 low
= parse_and_eval_address (arg
);
1253 /* Two arguments. */
1254 *space_index
= '\0';
1255 low
= parse_and_eval_address (arg
);
1256 high
= parse_and_eval_address (space_index
+ 1);
1261 printf_filtered ("Dump of trace from %s to %s:\n",
1265 display_trace (low
, high
);
1267 printf_filtered ("End of trace dump.\n");
1268 gdb_flush (gdb_stdout
);
1272 display_trace (int low
, int high
)
1274 int i
, count
, trace_show_source
, first
, suppress
;
1275 CORE_ADDR next_address
;
1277 trace_show_source
= default_trace_show_source
;
1278 if (!have_full_symbols () && !have_partial_symbols ())
1280 trace_show_source
= 0;
1281 printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
1282 printf_filtered ("Trace will not display any source.\n");
1287 for (i
= low
; i
< high
; ++i
)
1289 next_address
= trace_data
.addrs
[i
];
1290 count
= trace_data
.counts
[i
];
1294 if (trace_show_source
)
1296 struct symtab_and_line sal
, sal_prev
;
1298 sal_prev
= find_pc_line (next_address
- 4, 0);
1299 sal
= find_pc_line (next_address
, 0);
1303 if (first
|| sal
.line
!= sal_prev
.line
)
1304 print_source_lines (sal
.symtab
, sal
.line
, sal
.line
+ 1, 0);
1310 /* FIXME-32x64--assumes sal.pc fits in long. */
1311 printf_filtered ("No source file for address %s.\n",
1312 local_hex_string ((unsigned long) sal
.pc
));
1317 print_address (next_address
, gdb_stdout
);
1318 printf_filtered (":");
1319 printf_filtered ("\t");
1321 next_address
= next_address
+ print_insn (next_address
, gdb_stdout
);
1322 printf_filtered ("\n");
1323 gdb_flush (gdb_stdout
);
1328 extern void (*target_resume_hook
) (void);
1329 extern void (*target_wait_loop_hook
) (void);
1332 _initialize_d30v_tdep (void)
1334 tm_print_insn
= print_insn_d30v
;
1336 target_resume_hook
= d30v_eva_prepare_to_trace
;
1337 target_wait_loop_hook
= d30v_eva_get_trace_data
;
1339 add_info ("flags", print_flags_command
, "Print d30v flags.");
1341 add_com ("trace", class_support
, trace_command
,
1342 "Enable tracing of instruction execution.");
1344 add_com ("untrace", class_support
, untrace_command
,
1345 "Disable tracing of instruction execution.");
1347 add_com ("tdisassemble", class_vars
, tdisassemble_command
,
1348 "Disassemble the trace buffer.\n\
1349 Two optional arguments specify a range of trace buffer entries\n\
1350 as reported by info trace (NOT addresses!).");
1352 add_info ("trace", trace_info
,
1353 "Display info about the trace data buffer.");
1355 add_show_from_set (add_set_cmd ("tracedisplay", no_class
,
1356 var_integer
, (char *) &trace_display
,
1357 "Set automatic display of trace.\n", &setlist
),
1359 add_show_from_set (add_set_cmd ("tracesource", no_class
,
1360 var_integer
, (char *) &default_trace_show_source
,
1361 "Set display of source code with trace.\n", &setlist
),