2 Copyright 1992, 1993, 1995, 1996, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
25 #include "gdb_string.h"
29 /* The data cache could lead to incorrect results because it doesn't
30 know about volatile variables, thus making it impossible to debug
31 functions which use memory mapped I/O devices. Set the nocache
32 memory region attribute in those cases.
34 In general the dcache speeds up performance, some speed improvement
35 comes from the actual caching mechanism, but the major gain is in
36 the reduction of the remote protocol overhead; instead of reading
37 or writing a large area of memory in 4 byte requests, the cache
38 bundles up the requests into 32 byte (actually LINE_SIZE) chunks.
39 Reducing the overhead to an eighth of what it was. This is very
40 obvious when displaying a large amount of data,
45 ----------------------------
46 first time | 4 sec 2 sec improvement due to chunking
47 second time | 4 sec 0 sec improvement due to caching
49 The cache structure is unusual, we keep a number of cache blocks
50 (DCACHE_SIZE) and each one caches a LINE_SIZEed area of memory.
51 Within each line we remember the address of the line (always a
52 multiple of the LINE_SIZE) and a vector of bytes over the range.
53 There's another vector which contains the state of the bytes.
55 ENTRY_BAD means that the byte is just plain wrong, and has no
56 correspondence with anything else (as it would when the cache is
57 turned on, but nothing has been done to it.
59 ENTRY_DIRTY means that the byte has some data in it which should be
60 written out to the remote target one day, but contains correct
63 ENTRY_OK means that the data is the same in the cache as it is in
67 The ENTRY_DIRTY state is necessary because GDB likes to write large
68 lumps of memory in small bits. If the caching mechanism didn't
69 maintain the DIRTY information, then something like a two byte
70 write would mean that the entire cache line would have to be read,
71 the two bytes modified and then written out again. The alternative
72 would be to not read in the cache line in the first place, and just
73 write the two bytes directly into target memory. The trouble with
74 that is that it really nails performance, because of the remote
75 protocol overhead. This way, all those little writes are bundled
76 up into an entire cache line write in one go, without having to
77 read the cache line in the first place.
80 /* NOTE: Interaction of dcache and memory region attributes
82 As there is no requirement that memory region attributes be aligned
83 to or be a multiple of the dcache page size, dcache_read_line() and
84 dcache_write_line() must break up the page by memory region. If a
85 chunk does not have the cache attribute set, an invalid memory type
86 is set, etc., then the chunk is skipped. Those chunks are handled
87 in target_xfer_memory() (or target_xfer_memory_partial()).
89 This doesn't occur very often. The most common occurance is when
90 the last bit of the .text segment and the first bit of the .data
91 segment fall within the same dcache page with a ro/cacheable memory
92 region defined for the .text segment and a rw/non-cacheable memory
93 region defined for the .data segment. */
95 /* This value regulates the number of cache blocks stored.
96 Smaller values reduce the time spent searching for a cache
97 line, and reduce memory requirements, but increase the risk
98 of a line not being in memory */
100 #define DCACHE_SIZE 64
102 /* This value regulates the size of a cache line. Smaller values
103 reduce the time taken to read a single byte, but reduce overall
106 #define LINE_SIZE_POWER (5)
107 #define LINE_SIZE (1 << LINE_SIZE_POWER)
109 /* Each cache block holds LINE_SIZE bytes of data
110 starting at a multiple-of-LINE_SIZE address. */
112 #define LINE_SIZE_MASK ((LINE_SIZE - 1))
113 #define XFORM(x) ((x) & LINE_SIZE_MASK)
114 #define MASK(x) ((x) & ~LINE_SIZE_MASK)
117 #define ENTRY_BAD 0 /* data at this byte is wrong */
118 #define ENTRY_DIRTY 1 /* data at this byte needs to be written back */
119 #define ENTRY_OK 2 /* data at this byte is same as in memory */
124 struct dcache_block
*p
; /* next in list */
125 CORE_ADDR addr
; /* Address for which data is recorded. */
126 char data
[LINE_SIZE
]; /* bytes at given address */
127 unsigned char state
[LINE_SIZE
]; /* what state the data is in */
129 /* whether anything in state is dirty - used to speed up the
137 /* FIXME: dcache_struct used to have a cache_has_stuff field that was
138 used to record whether the cache had been accessed. This was used
139 to invalidate the cache whenever caching was (re-)enabled (if the
140 cache was disabled and later re-enabled, it could contain stale
141 data). This was not needed because the cache is write through and
142 the code that enables, disables, and deletes memory region all
143 invalidate the cache.
145 This is overkill, since it also invalidates cache lines from
146 unrelated regions. One way this could be addressed by adding a
147 new function that takes an address and a length and invalidates
148 only those cache lines that match. */
153 struct dcache_block
*free_head
;
154 struct dcache_block
*free_tail
;
157 struct dcache_block
*valid_head
;
158 struct dcache_block
*valid_tail
;
160 /* The cache itself. */
161 struct dcache_block
*the_cache
;
164 static int dcache_poke_byte (DCACHE
*dcache
, CORE_ADDR addr
, char *ptr
);
166 static int dcache_peek_byte (DCACHE
*dcache
, CORE_ADDR addr
, char *ptr
);
168 static struct dcache_block
*dcache_hit (DCACHE
*dcache
, CORE_ADDR addr
);
170 static int dcache_write_line (DCACHE
*dcache
, struct dcache_block
*db
);
172 static int dcache_read_line (DCACHE
*dcache
, struct dcache_block
*db
);
174 static struct dcache_block
*dcache_alloc (DCACHE
*dcache
, CORE_ADDR addr
);
176 static int dcache_writeback (DCACHE
*dcache
);
178 static void dcache_info (char *exp
, int tty
);
180 void _initialize_dcache (void);
182 static int dcache_enabled_p
= 0;
184 DCACHE
*last_cache
; /* Used by info dcache */
187 /* Free all the data cache blocks, thus discarding all cached data. */
190 dcache_invalidate (DCACHE
*dcache
)
193 dcache
->valid_head
= 0;
194 dcache
->valid_tail
= 0;
196 dcache
->free_head
= 0;
197 dcache
->free_tail
= 0;
199 for (i
= 0; i
< DCACHE_SIZE
; i
++)
201 struct dcache_block
*db
= dcache
->the_cache
+ i
;
203 if (!dcache
->free_head
)
204 dcache
->free_head
= db
;
206 dcache
->free_tail
->p
= db
;
207 dcache
->free_tail
= db
;
214 /* If addr is present in the dcache, return the address of the block
217 static struct dcache_block
*
218 dcache_hit (DCACHE
*dcache
, CORE_ADDR addr
)
220 register struct dcache_block
*db
;
222 /* Search all cache blocks for one that is at this address. */
223 db
= dcache
->valid_head
;
227 if (MASK (addr
) == db
->addr
)
238 /* Make sure that anything in this line which needs to
242 dcache_write_line (DCACHE
*dcache
, register struct dcache_block
*db
)
249 struct mem_region
*region
;
264 region
= lookup_mem_region(memaddr
);
265 if (memaddr
+ len
< region
->hi
)
268 reg_len
= region
->hi
- memaddr
;
270 if (!region
->attrib
.cache
|| region
->attrib
.mode
== MEM_RO
)
281 while (reg_len
> 0) {
282 if (db
->state
[s
] == ENTRY_DIRTY
)
293 while (reg_len
> 0) {
294 if (db
->state
[e
] != ENTRY_DIRTY
)
301 while (dirty_len
> 0)
303 res
= do_xfer_memory(memaddr
, myaddr
, dirty_len
, 1,
308 memset (&db
->state
[XFORM(memaddr
)], ENTRY_OK
, res
);
321 /* Read cache line */
323 dcache_read_line (DCACHE
*dcache
, struct dcache_block
*db
)
330 struct mem_region
*region
;
332 /* If there are any dirty bytes in the line, it must be written
333 before a new line can be read */
336 if (!dcache_write_line (dcache
, db
))
346 region
= lookup_mem_region(memaddr
);
347 if (memaddr
+ len
< region
->hi
)
350 reg_len
= region
->hi
- memaddr
;
352 if (!region
->attrib
.cache
|| region
->attrib
.mode
== MEM_WO
)
362 res
= do_xfer_memory (memaddr
, myaddr
, reg_len
, 0,
374 memset (db
->state
, ENTRY_OK
, sizeof (db
->data
));
380 /* Get a free cache block, put or keep it on the valid list,
381 and return its address. */
383 static struct dcache_block
*
384 dcache_alloc (DCACHE
*dcache
, CORE_ADDR addr
)
386 register struct dcache_block
*db
;
388 /* Take something from the free list */
389 db
= dcache
->free_head
;
392 dcache
->free_head
= db
->p
;
396 /* Nothing left on free list, so grab one from the valid list */
397 db
= dcache
->valid_head
;
399 if (!dcache_write_line (dcache
, db
))
402 dcache
->valid_head
= db
->p
;
405 db
->addr
= MASK(addr
);
408 memset (db
->state
, ENTRY_BAD
, sizeof (db
->data
));
410 /* append this line to end of valid list */
411 if (!dcache
->valid_head
)
412 dcache
->valid_head
= db
;
414 dcache
->valid_tail
->p
= db
;
415 dcache
->valid_tail
= db
;
421 /* Writeback any dirty lines. */
423 dcache_writeback (DCACHE
*dcache
)
425 struct dcache_block
*db
;
427 db
= dcache
->valid_head
;
431 if (!dcache_write_line (dcache
, db
))
439 /* Using the data cache DCACHE return the contents of the byte at
440 address ADDR in the remote machine.
442 Returns 0 on error. */
445 dcache_peek_byte (DCACHE
*dcache
, CORE_ADDR addr
, char *ptr
)
447 register struct dcache_block
*db
= dcache_hit (dcache
, addr
);
451 db
= dcache_alloc (dcache
, addr
);
456 if (db
->state
[XFORM (addr
)] == ENTRY_BAD
)
458 if (!dcache_read_line(dcache
, db
))
462 *ptr
= db
->data
[XFORM (addr
)];
467 /* Write the byte at PTR into ADDR in the data cache.
468 Return zero on write error.
472 dcache_poke_byte (DCACHE
*dcache
, CORE_ADDR addr
, char *ptr
)
474 register struct dcache_block
*db
= dcache_hit (dcache
, addr
);
478 db
= dcache_alloc (dcache
, addr
);
483 db
->data
[XFORM (addr
)] = *ptr
;
484 db
->state
[XFORM (addr
)] = ENTRY_DIRTY
;
489 /* Initialize the data cache. */
493 int csize
= sizeof (struct dcache_block
) * DCACHE_SIZE
;
496 dcache
= (DCACHE
*) xmalloc (sizeof (*dcache
));
498 dcache
->the_cache
= (struct dcache_block
*) xmalloc (csize
);
499 memset (dcache
->the_cache
, 0, csize
);
501 dcache_invalidate (dcache
);
507 /* Free a data cache */
509 dcache_free (DCACHE
*dcache
)
511 if (last_cache
== dcache
)
514 xfree (dcache
->the_cache
);
518 /* Read or write LEN bytes from inferior memory at MEMADDR, transferring
519 to or from debugger address MYADDR. Write to inferior if SHOULD_WRITE is
522 Returns length of data written or read; 0 for error.
524 This routine is indended to be called by remote_xfer_ functions. */
527 dcache_xfer_memory (DCACHE
*dcache
, CORE_ADDR memaddr
, char *myaddr
, int len
,
531 int (*xfunc
) (DCACHE
*dcache
, CORE_ADDR addr
, char *ptr
);
532 xfunc
= should_write
? dcache_poke_byte
: dcache_peek_byte
;
534 for (i
= 0; i
< len
; i
++)
536 if (!xfunc (dcache
, memaddr
+ i
, myaddr
+ i
))
540 /* FIXME: There may be some benefit from moving the cache writeback
541 to a higher layer, as it could occur after a sequence of smaller
542 writes have been completed (as when a stack frame is constructed
543 for an inferior function call). Note that only moving it up one
544 level to target_xfer_memory() (also target_xfer_memory_partial())
545 is not sufficent, since we want to coalesce memory transfers that
546 are "logically" connected but not actually a single call to one
547 of the memory transfer functions. */
550 dcache_writeback (dcache
);
556 dcache_info (char *exp
, int tty
)
558 struct dcache_block
*p
;
560 printf_filtered ("Dcache line width %d, depth %d\n",
561 LINE_SIZE
, DCACHE_SIZE
);
565 printf_filtered ("Cache state:\n");
567 for (p
= last_cache
->valid_head
; p
; p
= p
->p
)
570 printf_filtered ("Line at %s, referenced %d times\n",
571 paddr (p
->addr
), p
->refs
);
573 for (j
= 0; j
< LINE_SIZE
; j
++)
574 printf_filtered ("%02x", p
->data
[j
] & 0xFF);
575 printf_filtered ("\n");
577 for (j
= 0; j
< LINE_SIZE
; j
++)
578 printf_filtered ("%2x", p
->state
[j
]);
579 printf_filtered ("\n");
585 _initialize_dcache (void)
588 (add_set_cmd ("remotecache", class_support
, var_boolean
,
589 (char *) &dcache_enabled_p
,
591 Set cache use for remote targets.\n\
592 When on, use data caching for remote targets. For many remote targets\n\
593 this option can offer better throughput for reading target memory.\n\
594 Unfortunately, gdb does not currently know anything about volatile\n\
595 registers and thus data caching will produce incorrect results with\n\
596 volatile registers are in use. By default, this option is off.",
600 add_info ("dcache", dcache_info
,
601 "Print information on the dcache performance.");
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