gdb/dcache.c

   1 /* Caching code for GDB, the GNU debugger.
   2
   3    Copyright 1992, 1993, 1995, 1996, 1998, 1999, 2000, 2001, 2003 Free
   4    Software Foundation, Inc.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 2 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 59 Temple Place - Suite 330,
  21    Boston, MA 02111-1307, USA.  */
  22
  23 #include "defs.h"
  24 #include "dcache.h"
  25 #include "gdbcmd.h"
  26 #include "gdb_string.h"
  27 #include "gdbcore.h"
  28 #include "target.h"
  29
  30 /* The data cache could lead to incorrect results because it doesn't
  31    know about volatile variables, thus making it impossible to debug
  32    functions which use memory mapped I/O devices.  Set the nocache
  33    memory region attribute in those cases.
  34
  35    In general the dcache speeds up performance, some speed improvement
  36    comes from the actual caching mechanism, but the major gain is in
  37    the reduction of the remote protocol overhead; instead of reading
  38    or writing a large area of memory in 4 byte requests, the cache
  39    bundles up the requests into 32 byte (actually LINE_SIZE) chunks.
  40    Reducing the overhead to an eighth of what it was.  This is very
  41    obvious when displaying a large amount of data,
  42
  43    eg, x/200x 0
  44
  45    caching     |   no    yes
  46    ----------------------------
  47    first time  |   4 sec  2 sec improvement due to chunking
  48    second time |   4 sec  0 sec improvement due to caching
  49
  50    The cache structure is unusual, we keep a number of cache blocks
  51    (DCACHE_SIZE) and each one caches a LINE_SIZEed area of memory.
  52    Within each line we remember the address of the line (always a
  53    multiple of the LINE_SIZE) and a vector of bytes over the range.
  54    There's another vector which contains the state of the bytes.
  55
  56    ENTRY_BAD means that the byte is just plain wrong, and has no
  57    correspondence with anything else (as it would when the cache is
  58    turned on, but nothing has been done to it.
  59
  60    ENTRY_DIRTY means that the byte has some data in it which should be
  61    written out to the remote target one day, but contains correct
  62    data.
  63
  64    ENTRY_OK means that the data is the same in the cache as it is in
  65    remote memory.
  66
  67
  68    The ENTRY_DIRTY state is necessary because GDB likes to write large
  69    lumps of memory in small bits.  If the caching mechanism didn't
  70    maintain the DIRTY information, then something like a two byte
  71    write would mean that the entire cache line would have to be read,
  72    the two bytes modified and then written out again.  The alternative
  73    would be to not read in the cache line in the first place, and just
  74    write the two bytes directly into target memory.  The trouble with
  75    that is that it really nails performance, because of the remote
  76    protocol overhead.  This way, all those little writes are bundled
  77    up into an entire cache line write in one go, without having to
  78    read the cache line in the first place.
  79  */
  80
  81 /* NOTE: Interaction of dcache and memory region attributes
  82
  83    As there is no requirement that memory region attributes be aligned
  84    to or be a multiple of the dcache page size, dcache_read_line() and
  85    dcache_write_line() must break up the page by memory region.  If a
  86    chunk does not have the cache attribute set, an invalid memory type
  87    is set, etc., then the chunk is skipped.  Those chunks are handled
  88    in target_xfer_memory() (or target_xfer_memory_partial()).
  89
  90    This doesn't occur very often.  The most common occurance is when
  91    the last bit of the .text segment and the first bit of the .data
  92    segment fall within the same dcache page with a ro/cacheable memory
  93    region defined for the .text segment and a rw/non-cacheable memory
  94    region defined for the .data segment. */
  95
  96 /* This value regulates the number of cache blocks stored.
  97    Smaller values reduce the time spent searching for a cache
  98    line, and reduce memory requirements, but increase the risk
  99    of a line not being in memory */
 100
 101 #define DCACHE_SIZE 64
 102
 103 /* This value regulates the size of a cache line.  Smaller values
 104    reduce the time taken to read a single byte, but reduce overall
 105    throughput.  */
 106
 107 #define LINE_SIZE_POWER (5)
 108 #define LINE_SIZE (1 << LINE_SIZE_POWER)
 109
 110 /* Each cache block holds LINE_SIZE bytes of data
 111    starting at a multiple-of-LINE_SIZE address.  */
 112
 113 #define LINE_SIZE_MASK  ((LINE_SIZE - 1))
 114 #define XFORM(x)        ((x) & LINE_SIZE_MASK)
 115 #define MASK(x)         ((x) & ~LINE_SIZE_MASK)
 116
 117
 118 #define ENTRY_BAD   0           /* data at this byte is wrong */
 119 #define ENTRY_DIRTY 1           /* data at this byte needs to be written back */
 120 #define ENTRY_OK    2           /* data at this byte is same as in memory */
 121
 122
 123 struct dcache_block
 124   {
 125     struct dcache_block *p;     /* next in list */
 126     CORE_ADDR addr;             /* Address for which data is recorded.  */
 127     char data[LINE_SIZE];       /* bytes at given address */
 128     unsigned char state[LINE_SIZE];     /* what state the data is in */
 129
 130     /* whether anything in state is dirty - used to speed up the
 131        dirty scan. */
 132     int anydirty;
 133
 134     int refs;
 135   };
 136
 137
 138 /* FIXME: dcache_struct used to have a cache_has_stuff field that was
 139    used to record whether the cache had been accessed.  This was used
 140    to invalidate the cache whenever caching was (re-)enabled (if the
 141    cache was disabled and later re-enabled, it could contain stale
 142    data).  This was not needed because the cache is write through and
 143    the code that enables, disables, and deletes memory region all
 144    invalidate the cache.
 145
 146    This is overkill, since it also invalidates cache lines from
 147    unrelated regions.  One way this could be addressed by adding a
 148    new function that takes an address and a length and invalidates
 149    only those cache lines that match. */
 150
 151 struct dcache_struct
 152   {
 153     /* free list */
 154     struct dcache_block *free_head;
 155     struct dcache_block *free_tail;
 156
 157     /* in use list */
 158     struct dcache_block *valid_head;
 159     struct dcache_block *valid_tail;
 160
 161     /* The cache itself. */
 162     struct dcache_block *the_cache;
 163   };
 164
 165 static int dcache_poke_byte (DCACHE *dcache, CORE_ADDR addr, char *ptr);
 166
 167 static int dcache_peek_byte (DCACHE *dcache, CORE_ADDR addr, char *ptr);
 168
 169 static struct dcache_block *dcache_hit (DCACHE *dcache, CORE_ADDR addr);
 170
 171 static int dcache_write_line (DCACHE *dcache, struct dcache_block *db);
 172
 173 static int dcache_read_line (DCACHE *dcache, struct dcache_block *db);
 174
 175 static struct dcache_block *dcache_alloc (DCACHE *dcache, CORE_ADDR addr);
 176
 177 static int dcache_writeback (DCACHE *dcache);
 178
 179 static void dcache_info (char *exp, int tty);
 180
 181 void _initialize_dcache (void);
 182
 183 static int dcache_enabled_p = 0;
 184 static void
 185 show_dcache_enabled_p (struct ui_file *file, int from_tty,
 186                        struct cmd_list_element *c, const char *value)
 187 {
 188   fprintf_filtered (file, _("Cache use for remote targets is %s.\n"), value);
 189 }
 190
 191
 192 DCACHE *last_cache;             /* Used by info dcache */
 193
 194
 195 /* Free all the data cache blocks, thus discarding all cached data.  */
 196
 197 void
 198 dcache_invalidate (DCACHE *dcache)
 199 {
 200   int i;
 201   dcache->valid_head = 0;
 202   dcache->valid_tail = 0;
 203
 204   dcache->free_head = 0;
 205   dcache->free_tail = 0;
 206
 207   for (i = 0; i < DCACHE_SIZE; i++)
 208     {
 209       struct dcache_block *db = dcache->the_cache + i;
 210
 211       if (!dcache->free_head)
 212         dcache->free_head = db;
 213       else
 214         dcache->free_tail->p = db;
 215       dcache->free_tail = db;
 216       db->p = 0;
 217     }
 218
 219   return;
 220 }
 221
 222 /* If addr is present in the dcache, return the address of the block
 223    containing it. */
 224
 225 static struct dcache_block *
 226 dcache_hit (DCACHE *dcache, CORE_ADDR addr)
 227 {
 228   struct dcache_block *db;
 229
 230   /* Search all cache blocks for one that is at this address.  */
 231   db = dcache->valid_head;
 232
 233   while (db)
 234     {
 235       if (MASK (addr) == db->addr)
 236         {
 237           db->refs++;
 238           return db;
 239         }
 240       db = db->p;
 241     }
 242
 243   return NULL;
 244 }
 245
 246 /* Make sure that anything in this line which needs to
 247    be written is. */
 248
 249 static int
 250 dcache_write_line (DCACHE *dcache, struct dcache_block *db)
 251 {
 252   CORE_ADDR memaddr;
 253   char *myaddr;
 254   int len;
 255   int res;
 256   int reg_len;
 257   struct mem_region *region;
 258
 259   if (!db->anydirty)
 260     return 1;
 261
 262   len = LINE_SIZE;
 263   memaddr = db->addr;
 264   myaddr  = db->data;
 265
 266   while (len > 0)
 267     {
 268       int s;
 269       int e;
 270       int dirty_len;
 271
 272       region = lookup_mem_region(memaddr);
 273       if (memaddr + len < region->hi)
 274         reg_len = len;
 275       else
 276         reg_len = region->hi - memaddr;
 277
 278       if (!region->attrib.cache || region->attrib.mode == MEM_RO)
 279         {
 280           memaddr += reg_len;
 281           myaddr  += reg_len;
 282           len     -= reg_len;
 283           continue;
 284         }
 285
 286       while (reg_len > 0)
 287         {
 288           s = XFORM(memaddr);
 289           while (reg_len > 0) {
 290             if (db->state[s] == ENTRY_DIRTY)
 291               break;
 292             s++;
 293             reg_len--;
 294
 295             memaddr++;
 296             myaddr++;
 297             len--;
 298           }
 299
 300           e = s;
 301           while (reg_len > 0) {
 302             if (db->state[e] != ENTRY_DIRTY)
 303               break;
 304             e++;
 305             reg_len--;
 306           }
 307
 308           dirty_len = e - s;
 309           while (dirty_len > 0)
 310             {
 311               res = do_xfer_memory(memaddr, myaddr, dirty_len, 1,
 312                                    &region->attrib);
 313               if (res <= 0)
 314                 return 0;
 315
 316               memset (&db->state[XFORM(memaddr)], ENTRY_OK, res);
 317               memaddr   += res;
 318               myaddr    += res;
 319               len       -= res;
 320               dirty_len -= res;
 321             }
 322         }
 323     }
 324
 325   db->anydirty = 0;
 326   return 1;
 327 }
 328
 329 /* Read cache line */
 330 static int
 331 dcache_read_line (DCACHE *dcache, struct dcache_block *db)
 332 {
 333   CORE_ADDR memaddr;
 334   char *myaddr;
 335   int len;
 336   int res;
 337   int reg_len;
 338   struct mem_region *region;
 339
 340   /* If there are any dirty bytes in the line, it must be written
 341      before a new line can be read */
 342   if (db->anydirty)
 343     {
 344       if (!dcache_write_line (dcache, db))
 345         return 0;
 346     }
 347
 348   len = LINE_SIZE;
 349   memaddr = db->addr;
 350   myaddr  = db->data;
 351
 352   while (len > 0)
 353     {
 354       region = lookup_mem_region(memaddr);
 355       if (memaddr + len < region->hi)
 356         reg_len = len;
 357       else
 358         reg_len = region->hi - memaddr;
 359
 360       if (!region->attrib.cache || region->attrib.mode == MEM_WO)
 361         {
 362           memaddr += reg_len;
 363           myaddr  += reg_len;
 364           len     -= reg_len;
 365           continue;
 366         }
 367
 368       while (reg_len > 0)
 369         {
 370           res = do_xfer_memory (memaddr, myaddr, reg_len, 0,
 371                                 &region->attrib);
 372           if (res <= 0)
 373             return 0;
 374
 375           memaddr += res;
 376           myaddr  += res;
 377           len     -= res;
 378           reg_len -= res;
 379         }
 380     }
 381
 382   memset (db->state, ENTRY_OK, sizeof (db->data));
 383   db->anydirty = 0;
 384
 385   return 1;
 386 }
 387
 388 /* Get a free cache block, put or keep it on the valid list,
 389    and return its address.  */
 390
 391 static struct dcache_block *
 392 dcache_alloc (DCACHE *dcache, CORE_ADDR addr)
 393 {
 394   struct dcache_block *db;
 395
 396   /* Take something from the free list */
 397   db = dcache->free_head;
 398   if (db)
 399     {
 400       dcache->free_head = db->p;
 401     }
 402   else
 403     {
 404       /* Nothing left on free list, so grab one from the valid list */
 405       db = dcache->valid_head;
 406
 407       if (!dcache_write_line (dcache, db))
 408         return NULL;
 409
 410       dcache->valid_head = db->p;
 411     }
 412
 413   db->addr = MASK(addr);
 414   db->refs = 0;
 415   db->anydirty = 0;
 416   memset (db->state, ENTRY_BAD, sizeof (db->data));
 417
 418   /* append this line to end of valid list */
 419   if (!dcache->valid_head)
 420     dcache->valid_head = db;
 421   else
 422     dcache->valid_tail->p = db;
 423   dcache->valid_tail = db;
 424   db->p = 0;
 425
 426   return db;
 427 }
 428
 429 /* Writeback any dirty lines. */
 430 static int
 431 dcache_writeback (DCACHE *dcache)
 432 {
 433   struct dcache_block *db;
 434
 435   db = dcache->valid_head;
 436
 437   while (db)
 438     {
 439       if (!dcache_write_line (dcache, db))
 440         return 0;
 441       db = db->p;
 442     }
 443   return 1;
 444 }
 445
 446
 447 /* Using the data cache DCACHE return the contents of the byte at
 448    address ADDR in the remote machine.
 449
 450    Returns 0 on error. */
 451
 452 static int
 453 dcache_peek_byte (DCACHE *dcache, CORE_ADDR addr, char *ptr)
 454 {
 455   struct dcache_block *db = dcache_hit (dcache, addr);
 456
 457   if (!db)
 458     {
 459       db = dcache_alloc (dcache, addr);
 460       if (!db)
 461         return 0;
 462     }
 463
 464   if (db->state[XFORM (addr)] == ENTRY_BAD)
 465     {
 466       if (!dcache_read_line(dcache, db))
 467          return 0;
 468     }
 469
 470   *ptr = db->data[XFORM (addr)];
 471   return 1;
 472 }
 473
 474
 475 /* Write the byte at PTR into ADDR in the data cache.
 476    Return zero on write error.
 477  */
 478
 479 static int
 480 dcache_poke_byte (DCACHE *dcache, CORE_ADDR addr, char *ptr)
 481 {
 482   struct dcache_block *db = dcache_hit (dcache, addr);
 483
 484   if (!db)
 485     {
 486       db = dcache_alloc (dcache, addr);
 487       if (!db)
 488         return 0;
 489     }
 490
 491   db->data[XFORM (addr)] = *ptr;
 492   db->state[XFORM (addr)] = ENTRY_DIRTY;
 493   db->anydirty = 1;
 494   return 1;
 495 }
 496
 497 /* Initialize the data cache.  */
 498 DCACHE *
 499 dcache_init (void)
 500 {
 501   int csize = sizeof (struct dcache_block) * DCACHE_SIZE;
 502   DCACHE *dcache;
 503
 504   dcache = (DCACHE *) xmalloc (sizeof (*dcache));
 505
 506   dcache->the_cache = (struct dcache_block *) xmalloc (csize);
 507   memset (dcache->the_cache, 0, csize);
 508
 509   dcache_invalidate (dcache);
 510
 511   last_cache = dcache;
 512   return dcache;
 513 }
 514
 515 /* Free a data cache */
 516 void
 517 dcache_free (DCACHE *dcache)
 518 {
 519   if (last_cache == dcache)
 520     last_cache = NULL;
 521
 522   xfree (dcache->the_cache);
 523   xfree (dcache);
 524 }
 525
 526 /* Read or write LEN bytes from inferior memory at MEMADDR, transferring
 527    to or from debugger address MYADDR.  Write to inferior if SHOULD_WRITE is
 528    nonzero.
 529
 530    Returns length of data written or read; 0 for error.
 531
 532    This routine is indended to be called by remote_xfer_ functions. */
 533
 534 int
 535 dcache_xfer_memory (DCACHE *dcache, CORE_ADDR memaddr, char *myaddr, int len,
 536                     int should_write)
 537 {
 538   int i;
 539   int (*xfunc) (DCACHE *dcache, CORE_ADDR addr, char *ptr);
 540   xfunc = should_write ? dcache_poke_byte : dcache_peek_byte;
 541
 542   for (i = 0; i < len; i++)
 543     {
 544       if (!xfunc (dcache, memaddr + i, myaddr + i))
 545         return 0;
 546     }
 547
 548   /* FIXME: There may be some benefit from moving the cache writeback
 549      to a higher layer, as it could occur after a sequence of smaller
 550      writes have been completed (as when a stack frame is constructed
 551      for an inferior function call).  Note that only moving it up one
 552      level to target_xfer_memory() (also target_xfer_memory_partial())
 553      is not sufficent, since we want to coalesce memory transfers that
 554      are "logically" connected but not actually a single call to one
 555      of the memory transfer functions. */
 556
 557   if (should_write)
 558     dcache_writeback (dcache);
 559
 560   return len;
 561 }
 562
 563 static void
 564 dcache_info (char *exp, int tty)
 565 {
 566   struct dcache_block *p;
 567
 568   printf_filtered (_("Dcache line width %d, depth %d\n"),
 569                    LINE_SIZE, DCACHE_SIZE);
 570
 571   if (last_cache)
 572     {
 573       printf_filtered (_("Cache state:\n"));
 574
 575       for (p = last_cache->valid_head; p; p = p->p)
 576         {
 577           int j;
 578           printf_filtered (_("Line at %s, referenced %d times\n"),
 579                            paddr (p->addr), p->refs);
 580
 581           for (j = 0; j < LINE_SIZE; j++)
 582             printf_filtered ("%02x", p->data[j] & 0xFF);
 583           printf_filtered (("\n"));
 584
 585           for (j = 0; j < LINE_SIZE; j++)
 586             printf_filtered ("%2x", p->state[j]);
 587           printf_filtered ("\n");
 588         }
 589     }
 590 }
 591
 592 void
 593 _initialize_dcache (void)
 594 {
 595   add_setshow_boolean_cmd ("remotecache", class_support,
 596                            &dcache_enabled_p, _("\
 597 Set cache use for remote targets."), _("\
 598 Show cache use for remote targets."), _("\
 599 When on, use data caching for remote targets.  For many remote targets\n\
 600 this option can offer better throughput for reading target memory.\n\
 601 Unfortunately, gdb does not currently know anything about volatile\n\
 602 registers and thus data caching will produce incorrect results with\n\
 603 volatile registers are in use.  By default, this option is off."),
 604                            NULL,
 605                            show_dcache_enabled_p,
 606                            &setlist, &showlist);
 607
 608   add_info ("dcache", dcache_info,
 609             _("Print information on the dcache performance."));
 610
 611 }