1 /* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
3 Copyright (C) 2002, 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "gdb_string.h"
24 #include "arch-utils.h"
27 #include "frame-unwind.h"
28 #include "frame-base.h"
29 #include "trad-frame.h"
31 #include "gdb_assert.h"
32 #include "sim-regno.h"
33 #include "gdb/sim-frv.h"
34 #include "opcodes/frv-desc.h" /* for the H_SPR_... enums */
43 extern void _initialize_frv_tdep (void);
45 struct frv_unwind_cache
/* was struct frame_extra_info */
47 /* The previous frame's inner-most stack address. Used as this
48 frame ID's stack_addr. */
51 /* The frame's base, optionally used by the high-level debug info. */
54 /* Table indicating the location of each and every register. */
55 struct trad_frame_saved_reg
*saved_regs
;
58 /* A structure describing a particular variant of the FRV.
59 We allocate and initialize one of these structures when we create
60 the gdbarch object for a variant.
62 At the moment, all the FR variants we support differ only in which
63 registers are present; the portable code of GDB knows that
64 registers whose names are the empty string don't exist, so the
65 `register_names' array captures all the per-variant information we
68 in the future, if we need to have per-variant maps for raw size,
69 virtual type, etc., we should replace register_names with an array
70 of structures, each of which gives all the necessary info for one
71 register. Don't stick parallel arrays in here --- that's so
75 /* Which ABI is in use? */
78 /* How many general-purpose registers does this variant have? */
81 /* How many floating-point registers does this variant have? */
84 /* How many hardware watchpoints can it support? */
85 int num_hw_watchpoints
;
87 /* How many hardware breakpoints can it support? */
88 int num_hw_breakpoints
;
91 char **register_names
;
94 #define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
96 /* Return the FR-V ABI associated with GDBARCH. */
98 frv_abi (struct gdbarch
*gdbarch
)
100 return gdbarch_tdep (gdbarch
)->frv_abi
;
103 /* Fetch the interpreter and executable loadmap addresses (for shared
104 library support) for the FDPIC ABI. Return 0 if successful, -1 if
105 not. (E.g, -1 will be returned if the ABI isn't the FDPIC ABI.) */
107 frv_fdpic_loadmap_addresses (struct gdbarch
*gdbarch
, CORE_ADDR
*interp_addr
,
108 CORE_ADDR
*exec_addr
)
110 if (frv_abi (gdbarch
) != FRV_ABI_FDPIC
)
114 struct regcache
*regcache
= get_current_regcache ();
116 if (interp_addr
!= NULL
)
119 regcache_cooked_read_unsigned (regcache
,
120 fdpic_loadmap_interp_regnum
, &val
);
123 if (exec_addr
!= NULL
)
126 regcache_cooked_read_unsigned (regcache
,
127 fdpic_loadmap_exec_regnum
, &val
);
134 /* Allocate a new variant structure, and set up default values for all
136 static struct gdbarch_tdep
*
139 struct gdbarch_tdep
*var
;
143 var
= xmalloc (sizeof (*var
));
144 memset (var
, 0, sizeof (*var
));
146 var
->frv_abi
= FRV_ABI_EABI
;
149 var
->num_hw_watchpoints
= 0;
150 var
->num_hw_breakpoints
= 0;
152 /* By default, don't supply any general-purpose or floating-point
155 = (char **) xmalloc ((frv_num_regs
+ frv_num_pseudo_regs
)
157 for (r
= 0; r
< frv_num_regs
+ frv_num_pseudo_regs
; r
++)
158 var
->register_names
[r
] = "";
160 /* Do, however, supply default names for the known special-purpose
163 var
->register_names
[pc_regnum
] = "pc";
164 var
->register_names
[lr_regnum
] = "lr";
165 var
->register_names
[lcr_regnum
] = "lcr";
167 var
->register_names
[psr_regnum
] = "psr";
168 var
->register_names
[ccr_regnum
] = "ccr";
169 var
->register_names
[cccr_regnum
] = "cccr";
170 var
->register_names
[tbr_regnum
] = "tbr";
172 /* Debug registers. */
173 var
->register_names
[brr_regnum
] = "brr";
174 var
->register_names
[dbar0_regnum
] = "dbar0";
175 var
->register_names
[dbar1_regnum
] = "dbar1";
176 var
->register_names
[dbar2_regnum
] = "dbar2";
177 var
->register_names
[dbar3_regnum
] = "dbar3";
179 /* iacc0 (Only found on MB93405.) */
180 var
->register_names
[iacc0h_regnum
] = "iacc0h";
181 var
->register_names
[iacc0l_regnum
] = "iacc0l";
182 var
->register_names
[iacc0_regnum
] = "iacc0";
184 /* fsr0 (Found on FR555 and FR501.) */
185 var
->register_names
[fsr0_regnum
] = "fsr0";
187 /* acc0 - acc7. The architecture provides for the possibility of many
188 more (up to 64 total), but we don't want to make that big of a hole
189 in the G packet. If we need more in the future, we'll add them
191 for (r
= acc0_regnum
; r
<= acc7_regnum
; r
++)
194 buf
= xstrprintf ("acc%d", r
- acc0_regnum
);
195 var
->register_names
[r
] = buf
;
198 /* accg0 - accg7: These are one byte registers. The remote protocol
199 provides the raw values packed four into a slot. accg0123 and
200 accg4567 correspond to accg0 - accg3 and accg4-accg7 respectively.
201 We don't provide names for accg0123 and accg4567 since the user will
202 likely not want to see these raw values. */
204 for (r
= accg0_regnum
; r
<= accg7_regnum
; r
++)
207 buf
= xstrprintf ("accg%d", r
- accg0_regnum
);
208 var
->register_names
[r
] = buf
;
213 var
->register_names
[msr0_regnum
] = "msr0";
214 var
->register_names
[msr1_regnum
] = "msr1";
216 /* gner and fner registers. */
217 var
->register_names
[gner0_regnum
] = "gner0";
218 var
->register_names
[gner1_regnum
] = "gner1";
219 var
->register_names
[fner0_regnum
] = "fner0";
220 var
->register_names
[fner1_regnum
] = "fner1";
226 /* Indicate that the variant VAR has NUM_GPRS general-purpose
227 registers, and fill in the names array appropriately. */
229 set_variant_num_gprs (struct gdbarch_tdep
*var
, int num_gprs
)
233 var
->num_gprs
= num_gprs
;
235 for (r
= 0; r
< num_gprs
; ++r
)
239 sprintf (buf
, "gr%d", r
);
240 var
->register_names
[first_gpr_regnum
+ r
] = xstrdup (buf
);
245 /* Indicate that the variant VAR has NUM_FPRS floating-point
246 registers, and fill in the names array appropriately. */
248 set_variant_num_fprs (struct gdbarch_tdep
*var
, int num_fprs
)
252 var
->num_fprs
= num_fprs
;
254 for (r
= 0; r
< num_fprs
; ++r
)
258 sprintf (buf
, "fr%d", r
);
259 var
->register_names
[first_fpr_regnum
+ r
] = xstrdup (buf
);
264 set_variant_abi_fdpic (struct gdbarch_tdep
*var
)
266 var
->frv_abi
= FRV_ABI_FDPIC
;
267 var
->register_names
[fdpic_loadmap_exec_regnum
] = xstrdup ("loadmap_exec");
268 var
->register_names
[fdpic_loadmap_interp_regnum
] = xstrdup ("loadmap_interp");
272 set_variant_scratch_registers (struct gdbarch_tdep
*var
)
274 var
->register_names
[scr0_regnum
] = xstrdup ("scr0");
275 var
->register_names
[scr1_regnum
] = xstrdup ("scr1");
276 var
->register_names
[scr2_regnum
] = xstrdup ("scr2");
277 var
->register_names
[scr3_regnum
] = xstrdup ("scr3");
281 frv_register_name (int reg
)
285 if (reg
>= frv_num_regs
+ frv_num_pseudo_regs
)
288 return CURRENT_VARIANT
->register_names
[reg
];
293 frv_register_type (struct gdbarch
*gdbarch
, int reg
)
295 if (reg
>= first_fpr_regnum
&& reg
<= last_fpr_regnum
)
296 return builtin_type_float
;
297 else if (reg
== iacc0_regnum
)
298 return builtin_type_int64
;
300 return builtin_type_int32
;
304 frv_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
305 int reg
, gdb_byte
*buffer
)
307 if (reg
== iacc0_regnum
)
309 regcache_raw_read (regcache
, iacc0h_regnum
, buffer
);
310 regcache_raw_read (regcache
, iacc0l_regnum
, (bfd_byte
*) buffer
+ 4);
312 else if (accg0_regnum
<= reg
&& reg
<= accg7_regnum
)
314 /* The accg raw registers have four values in each slot with the
315 lowest register number occupying the first byte. */
317 int raw_regnum
= accg0123_regnum
+ (reg
- accg0_regnum
) / 4;
318 int byte_num
= (reg
- accg0_regnum
) % 4;
321 regcache_raw_read (regcache
, raw_regnum
, buf
);
322 memset (buffer
, 0, 4);
323 /* FR-V is big endian, so put the requested byte in the first byte
324 of the buffer allocated to hold the pseudo-register. */
325 ((bfd_byte
*) buffer
)[0] = buf
[byte_num
];
330 frv_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
331 int reg
, const gdb_byte
*buffer
)
333 if (reg
== iacc0_regnum
)
335 regcache_raw_write (regcache
, iacc0h_regnum
, buffer
);
336 regcache_raw_write (regcache
, iacc0l_regnum
, (bfd_byte
*) buffer
+ 4);
338 else if (accg0_regnum
<= reg
&& reg
<= accg7_regnum
)
340 /* The accg raw registers have four values in each slot with the
341 lowest register number occupying the first byte. */
343 int raw_regnum
= accg0123_regnum
+ (reg
- accg0_regnum
) / 4;
344 int byte_num
= (reg
- accg0_regnum
) % 4;
347 regcache_raw_read (regcache
, raw_regnum
, buf
);
348 buf
[byte_num
] = ((bfd_byte
*) buffer
)[0];
349 regcache_raw_write (regcache
, raw_regnum
, buf
);
354 frv_register_sim_regno (int reg
)
356 static const int spr_map
[] =
358 H_SPR_PSR
, /* psr_regnum */
359 H_SPR_CCR
, /* ccr_regnum */
360 H_SPR_CCCR
, /* cccr_regnum */
361 -1, /* fdpic_loadmap_exec_regnum */
362 -1, /* fdpic_loadmap_interp_regnum */
364 H_SPR_TBR
, /* tbr_regnum */
365 H_SPR_BRR
, /* brr_regnum */
366 H_SPR_DBAR0
, /* dbar0_regnum */
367 H_SPR_DBAR1
, /* dbar1_regnum */
368 H_SPR_DBAR2
, /* dbar2_regnum */
369 H_SPR_DBAR3
, /* dbar3_regnum */
370 H_SPR_SCR0
, /* scr0_regnum */
371 H_SPR_SCR1
, /* scr1_regnum */
372 H_SPR_SCR2
, /* scr2_regnum */
373 H_SPR_SCR3
, /* scr3_regnum */
374 H_SPR_LR
, /* lr_regnum */
375 H_SPR_LCR
, /* lcr_regnum */
376 H_SPR_IACC0H
, /* iacc0h_regnum */
377 H_SPR_IACC0L
, /* iacc0l_regnum */
378 H_SPR_FSR0
, /* fsr0_regnum */
379 /* FIXME: Add infrastructure for fetching/setting ACC and ACCG regs. */
380 -1, /* acc0_regnum */
381 -1, /* acc1_regnum */
382 -1, /* acc2_regnum */
383 -1, /* acc3_regnum */
384 -1, /* acc4_regnum */
385 -1, /* acc5_regnum */
386 -1, /* acc6_regnum */
387 -1, /* acc7_regnum */
388 -1, /* acc0123_regnum */
389 -1, /* acc4567_regnum */
390 H_SPR_MSR0
, /* msr0_regnum */
391 H_SPR_MSR1
, /* msr1_regnum */
392 H_SPR_GNER0
, /* gner0_regnum */
393 H_SPR_GNER1
, /* gner1_regnum */
394 H_SPR_FNER0
, /* fner0_regnum */
395 H_SPR_FNER1
, /* fner1_regnum */
398 gdb_assert (reg
>= 0 && reg
< gdbarch_num_regs (current_gdbarch
));
400 if (first_gpr_regnum
<= reg
&& reg
<= last_gpr_regnum
)
401 return reg
- first_gpr_regnum
+ SIM_FRV_GR0_REGNUM
;
402 else if (first_fpr_regnum
<= reg
&& reg
<= last_fpr_regnum
)
403 return reg
- first_fpr_regnum
+ SIM_FRV_FR0_REGNUM
;
404 else if (pc_regnum
== reg
)
405 return SIM_FRV_PC_REGNUM
;
406 else if (reg
>= first_spr_regnum
407 && reg
< first_spr_regnum
+ sizeof (spr_map
) / sizeof (spr_map
[0]))
409 int spr_reg_offset
= spr_map
[reg
- first_spr_regnum
];
411 if (spr_reg_offset
< 0)
412 return SIM_REGNO_DOES_NOT_EXIST
;
414 return SIM_FRV_SPR0_REGNUM
+ spr_reg_offset
;
417 internal_error (__FILE__
, __LINE__
, _("Bad register number %d"), reg
);
420 static const unsigned char *
421 frv_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenp
)
423 static unsigned char breakpoint
[] = {0xc0, 0x70, 0x00, 0x01};
424 *lenp
= sizeof (breakpoint
);
428 /* Define the maximum number of instructions which may be packed into a
429 bundle (VLIW instruction). */
430 static const int max_instrs_per_bundle
= 8;
432 /* Define the size (in bytes) of an FR-V instruction. */
433 static const int frv_instr_size
= 4;
435 /* Adjust a breakpoint's address to account for the FR-V architecture's
436 constraint that a break instruction must not appear as any but the
437 first instruction in the bundle. */
439 frv_adjust_breakpoint_address (struct gdbarch
*gdbarch
, CORE_ADDR bpaddr
)
441 int count
= max_instrs_per_bundle
;
442 CORE_ADDR addr
= bpaddr
- frv_instr_size
;
443 CORE_ADDR func_start
= get_pc_function_start (bpaddr
);
445 /* Find the end of the previous packing sequence. This will be indicated
446 by either attempting to access some inaccessible memory or by finding
447 an instruction word whose packing bit is set to one. */
448 while (count
-- > 0 && addr
>= func_start
)
450 char instr
[frv_instr_size
];
453 status
= read_memory_nobpt (addr
, instr
, sizeof instr
);
458 /* This is a big endian architecture, so byte zero will have most
459 significant byte. The most significant bit of this byte is the
464 addr
-= frv_instr_size
;
468 bpaddr
= addr
+ frv_instr_size
;
474 /* Return true if REG is a caller-saves ("scratch") register,
477 is_caller_saves_reg (int reg
)
479 return ((4 <= reg
&& reg
<= 7)
480 || (14 <= reg
&& reg
<= 15)
481 || (32 <= reg
&& reg
<= 47));
485 /* Return true if REG is a callee-saves register, false otherwise. */
487 is_callee_saves_reg (int reg
)
489 return ((16 <= reg
&& reg
<= 31)
490 || (48 <= reg
&& reg
<= 63));
494 /* Return true if REG is an argument register, false otherwise. */
496 is_argument_reg (int reg
)
498 return (8 <= reg
&& reg
<= 13);
501 /* Scan an FR-V prologue, starting at PC, until frame->PC.
502 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
503 We assume FRAME's saved_regs array has already been allocated and cleared.
504 Return the first PC value after the prologue.
506 Note that, for unoptimized code, we almost don't need this function
507 at all; all arguments and locals live on the stack, so we just need
508 the FP to find everything. The catch: structures passed by value
509 have their addresses living in registers; they're never spilled to
510 the stack. So if you ever want to be able to get to these
511 arguments in any frame but the top, you'll need to do this serious
512 prologue analysis. */
514 frv_analyze_prologue (CORE_ADDR pc
, struct frame_info
*next_frame
,
515 struct frv_unwind_cache
*info
)
517 /* When writing out instruction bitpatterns, we use the following
518 letters to label instruction fields:
519 P - The parallel bit. We don't use this.
520 J - The register number of GRj in the instruction description.
521 K - The register number of GRk in the instruction description.
522 I - The register number of GRi.
523 S - a signed imediate offset.
524 U - an unsigned immediate offset.
526 The dots below the numbers indicate where hex digit boundaries
527 fall, to make it easier to check the numbers. */
529 /* Non-zero iff we've seen the instruction that initializes the
530 frame pointer for this function's frame. */
533 /* If fp_set is non_zero, then this is the distance from
534 the stack pointer to frame pointer: fp = sp + fp_offset. */
537 /* Total size of frame prior to any alloca operations. */
540 /* Flag indicating if lr has been saved on the stack. */
541 int lr_saved_on_stack
= 0;
543 /* The number of the general-purpose register we saved the return
544 address ("link register") in, or -1 if we haven't moved it yet. */
545 int lr_save_reg
= -1;
547 /* Offset (from sp) at which lr has been saved on the stack. */
549 int lr_sp_offset
= 0;
551 /* If gr_saved[i] is non-zero, then we've noticed that general
552 register i has been saved at gr_sp_offset[i] from the stack
555 int gr_sp_offset
[64];
557 /* The address of the most recently scanned prologue instruction. */
558 CORE_ADDR last_prologue_pc
;
560 /* The address of the next instruction. */
563 /* The upper bound to of the pc values to scan. */
566 memset (gr_saved
, 0, sizeof (gr_saved
));
568 last_prologue_pc
= pc
;
570 /* Try to compute an upper limit (on how far to scan) based on the
572 lim_pc
= skip_prologue_using_sal (pc
);
573 /* If there's no line number info, lim_pc will be 0. In that case,
574 set the limit to be 100 instructions away from pc. Hopefully, this
575 will be far enough away to account for the entire prologue. Don't
576 worry about overshooting the end of the function. The scan loop
577 below contains some checks to avoid scanning unreasonably far. */
581 /* If we have a frame, we don't want to scan past the frame's pc. This
582 will catch those cases where the pc is in the prologue. */
585 CORE_ADDR frame_pc
= frame_pc_unwind (next_frame
);
586 if (frame_pc
< lim_pc
)
590 /* Scan the prologue. */
593 char buf
[frv_instr_size
];
596 if (target_read_memory (pc
, buf
, sizeof buf
) != 0)
598 op
= extract_signed_integer (buf
, sizeof buf
);
602 /* The tests in this chain of ifs should be in order of
603 decreasing selectivity, so that more particular patterns get
604 to fire before less particular patterns. */
606 /* Some sort of control transfer instruction: stop scanning prologue.
607 Integer Conditional Branch:
608 X XXXX XX 0000110 XX XXXXXXXXXXXXXXXX
609 Floating-point / media Conditional Branch:
610 X XXXX XX 0000111 XX XXXXXXXXXXXXXXXX
611 LCR Conditional Branch to LR
612 X XXXX XX 0001110 XX XX 001 X XXXXXXXXXX
613 Integer conditional Branches to LR
614 X XXXX XX 0001110 XX XX 010 X XXXXXXXXXX
615 X XXXX XX 0001110 XX XX 011 X XXXXXXXXXX
616 Floating-point/Media Branches to LR
617 X XXXX XX 0001110 XX XX 110 X XXXXXXXXXX
618 X XXXX XX 0001110 XX XX 111 X XXXXXXXXXX
620 X XXXXX X 0001100 XXXXXX XXXXXX XXXXXX
621 X XXXXX X 0001101 XXXXXX XXXXXX XXXXXX
623 X XXXXXX 0001111 XXXXXXXXXXXXXXXXXX
625 X XXXXX X 0000101 XXXXXX XXXXXX XXXXXX
626 Integer Conditional Trap
627 X XXXX XX 0000100 XXXXXX XXXX 00 XXXXXX
628 X XXXX XX 0011100 XXXXXX XXXXXXXXXXXX
629 Floating-point /media Conditional Trap
630 X XXXX XX 0000100 XXXXXX XXXX 01 XXXXXX
631 X XXXX XX 0011101 XXXXXX XXXXXXXXXXXX
633 X XXXX XX 0000100 XXXXXX XXXX 11 XXXXXX
635 X XXXX XX 0000100 XXXXXX XXXX 10 XXXXXX */
636 if ((op
& 0x01d80000) == 0x00180000 /* Conditional branches and Call */
637 || (op
& 0x01f80000) == 0x00300000 /* Jump and Link */
638 || (op
& 0x01f80000) == 0x00100000 /* Return from Trap, Trap */
639 || (op
& 0x01f80000) == 0x00700000) /* Trap immediate */
641 /* Stop scanning; not in prologue any longer. */
645 /* Loading something from memory into fp probably means that
646 we're in the epilogue. Stop scanning the prologue.
648 X 000010 0000010 XXXXXX 000100 XXXXXX
650 X 000010 0110010 XXXXXX XXXXXXXXXXXX */
651 else if ((op
& 0x7ffc0fc0) == 0x04080100
652 || (op
& 0x7ffc0000) == 0x04c80000)
657 /* Setting the FP from the SP:
659 P 000010 0100010 000001 000000000000 = 0x04881000
660 0 111111 1111111 111111 111111111111 = 0x7fffffff
662 We treat this as part of the prologue. */
663 else if ((op
& 0x7fffffff) == 0x04881000)
667 last_prologue_pc
= next_pc
;
670 /* Move the link register to the scratch register grJ, before saving:
672 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
673 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
675 We treat this as part of the prologue. */
676 else if ((op
& 0x7fffffc0) == 0x080d01c0)
678 int gr_j
= op
& 0x3f;
680 /* If we're moving it to a scratch register, that's fine. */
681 if (is_caller_saves_reg (gr_j
))
684 last_prologue_pc
= next_pc
;
688 /* To save multiple callee-saves registers on the stack, at
692 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
693 0 000000 1111111 111111 111111 111111 = 0x01ffffff
696 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
697 0 000000 1111111 111111 111111 111111 = 0x01ffffff
699 We treat this as part of the prologue, and record the register's
700 saved address in the frame structure. */
701 else if ((op
& 0x01ffffff) == 0x000c10c0
702 || (op
& 0x01ffffff) == 0x000c1100)
704 int gr_k
= ((op
>> 25) & 0x3f);
705 int ope
= ((op
>> 6) & 0x3f);
709 /* Is it an std or an stq? */
715 /* Is it really a callee-saves register? */
716 if (is_callee_saves_reg (gr_k
))
718 for (i
= 0; i
< count
; i
++)
720 gr_saved
[gr_k
+ i
] = 1;
721 gr_sp_offset
[gr_k
+ i
] = 4 * i
;
723 last_prologue_pc
= next_pc
;
727 /* Adjusting the stack pointer. (The stack pointer is GR1.)
729 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
730 0 111111 1111111 111111 000000000000 = 0x7ffff000
732 We treat this as part of the prologue. */
733 else if ((op
& 0x7ffff000) == 0x02401000)
737 /* Sign-extend the twelve-bit field.
738 (Isn't there a better way to do this?) */
739 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
742 last_prologue_pc
= pc
;
746 /* If the prologue is being adjusted again, we've
747 likely gone too far; i.e. we're probably in the
753 /* Setting the FP to a constant distance from the SP:
755 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
756 0 111111 1111111 111111 000000000000 = 0x7ffff000
758 We treat this as part of the prologue. */
759 else if ((op
& 0x7ffff000) == 0x04401000)
761 /* Sign-extend the twelve-bit field.
762 (Isn't there a better way to do this?) */
763 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
766 last_prologue_pc
= pc
;
769 /* To spill an argument register to a scratch register:
771 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
772 0 000000 1111111 000000 111111111111 = 0x01fc0fff
774 For the time being, we treat this as a prologue instruction,
775 assuming that GRi is an argument register. This one's kind
776 of suspicious, because it seems like it could be part of a
777 legitimate body instruction. But we only come here when the
778 source info wasn't helpful, so we have to do the best we can.
779 Hopefully once GCC and GDB agree on how to emit line number
780 info for prologues, then this code will never come into play. */
781 else if ((op
& 0x01fc0fff) == 0x00880000)
783 int gr_i
= ((op
>> 12) & 0x3f);
785 /* Make sure that the source is an arg register; if it is, we'll
786 treat it as a prologue instruction. */
787 if (is_argument_reg (gr_i
))
788 last_prologue_pc
= next_pc
;
791 /* To spill 16-bit values to the stack:
793 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
794 0 000000 1111111 111111 000000000000 = 0x01fff000
796 And for 8-bit values, we use STB instructions.
798 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
799 0 000000 1111111 111111 000000000000 = 0x01fff000
801 We check that GRk is really an argument register, and treat
802 all such as part of the prologue. */
803 else if ( (op
& 0x01fff000) == 0x01442000
804 || (op
& 0x01fff000) == 0x01402000)
806 int gr_k
= ((op
>> 25) & 0x3f);
808 /* Make sure that GRk is really an argument register; treat
809 it as a prologue instruction if so. */
810 if (is_argument_reg (gr_k
))
811 last_prologue_pc
= next_pc
;
814 /* To save multiple callee-saves register on the stack, at a
818 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
819 0 000000 1111111 111111 000000000000 = 0x01fff000
822 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
823 0 000000 1111111 111111 000000000000 = 0x01fff000
825 We treat this as part of the prologue, and record the register's
826 saved address in the frame structure. */
827 else if ((op
& 0x01fff000) == 0x014c1000
828 || (op
& 0x01fff000) == 0x01501000)
830 int gr_k
= ((op
>> 25) & 0x3f);
834 /* Is it a stdi or a stqi? */
835 if ((op
& 0x01fff000) == 0x014c1000)
840 /* Is it really a callee-saves register? */
841 if (is_callee_saves_reg (gr_k
))
843 /* Sign-extend the twelve-bit field.
844 (Isn't there a better way to do this?) */
845 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
847 for (i
= 0; i
< count
; i
++)
849 gr_saved
[gr_k
+ i
] = 1;
850 gr_sp_offset
[gr_k
+ i
] = s
+ (4 * i
);
852 last_prologue_pc
= next_pc
;
856 /* Storing any kind of integer register at any constant offset
857 from any other register.
860 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
861 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
864 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
865 0 000000 1111111 000000 000000000000 = 0x01fc0000
867 These could be almost anything, but a lot of prologue
868 instructions fall into this pattern, so let's decode the
869 instruction once, and then work at a higher level. */
870 else if (((op
& 0x01fc0fff) == 0x000c0080)
871 || ((op
& 0x01fc0000) == 0x01480000))
873 int gr_k
= ((op
>> 25) & 0x3f);
874 int gr_i
= ((op
>> 12) & 0x3f);
877 /* Are we storing with gr0 as an offset, or using an
879 if ((op
& 0x01fc0fff) == 0x000c0080)
882 offset
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
884 /* If the address isn't relative to the SP or FP, it's not a
885 prologue instruction. */
886 if (gr_i
!= sp_regnum
&& gr_i
!= fp_regnum
)
888 /* Do nothing; not a prologue instruction. */
891 /* Saving the old FP in the new frame (relative to the SP). */
892 else if (gr_k
== fp_regnum
&& gr_i
== sp_regnum
)
894 gr_saved
[fp_regnum
] = 1;
895 gr_sp_offset
[fp_regnum
] = offset
;
896 last_prologue_pc
= next_pc
;
899 /* Saving callee-saves register(s) on the stack, relative to
901 else if (gr_i
== sp_regnum
902 && is_callee_saves_reg (gr_k
))
905 if (gr_i
== sp_regnum
)
906 gr_sp_offset
[gr_k
] = offset
;
908 gr_sp_offset
[gr_k
] = offset
+ fp_offset
;
909 last_prologue_pc
= next_pc
;
912 /* Saving the scratch register holding the return address. */
913 else if (lr_save_reg
!= -1
914 && gr_k
== lr_save_reg
)
916 lr_saved_on_stack
= 1;
917 if (gr_i
== sp_regnum
)
918 lr_sp_offset
= offset
;
920 lr_sp_offset
= offset
+ fp_offset
;
921 last_prologue_pc
= next_pc
;
924 /* Spilling int-sized arguments to the stack. */
925 else if (is_argument_reg (gr_k
))
926 last_prologue_pc
= next_pc
;
931 if (next_frame
&& info
)
936 /* If we know the relationship between the stack and frame
937 pointers, record the addresses of the registers we noticed.
938 Note that we have to do this as a separate step at the end,
939 because instructions may save relative to the SP, but we need
940 their addresses relative to the FP. */
942 this_base
= frame_unwind_register_unsigned (next_frame
, fp_regnum
);
944 this_base
= frame_unwind_register_unsigned (next_frame
, sp_regnum
);
946 for (i
= 0; i
< 64; i
++)
948 info
->saved_regs
[i
].addr
= this_base
- fp_offset
+ gr_sp_offset
[i
];
950 info
->prev_sp
= this_base
- fp_offset
+ framesize
;
951 info
->base
= this_base
;
953 /* If LR was saved on the stack, record its location. */
954 if (lr_saved_on_stack
)
955 info
->saved_regs
[lr_regnum
].addr
= this_base
- fp_offset
+ lr_sp_offset
;
957 /* The call instruction moves the caller's PC in the callee's LR.
958 Since this is an unwind, do the reverse. Copy the location of LR
959 into PC (the address / regnum) so that a request for PC will be
960 converted into a request for the LR. */
961 info
->saved_regs
[pc_regnum
] = info
->saved_regs
[lr_regnum
];
963 /* Save the previous frame's computed SP value. */
964 trad_frame_set_value (info
->saved_regs
, sp_regnum
, info
->prev_sp
);
967 return last_prologue_pc
;
972 frv_skip_prologue (CORE_ADDR pc
)
974 CORE_ADDR func_addr
, func_end
, new_pc
;
978 /* If the line table has entry for a line *within* the function
979 (i.e., not in the prologue, and not past the end), then that's
981 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
983 struct symtab_and_line sal
;
985 sal
= find_pc_line (func_addr
, 0);
987 if (sal
.line
!= 0 && sal
.end
< func_end
)
993 /* The FR-V prologue is at least five instructions long (twenty bytes).
994 If we didn't find a real source location past that, then
995 do a full analysis of the prologue. */
996 if (new_pc
< pc
+ 20)
997 new_pc
= frv_analyze_prologue (pc
, 0, 0);
1003 static struct frv_unwind_cache
*
1004 frv_frame_unwind_cache (struct frame_info
*next_frame
,
1005 void **this_prologue_cache
)
1007 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
1010 struct frv_unwind_cache
*info
;
1012 if ((*this_prologue_cache
))
1013 return (*this_prologue_cache
);
1015 info
= FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache
);
1016 (*this_prologue_cache
) = info
;
1017 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
1019 /* Prologue analysis does the rest... */
1020 frv_analyze_prologue (frame_func_unwind (next_frame
, NORMAL_FRAME
),
1027 frv_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1030 int len
= TYPE_LENGTH (type
);
1035 regcache_cooked_read_unsigned (regcache
, 8, &gpr8_val
);
1036 store_unsigned_integer (valbuf
, len
, gpr8_val
);
1041 regcache_cooked_read_unsigned (regcache
, 8, ®val
);
1042 store_unsigned_integer (valbuf
, 4, regval
);
1043 regcache_cooked_read_unsigned (regcache
, 9, ®val
);
1044 store_unsigned_integer ((bfd_byte
*) valbuf
+ 4, 4, regval
);
1047 internal_error (__FILE__
, __LINE__
, _("Illegal return value length: %d"), len
);
1051 frv_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1053 /* Require dword alignment. */
1054 return align_down (sp
, 8);
1058 find_func_descr (struct gdbarch
*gdbarch
, CORE_ADDR entry_point
)
1062 CORE_ADDR start_addr
;
1064 /* If we can't find the function in the symbol table, then we assume
1065 that the function address is already in descriptor form. */
1066 if (!find_pc_partial_function (entry_point
, NULL
, &start_addr
, NULL
)
1067 || entry_point
!= start_addr
)
1070 descr
= frv_fdpic_find_canonical_descriptor (entry_point
);
1075 /* Construct a non-canonical descriptor from space allocated on
1078 descr
= value_as_long (value_allocate_space_in_inferior (8));
1079 store_unsigned_integer (valbuf
, 4, entry_point
);
1080 write_memory (descr
, valbuf
, 4);
1081 store_unsigned_integer (valbuf
, 4,
1082 frv_fdpic_find_global_pointer (entry_point
));
1083 write_memory (descr
+ 4, valbuf
, 4);
1088 frv_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
1089 struct target_ops
*targ
)
1091 CORE_ADDR entry_point
;
1092 CORE_ADDR got_address
;
1094 entry_point
= get_target_memory_unsigned (targ
, addr
, 4);
1095 got_address
= get_target_memory_unsigned (targ
, addr
+ 4, 4);
1097 if (got_address
== frv_fdpic_find_global_pointer (entry_point
))
1104 frv_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1105 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1106 int nargs
, struct value
**args
, CORE_ADDR sp
,
1107 int struct_return
, CORE_ADDR struct_addr
)
1114 struct type
*arg_type
;
1116 enum type_code typecode
;
1120 enum frv_abi abi
= frv_abi (gdbarch
);
1121 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
1124 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
1125 nargs
, (int) sp
, struct_return
, struct_addr
);
1129 for (argnum
= 0; argnum
< nargs
; ++argnum
)
1130 stack_space
+= align_up (TYPE_LENGTH (value_type (args
[argnum
])), 4);
1132 stack_space
-= (6 * 4);
1133 if (stack_space
> 0)
1136 /* Make sure stack is dword aligned. */
1137 sp
= align_down (sp
, 8);
1144 regcache_cooked_write_unsigned (regcache
, struct_return_regnum
,
1147 for (argnum
= 0; argnum
< nargs
; ++argnum
)
1150 arg_type
= check_typedef (value_type (arg
));
1151 len
= TYPE_LENGTH (arg_type
);
1152 typecode
= TYPE_CODE (arg_type
);
1154 if (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
)
1156 store_unsigned_integer (valbuf
, 4, VALUE_ADDRESS (arg
));
1157 typecode
= TYPE_CODE_PTR
;
1161 else if (abi
== FRV_ABI_FDPIC
1163 && typecode
== TYPE_CODE_PTR
1164 && TYPE_CODE (TYPE_TARGET_TYPE (arg_type
)) == TYPE_CODE_FUNC
)
1166 /* The FDPIC ABI requires function descriptors to be passed instead
1168 store_unsigned_integer
1170 find_func_descr (gdbarch
,
1171 extract_unsigned_integer (value_contents (arg
),
1173 typecode
= TYPE_CODE_PTR
;
1179 val
= (char *) value_contents (arg
);
1184 int partial_len
= (len
< 4 ? len
: 4);
1188 regval
= extract_unsigned_integer (val
, partial_len
);
1190 printf(" Argnum %d data %x -> reg %d\n",
1191 argnum
, (int) regval
, argreg
);
1193 regcache_cooked_write_unsigned (regcache
, argreg
, regval
);
1199 printf(" Argnum %d data %x -> offset %d (%x)\n",
1200 argnum
, *((int *)val
), stack_offset
, (int) (sp
+ stack_offset
));
1202 write_memory (sp
+ stack_offset
, val
, partial_len
);
1203 stack_offset
+= align_up (partial_len
, 4);
1210 /* Set the return address. For the frv, the return breakpoint is
1211 always at BP_ADDR. */
1212 regcache_cooked_write_unsigned (regcache
, lr_regnum
, bp_addr
);
1214 if (abi
== FRV_ABI_FDPIC
)
1216 /* Set the GOT register for the FDPIC ABI. */
1217 regcache_cooked_write_unsigned
1218 (regcache
, first_gpr_regnum
+ 15,
1219 frv_fdpic_find_global_pointer (func_addr
));
1222 /* Finally, update the SP register. */
1223 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
1229 frv_store_return_value (struct type
*type
, struct regcache
*regcache
,
1230 const gdb_byte
*valbuf
)
1232 int len
= TYPE_LENGTH (type
);
1237 memset (val
, 0, sizeof (val
));
1238 memcpy (val
+ (4 - len
), valbuf
, len
);
1239 regcache_cooked_write (regcache
, 8, val
);
1243 regcache_cooked_write (regcache
, 8, valbuf
);
1244 regcache_cooked_write (regcache
, 9, (bfd_byte
*) valbuf
+ 4);
1247 internal_error (__FILE__
, __LINE__
,
1248 _("Don't know how to return a %d-byte value."), len
);
1251 enum return_value_convention
1252 frv_return_value (struct gdbarch
*gdbarch
, struct type
*valtype
,
1253 struct regcache
*regcache
, gdb_byte
*readbuf
,
1254 const gdb_byte
*writebuf
)
1256 int struct_return
= TYPE_CODE (valtype
) == TYPE_CODE_STRUCT
1257 || TYPE_CODE (valtype
) == TYPE_CODE_UNION
1258 || TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
;
1260 if (writebuf
!= NULL
)
1262 gdb_assert (!struct_return
);
1263 frv_store_return_value (valtype
, regcache
, writebuf
);
1266 if (readbuf
!= NULL
)
1268 gdb_assert (!struct_return
);
1269 frv_extract_return_value (valtype
, regcache
, readbuf
);
1273 return RETURN_VALUE_STRUCT_CONVENTION
;
1275 return RETURN_VALUE_REGISTER_CONVENTION
;
1279 /* Hardware watchpoint / breakpoint support for the FR500
1283 frv_check_watch_resources (int type
, int cnt
, int ot
)
1285 struct gdbarch_tdep
*var
= CURRENT_VARIANT
;
1287 /* Watchpoints not supported on simulator. */
1288 if (strcmp (target_shortname
, "sim") == 0)
1291 if (type
== bp_hardware_breakpoint
)
1293 if (var
->num_hw_breakpoints
== 0)
1295 else if (cnt
<= var
->num_hw_breakpoints
)
1300 if (var
->num_hw_watchpoints
== 0)
1304 else if (cnt
<= var
->num_hw_watchpoints
)
1312 frv_stopped_data_address (CORE_ADDR
*addr_p
)
1314 struct frame_info
*frame
= get_current_frame ();
1315 CORE_ADDR brr
, dbar0
, dbar1
, dbar2
, dbar3
;
1317 brr
= get_frame_register_unsigned (frame
, brr_regnum
);
1318 dbar0
= get_frame_register_unsigned (frame
, dbar0_regnum
);
1319 dbar1
= get_frame_register_unsigned (frame
, dbar1_regnum
);
1320 dbar2
= get_frame_register_unsigned (frame
, dbar2_regnum
);
1321 dbar3
= get_frame_register_unsigned (frame
, dbar3_regnum
);
1325 else if (brr
& (1<<10))
1327 else if (brr
& (1<<9))
1329 else if (brr
& (1<<8))
1338 frv_have_stopped_data_address (void)
1341 return frv_stopped_data_address (&addr
);
1345 frv_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1347 return frame_unwind_register_unsigned (next_frame
, pc_regnum
);
1350 /* Given a GDB frame, determine the address of the calling function's
1351 frame. This will be used to create a new GDB frame struct. */
1354 frv_frame_this_id (struct frame_info
*next_frame
,
1355 void **this_prologue_cache
, struct frame_id
*this_id
)
1357 struct frv_unwind_cache
*info
1358 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
1361 struct minimal_symbol
*msym_stack
;
1364 /* The FUNC is easy. */
1365 func
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
1367 /* Check if the stack is empty. */
1368 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
1369 if (msym_stack
&& info
->base
== SYMBOL_VALUE_ADDRESS (msym_stack
))
1372 /* Hopefully the prologue analysis either correctly determined the
1373 frame's base (which is the SP from the previous frame), or set
1374 that base to "NULL". */
1375 base
= info
->prev_sp
;
1379 id
= frame_id_build (base
, func
);
1384 frv_frame_prev_register (struct frame_info
*next_frame
,
1385 void **this_prologue_cache
,
1386 int regnum
, int *optimizedp
,
1387 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1388 int *realnump
, gdb_byte
*bufferp
)
1390 struct frv_unwind_cache
*info
1391 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
1392 trad_frame_get_prev_register (next_frame
, info
->saved_regs
, regnum
,
1393 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
1396 static const struct frame_unwind frv_frame_unwind
= {
1399 frv_frame_prev_register
1402 static const struct frame_unwind
*
1403 frv_frame_sniffer (struct frame_info
*next_frame
)
1405 return &frv_frame_unwind
;
1409 frv_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1411 struct frv_unwind_cache
*info
1412 = frv_frame_unwind_cache (next_frame
, this_cache
);
1416 static const struct frame_base frv_frame_base
= {
1418 frv_frame_base_address
,
1419 frv_frame_base_address
,
1420 frv_frame_base_address
1424 frv_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1426 return frame_unwind_register_unsigned (next_frame
, sp_regnum
);
1430 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1431 dummy frame. The frame ID's base needs to match the TOS value
1432 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1435 static struct frame_id
1436 frv_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1438 return frame_id_build (frv_unwind_sp (gdbarch
, next_frame
),
1439 frame_pc_unwind (next_frame
));
1442 static struct gdbarch
*
1443 frv_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1445 struct gdbarch
*gdbarch
;
1446 struct gdbarch_tdep
*var
;
1449 /* Check to see if we've already built an appropriate architecture
1450 object for this executable. */
1451 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1453 return arches
->gdbarch
;
1455 /* Select the right tdep structure for this variant. */
1456 var
= new_variant ();
1457 switch (info
.bfd_arch_info
->mach
)
1460 case bfd_mach_frvsimple
:
1461 case bfd_mach_fr500
:
1462 case bfd_mach_frvtomcat
:
1463 case bfd_mach_fr550
:
1464 set_variant_num_gprs (var
, 64);
1465 set_variant_num_fprs (var
, 64);
1468 case bfd_mach_fr400
:
1469 case bfd_mach_fr450
:
1470 set_variant_num_gprs (var
, 32);
1471 set_variant_num_fprs (var
, 32);
1475 /* Never heard of this variant. */
1479 /* Extract the ELF flags, if available. */
1480 if (info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
1481 elf_flags
= elf_elfheader (info
.abfd
)->e_flags
;
1483 if (elf_flags
& EF_FRV_FDPIC
)
1484 set_variant_abi_fdpic (var
);
1486 if (elf_flags
& EF_FRV_CPU_FR450
)
1487 set_variant_scratch_registers (var
);
1489 gdbarch
= gdbarch_alloc (&info
, var
);
1491 set_gdbarch_short_bit (gdbarch
, 16);
1492 set_gdbarch_int_bit (gdbarch
, 32);
1493 set_gdbarch_long_bit (gdbarch
, 32);
1494 set_gdbarch_long_long_bit (gdbarch
, 64);
1495 set_gdbarch_float_bit (gdbarch
, 32);
1496 set_gdbarch_double_bit (gdbarch
, 64);
1497 set_gdbarch_long_double_bit (gdbarch
, 64);
1498 set_gdbarch_ptr_bit (gdbarch
, 32);
1500 set_gdbarch_num_regs (gdbarch
, frv_num_regs
);
1501 set_gdbarch_num_pseudo_regs (gdbarch
, frv_num_pseudo_regs
);
1503 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
1504 set_gdbarch_deprecated_fp_regnum (gdbarch
, fp_regnum
);
1505 set_gdbarch_pc_regnum (gdbarch
, pc_regnum
);
1507 set_gdbarch_register_name (gdbarch
, frv_register_name
);
1508 set_gdbarch_register_type (gdbarch
, frv_register_type
);
1509 set_gdbarch_register_sim_regno (gdbarch
, frv_register_sim_regno
);
1511 set_gdbarch_pseudo_register_read (gdbarch
, frv_pseudo_register_read
);
1512 set_gdbarch_pseudo_register_write (gdbarch
, frv_pseudo_register_write
);
1514 set_gdbarch_skip_prologue (gdbarch
, frv_skip_prologue
);
1515 set_gdbarch_breakpoint_from_pc (gdbarch
, frv_breakpoint_from_pc
);
1516 set_gdbarch_adjust_breakpoint_address
1517 (gdbarch
, frv_adjust_breakpoint_address
);
1519 set_gdbarch_return_value (gdbarch
, frv_return_value
);
1522 set_gdbarch_unwind_pc (gdbarch
, frv_unwind_pc
);
1523 set_gdbarch_unwind_sp (gdbarch
, frv_unwind_sp
);
1524 set_gdbarch_frame_align (gdbarch
, frv_frame_align
);
1525 frame_base_set_default (gdbarch
, &frv_frame_base
);
1526 /* We set the sniffer lower down after the OSABI hooks have been
1529 /* Settings for calling functions in the inferior. */
1530 set_gdbarch_push_dummy_call (gdbarch
, frv_push_dummy_call
);
1531 set_gdbarch_unwind_dummy_id (gdbarch
, frv_unwind_dummy_id
);
1533 /* Settings that should be unnecessary. */
1534 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1536 /* Hardware watchpoint / breakpoint support. */
1537 switch (info
.bfd_arch_info
->mach
)
1540 case bfd_mach_frvsimple
:
1541 case bfd_mach_fr500
:
1542 case bfd_mach_frvtomcat
:
1543 /* fr500-style hardware debugging support. */
1544 var
->num_hw_watchpoints
= 4;
1545 var
->num_hw_breakpoints
= 4;
1548 case bfd_mach_fr400
:
1549 case bfd_mach_fr450
:
1550 /* fr400-style hardware debugging support. */
1551 var
->num_hw_watchpoints
= 2;
1552 var
->num_hw_breakpoints
= 4;
1556 /* Otherwise, assume we don't have hardware debugging support. */
1557 var
->num_hw_watchpoints
= 0;
1558 var
->num_hw_breakpoints
= 0;
1562 set_gdbarch_print_insn (gdbarch
, print_insn_frv
);
1563 if (frv_abi (gdbarch
) == FRV_ABI_FDPIC
)
1564 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
1565 frv_convert_from_func_ptr_addr
);
1567 set_solib_ops (gdbarch
, &frv_so_ops
);
1569 /* Hook in ABI-specific overrides, if they have been registered. */
1570 gdbarch_init_osabi (info
, gdbarch
);
1572 /* Set the fallback (prologue based) frame sniffer. */
1573 frame_unwind_append_sniffer (gdbarch
, frv_frame_sniffer
);
1575 /* Enable TLS support. */
1576 set_gdbarch_fetch_tls_load_module_address (gdbarch
,
1577 frv_fetch_objfile_link_map
);
1583 _initialize_frv_tdep (void)
1585 register_gdbarch_init (bfd_arch_frv
, frv_gdbarch_init
);