1 /* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
3 Copyright (C) 2002, 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street, Fifth Floor,
20 Boston, MA 02110-1301, USA. */
23 #include "gdb_string.h"
26 #include "arch-utils.h"
29 #include "frame-unwind.h"
30 #include "frame-base.h"
31 #include "trad-frame.h"
33 #include "gdb_assert.h"
34 #include "sim-regno.h"
35 #include "gdb/sim-frv.h"
36 #include "opcodes/frv-desc.h" /* for the H_SPR_... enums */
44 extern void _initialize_frv_tdep (void);
46 struct frv_unwind_cache
/* was struct frame_extra_info */
48 /* The previous frame's inner-most stack address. Used as this
49 frame ID's stack_addr. */
52 /* The frame's base, optionally used by the high-level debug info. */
55 /* Table indicating the location of each and every register. */
56 struct trad_frame_saved_reg
*saved_regs
;
59 /* A structure describing a particular variant of the FRV.
60 We allocate and initialize one of these structures when we create
61 the gdbarch object for a variant.
63 At the moment, all the FR variants we support differ only in which
64 registers are present; the portable code of GDB knows that
65 registers whose names are the empty string don't exist, so the
66 `register_names' array captures all the per-variant information we
69 in the future, if we need to have per-variant maps for raw size,
70 virtual type, etc., we should replace register_names with an array
71 of structures, each of which gives all the necessary info for one
72 register. Don't stick parallel arrays in here --- that's so
76 /* Which ABI is in use? */
79 /* How many general-purpose registers does this variant have? */
82 /* How many floating-point registers does this variant have? */
85 /* How many hardware watchpoints can it support? */
86 int num_hw_watchpoints
;
88 /* How many hardware breakpoints can it support? */
89 int num_hw_breakpoints
;
92 char **register_names
;
95 #define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
97 /* Return the FR-V ABI associated with GDBARCH. */
99 frv_abi (struct gdbarch
*gdbarch
)
101 return gdbarch_tdep (gdbarch
)->frv_abi
;
104 /* Fetch the interpreter and executable loadmap addresses (for shared
105 library support) for the FDPIC ABI. Return 0 if successful, -1 if
106 not. (E.g, -1 will be returned if the ABI isn't the FDPIC ABI.) */
108 frv_fdpic_loadmap_addresses (struct gdbarch
*gdbarch
, CORE_ADDR
*interp_addr
,
109 CORE_ADDR
*exec_addr
)
111 if (frv_abi (gdbarch
) != FRV_ABI_FDPIC
)
115 struct regcache
*regcache
= get_current_regcache ();
117 if (interp_addr
!= NULL
)
120 regcache_cooked_read_unsigned (regcache
,
121 fdpic_loadmap_interp_regnum
, &val
);
124 if (exec_addr
!= NULL
)
127 regcache_cooked_read_unsigned (regcache
,
128 fdpic_loadmap_exec_regnum
, &val
);
135 /* Allocate a new variant structure, and set up default values for all
137 static struct gdbarch_tdep
*
140 struct gdbarch_tdep
*var
;
144 var
= xmalloc (sizeof (*var
));
145 memset (var
, 0, sizeof (*var
));
147 var
->frv_abi
= FRV_ABI_EABI
;
150 var
->num_hw_watchpoints
= 0;
151 var
->num_hw_breakpoints
= 0;
153 /* By default, don't supply any general-purpose or floating-point
156 = (char **) xmalloc ((frv_num_regs
+ frv_num_pseudo_regs
)
158 for (r
= 0; r
< frv_num_regs
+ frv_num_pseudo_regs
; r
++)
159 var
->register_names
[r
] = "";
161 /* Do, however, supply default names for the known special-purpose
164 var
->register_names
[pc_regnum
] = "pc";
165 var
->register_names
[lr_regnum
] = "lr";
166 var
->register_names
[lcr_regnum
] = "lcr";
168 var
->register_names
[psr_regnum
] = "psr";
169 var
->register_names
[ccr_regnum
] = "ccr";
170 var
->register_names
[cccr_regnum
] = "cccr";
171 var
->register_names
[tbr_regnum
] = "tbr";
173 /* Debug registers. */
174 var
->register_names
[brr_regnum
] = "brr";
175 var
->register_names
[dbar0_regnum
] = "dbar0";
176 var
->register_names
[dbar1_regnum
] = "dbar1";
177 var
->register_names
[dbar2_regnum
] = "dbar2";
178 var
->register_names
[dbar3_regnum
] = "dbar3";
180 /* iacc0 (Only found on MB93405.) */
181 var
->register_names
[iacc0h_regnum
] = "iacc0h";
182 var
->register_names
[iacc0l_regnum
] = "iacc0l";
183 var
->register_names
[iacc0_regnum
] = "iacc0";
185 /* fsr0 (Found on FR555 and FR501.) */
186 var
->register_names
[fsr0_regnum
] = "fsr0";
188 /* acc0 - acc7. The architecture provides for the possibility of many
189 more (up to 64 total), but we don't want to make that big of a hole
190 in the G packet. If we need more in the future, we'll add them
192 for (r
= acc0_regnum
; r
<= acc7_regnum
; r
++)
195 buf
= xstrprintf ("acc%d", r
- acc0_regnum
);
196 var
->register_names
[r
] = buf
;
199 /* accg0 - accg7: These are one byte registers. The remote protocol
200 provides the raw values packed four into a slot. accg0123 and
201 accg4567 correspond to accg0 - accg3 and accg4-accg7 respectively.
202 We don't provide names for accg0123 and accg4567 since the user will
203 likely not want to see these raw values. */
205 for (r
= accg0_regnum
; r
<= accg7_regnum
; r
++)
208 buf
= xstrprintf ("accg%d", r
- accg0_regnum
);
209 var
->register_names
[r
] = buf
;
214 var
->register_names
[msr0_regnum
] = "msr0";
215 var
->register_names
[msr1_regnum
] = "msr1";
217 /* gner and fner registers. */
218 var
->register_names
[gner0_regnum
] = "gner0";
219 var
->register_names
[gner1_regnum
] = "gner1";
220 var
->register_names
[fner0_regnum
] = "fner0";
221 var
->register_names
[fner1_regnum
] = "fner1";
227 /* Indicate that the variant VAR has NUM_GPRS general-purpose
228 registers, and fill in the names array appropriately. */
230 set_variant_num_gprs (struct gdbarch_tdep
*var
, int num_gprs
)
234 var
->num_gprs
= num_gprs
;
236 for (r
= 0; r
< num_gprs
; ++r
)
240 sprintf (buf
, "gr%d", r
);
241 var
->register_names
[first_gpr_regnum
+ r
] = xstrdup (buf
);
246 /* Indicate that the variant VAR has NUM_FPRS floating-point
247 registers, and fill in the names array appropriately. */
249 set_variant_num_fprs (struct gdbarch_tdep
*var
, int num_fprs
)
253 var
->num_fprs
= num_fprs
;
255 for (r
= 0; r
< num_fprs
; ++r
)
259 sprintf (buf
, "fr%d", r
);
260 var
->register_names
[first_fpr_regnum
+ r
] = xstrdup (buf
);
265 set_variant_abi_fdpic (struct gdbarch_tdep
*var
)
267 var
->frv_abi
= FRV_ABI_FDPIC
;
268 var
->register_names
[fdpic_loadmap_exec_regnum
] = xstrdup ("loadmap_exec");
269 var
->register_names
[fdpic_loadmap_interp_regnum
] = xstrdup ("loadmap_interp");
273 set_variant_scratch_registers (struct gdbarch_tdep
*var
)
275 var
->register_names
[scr0_regnum
] = xstrdup ("scr0");
276 var
->register_names
[scr1_regnum
] = xstrdup ("scr1");
277 var
->register_names
[scr2_regnum
] = xstrdup ("scr2");
278 var
->register_names
[scr3_regnum
] = xstrdup ("scr3");
282 frv_register_name (int reg
)
286 if (reg
>= frv_num_regs
+ frv_num_pseudo_regs
)
289 return CURRENT_VARIANT
->register_names
[reg
];
294 frv_register_type (struct gdbarch
*gdbarch
, int reg
)
296 if (reg
>= first_fpr_regnum
&& reg
<= last_fpr_regnum
)
297 return builtin_type_float
;
298 else if (reg
== iacc0_regnum
)
299 return builtin_type_int64
;
301 return builtin_type_int32
;
305 frv_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
306 int reg
, gdb_byte
*buffer
)
308 if (reg
== iacc0_regnum
)
310 regcache_raw_read (regcache
, iacc0h_regnum
, buffer
);
311 regcache_raw_read (regcache
, iacc0l_regnum
, (bfd_byte
*) buffer
+ 4);
313 else if (accg0_regnum
<= reg
&& reg
<= accg7_regnum
)
315 /* The accg raw registers have four values in each slot with the
316 lowest register number occupying the first byte. */
318 int raw_regnum
= accg0123_regnum
+ (reg
- accg0_regnum
) / 4;
319 int byte_num
= (reg
- accg0_regnum
) % 4;
322 regcache_raw_read (regcache
, raw_regnum
, buf
);
323 memset (buffer
, 0, 4);
324 /* FR-V is big endian, so put the requested byte in the first byte
325 of the buffer allocated to hold the pseudo-register. */
326 ((bfd_byte
*) buffer
)[0] = buf
[byte_num
];
331 frv_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
332 int reg
, const gdb_byte
*buffer
)
334 if (reg
== iacc0_regnum
)
336 regcache_raw_write (regcache
, iacc0h_regnum
, buffer
);
337 regcache_raw_write (regcache
, iacc0l_regnum
, (bfd_byte
*) buffer
+ 4);
339 else if (accg0_regnum
<= reg
&& reg
<= accg7_regnum
)
341 /* The accg raw registers have four values in each slot with the
342 lowest register number occupying the first byte. */
344 int raw_regnum
= accg0123_regnum
+ (reg
- accg0_regnum
) / 4;
345 int byte_num
= (reg
- accg0_regnum
) % 4;
348 regcache_raw_read (regcache
, raw_regnum
, buf
);
349 buf
[byte_num
] = ((bfd_byte
*) buffer
)[0];
350 regcache_raw_write (regcache
, raw_regnum
, buf
);
355 frv_register_sim_regno (int reg
)
357 static const int spr_map
[] =
359 H_SPR_PSR
, /* psr_regnum */
360 H_SPR_CCR
, /* ccr_regnum */
361 H_SPR_CCCR
, /* cccr_regnum */
362 -1, /* fdpic_loadmap_exec_regnum */
363 -1, /* fdpic_loadmap_interp_regnum */
365 H_SPR_TBR
, /* tbr_regnum */
366 H_SPR_BRR
, /* brr_regnum */
367 H_SPR_DBAR0
, /* dbar0_regnum */
368 H_SPR_DBAR1
, /* dbar1_regnum */
369 H_SPR_DBAR2
, /* dbar2_regnum */
370 H_SPR_DBAR3
, /* dbar3_regnum */
371 H_SPR_SCR0
, /* scr0_regnum */
372 H_SPR_SCR1
, /* scr1_regnum */
373 H_SPR_SCR2
, /* scr2_regnum */
374 H_SPR_SCR3
, /* scr3_regnum */
375 H_SPR_LR
, /* lr_regnum */
376 H_SPR_LCR
, /* lcr_regnum */
377 H_SPR_IACC0H
, /* iacc0h_regnum */
378 H_SPR_IACC0L
, /* iacc0l_regnum */
379 H_SPR_FSR0
, /* fsr0_regnum */
380 /* FIXME: Add infrastructure for fetching/setting ACC and ACCG regs. */
381 -1, /* acc0_regnum */
382 -1, /* acc1_regnum */
383 -1, /* acc2_regnum */
384 -1, /* acc3_regnum */
385 -1, /* acc4_regnum */
386 -1, /* acc5_regnum */
387 -1, /* acc6_regnum */
388 -1, /* acc7_regnum */
389 -1, /* acc0123_regnum */
390 -1, /* acc4567_regnum */
391 H_SPR_MSR0
, /* msr0_regnum */
392 H_SPR_MSR1
, /* msr1_regnum */
393 H_SPR_GNER0
, /* gner0_regnum */
394 H_SPR_GNER1
, /* gner1_regnum */
395 H_SPR_FNER0
, /* fner0_regnum */
396 H_SPR_FNER1
, /* fner1_regnum */
399 gdb_assert (reg
>= 0 && reg
< gdbarch_num_regs (current_gdbarch
));
401 if (first_gpr_regnum
<= reg
&& reg
<= last_gpr_regnum
)
402 return reg
- first_gpr_regnum
+ SIM_FRV_GR0_REGNUM
;
403 else if (first_fpr_regnum
<= reg
&& reg
<= last_fpr_regnum
)
404 return reg
- first_fpr_regnum
+ SIM_FRV_FR0_REGNUM
;
405 else if (pc_regnum
== reg
)
406 return SIM_FRV_PC_REGNUM
;
407 else if (reg
>= first_spr_regnum
408 && reg
< first_spr_regnum
+ sizeof (spr_map
) / sizeof (spr_map
[0]))
410 int spr_reg_offset
= spr_map
[reg
- first_spr_regnum
];
412 if (spr_reg_offset
< 0)
413 return SIM_REGNO_DOES_NOT_EXIST
;
415 return SIM_FRV_SPR0_REGNUM
+ spr_reg_offset
;
418 internal_error (__FILE__
, __LINE__
, _("Bad register number %d"), reg
);
421 static const unsigned char *
422 frv_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenp
)
424 static unsigned char breakpoint
[] = {0xc0, 0x70, 0x00, 0x01};
425 *lenp
= sizeof (breakpoint
);
429 /* Define the maximum number of instructions which may be packed into a
430 bundle (VLIW instruction). */
431 static const int max_instrs_per_bundle
= 8;
433 /* Define the size (in bytes) of an FR-V instruction. */
434 static const int frv_instr_size
= 4;
436 /* Adjust a breakpoint's address to account for the FR-V architecture's
437 constraint that a break instruction must not appear as any but the
438 first instruction in the bundle. */
440 frv_adjust_breakpoint_address (struct gdbarch
*gdbarch
, CORE_ADDR bpaddr
)
442 int count
= max_instrs_per_bundle
;
443 CORE_ADDR addr
= bpaddr
- frv_instr_size
;
444 CORE_ADDR func_start
= get_pc_function_start (bpaddr
);
446 /* Find the end of the previous packing sequence. This will be indicated
447 by either attempting to access some inaccessible memory or by finding
448 an instruction word whose packing bit is set to one. */
449 while (count
-- > 0 && addr
>= func_start
)
451 char instr
[frv_instr_size
];
454 status
= read_memory_nobpt (addr
, instr
, sizeof instr
);
459 /* This is a big endian architecture, so byte zero will have most
460 significant byte. The most significant bit of this byte is the
465 addr
-= frv_instr_size
;
469 bpaddr
= addr
+ frv_instr_size
;
475 /* Return true if REG is a caller-saves ("scratch") register,
478 is_caller_saves_reg (int reg
)
480 return ((4 <= reg
&& reg
<= 7)
481 || (14 <= reg
&& reg
<= 15)
482 || (32 <= reg
&& reg
<= 47));
486 /* Return true if REG is a callee-saves register, false otherwise. */
488 is_callee_saves_reg (int reg
)
490 return ((16 <= reg
&& reg
<= 31)
491 || (48 <= reg
&& reg
<= 63));
495 /* Return true if REG is an argument register, false otherwise. */
497 is_argument_reg (int reg
)
499 return (8 <= reg
&& reg
<= 13);
502 /* Scan an FR-V prologue, starting at PC, until frame->PC.
503 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
504 We assume FRAME's saved_regs array has already been allocated and cleared.
505 Return the first PC value after the prologue.
507 Note that, for unoptimized code, we almost don't need this function
508 at all; all arguments and locals live on the stack, so we just need
509 the FP to find everything. The catch: structures passed by value
510 have their addresses living in registers; they're never spilled to
511 the stack. So if you ever want to be able to get to these
512 arguments in any frame but the top, you'll need to do this serious
513 prologue analysis. */
515 frv_analyze_prologue (CORE_ADDR pc
, struct frame_info
*next_frame
,
516 struct frv_unwind_cache
*info
)
518 /* When writing out instruction bitpatterns, we use the following
519 letters to label instruction fields:
520 P - The parallel bit. We don't use this.
521 J - The register number of GRj in the instruction description.
522 K - The register number of GRk in the instruction description.
523 I - The register number of GRi.
524 S - a signed imediate offset.
525 U - an unsigned immediate offset.
527 The dots below the numbers indicate where hex digit boundaries
528 fall, to make it easier to check the numbers. */
530 /* Non-zero iff we've seen the instruction that initializes the
531 frame pointer for this function's frame. */
534 /* If fp_set is non_zero, then this is the distance from
535 the stack pointer to frame pointer: fp = sp + fp_offset. */
538 /* Total size of frame prior to any alloca operations. */
541 /* Flag indicating if lr has been saved on the stack. */
542 int lr_saved_on_stack
= 0;
544 /* The number of the general-purpose register we saved the return
545 address ("link register") in, or -1 if we haven't moved it yet. */
546 int lr_save_reg
= -1;
548 /* Offset (from sp) at which lr has been saved on the stack. */
550 int lr_sp_offset
= 0;
552 /* If gr_saved[i] is non-zero, then we've noticed that general
553 register i has been saved at gr_sp_offset[i] from the stack
556 int gr_sp_offset
[64];
558 /* The address of the most recently scanned prologue instruction. */
559 CORE_ADDR last_prologue_pc
;
561 /* The address of the next instruction. */
564 /* The upper bound to of the pc values to scan. */
567 memset (gr_saved
, 0, sizeof (gr_saved
));
569 last_prologue_pc
= pc
;
571 /* Try to compute an upper limit (on how far to scan) based on the
573 lim_pc
= skip_prologue_using_sal (pc
);
574 /* If there's no line number info, lim_pc will be 0. In that case,
575 set the limit to be 100 instructions away from pc. Hopefully, this
576 will be far enough away to account for the entire prologue. Don't
577 worry about overshooting the end of the function. The scan loop
578 below contains some checks to avoid scanning unreasonably far. */
582 /* If we have a frame, we don't want to scan past the frame's pc. This
583 will catch those cases where the pc is in the prologue. */
586 CORE_ADDR frame_pc
= frame_pc_unwind (next_frame
);
587 if (frame_pc
< lim_pc
)
591 /* Scan the prologue. */
594 char buf
[frv_instr_size
];
597 if (target_read_memory (pc
, buf
, sizeof buf
) != 0)
599 op
= extract_signed_integer (buf
, sizeof buf
);
603 /* The tests in this chain of ifs should be in order of
604 decreasing selectivity, so that more particular patterns get
605 to fire before less particular patterns. */
607 /* Some sort of control transfer instruction: stop scanning prologue.
608 Integer Conditional Branch:
609 X XXXX XX 0000110 XX XXXXXXXXXXXXXXXX
610 Floating-point / media Conditional Branch:
611 X XXXX XX 0000111 XX XXXXXXXXXXXXXXXX
612 LCR Conditional Branch to LR
613 X XXXX XX 0001110 XX XX 001 X XXXXXXXXXX
614 Integer conditional Branches to LR
615 X XXXX XX 0001110 XX XX 010 X XXXXXXXXXX
616 X XXXX XX 0001110 XX XX 011 X XXXXXXXXXX
617 Floating-point/Media Branches to LR
618 X XXXX XX 0001110 XX XX 110 X XXXXXXXXXX
619 X XXXX XX 0001110 XX XX 111 X XXXXXXXXXX
621 X XXXXX X 0001100 XXXXXX XXXXXX XXXXXX
622 X XXXXX X 0001101 XXXXXX XXXXXX XXXXXX
624 X XXXXXX 0001111 XXXXXXXXXXXXXXXXXX
626 X XXXXX X 0000101 XXXXXX XXXXXX XXXXXX
627 Integer Conditional Trap
628 X XXXX XX 0000100 XXXXXX XXXX 00 XXXXXX
629 X XXXX XX 0011100 XXXXXX XXXXXXXXXXXX
630 Floating-point /media Conditional Trap
631 X XXXX XX 0000100 XXXXXX XXXX 01 XXXXXX
632 X XXXX XX 0011101 XXXXXX XXXXXXXXXXXX
634 X XXXX XX 0000100 XXXXXX XXXX 11 XXXXXX
636 X XXXX XX 0000100 XXXXXX XXXX 10 XXXXXX */
637 if ((op
& 0x01d80000) == 0x00180000 /* Conditional branches and Call */
638 || (op
& 0x01f80000) == 0x00300000 /* Jump and Link */
639 || (op
& 0x01f80000) == 0x00100000 /* Return from Trap, Trap */
640 || (op
& 0x01f80000) == 0x00700000) /* Trap immediate */
642 /* Stop scanning; not in prologue any longer. */
646 /* Loading something from memory into fp probably means that
647 we're in the epilogue. Stop scanning the prologue.
649 X 000010 0000010 XXXXXX 000100 XXXXXX
651 X 000010 0110010 XXXXXX XXXXXXXXXXXX */
652 else if ((op
& 0x7ffc0fc0) == 0x04080100
653 || (op
& 0x7ffc0000) == 0x04c80000)
658 /* Setting the FP from the SP:
660 P 000010 0100010 000001 000000000000 = 0x04881000
661 0 111111 1111111 111111 111111111111 = 0x7fffffff
663 We treat this as part of the prologue. */
664 else if ((op
& 0x7fffffff) == 0x04881000)
668 last_prologue_pc
= next_pc
;
671 /* Move the link register to the scratch register grJ, before saving:
673 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
674 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
676 We treat this as part of the prologue. */
677 else if ((op
& 0x7fffffc0) == 0x080d01c0)
679 int gr_j
= op
& 0x3f;
681 /* If we're moving it to a scratch register, that's fine. */
682 if (is_caller_saves_reg (gr_j
))
685 last_prologue_pc
= next_pc
;
689 /* To save multiple callee-saves registers on the stack, at
693 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
694 0 000000 1111111 111111 111111 111111 = 0x01ffffff
697 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
698 0 000000 1111111 111111 111111 111111 = 0x01ffffff
700 We treat this as part of the prologue, and record the register's
701 saved address in the frame structure. */
702 else if ((op
& 0x01ffffff) == 0x000c10c0
703 || (op
& 0x01ffffff) == 0x000c1100)
705 int gr_k
= ((op
>> 25) & 0x3f);
706 int ope
= ((op
>> 6) & 0x3f);
710 /* Is it an std or an stq? */
716 /* Is it really a callee-saves register? */
717 if (is_callee_saves_reg (gr_k
))
719 for (i
= 0; i
< count
; i
++)
721 gr_saved
[gr_k
+ i
] = 1;
722 gr_sp_offset
[gr_k
+ i
] = 4 * i
;
724 last_prologue_pc
= next_pc
;
728 /* Adjusting the stack pointer. (The stack pointer is GR1.)
730 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
731 0 111111 1111111 111111 000000000000 = 0x7ffff000
733 We treat this as part of the prologue. */
734 else if ((op
& 0x7ffff000) == 0x02401000)
738 /* Sign-extend the twelve-bit field.
739 (Isn't there a better way to do this?) */
740 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
743 last_prologue_pc
= pc
;
747 /* If the prologue is being adjusted again, we've
748 likely gone too far; i.e. we're probably in the
754 /* Setting the FP to a constant distance from the SP:
756 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
757 0 111111 1111111 111111 000000000000 = 0x7ffff000
759 We treat this as part of the prologue. */
760 else if ((op
& 0x7ffff000) == 0x04401000)
762 /* Sign-extend the twelve-bit field.
763 (Isn't there a better way to do this?) */
764 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
767 last_prologue_pc
= pc
;
770 /* To spill an argument register to a scratch register:
772 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
773 0 000000 1111111 000000 111111111111 = 0x01fc0fff
775 For the time being, we treat this as a prologue instruction,
776 assuming that GRi is an argument register. This one's kind
777 of suspicious, because it seems like it could be part of a
778 legitimate body instruction. But we only come here when the
779 source info wasn't helpful, so we have to do the best we can.
780 Hopefully once GCC and GDB agree on how to emit line number
781 info for prologues, then this code will never come into play. */
782 else if ((op
& 0x01fc0fff) == 0x00880000)
784 int gr_i
= ((op
>> 12) & 0x3f);
786 /* Make sure that the source is an arg register; if it is, we'll
787 treat it as a prologue instruction. */
788 if (is_argument_reg (gr_i
))
789 last_prologue_pc
= next_pc
;
792 /* To spill 16-bit values to the stack:
794 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
795 0 000000 1111111 111111 000000000000 = 0x01fff000
797 And for 8-bit values, we use STB instructions.
799 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
800 0 000000 1111111 111111 000000000000 = 0x01fff000
802 We check that GRk is really an argument register, and treat
803 all such as part of the prologue. */
804 else if ( (op
& 0x01fff000) == 0x01442000
805 || (op
& 0x01fff000) == 0x01402000)
807 int gr_k
= ((op
>> 25) & 0x3f);
809 /* Make sure that GRk is really an argument register; treat
810 it as a prologue instruction if so. */
811 if (is_argument_reg (gr_k
))
812 last_prologue_pc
= next_pc
;
815 /* To save multiple callee-saves register on the stack, at a
819 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
820 0 000000 1111111 111111 000000000000 = 0x01fff000
823 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
824 0 000000 1111111 111111 000000000000 = 0x01fff000
826 We treat this as part of the prologue, and record the register's
827 saved address in the frame structure. */
828 else if ((op
& 0x01fff000) == 0x014c1000
829 || (op
& 0x01fff000) == 0x01501000)
831 int gr_k
= ((op
>> 25) & 0x3f);
835 /* Is it a stdi or a stqi? */
836 if ((op
& 0x01fff000) == 0x014c1000)
841 /* Is it really a callee-saves register? */
842 if (is_callee_saves_reg (gr_k
))
844 /* Sign-extend the twelve-bit field.
845 (Isn't there a better way to do this?) */
846 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
848 for (i
= 0; i
< count
; i
++)
850 gr_saved
[gr_k
+ i
] = 1;
851 gr_sp_offset
[gr_k
+ i
] = s
+ (4 * i
);
853 last_prologue_pc
= next_pc
;
857 /* Storing any kind of integer register at any constant offset
858 from any other register.
861 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
862 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
865 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
866 0 000000 1111111 000000 000000000000 = 0x01fc0000
868 These could be almost anything, but a lot of prologue
869 instructions fall into this pattern, so let's decode the
870 instruction once, and then work at a higher level. */
871 else if (((op
& 0x01fc0fff) == 0x000c0080)
872 || ((op
& 0x01fc0000) == 0x01480000))
874 int gr_k
= ((op
>> 25) & 0x3f);
875 int gr_i
= ((op
>> 12) & 0x3f);
878 /* Are we storing with gr0 as an offset, or using an
880 if ((op
& 0x01fc0fff) == 0x000c0080)
883 offset
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
885 /* If the address isn't relative to the SP or FP, it's not a
886 prologue instruction. */
887 if (gr_i
!= sp_regnum
&& gr_i
!= fp_regnum
)
889 /* Do nothing; not a prologue instruction. */
892 /* Saving the old FP in the new frame (relative to the SP). */
893 else if (gr_k
== fp_regnum
&& gr_i
== sp_regnum
)
895 gr_saved
[fp_regnum
] = 1;
896 gr_sp_offset
[fp_regnum
] = offset
;
897 last_prologue_pc
= next_pc
;
900 /* Saving callee-saves register(s) on the stack, relative to
902 else if (gr_i
== sp_regnum
903 && is_callee_saves_reg (gr_k
))
906 if (gr_i
== sp_regnum
)
907 gr_sp_offset
[gr_k
] = offset
;
909 gr_sp_offset
[gr_k
] = offset
+ fp_offset
;
910 last_prologue_pc
= next_pc
;
913 /* Saving the scratch register holding the return address. */
914 else if (lr_save_reg
!= -1
915 && gr_k
== lr_save_reg
)
917 lr_saved_on_stack
= 1;
918 if (gr_i
== sp_regnum
)
919 lr_sp_offset
= offset
;
921 lr_sp_offset
= offset
+ fp_offset
;
922 last_prologue_pc
= next_pc
;
925 /* Spilling int-sized arguments to the stack. */
926 else if (is_argument_reg (gr_k
))
927 last_prologue_pc
= next_pc
;
932 if (next_frame
&& info
)
937 /* If we know the relationship between the stack and frame
938 pointers, record the addresses of the registers we noticed.
939 Note that we have to do this as a separate step at the end,
940 because instructions may save relative to the SP, but we need
941 their addresses relative to the FP. */
943 frame_unwind_unsigned_register (next_frame
, fp_regnum
, &this_base
);
945 frame_unwind_unsigned_register (next_frame
, sp_regnum
, &this_base
);
947 for (i
= 0; i
< 64; i
++)
949 info
->saved_regs
[i
].addr
= this_base
- fp_offset
+ gr_sp_offset
[i
];
951 info
->prev_sp
= this_base
- fp_offset
+ framesize
;
952 info
->base
= this_base
;
954 /* If LR was saved on the stack, record its location. */
955 if (lr_saved_on_stack
)
956 info
->saved_regs
[lr_regnum
].addr
= this_base
- fp_offset
+ lr_sp_offset
;
958 /* The call instruction moves the caller's PC in the callee's LR.
959 Since this is an unwind, do the reverse. Copy the location of LR
960 into PC (the address / regnum) so that a request for PC will be
961 converted into a request for the LR. */
962 info
->saved_regs
[pc_regnum
] = info
->saved_regs
[lr_regnum
];
964 /* Save the previous frame's computed SP value. */
965 trad_frame_set_value (info
->saved_regs
, sp_regnum
, info
->prev_sp
);
968 return last_prologue_pc
;
973 frv_skip_prologue (CORE_ADDR pc
)
975 CORE_ADDR func_addr
, func_end
, new_pc
;
979 /* If the line table has entry for a line *within* the function
980 (i.e., not in the prologue, and not past the end), then that's
982 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
984 struct symtab_and_line sal
;
986 sal
= find_pc_line (func_addr
, 0);
988 if (sal
.line
!= 0 && sal
.end
< func_end
)
994 /* The FR-V prologue is at least five instructions long (twenty bytes).
995 If we didn't find a real source location past that, then
996 do a full analysis of the prologue. */
997 if (new_pc
< pc
+ 20)
998 new_pc
= frv_analyze_prologue (pc
, 0, 0);
1004 static struct frv_unwind_cache
*
1005 frv_frame_unwind_cache (struct frame_info
*next_frame
,
1006 void **this_prologue_cache
)
1008 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
1011 struct frv_unwind_cache
*info
;
1013 if ((*this_prologue_cache
))
1014 return (*this_prologue_cache
);
1016 info
= FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache
);
1017 (*this_prologue_cache
) = info
;
1018 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
1020 /* Prologue analysis does the rest... */
1021 frv_analyze_prologue (frame_func_unwind (next_frame
, NORMAL_FRAME
),
1028 frv_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1031 int len
= TYPE_LENGTH (type
);
1036 regcache_cooked_read_unsigned (regcache
, 8, &gpr8_val
);
1037 store_unsigned_integer (valbuf
, len
, gpr8_val
);
1042 regcache_cooked_read_unsigned (regcache
, 8, ®val
);
1043 store_unsigned_integer (valbuf
, 4, regval
);
1044 regcache_cooked_read_unsigned (regcache
, 9, ®val
);
1045 store_unsigned_integer ((bfd_byte
*) valbuf
+ 4, 4, regval
);
1048 internal_error (__FILE__
, __LINE__
, _("Illegal return value length: %d"), len
);
1052 frv_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1054 /* Require dword alignment. */
1055 return align_down (sp
, 8);
1059 find_func_descr (struct gdbarch
*gdbarch
, CORE_ADDR entry_point
)
1063 CORE_ADDR start_addr
;
1065 /* If we can't find the function in the symbol table, then we assume
1066 that the function address is already in descriptor form. */
1067 if (!find_pc_partial_function (entry_point
, NULL
, &start_addr
, NULL
)
1068 || entry_point
!= start_addr
)
1071 descr
= frv_fdpic_find_canonical_descriptor (entry_point
);
1076 /* Construct a non-canonical descriptor from space allocated on
1079 descr
= value_as_long (value_allocate_space_in_inferior (8));
1080 store_unsigned_integer (valbuf
, 4, entry_point
);
1081 write_memory (descr
, valbuf
, 4);
1082 store_unsigned_integer (valbuf
, 4,
1083 frv_fdpic_find_global_pointer (entry_point
));
1084 write_memory (descr
+ 4, valbuf
, 4);
1089 frv_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
1090 struct target_ops
*targ
)
1092 CORE_ADDR entry_point
;
1093 CORE_ADDR got_address
;
1095 entry_point
= get_target_memory_unsigned (targ
, addr
, 4);
1096 got_address
= get_target_memory_unsigned (targ
, addr
+ 4, 4);
1098 if (got_address
== frv_fdpic_find_global_pointer (entry_point
))
1105 frv_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1106 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1107 int nargs
, struct value
**args
, CORE_ADDR sp
,
1108 int struct_return
, CORE_ADDR struct_addr
)
1115 struct type
*arg_type
;
1117 enum type_code typecode
;
1121 enum frv_abi abi
= frv_abi (gdbarch
);
1122 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
1125 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
1126 nargs
, (int) sp
, struct_return
, struct_addr
);
1130 for (argnum
= 0; argnum
< nargs
; ++argnum
)
1131 stack_space
+= align_up (TYPE_LENGTH (value_type (args
[argnum
])), 4);
1133 stack_space
-= (6 * 4);
1134 if (stack_space
> 0)
1137 /* Make sure stack is dword aligned. */
1138 sp
= align_down (sp
, 8);
1145 regcache_cooked_write_unsigned (regcache
, struct_return_regnum
,
1148 for (argnum
= 0; argnum
< nargs
; ++argnum
)
1151 arg_type
= check_typedef (value_type (arg
));
1152 len
= TYPE_LENGTH (arg_type
);
1153 typecode
= TYPE_CODE (arg_type
);
1155 if (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
)
1157 store_unsigned_integer (valbuf
, 4, VALUE_ADDRESS (arg
));
1158 typecode
= TYPE_CODE_PTR
;
1162 else if (abi
== FRV_ABI_FDPIC
1164 && typecode
== TYPE_CODE_PTR
1165 && TYPE_CODE (TYPE_TARGET_TYPE (arg_type
)) == TYPE_CODE_FUNC
)
1167 /* The FDPIC ABI requires function descriptors to be passed instead
1169 store_unsigned_integer
1171 find_func_descr (gdbarch
,
1172 extract_unsigned_integer (value_contents (arg
),
1174 typecode
= TYPE_CODE_PTR
;
1180 val
= (char *) value_contents (arg
);
1185 int partial_len
= (len
< 4 ? len
: 4);
1189 regval
= extract_unsigned_integer (val
, partial_len
);
1191 printf(" Argnum %d data %x -> reg %d\n",
1192 argnum
, (int) regval
, argreg
);
1194 regcache_cooked_write_unsigned (regcache
, argreg
, regval
);
1200 printf(" Argnum %d data %x -> offset %d (%x)\n",
1201 argnum
, *((int *)val
), stack_offset
, (int) (sp
+ stack_offset
));
1203 write_memory (sp
+ stack_offset
, val
, partial_len
);
1204 stack_offset
+= align_up (partial_len
, 4);
1211 /* Set the return address. For the frv, the return breakpoint is
1212 always at BP_ADDR. */
1213 regcache_cooked_write_unsigned (regcache
, lr_regnum
, bp_addr
);
1215 if (abi
== FRV_ABI_FDPIC
)
1217 /* Set the GOT register for the FDPIC ABI. */
1218 regcache_cooked_write_unsigned
1219 (regcache
, first_gpr_regnum
+ 15,
1220 frv_fdpic_find_global_pointer (func_addr
));
1223 /* Finally, update the SP register. */
1224 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
1230 frv_store_return_value (struct type
*type
, struct regcache
*regcache
,
1231 const gdb_byte
*valbuf
)
1233 int len
= TYPE_LENGTH (type
);
1238 memset (val
, 0, sizeof (val
));
1239 memcpy (val
+ (4 - len
), valbuf
, len
);
1240 regcache_cooked_write (regcache
, 8, val
);
1244 regcache_cooked_write (regcache
, 8, valbuf
);
1245 regcache_cooked_write (regcache
, 9, (bfd_byte
*) valbuf
+ 4);
1248 internal_error (__FILE__
, __LINE__
,
1249 _("Don't know how to return a %d-byte value."), len
);
1253 /* Hardware watchpoint / breakpoint support for the FR500
1257 frv_check_watch_resources (int type
, int cnt
, int ot
)
1259 struct gdbarch_tdep
*var
= CURRENT_VARIANT
;
1261 /* Watchpoints not supported on simulator. */
1262 if (strcmp (target_shortname
, "sim") == 0)
1265 if (type
== bp_hardware_breakpoint
)
1267 if (var
->num_hw_breakpoints
== 0)
1269 else if (cnt
<= var
->num_hw_breakpoints
)
1274 if (var
->num_hw_watchpoints
== 0)
1278 else if (cnt
<= var
->num_hw_watchpoints
)
1286 frv_stopped_data_address (CORE_ADDR
*addr_p
)
1288 struct frame_info
*frame
= get_current_frame ();
1289 CORE_ADDR brr
, dbar0
, dbar1
, dbar2
, dbar3
;
1291 brr
= get_frame_register_unsigned (frame
, brr_regnum
);
1292 dbar0
= get_frame_register_unsigned (frame
, dbar0_regnum
);
1293 dbar1
= get_frame_register_unsigned (frame
, dbar1_regnum
);
1294 dbar2
= get_frame_register_unsigned (frame
, dbar2_regnum
);
1295 dbar3
= get_frame_register_unsigned (frame
, dbar3_regnum
);
1299 else if (brr
& (1<<10))
1301 else if (brr
& (1<<9))
1303 else if (brr
& (1<<8))
1312 frv_have_stopped_data_address (void)
1315 return frv_stopped_data_address (&addr
);
1319 frv_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1321 return frame_unwind_register_unsigned (next_frame
, pc_regnum
);
1324 /* Given a GDB frame, determine the address of the calling function's
1325 frame. This will be used to create a new GDB frame struct. */
1328 frv_frame_this_id (struct frame_info
*next_frame
,
1329 void **this_prologue_cache
, struct frame_id
*this_id
)
1331 struct frv_unwind_cache
*info
1332 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
1335 struct minimal_symbol
*msym_stack
;
1338 /* The FUNC is easy. */
1339 func
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
1341 /* Check if the stack is empty. */
1342 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
1343 if (msym_stack
&& info
->base
== SYMBOL_VALUE_ADDRESS (msym_stack
))
1346 /* Hopefully the prologue analysis either correctly determined the
1347 frame's base (which is the SP from the previous frame), or set
1348 that base to "NULL". */
1349 base
= info
->prev_sp
;
1353 id
= frame_id_build (base
, func
);
1358 frv_frame_prev_register (struct frame_info
*next_frame
,
1359 void **this_prologue_cache
,
1360 int regnum
, int *optimizedp
,
1361 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1362 int *realnump
, gdb_byte
*bufferp
)
1364 struct frv_unwind_cache
*info
1365 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
1366 trad_frame_get_prev_register (next_frame
, info
->saved_regs
, regnum
,
1367 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
1370 static const struct frame_unwind frv_frame_unwind
= {
1373 frv_frame_prev_register
1376 static const struct frame_unwind
*
1377 frv_frame_sniffer (struct frame_info
*next_frame
)
1379 return &frv_frame_unwind
;
1383 frv_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1385 struct frv_unwind_cache
*info
1386 = frv_frame_unwind_cache (next_frame
, this_cache
);
1390 static const struct frame_base frv_frame_base
= {
1392 frv_frame_base_address
,
1393 frv_frame_base_address
,
1394 frv_frame_base_address
1398 frv_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1400 return frame_unwind_register_unsigned (next_frame
, sp_regnum
);
1404 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1405 dummy frame. The frame ID's base needs to match the TOS value
1406 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1409 static struct frame_id
1410 frv_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1412 return frame_id_build (frv_unwind_sp (gdbarch
, next_frame
),
1413 frame_pc_unwind (next_frame
));
1416 static struct gdbarch
*
1417 frv_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1419 struct gdbarch
*gdbarch
;
1420 struct gdbarch_tdep
*var
;
1423 /* Check to see if we've already built an appropriate architecture
1424 object for this executable. */
1425 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1427 return arches
->gdbarch
;
1429 /* Select the right tdep structure for this variant. */
1430 var
= new_variant ();
1431 switch (info
.bfd_arch_info
->mach
)
1434 case bfd_mach_frvsimple
:
1435 case bfd_mach_fr500
:
1436 case bfd_mach_frvtomcat
:
1437 case bfd_mach_fr550
:
1438 set_variant_num_gprs (var
, 64);
1439 set_variant_num_fprs (var
, 64);
1442 case bfd_mach_fr400
:
1443 case bfd_mach_fr450
:
1444 set_variant_num_gprs (var
, 32);
1445 set_variant_num_fprs (var
, 32);
1449 /* Never heard of this variant. */
1453 /* Extract the ELF flags, if available. */
1454 if (info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
1455 elf_flags
= elf_elfheader (info
.abfd
)->e_flags
;
1457 if (elf_flags
& EF_FRV_FDPIC
)
1458 set_variant_abi_fdpic (var
);
1460 if (elf_flags
& EF_FRV_CPU_FR450
)
1461 set_variant_scratch_registers (var
);
1463 gdbarch
= gdbarch_alloc (&info
, var
);
1465 set_gdbarch_short_bit (gdbarch
, 16);
1466 set_gdbarch_int_bit (gdbarch
, 32);
1467 set_gdbarch_long_bit (gdbarch
, 32);
1468 set_gdbarch_long_long_bit (gdbarch
, 64);
1469 set_gdbarch_float_bit (gdbarch
, 32);
1470 set_gdbarch_double_bit (gdbarch
, 64);
1471 set_gdbarch_long_double_bit (gdbarch
, 64);
1472 set_gdbarch_ptr_bit (gdbarch
, 32);
1474 set_gdbarch_num_regs (gdbarch
, frv_num_regs
);
1475 set_gdbarch_num_pseudo_regs (gdbarch
, frv_num_pseudo_regs
);
1477 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
1478 set_gdbarch_deprecated_fp_regnum (gdbarch
, fp_regnum
);
1479 set_gdbarch_pc_regnum (gdbarch
, pc_regnum
);
1481 set_gdbarch_register_name (gdbarch
, frv_register_name
);
1482 set_gdbarch_register_type (gdbarch
, frv_register_type
);
1483 set_gdbarch_register_sim_regno (gdbarch
, frv_register_sim_regno
);
1485 set_gdbarch_pseudo_register_read (gdbarch
, frv_pseudo_register_read
);
1486 set_gdbarch_pseudo_register_write (gdbarch
, frv_pseudo_register_write
);
1488 set_gdbarch_skip_prologue (gdbarch
, frv_skip_prologue
);
1489 set_gdbarch_breakpoint_from_pc (gdbarch
, frv_breakpoint_from_pc
);
1490 set_gdbarch_adjust_breakpoint_address
1491 (gdbarch
, frv_adjust_breakpoint_address
);
1493 set_gdbarch_deprecated_use_struct_convention (gdbarch
, always_use_struct_convention
);
1494 set_gdbarch_extract_return_value (gdbarch
, frv_extract_return_value
);
1496 set_gdbarch_store_return_value (gdbarch
, frv_store_return_value
);
1499 set_gdbarch_unwind_pc (gdbarch
, frv_unwind_pc
);
1500 set_gdbarch_unwind_sp (gdbarch
, frv_unwind_sp
);
1501 set_gdbarch_frame_align (gdbarch
, frv_frame_align
);
1502 frame_base_set_default (gdbarch
, &frv_frame_base
);
1503 /* We set the sniffer lower down after the OSABI hooks have been
1506 /* Settings for calling functions in the inferior. */
1507 set_gdbarch_push_dummy_call (gdbarch
, frv_push_dummy_call
);
1508 set_gdbarch_unwind_dummy_id (gdbarch
, frv_unwind_dummy_id
);
1510 /* Settings that should be unnecessary. */
1511 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1513 /* Hardware watchpoint / breakpoint support. */
1514 switch (info
.bfd_arch_info
->mach
)
1517 case bfd_mach_frvsimple
:
1518 case bfd_mach_fr500
:
1519 case bfd_mach_frvtomcat
:
1520 /* fr500-style hardware debugging support. */
1521 var
->num_hw_watchpoints
= 4;
1522 var
->num_hw_breakpoints
= 4;
1525 case bfd_mach_fr400
:
1526 case bfd_mach_fr450
:
1527 /* fr400-style hardware debugging support. */
1528 var
->num_hw_watchpoints
= 2;
1529 var
->num_hw_breakpoints
= 4;
1533 /* Otherwise, assume we don't have hardware debugging support. */
1534 var
->num_hw_watchpoints
= 0;
1535 var
->num_hw_breakpoints
= 0;
1539 set_gdbarch_print_insn (gdbarch
, print_insn_frv
);
1540 if (frv_abi (gdbarch
) == FRV_ABI_FDPIC
)
1541 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
1542 frv_convert_from_func_ptr_addr
);
1544 /* Hook in ABI-specific overrides, if they have been registered. */
1545 gdbarch_init_osabi (info
, gdbarch
);
1547 /* Set the fallback (prologue based) frame sniffer. */
1548 frame_unwind_append_sniffer (gdbarch
, frv_frame_sniffer
);
1550 /* Enable TLS support. */
1551 set_gdbarch_fetch_tls_load_module_address (gdbarch
,
1552 frv_fetch_objfile_link_map
);
1558 _initialize_frv_tdep (void)
1560 register_gdbarch_init (bfd_arch_frv
, frv_gdbarch_init
);