1 /* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
2 Copyright 2002, 2003, 2004 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 #include "gdb_string.h"
25 #include "arch-utils.h"
28 #include "frame-unwind.h"
29 #include "frame-base.h"
30 #include "trad-frame.h"
32 #include "gdb_assert.h"
33 #include "sim-regno.h"
34 #include "gdb/sim-frv.h"
35 #include "opcodes/frv-desc.h" /* for the H_SPR_... enums */
42 extern void _initialize_frv_tdep (void);
44 static gdbarch_init_ftype frv_gdbarch_init
;
46 static gdbarch_register_name_ftype frv_register_name
;
47 static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc
;
48 static gdbarch_adjust_breakpoint_address_ftype frv_gdbarch_adjust_breakpoint_address
;
49 static gdbarch_skip_prologue_ftype frv_skip_prologue
;
52 struct frv_unwind_cache
/* was struct frame_extra_info */
54 /* The previous frame's inner-most stack address. Used as this
55 frame ID's stack_addr. */
58 /* The frame's base, optionally used by the high-level debug info. */
61 /* Table indicating the location of each and every register. */
62 struct trad_frame_saved_reg
*saved_regs
;
65 /* A structure describing a particular variant of the FRV.
66 We allocate and initialize one of these structures when we create
67 the gdbarch object for a variant.
69 At the moment, all the FR variants we support differ only in which
70 registers are present; the portable code of GDB knows that
71 registers whose names are the empty string don't exist, so the
72 `register_names' array captures all the per-variant information we
75 in the future, if we need to have per-variant maps for raw size,
76 virtual type, etc., we should replace register_names with an array
77 of structures, each of which gives all the necessary info for one
78 register. Don't stick parallel arrays in here --- that's so
82 /* Which ABI is in use? */
85 /* How many general-purpose registers does this variant have? */
88 /* How many floating-point registers does this variant have? */
91 /* How many hardware watchpoints can it support? */
92 int num_hw_watchpoints
;
94 /* How many hardware breakpoints can it support? */
95 int num_hw_breakpoints
;
98 char **register_names
;
101 #define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
103 /* Return the FR-V ABI associated with GDBARCH. */
105 frv_abi (struct gdbarch
*gdbarch
)
107 return gdbarch_tdep (gdbarch
)->frv_abi
;
110 /* Fetch the interpreter and executable loadmap addresses (for shared
111 library support) for the FDPIC ABI. Return 0 if successful, -1 if
112 not. (E.g, -1 will be returned if the ABI isn't the FDPIC ABI.) */
114 frv_fdpic_loadmap_addresses (struct gdbarch
*gdbarch
, CORE_ADDR
*interp_addr
,
115 CORE_ADDR
*exec_addr
)
117 if (frv_abi (gdbarch
) != FRV_ABI_FDPIC
)
121 if (interp_addr
!= NULL
)
124 regcache_cooked_read_unsigned (current_regcache
,
125 fdpic_loadmap_interp_regnum
, &val
);
128 if (exec_addr
!= NULL
)
131 regcache_cooked_read_unsigned (current_regcache
,
132 fdpic_loadmap_exec_regnum
, &val
);
139 /* Allocate a new variant structure, and set up default values for all
141 static struct gdbarch_tdep
*
144 struct gdbarch_tdep
*var
;
148 var
= xmalloc (sizeof (*var
));
149 memset (var
, 0, sizeof (*var
));
151 var
->frv_abi
= FRV_ABI_EABI
;
154 var
->num_hw_watchpoints
= 0;
155 var
->num_hw_breakpoints
= 0;
157 /* By default, don't supply any general-purpose or floating-point
160 = (char **) xmalloc ((frv_num_regs
+ frv_num_pseudo_regs
)
162 for (r
= 0; r
< frv_num_regs
+ frv_num_pseudo_regs
; r
++)
163 var
->register_names
[r
] = "";
165 /* Do, however, supply default names for the known special-purpose
168 var
->register_names
[pc_regnum
] = "pc";
169 var
->register_names
[lr_regnum
] = "lr";
170 var
->register_names
[lcr_regnum
] = "lcr";
172 var
->register_names
[psr_regnum
] = "psr";
173 var
->register_names
[ccr_regnum
] = "ccr";
174 var
->register_names
[cccr_regnum
] = "cccr";
175 var
->register_names
[tbr_regnum
] = "tbr";
177 /* Debug registers. */
178 var
->register_names
[brr_regnum
] = "brr";
179 var
->register_names
[dbar0_regnum
] = "dbar0";
180 var
->register_names
[dbar1_regnum
] = "dbar1";
181 var
->register_names
[dbar2_regnum
] = "dbar2";
182 var
->register_names
[dbar3_regnum
] = "dbar3";
184 /* iacc0 (Only found on MB93405.) */
185 var
->register_names
[iacc0h_regnum
] = "iacc0h";
186 var
->register_names
[iacc0l_regnum
] = "iacc0l";
187 var
->register_names
[iacc0_regnum
] = "iacc0";
189 /* fsr0 (Found on FR555 and FR501.) */
190 var
->register_names
[fsr0_regnum
] = "fsr0";
192 /* acc0 - acc7. The architecture provides for the possibility of many
193 more (up to 64 total), but we don't want to make that big of a hole
194 in the G packet. If we need more in the future, we'll add them
196 for (r
= acc0_regnum
; r
<= acc7_regnum
; r
++)
199 xasprintf (&buf
, "acc%d", r
- acc0_regnum
);
200 var
->register_names
[r
] = buf
;
203 /* accg0 - accg7: These are one byte registers. The remote protocol
204 provides the raw values packed four into a slot. accg0123 and
205 accg4567 correspond to accg0 - accg3 and accg4-accg7 respectively.
206 We don't provide names for accg0123 and accg4567 since the user will
207 likely not want to see these raw values. */
209 for (r
= accg0_regnum
; r
<= accg7_regnum
; r
++)
212 xasprintf (&buf
, "accg%d", r
- accg0_regnum
);
213 var
->register_names
[r
] = buf
;
218 var
->register_names
[msr0_regnum
] = "msr0";
219 var
->register_names
[msr1_regnum
] = "msr1";
221 /* gner and fner registers. */
222 var
->register_names
[gner0_regnum
] = "gner0";
223 var
->register_names
[gner1_regnum
] = "gner1";
224 var
->register_names
[fner0_regnum
] = "fner0";
225 var
->register_names
[fner1_regnum
] = "fner1";
231 /* Indicate that the variant VAR has NUM_GPRS general-purpose
232 registers, and fill in the names array appropriately. */
234 set_variant_num_gprs (struct gdbarch_tdep
*var
, int num_gprs
)
238 var
->num_gprs
= num_gprs
;
240 for (r
= 0; r
< num_gprs
; ++r
)
244 sprintf (buf
, "gr%d", r
);
245 var
->register_names
[first_gpr_regnum
+ r
] = xstrdup (buf
);
250 /* Indicate that the variant VAR has NUM_FPRS floating-point
251 registers, and fill in the names array appropriately. */
253 set_variant_num_fprs (struct gdbarch_tdep
*var
, int num_fprs
)
257 var
->num_fprs
= num_fprs
;
259 for (r
= 0; r
< num_fprs
; ++r
)
263 sprintf (buf
, "fr%d", r
);
264 var
->register_names
[first_fpr_regnum
+ r
] = xstrdup (buf
);
269 set_variant_abi_fdpic (struct gdbarch_tdep
*var
)
271 var
->frv_abi
= FRV_ABI_FDPIC
;
272 var
->register_names
[fdpic_loadmap_exec_regnum
] = xstrdup ("loadmap_exec");
273 var
->register_names
[fdpic_loadmap_interp_regnum
] = xstrdup ("loadmap_interp");
277 set_variant_scratch_registers (struct gdbarch_tdep
*var
)
279 var
->register_names
[scr0_regnum
] = xstrdup ("scr0");
280 var
->register_names
[scr1_regnum
] = xstrdup ("scr1");
281 var
->register_names
[scr2_regnum
] = xstrdup ("scr2");
282 var
->register_names
[scr3_regnum
] = xstrdup ("scr3");
286 frv_register_name (int reg
)
290 if (reg
>= frv_num_regs
+ frv_num_pseudo_regs
)
293 return CURRENT_VARIANT
->register_names
[reg
];
298 frv_register_type (struct gdbarch
*gdbarch
, int reg
)
300 if (reg
>= first_fpr_regnum
&& reg
<= last_fpr_regnum
)
301 return builtin_type_float
;
302 else if (reg
== iacc0_regnum
)
303 return builtin_type_int64
;
305 return builtin_type_int32
;
309 frv_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
310 int reg
, void *buffer
)
312 if (reg
== iacc0_regnum
)
314 regcache_raw_read (regcache
, iacc0h_regnum
, buffer
);
315 regcache_raw_read (regcache
, iacc0l_regnum
, (bfd_byte
*) buffer
+ 4);
317 else if (accg0_regnum
<= reg
&& reg
<= accg7_regnum
)
319 /* The accg raw registers have four values in each slot with the
320 lowest register number occupying the first byte. */
322 int raw_regnum
= accg0123_regnum
+ (reg
- accg0_regnum
) / 4;
323 int byte_num
= (reg
- accg0_regnum
) % 4;
326 regcache_raw_read (regcache
, raw_regnum
, buf
);
327 memset (buffer
, 0, 4);
328 /* FR-V is big endian, so put the requested byte in the first byte
329 of the buffer allocated to hold the pseudo-register. */
330 ((bfd_byte
*) buffer
)[0] = buf
[byte_num
];
335 frv_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
336 int reg
, const void *buffer
)
338 if (reg
== iacc0_regnum
)
340 regcache_raw_write (regcache
, iacc0h_regnum
, buffer
);
341 regcache_raw_write (regcache
, iacc0l_regnum
, (bfd_byte
*) buffer
+ 4);
343 else if (accg0_regnum
<= reg
&& reg
<= accg7_regnum
)
345 /* The accg raw registers have four values in each slot with the
346 lowest register number occupying the first byte. */
348 int raw_regnum
= accg0123_regnum
+ (reg
- accg0_regnum
) / 4;
349 int byte_num
= (reg
- accg0_regnum
) % 4;
352 regcache_raw_read (regcache
, raw_regnum
, buf
);
353 buf
[byte_num
] = ((bfd_byte
*) buffer
)[0];
354 regcache_raw_write (regcache
, raw_regnum
, buf
);
359 frv_register_sim_regno (int reg
)
361 static const int spr_map
[] =
363 H_SPR_PSR
, /* psr_regnum */
364 H_SPR_CCR
, /* ccr_regnum */
365 H_SPR_CCCR
, /* cccr_regnum */
366 -1, /* fdpic_loadmap_exec_regnum */
367 -1, /* fdpic_loadmap_interp_regnum */
369 H_SPR_TBR
, /* tbr_regnum */
370 H_SPR_BRR
, /* brr_regnum */
371 H_SPR_DBAR0
, /* dbar0_regnum */
372 H_SPR_DBAR1
, /* dbar1_regnum */
373 H_SPR_DBAR2
, /* dbar2_regnum */
374 H_SPR_DBAR3
, /* dbar3_regnum */
375 H_SPR_SCR0
, /* scr0_regnum */
376 H_SPR_SCR1
, /* scr1_regnum */
377 H_SPR_SCR2
, /* scr2_regnum */
378 H_SPR_SCR3
, /* scr3_regnum */
379 H_SPR_LR
, /* lr_regnum */
380 H_SPR_LCR
, /* lcr_regnum */
381 H_SPR_IACC0H
, /* iacc0h_regnum */
382 H_SPR_IACC0L
, /* iacc0l_regnum */
383 H_SPR_FSR0
, /* fsr0_regnum */
384 /* FIXME: Add infrastructure for fetching/setting ACC and ACCG regs. */
385 -1, /* acc0_regnum */
386 -1, /* acc1_regnum */
387 -1, /* acc2_regnum */
388 -1, /* acc3_regnum */
389 -1, /* acc4_regnum */
390 -1, /* acc5_regnum */
391 -1, /* acc6_regnum */
392 -1, /* acc7_regnum */
393 -1, /* acc0123_regnum */
394 -1, /* acc4567_regnum */
395 H_SPR_MSR0
, /* msr0_regnum */
396 H_SPR_MSR1
, /* msr1_regnum */
397 H_SPR_GNER0
, /* gner0_regnum */
398 H_SPR_GNER1
, /* gner1_regnum */
399 H_SPR_FNER0
, /* fner0_regnum */
400 H_SPR_FNER1
, /* fner1_regnum */
403 gdb_assert (reg
>= 0 && reg
< NUM_REGS
);
405 if (first_gpr_regnum
<= reg
&& reg
<= last_gpr_regnum
)
406 return reg
- first_gpr_regnum
+ SIM_FRV_GR0_REGNUM
;
407 else if (first_fpr_regnum
<= reg
&& reg
<= last_fpr_regnum
)
408 return reg
- first_fpr_regnum
+ SIM_FRV_FR0_REGNUM
;
409 else if (pc_regnum
== reg
)
410 return SIM_FRV_PC_REGNUM
;
411 else if (reg
>= first_spr_regnum
412 && reg
< first_spr_regnum
+ sizeof (spr_map
) / sizeof (spr_map
[0]))
414 int spr_reg_offset
= spr_map
[reg
- first_spr_regnum
];
416 if (spr_reg_offset
< 0)
417 return SIM_REGNO_DOES_NOT_EXIST
;
419 return SIM_FRV_SPR0_REGNUM
+ spr_reg_offset
;
422 internal_error (__FILE__
, __LINE__
, "Bad register number %d", reg
);
425 static const unsigned char *
426 frv_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenp
)
428 static unsigned char breakpoint
[] = {0xc0, 0x70, 0x00, 0x01};
429 *lenp
= sizeof (breakpoint
);
433 /* Define the maximum number of instructions which may be packed into a
434 bundle (VLIW instruction). */
435 static const int max_instrs_per_bundle
= 8;
437 /* Define the size (in bytes) of an FR-V instruction. */
438 static const int frv_instr_size
= 4;
440 /* Adjust a breakpoint's address to account for the FR-V architecture's
441 constraint that a break instruction must not appear as any but the
442 first instruction in the bundle. */
444 frv_gdbarch_adjust_breakpoint_address (struct gdbarch
*gdbarch
, CORE_ADDR bpaddr
)
446 int count
= max_instrs_per_bundle
;
447 CORE_ADDR addr
= bpaddr
- frv_instr_size
;
448 CORE_ADDR func_start
= get_pc_function_start (bpaddr
);
450 /* Find the end of the previous packing sequence. This will be indicated
451 by either attempting to access some inaccessible memory or by finding
452 an instruction word whose packing bit is set to one. */
453 while (count
-- > 0 && addr
>= func_start
)
455 char instr
[frv_instr_size
];
458 status
= read_memory_nobpt (addr
, instr
, sizeof instr
);
463 /* This is a big endian architecture, so byte zero will have most
464 significant byte. The most significant bit of this byte is the
469 addr
-= frv_instr_size
;
473 bpaddr
= addr
+ frv_instr_size
;
479 /* Return true if REG is a caller-saves ("scratch") register,
482 is_caller_saves_reg (int reg
)
484 return ((4 <= reg
&& reg
<= 7)
485 || (14 <= reg
&& reg
<= 15)
486 || (32 <= reg
&& reg
<= 47));
490 /* Return true if REG is a callee-saves register, false otherwise. */
492 is_callee_saves_reg (int reg
)
494 return ((16 <= reg
&& reg
<= 31)
495 || (48 <= reg
&& reg
<= 63));
499 /* Return true if REG is an argument register, false otherwise. */
501 is_argument_reg (int reg
)
503 return (8 <= reg
&& reg
<= 13);
506 /* Scan an FR-V prologue, starting at PC, until frame->PC.
507 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
508 We assume FRAME's saved_regs array has already been allocated and cleared.
509 Return the first PC value after the prologue.
511 Note that, for unoptimized code, we almost don't need this function
512 at all; all arguments and locals live on the stack, so we just need
513 the FP to find everything. The catch: structures passed by value
514 have their addresses living in registers; they're never spilled to
515 the stack. So if you ever want to be able to get to these
516 arguments in any frame but the top, you'll need to do this serious
517 prologue analysis. */
519 frv_analyze_prologue (CORE_ADDR pc
, struct frame_info
*next_frame
,
520 struct frv_unwind_cache
*info
)
522 /* When writing out instruction bitpatterns, we use the following
523 letters to label instruction fields:
524 P - The parallel bit. We don't use this.
525 J - The register number of GRj in the instruction description.
526 K - The register number of GRk in the instruction description.
527 I - The register number of GRi.
528 S - a signed imediate offset.
529 U - an unsigned immediate offset.
531 The dots below the numbers indicate where hex digit boundaries
532 fall, to make it easier to check the numbers. */
534 /* Non-zero iff we've seen the instruction that initializes the
535 frame pointer for this function's frame. */
538 /* If fp_set is non_zero, then this is the distance from
539 the stack pointer to frame pointer: fp = sp + fp_offset. */
542 /* Total size of frame prior to any alloca operations. */
545 /* Flag indicating if lr has been saved on the stack. */
546 int lr_saved_on_stack
= 0;
548 /* The number of the general-purpose register we saved the return
549 address ("link register") in, or -1 if we haven't moved it yet. */
550 int lr_save_reg
= -1;
552 /* Offset (from sp) at which lr has been saved on the stack. */
554 int lr_sp_offset
= 0;
556 /* If gr_saved[i] is non-zero, then we've noticed that general
557 register i has been saved at gr_sp_offset[i] from the stack
560 int gr_sp_offset
[64];
562 /* The address of the most recently scanned prologue instruction. */
563 CORE_ADDR last_prologue_pc
;
565 /* The address of the next instruction. */
568 /* The upper bound to of the pc values to scan. */
571 memset (gr_saved
, 0, sizeof (gr_saved
));
573 last_prologue_pc
= pc
;
575 /* Try to compute an upper limit (on how far to scan) based on the
577 lim_pc
= skip_prologue_using_sal (pc
);
578 /* If there's no line number info, lim_pc will be 0. In that case,
579 set the limit to be 100 instructions away from pc. Hopefully, this
580 will be far enough away to account for the entire prologue. Don't
581 worry about overshooting the end of the function. The scan loop
582 below contains some checks to avoid scanning unreasonably far. */
586 /* If we have a frame, we don't want to scan past the frame's pc. This
587 will catch those cases where the pc is in the prologue. */
590 CORE_ADDR frame_pc
= frame_pc_unwind (next_frame
);
591 if (frame_pc
< lim_pc
)
595 /* Scan the prologue. */
598 char buf
[frv_instr_size
];
601 if (target_read_memory (pc
, buf
, sizeof buf
) != 0)
603 op
= extract_signed_integer (buf
, sizeof buf
);
607 /* The tests in this chain of ifs should be in order of
608 decreasing selectivity, so that more particular patterns get
609 to fire before less particular patterns. */
611 /* Some sort of control transfer instruction: stop scanning prologue.
612 Integer Conditional Branch:
613 X XXXX XX 0000110 XX XXXXXXXXXXXXXXXX
614 Floating-point / media Conditional Branch:
615 X XXXX XX 0000111 XX XXXXXXXXXXXXXXXX
616 LCR Conditional Branch to LR
617 X XXXX XX 0001110 XX XX 001 X XXXXXXXXXX
618 Integer conditional Branches to LR
619 X XXXX XX 0001110 XX XX 010 X XXXXXXXXXX
620 X XXXX XX 0001110 XX XX 011 X XXXXXXXXXX
621 Floating-point/Media Branches to LR
622 X XXXX XX 0001110 XX XX 110 X XXXXXXXXXX
623 X XXXX XX 0001110 XX XX 111 X XXXXXXXXXX
625 X XXXXX X 0001100 XXXXXX XXXXXX XXXXXX
626 X XXXXX X 0001101 XXXXXX XXXXXX XXXXXX
628 X XXXXXX 0001111 XXXXXXXXXXXXXXXXXX
630 X XXXXX X 0000101 XXXXXX XXXXXX XXXXXX
631 Integer Conditional Trap
632 X XXXX XX 0000100 XXXXXX XXXX 00 XXXXXX
633 X XXXX XX 0011100 XXXXXX XXXXXXXXXXXX
634 Floating-point /media Conditional Trap
635 X XXXX XX 0000100 XXXXXX XXXX 01 XXXXXX
636 X XXXX XX 0011101 XXXXXX XXXXXXXXXXXX
638 X XXXX XX 0000100 XXXXXX XXXX 11 XXXXXX
640 X XXXX XX 0000100 XXXXXX XXXX 10 XXXXXX */
641 if ((op
& 0x01d80000) == 0x00180000 /* Conditional branches and Call */
642 || (op
& 0x01f80000) == 0x00300000 /* Jump and Link */
643 || (op
& 0x01f80000) == 0x00100000 /* Return from Trap, Trap */
644 || (op
& 0x01f80000) == 0x00700000) /* Trap immediate */
646 /* Stop scanning; not in prologue any longer. */
650 /* Loading something from memory into fp probably means that
651 we're in the epilogue. Stop scanning the prologue.
653 X 000010 0000010 XXXXXX 000100 XXXXXX
655 X 000010 0110010 XXXXXX XXXXXXXXXXXX */
656 else if ((op
& 0x7ffc0fc0) == 0x04080100
657 || (op
& 0x7ffc0000) == 0x04c80000)
662 /* Setting the FP from the SP:
664 P 000010 0100010 000001 000000000000 = 0x04881000
665 0 111111 1111111 111111 111111111111 = 0x7fffffff
667 We treat this as part of the prologue. */
668 else if ((op
& 0x7fffffff) == 0x04881000)
672 last_prologue_pc
= next_pc
;
675 /* Move the link register to the scratch register grJ, before saving:
677 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
678 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
680 We treat this as part of the prologue. */
681 else if ((op
& 0x7fffffc0) == 0x080d01c0)
683 int gr_j
= op
& 0x3f;
685 /* If we're moving it to a scratch register, that's fine. */
686 if (is_caller_saves_reg (gr_j
))
689 last_prologue_pc
= next_pc
;
693 /* To save multiple callee-saves registers on the stack, at
697 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
698 0 000000 1111111 111111 111111 111111 = 0x01ffffff
701 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
702 0 000000 1111111 111111 111111 111111 = 0x01ffffff
704 We treat this as part of the prologue, and record the register's
705 saved address in the frame structure. */
706 else if ((op
& 0x01ffffff) == 0x000c10c0
707 || (op
& 0x01ffffff) == 0x000c1100)
709 int gr_k
= ((op
>> 25) & 0x3f);
710 int ope
= ((op
>> 6) & 0x3f);
714 /* Is it an std or an stq? */
720 /* Is it really a callee-saves register? */
721 if (is_callee_saves_reg (gr_k
))
723 for (i
= 0; i
< count
; i
++)
725 gr_saved
[gr_k
+ i
] = 1;
726 gr_sp_offset
[gr_k
+ i
] = 4 * i
;
728 last_prologue_pc
= next_pc
;
732 /* Adjusting the stack pointer. (The stack pointer is GR1.)
734 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
735 0 111111 1111111 111111 000000000000 = 0x7ffff000
737 We treat this as part of the prologue. */
738 else if ((op
& 0x7ffff000) == 0x02401000)
742 /* Sign-extend the twelve-bit field.
743 (Isn't there a better way to do this?) */
744 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
747 last_prologue_pc
= pc
;
751 /* If the prologue is being adjusted again, we've
752 likely gone too far; i.e. we're probably in the
758 /* Setting the FP to a constant distance from the SP:
760 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
761 0 111111 1111111 111111 000000000000 = 0x7ffff000
763 We treat this as part of the prologue. */
764 else if ((op
& 0x7ffff000) == 0x04401000)
766 /* Sign-extend the twelve-bit field.
767 (Isn't there a better way to do this?) */
768 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
771 last_prologue_pc
= pc
;
774 /* To spill an argument register to a scratch register:
776 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
777 0 000000 1111111 000000 111111111111 = 0x01fc0fff
779 For the time being, we treat this as a prologue instruction,
780 assuming that GRi is an argument register. This one's kind
781 of suspicious, because it seems like it could be part of a
782 legitimate body instruction. But we only come here when the
783 source info wasn't helpful, so we have to do the best we can.
784 Hopefully once GCC and GDB agree on how to emit line number
785 info for prologues, then this code will never come into play. */
786 else if ((op
& 0x01fc0fff) == 0x00880000)
788 int gr_i
= ((op
>> 12) & 0x3f);
790 /* Make sure that the source is an arg register; if it is, we'll
791 treat it as a prologue instruction. */
792 if (is_argument_reg (gr_i
))
793 last_prologue_pc
= next_pc
;
796 /* To spill 16-bit values to the stack:
798 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
799 0 000000 1111111 111111 000000000000 = 0x01fff000
801 And for 8-bit values, we use STB instructions.
803 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
804 0 000000 1111111 111111 000000000000 = 0x01fff000
806 We check that GRk is really an argument register, and treat
807 all such as part of the prologue. */
808 else if ( (op
& 0x01fff000) == 0x01442000
809 || (op
& 0x01fff000) == 0x01402000)
811 int gr_k
= ((op
>> 25) & 0x3f);
813 /* Make sure that GRk is really an argument register; treat
814 it as a prologue instruction if so. */
815 if (is_argument_reg (gr_k
))
816 last_prologue_pc
= next_pc
;
819 /* To save multiple callee-saves register on the stack, at a
823 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
824 0 000000 1111111 111111 000000000000 = 0x01fff000
827 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
828 0 000000 1111111 111111 000000000000 = 0x01fff000
830 We treat this as part of the prologue, and record the register's
831 saved address in the frame structure. */
832 else if ((op
& 0x01fff000) == 0x014c1000
833 || (op
& 0x01fff000) == 0x01501000)
835 int gr_k
= ((op
>> 25) & 0x3f);
839 /* Is it a stdi or a stqi? */
840 if ((op
& 0x01fff000) == 0x014c1000)
845 /* Is it really a callee-saves register? */
846 if (is_callee_saves_reg (gr_k
))
848 /* Sign-extend the twelve-bit field.
849 (Isn't there a better way to do this?) */
850 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
852 for (i
= 0; i
< count
; i
++)
854 gr_saved
[gr_k
+ i
] = 1;
855 gr_sp_offset
[gr_k
+ i
] = s
+ (4 * i
);
857 last_prologue_pc
= next_pc
;
861 /* Storing any kind of integer register at any constant offset
862 from any other register.
865 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
866 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
869 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
870 0 000000 1111111 000000 000000000000 = 0x01fc0000
872 These could be almost anything, but a lot of prologue
873 instructions fall into this pattern, so let's decode the
874 instruction once, and then work at a higher level. */
875 else if (((op
& 0x01fc0fff) == 0x000c0080)
876 || ((op
& 0x01fc0000) == 0x01480000))
878 int gr_k
= ((op
>> 25) & 0x3f);
879 int gr_i
= ((op
>> 12) & 0x3f);
882 /* Are we storing with gr0 as an offset, or using an
884 if ((op
& 0x01fc0fff) == 0x000c0080)
887 offset
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
889 /* If the address isn't relative to the SP or FP, it's not a
890 prologue instruction. */
891 if (gr_i
!= sp_regnum
&& gr_i
!= fp_regnum
)
893 /* Do nothing; not a prologue instruction. */
896 /* Saving the old FP in the new frame (relative to the SP). */
897 else if (gr_k
== fp_regnum
&& gr_i
== sp_regnum
)
899 gr_saved
[fp_regnum
] = 1;
900 gr_sp_offset
[fp_regnum
] = offset
;
901 last_prologue_pc
= next_pc
;
904 /* Saving callee-saves register(s) on the stack, relative to
906 else if (gr_i
== sp_regnum
907 && is_callee_saves_reg (gr_k
))
910 if (gr_i
== sp_regnum
)
911 gr_sp_offset
[gr_k
] = offset
;
913 gr_sp_offset
[gr_k
] = offset
+ fp_offset
;
914 last_prologue_pc
= next_pc
;
917 /* Saving the scratch register holding the return address. */
918 else if (lr_save_reg
!= -1
919 && gr_k
== lr_save_reg
)
921 lr_saved_on_stack
= 1;
922 if (gr_i
== sp_regnum
)
923 lr_sp_offset
= offset
;
925 lr_sp_offset
= offset
+ fp_offset
;
926 last_prologue_pc
= next_pc
;
929 /* Spilling int-sized arguments to the stack. */
930 else if (is_argument_reg (gr_k
))
931 last_prologue_pc
= next_pc
;
936 if (next_frame
&& info
)
941 /* If we know the relationship between the stack and frame
942 pointers, record the addresses of the registers we noticed.
943 Note that we have to do this as a separate step at the end,
944 because instructions may save relative to the SP, but we need
945 their addresses relative to the FP. */
947 frame_unwind_unsigned_register (next_frame
, fp_regnum
, &this_base
);
949 frame_unwind_unsigned_register (next_frame
, sp_regnum
, &this_base
);
951 for (i
= 0; i
< 64; i
++)
953 info
->saved_regs
[i
].addr
= this_base
- fp_offset
+ gr_sp_offset
[i
];
955 info
->prev_sp
= this_base
- fp_offset
+ framesize
;
956 info
->base
= this_base
;
958 /* If LR was saved on the stack, record its location. */
959 if (lr_saved_on_stack
)
960 info
->saved_regs
[lr_regnum
].addr
= this_base
- fp_offset
+ lr_sp_offset
;
962 /* The call instruction moves the caller's PC in the callee's LR.
963 Since this is an unwind, do the reverse. Copy the location of LR
964 into PC (the address / regnum) so that a request for PC will be
965 converted into a request for the LR. */
966 info
->saved_regs
[pc_regnum
] = info
->saved_regs
[lr_regnum
];
968 /* Save the previous frame's computed SP value. */
969 trad_frame_set_value (info
->saved_regs
, sp_regnum
, info
->prev_sp
);
972 return last_prologue_pc
;
977 frv_skip_prologue (CORE_ADDR pc
)
979 CORE_ADDR func_addr
, func_end
, new_pc
;
983 /* If the line table has entry for a line *within* the function
984 (i.e., not in the prologue, and not past the end), then that's
986 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
988 struct symtab_and_line sal
;
990 sal
= find_pc_line (func_addr
, 0);
992 if (sal
.line
!= 0 && sal
.end
< func_end
)
998 /* The FR-V prologue is at least five instructions long (twenty bytes).
999 If we didn't find a real source location past that, then
1000 do a full analysis of the prologue. */
1001 if (new_pc
< pc
+ 20)
1002 new_pc
= frv_analyze_prologue (pc
, 0, 0);
1008 static struct frv_unwind_cache
*
1009 frv_frame_unwind_cache (struct frame_info
*next_frame
,
1010 void **this_prologue_cache
)
1012 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
1015 struct frv_unwind_cache
*info
;
1017 if ((*this_prologue_cache
))
1018 return (*this_prologue_cache
);
1020 info
= FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache
);
1021 (*this_prologue_cache
) = info
;
1022 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
1024 /* Prologue analysis does the rest... */
1025 frv_analyze_prologue (frame_func_unwind (next_frame
), next_frame
, info
);
1031 frv_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1034 int len
= TYPE_LENGTH (type
);
1039 regcache_cooked_read_unsigned (regcache
, 8, &gpr8_val
);
1040 store_unsigned_integer (valbuf
, len
, gpr8_val
);
1045 regcache_cooked_read_unsigned (regcache
, 8, ®val
);
1046 store_unsigned_integer (valbuf
, 4, regval
);
1047 regcache_cooked_read_unsigned (regcache
, 9, ®val
);
1048 store_unsigned_integer ((bfd_byte
*) valbuf
+ 4, 4, regval
);
1051 internal_error (__FILE__
, __LINE__
, "Illegal return value length: %d", len
);
1055 frv_extract_struct_value_address (struct regcache
*regcache
)
1058 regcache_cooked_read_unsigned (regcache
, struct_return_regnum
, &addr
);
1063 frv_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1065 write_register (struct_return_regnum
, addr
);
1069 frv_frameless_function_invocation (struct frame_info
*frame
)
1071 return legacy_frameless_look_for_prologue (frame
);
1075 frv_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1077 /* Require dword alignment. */
1078 return align_down (sp
, 8);
1082 find_func_descr (struct gdbarch
*gdbarch
, CORE_ADDR entry_point
)
1087 descr
= frv_fdpic_find_canonical_descriptor (entry_point
);
1092 /* Construct a non-canonical descriptor from space allocated on
1095 descr
= value_as_long (value_allocate_space_in_inferior (8));
1096 store_unsigned_integer (valbuf
, 4, entry_point
);
1097 write_memory (descr
, valbuf
, 4);
1098 store_unsigned_integer (valbuf
, 4,
1099 frv_fdpic_find_global_pointer (entry_point
));
1100 write_memory (descr
+ 4, valbuf
, 4);
1105 frv_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
1106 struct target_ops
*targ
)
1108 CORE_ADDR entry_point
;
1109 CORE_ADDR got_address
;
1111 entry_point
= get_target_memory_unsigned (targ
, addr
, 4);
1112 got_address
= get_target_memory_unsigned (targ
, addr
+ 4, 4);
1114 if (got_address
== frv_fdpic_find_global_pointer (entry_point
))
1121 frv_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1122 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1123 int nargs
, struct value
**args
, CORE_ADDR sp
,
1124 int struct_return
, CORE_ADDR struct_addr
)
1131 struct type
*arg_type
;
1133 enum type_code typecode
;
1137 enum frv_abi abi
= frv_abi (gdbarch
);
1140 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
1141 nargs
, (int) sp
, struct_return
, struct_addr
);
1145 for (argnum
= 0; argnum
< nargs
; ++argnum
)
1146 stack_space
+= align_up (TYPE_LENGTH (VALUE_TYPE (args
[argnum
])), 4);
1148 stack_space
-= (6 * 4);
1149 if (stack_space
> 0)
1152 /* Make sure stack is dword aligned. */
1153 sp
= align_down (sp
, 8);
1160 regcache_cooked_write_unsigned (regcache
, struct_return_regnum
,
1163 for (argnum
= 0; argnum
< nargs
; ++argnum
)
1166 arg_type
= check_typedef (VALUE_TYPE (arg
));
1167 len
= TYPE_LENGTH (arg_type
);
1168 typecode
= TYPE_CODE (arg_type
);
1170 if (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
)
1172 store_unsigned_integer (valbuf
, 4, VALUE_ADDRESS (arg
));
1173 typecode
= TYPE_CODE_PTR
;
1177 else if (abi
== FRV_ABI_FDPIC
1179 && typecode
== TYPE_CODE_PTR
1180 && TYPE_CODE (TYPE_TARGET_TYPE (arg_type
)) == TYPE_CODE_FUNC
)
1182 /* The FDPIC ABI requires function descriptors to be passed instead
1184 store_unsigned_integer
1186 find_func_descr (gdbarch
,
1187 extract_unsigned_integer (VALUE_CONTENTS (arg
),
1189 typecode
= TYPE_CODE_PTR
;
1195 val
= (char *) VALUE_CONTENTS (arg
);
1200 int partial_len
= (len
< 4 ? len
: 4);
1204 regval
= extract_unsigned_integer (val
, partial_len
);
1206 printf(" Argnum %d data %x -> reg %d\n",
1207 argnum
, (int) regval
, argreg
);
1209 regcache_cooked_write_unsigned (regcache
, argreg
, regval
);
1215 printf(" Argnum %d data %x -> offset %d (%x)\n",
1216 argnum
, *((int *)val
), stack_offset
, (int) (sp
+ stack_offset
));
1218 write_memory (sp
+ stack_offset
, val
, partial_len
);
1219 stack_offset
+= align_up (partial_len
, 4);
1226 /* Set the return address. For the frv, the return breakpoint is
1227 always at BP_ADDR. */
1228 regcache_cooked_write_unsigned (regcache
, lr_regnum
, bp_addr
);
1230 if (abi
== FRV_ABI_FDPIC
)
1232 /* Set the GOT register for the FDPIC ABI. */
1233 regcache_cooked_write_unsigned
1234 (regcache
, first_gpr_regnum
+ 15,
1235 frv_fdpic_find_global_pointer (func_addr
));
1238 /* Finally, update the SP register. */
1239 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
1245 frv_store_return_value (struct type
*type
, struct regcache
*regcache
,
1248 int len
= TYPE_LENGTH (type
);
1253 memset (val
, 0, sizeof (val
));
1254 memcpy (val
+ (4 - len
), valbuf
, len
);
1255 regcache_cooked_write (regcache
, 8, val
);
1259 regcache_cooked_write (regcache
, 8, valbuf
);
1260 regcache_cooked_write (regcache
, 9, (bfd_byte
*) valbuf
+ 4);
1263 internal_error (__FILE__
, __LINE__
,
1264 "Don't know how to return a %d-byte value.", len
);
1268 /* Hardware watchpoint / breakpoint support for the FR500
1272 frv_check_watch_resources (int type
, int cnt
, int ot
)
1274 struct gdbarch_tdep
*var
= CURRENT_VARIANT
;
1276 /* Watchpoints not supported on simulator. */
1277 if (strcmp (target_shortname
, "sim") == 0)
1280 if (type
== bp_hardware_breakpoint
)
1282 if (var
->num_hw_breakpoints
== 0)
1284 else if (cnt
<= var
->num_hw_breakpoints
)
1289 if (var
->num_hw_watchpoints
== 0)
1293 else if (cnt
<= var
->num_hw_watchpoints
)
1301 frv_stopped_data_address (void)
1303 CORE_ADDR brr
, dbar0
, dbar1
, dbar2
, dbar3
;
1305 brr
= read_register (brr_regnum
);
1306 dbar0
= read_register (dbar0_regnum
);
1307 dbar1
= read_register (dbar1_regnum
);
1308 dbar2
= read_register (dbar2_regnum
);
1309 dbar3
= read_register (dbar3_regnum
);
1313 else if (brr
& (1<<10))
1315 else if (brr
& (1<<9))
1317 else if (brr
& (1<<8))
1324 frv_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1326 return frame_unwind_register_unsigned (next_frame
, pc_regnum
);
1329 /* Given a GDB frame, determine the address of the calling function's
1330 frame. This will be used to create a new GDB frame struct. */
1333 frv_frame_this_id (struct frame_info
*next_frame
,
1334 void **this_prologue_cache
, struct frame_id
*this_id
)
1336 struct frv_unwind_cache
*info
1337 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
1340 struct minimal_symbol
*msym_stack
;
1343 /* The FUNC is easy. */
1344 func
= frame_func_unwind (next_frame
);
1346 /* Check if the stack is empty. */
1347 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
1348 if (msym_stack
&& info
->base
== SYMBOL_VALUE_ADDRESS (msym_stack
))
1351 /* Hopefully the prologue analysis either correctly determined the
1352 frame's base (which is the SP from the previous frame), or set
1353 that base to "NULL". */
1354 base
= info
->prev_sp
;
1358 id
= frame_id_build (base
, func
);
1363 frv_frame_prev_register (struct frame_info
*next_frame
,
1364 void **this_prologue_cache
,
1365 int regnum
, int *optimizedp
,
1366 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1367 int *realnump
, void *bufferp
)
1369 struct frv_unwind_cache
*info
1370 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
1371 trad_frame_prev_register (next_frame
, info
->saved_regs
, regnum
,
1372 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
1375 static const struct frame_unwind frv_frame_unwind
= {
1378 frv_frame_prev_register
1381 static const struct frame_unwind
*
1382 frv_frame_sniffer (struct frame_info
*next_frame
)
1384 return &frv_frame_unwind
;
1388 frv_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1390 struct frv_unwind_cache
*info
1391 = frv_frame_unwind_cache (next_frame
, this_cache
);
1395 static const struct frame_base frv_frame_base
= {
1397 frv_frame_base_address
,
1398 frv_frame_base_address
,
1399 frv_frame_base_address
1403 frv_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1405 return frame_unwind_register_unsigned (next_frame
, sp_regnum
);
1409 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1410 dummy frame. The frame ID's base needs to match the TOS value
1411 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1414 static struct frame_id
1415 frv_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1417 return frame_id_build (frv_unwind_sp (gdbarch
, next_frame
),
1418 frame_pc_unwind (next_frame
));
1421 static struct gdbarch
*
1422 frv_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1424 struct gdbarch
*gdbarch
;
1425 struct gdbarch_tdep
*var
;
1428 /* Check to see if we've already built an appropriate architecture
1429 object for this executable. */
1430 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1432 return arches
->gdbarch
;
1434 /* Select the right tdep structure for this variant. */
1435 var
= new_variant ();
1436 switch (info
.bfd_arch_info
->mach
)
1439 case bfd_mach_frvsimple
:
1440 case bfd_mach_fr500
:
1441 case bfd_mach_frvtomcat
:
1442 case bfd_mach_fr550
:
1443 set_variant_num_gprs (var
, 64);
1444 set_variant_num_fprs (var
, 64);
1447 case bfd_mach_fr400
:
1448 case bfd_mach_fr450
:
1449 set_variant_num_gprs (var
, 32);
1450 set_variant_num_fprs (var
, 32);
1454 /* Never heard of this variant. */
1458 /* Extract the ELF flags, if available. */
1459 if (info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
1460 elf_flags
= elf_elfheader (info
.abfd
)->e_flags
;
1462 if (elf_flags
& EF_FRV_FDPIC
)
1463 set_variant_abi_fdpic (var
);
1465 if (elf_flags
& EF_FRV_CPU_FR450
)
1466 set_variant_scratch_registers (var
);
1468 gdbarch
= gdbarch_alloc (&info
, var
);
1470 set_gdbarch_short_bit (gdbarch
, 16);
1471 set_gdbarch_int_bit (gdbarch
, 32);
1472 set_gdbarch_long_bit (gdbarch
, 32);
1473 set_gdbarch_long_long_bit (gdbarch
, 64);
1474 set_gdbarch_float_bit (gdbarch
, 32);
1475 set_gdbarch_double_bit (gdbarch
, 64);
1476 set_gdbarch_long_double_bit (gdbarch
, 64);
1477 set_gdbarch_ptr_bit (gdbarch
, 32);
1479 set_gdbarch_num_regs (gdbarch
, frv_num_regs
);
1480 set_gdbarch_num_pseudo_regs (gdbarch
, frv_num_pseudo_regs
);
1482 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
1483 set_gdbarch_deprecated_fp_regnum (gdbarch
, fp_regnum
);
1484 set_gdbarch_pc_regnum (gdbarch
, pc_regnum
);
1486 set_gdbarch_register_name (gdbarch
, frv_register_name
);
1487 set_gdbarch_register_type (gdbarch
, frv_register_type
);
1488 set_gdbarch_register_sim_regno (gdbarch
, frv_register_sim_regno
);
1490 set_gdbarch_pseudo_register_read (gdbarch
, frv_pseudo_register_read
);
1491 set_gdbarch_pseudo_register_write (gdbarch
, frv_pseudo_register_write
);
1493 set_gdbarch_skip_prologue (gdbarch
, frv_skip_prologue
);
1494 set_gdbarch_breakpoint_from_pc (gdbarch
, frv_breakpoint_from_pc
);
1495 set_gdbarch_adjust_breakpoint_address (gdbarch
, frv_gdbarch_adjust_breakpoint_address
);
1497 set_gdbarch_deprecated_frameless_function_invocation (gdbarch
, frv_frameless_function_invocation
);
1499 set_gdbarch_use_struct_convention (gdbarch
, always_use_struct_convention
);
1500 set_gdbarch_extract_return_value (gdbarch
, frv_extract_return_value
);
1502 set_gdbarch_deprecated_store_struct_return (gdbarch
, frv_store_struct_return
);
1503 set_gdbarch_store_return_value (gdbarch
, frv_store_return_value
);
1504 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, frv_extract_struct_value_address
);
1507 set_gdbarch_unwind_pc (gdbarch
, frv_unwind_pc
);
1508 set_gdbarch_unwind_sp (gdbarch
, frv_unwind_sp
);
1509 set_gdbarch_frame_align (gdbarch
, frv_frame_align
);
1510 frame_base_set_default (gdbarch
, &frv_frame_base
);
1511 /* We set the sniffer lower down after the OSABI hooks have been
1514 /* Settings for calling functions in the inferior. */
1515 set_gdbarch_push_dummy_call (gdbarch
, frv_push_dummy_call
);
1516 set_gdbarch_unwind_dummy_id (gdbarch
, frv_unwind_dummy_id
);
1518 /* Settings that should be unnecessary. */
1519 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1521 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
1523 set_gdbarch_remote_translate_xfer_address
1524 (gdbarch
, generic_remote_translate_xfer_address
);
1526 /* Hardware watchpoint / breakpoint support. */
1527 switch (info
.bfd_arch_info
->mach
)
1530 case bfd_mach_frvsimple
:
1531 case bfd_mach_fr500
:
1532 case bfd_mach_frvtomcat
:
1533 /* fr500-style hardware debugging support. */
1534 var
->num_hw_watchpoints
= 4;
1535 var
->num_hw_breakpoints
= 4;
1538 case bfd_mach_fr400
:
1539 case bfd_mach_fr450
:
1540 /* fr400-style hardware debugging support. */
1541 var
->num_hw_watchpoints
= 2;
1542 var
->num_hw_breakpoints
= 4;
1546 /* Otherwise, assume we don't have hardware debugging support. */
1547 var
->num_hw_watchpoints
= 0;
1548 var
->num_hw_breakpoints
= 0;
1552 set_gdbarch_print_insn (gdbarch
, print_insn_frv
);
1553 if (frv_abi (gdbarch
) == FRV_ABI_FDPIC
)
1554 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
1555 frv_convert_from_func_ptr_addr
);
1557 /* Hook in ABI-specific overrides, if they have been registered. */
1558 gdbarch_init_osabi (info
, gdbarch
);
1560 /* Set the fallback (prologue based) frame sniffer. */
1561 frame_unwind_append_sniffer (gdbarch
, frv_frame_sniffer
);
1567 _initialize_frv_tdep (void)
1569 register_gdbarch_init (bfd_arch_frv
, frv_gdbarch_init
);