1 /* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
3 Copyright (C) 2002, 2003, 2004, 2005, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "gdb_string.h"
25 #include "arch-utils.h"
28 #include "frame-unwind.h"
29 #include "frame-base.h"
30 #include "trad-frame.h"
32 #include "gdb_assert.h"
33 #include "sim-regno.h"
34 #include "gdb/sim-frv.h"
35 #include "opcodes/frv-desc.h" /* for the H_SPR_... enums */
44 extern void _initialize_frv_tdep (void);
46 struct frv_unwind_cache
/* was struct frame_extra_info */
48 /* The previous frame's inner-most stack address. Used as this
49 frame ID's stack_addr. */
52 /* The frame's base, optionally used by the high-level debug info. */
55 /* Table indicating the location of each and every register. */
56 struct trad_frame_saved_reg
*saved_regs
;
59 /* A structure describing a particular variant of the FRV.
60 We allocate and initialize one of these structures when we create
61 the gdbarch object for a variant.
63 At the moment, all the FR variants we support differ only in which
64 registers are present; the portable code of GDB knows that
65 registers whose names are the empty string don't exist, so the
66 `register_names' array captures all the per-variant information we
69 in the future, if we need to have per-variant maps for raw size,
70 virtual type, etc., we should replace register_names with an array
71 of structures, each of which gives all the necessary info for one
72 register. Don't stick parallel arrays in here --- that's so
76 /* Which ABI is in use? */
79 /* How many general-purpose registers does this variant have? */
82 /* How many floating-point registers does this variant have? */
85 /* How many hardware watchpoints can it support? */
86 int num_hw_watchpoints
;
88 /* How many hardware breakpoints can it support? */
89 int num_hw_breakpoints
;
92 char **register_names
;
95 /* Return the FR-V ABI associated with GDBARCH. */
97 frv_abi (struct gdbarch
*gdbarch
)
99 return gdbarch_tdep (gdbarch
)->frv_abi
;
102 /* Fetch the interpreter and executable loadmap addresses (for shared
103 library support) for the FDPIC ABI. Return 0 if successful, -1 if
104 not. (E.g, -1 will be returned if the ABI isn't the FDPIC ABI.) */
106 frv_fdpic_loadmap_addresses (struct gdbarch
*gdbarch
, CORE_ADDR
*interp_addr
,
107 CORE_ADDR
*exec_addr
)
109 if (frv_abi (gdbarch
) != FRV_ABI_FDPIC
)
113 struct regcache
*regcache
= get_current_regcache ();
115 if (interp_addr
!= NULL
)
118 regcache_cooked_read_unsigned (regcache
,
119 fdpic_loadmap_interp_regnum
, &val
);
122 if (exec_addr
!= NULL
)
125 regcache_cooked_read_unsigned (regcache
,
126 fdpic_loadmap_exec_regnum
, &val
);
133 /* Allocate a new variant structure, and set up default values for all
135 static struct gdbarch_tdep
*
138 struct gdbarch_tdep
*var
;
142 var
= xmalloc (sizeof (*var
));
143 memset (var
, 0, sizeof (*var
));
145 var
->frv_abi
= FRV_ABI_EABI
;
148 var
->num_hw_watchpoints
= 0;
149 var
->num_hw_breakpoints
= 0;
151 /* By default, don't supply any general-purpose or floating-point
154 = (char **) xmalloc ((frv_num_regs
+ frv_num_pseudo_regs
)
156 for (r
= 0; r
< frv_num_regs
+ frv_num_pseudo_regs
; r
++)
157 var
->register_names
[r
] = "";
159 /* Do, however, supply default names for the known special-purpose
162 var
->register_names
[pc_regnum
] = "pc";
163 var
->register_names
[lr_regnum
] = "lr";
164 var
->register_names
[lcr_regnum
] = "lcr";
166 var
->register_names
[psr_regnum
] = "psr";
167 var
->register_names
[ccr_regnum
] = "ccr";
168 var
->register_names
[cccr_regnum
] = "cccr";
169 var
->register_names
[tbr_regnum
] = "tbr";
171 /* Debug registers. */
172 var
->register_names
[brr_regnum
] = "brr";
173 var
->register_names
[dbar0_regnum
] = "dbar0";
174 var
->register_names
[dbar1_regnum
] = "dbar1";
175 var
->register_names
[dbar2_regnum
] = "dbar2";
176 var
->register_names
[dbar3_regnum
] = "dbar3";
178 /* iacc0 (Only found on MB93405.) */
179 var
->register_names
[iacc0h_regnum
] = "iacc0h";
180 var
->register_names
[iacc0l_regnum
] = "iacc0l";
181 var
->register_names
[iacc0_regnum
] = "iacc0";
183 /* fsr0 (Found on FR555 and FR501.) */
184 var
->register_names
[fsr0_regnum
] = "fsr0";
186 /* acc0 - acc7. The architecture provides for the possibility of many
187 more (up to 64 total), but we don't want to make that big of a hole
188 in the G packet. If we need more in the future, we'll add them
190 for (r
= acc0_regnum
; r
<= acc7_regnum
; r
++)
193 buf
= xstrprintf ("acc%d", r
- acc0_regnum
);
194 var
->register_names
[r
] = buf
;
197 /* accg0 - accg7: These are one byte registers. The remote protocol
198 provides the raw values packed four into a slot. accg0123 and
199 accg4567 correspond to accg0 - accg3 and accg4-accg7 respectively.
200 We don't provide names for accg0123 and accg4567 since the user will
201 likely not want to see these raw values. */
203 for (r
= accg0_regnum
; r
<= accg7_regnum
; r
++)
206 buf
= xstrprintf ("accg%d", r
- accg0_regnum
);
207 var
->register_names
[r
] = buf
;
212 var
->register_names
[msr0_regnum
] = "msr0";
213 var
->register_names
[msr1_regnum
] = "msr1";
215 /* gner and fner registers. */
216 var
->register_names
[gner0_regnum
] = "gner0";
217 var
->register_names
[gner1_regnum
] = "gner1";
218 var
->register_names
[fner0_regnum
] = "fner0";
219 var
->register_names
[fner1_regnum
] = "fner1";
225 /* Indicate that the variant VAR has NUM_GPRS general-purpose
226 registers, and fill in the names array appropriately. */
228 set_variant_num_gprs (struct gdbarch_tdep
*var
, int num_gprs
)
232 var
->num_gprs
= num_gprs
;
234 for (r
= 0; r
< num_gprs
; ++r
)
238 sprintf (buf
, "gr%d", r
);
239 var
->register_names
[first_gpr_regnum
+ r
] = xstrdup (buf
);
244 /* Indicate that the variant VAR has NUM_FPRS floating-point
245 registers, and fill in the names array appropriately. */
247 set_variant_num_fprs (struct gdbarch_tdep
*var
, int num_fprs
)
251 var
->num_fprs
= num_fprs
;
253 for (r
= 0; r
< num_fprs
; ++r
)
257 sprintf (buf
, "fr%d", r
);
258 var
->register_names
[first_fpr_regnum
+ r
] = xstrdup (buf
);
263 set_variant_abi_fdpic (struct gdbarch_tdep
*var
)
265 var
->frv_abi
= FRV_ABI_FDPIC
;
266 var
->register_names
[fdpic_loadmap_exec_regnum
] = xstrdup ("loadmap_exec");
267 var
->register_names
[fdpic_loadmap_interp_regnum
] = xstrdup ("loadmap_interp");
271 set_variant_scratch_registers (struct gdbarch_tdep
*var
)
273 var
->register_names
[scr0_regnum
] = xstrdup ("scr0");
274 var
->register_names
[scr1_regnum
] = xstrdup ("scr1");
275 var
->register_names
[scr2_regnum
] = xstrdup ("scr2");
276 var
->register_names
[scr3_regnum
] = xstrdup ("scr3");
280 frv_register_name (struct gdbarch
*gdbarch
, int reg
)
284 if (reg
>= frv_num_regs
+ frv_num_pseudo_regs
)
287 return gdbarch_tdep (gdbarch
)->register_names
[reg
];
292 frv_register_type (struct gdbarch
*gdbarch
, int reg
)
294 if (reg
>= first_fpr_regnum
&& reg
<= last_fpr_regnum
)
295 return builtin_type (gdbarch
)->builtin_float
;
296 else if (reg
== iacc0_regnum
)
297 return builtin_type_int64
;
299 return builtin_type_int32
;
303 frv_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
304 int reg
, gdb_byte
*buffer
)
306 if (reg
== iacc0_regnum
)
308 regcache_raw_read (regcache
, iacc0h_regnum
, buffer
);
309 regcache_raw_read (regcache
, iacc0l_regnum
, (bfd_byte
*) buffer
+ 4);
311 else if (accg0_regnum
<= reg
&& reg
<= accg7_regnum
)
313 /* The accg raw registers have four values in each slot with the
314 lowest register number occupying the first byte. */
316 int raw_regnum
= accg0123_regnum
+ (reg
- accg0_regnum
) / 4;
317 int byte_num
= (reg
- accg0_regnum
) % 4;
320 regcache_raw_read (regcache
, raw_regnum
, buf
);
321 memset (buffer
, 0, 4);
322 /* FR-V is big endian, so put the requested byte in the first byte
323 of the buffer allocated to hold the pseudo-register. */
324 ((bfd_byte
*) buffer
)[0] = buf
[byte_num
];
329 frv_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
330 int reg
, const gdb_byte
*buffer
)
332 if (reg
== iacc0_regnum
)
334 regcache_raw_write (regcache
, iacc0h_regnum
, buffer
);
335 regcache_raw_write (regcache
, iacc0l_regnum
, (bfd_byte
*) buffer
+ 4);
337 else if (accg0_regnum
<= reg
&& reg
<= accg7_regnum
)
339 /* The accg raw registers have four values in each slot with the
340 lowest register number occupying the first byte. */
342 int raw_regnum
= accg0123_regnum
+ (reg
- accg0_regnum
) / 4;
343 int byte_num
= (reg
- accg0_regnum
) % 4;
346 regcache_raw_read (regcache
, raw_regnum
, buf
);
347 buf
[byte_num
] = ((bfd_byte
*) buffer
)[0];
348 regcache_raw_write (regcache
, raw_regnum
, buf
);
353 frv_register_sim_regno (struct gdbarch
*gdbarch
, int reg
)
355 static const int spr_map
[] =
357 H_SPR_PSR
, /* psr_regnum */
358 H_SPR_CCR
, /* ccr_regnum */
359 H_SPR_CCCR
, /* cccr_regnum */
360 -1, /* fdpic_loadmap_exec_regnum */
361 -1, /* fdpic_loadmap_interp_regnum */
363 H_SPR_TBR
, /* tbr_regnum */
364 H_SPR_BRR
, /* brr_regnum */
365 H_SPR_DBAR0
, /* dbar0_regnum */
366 H_SPR_DBAR1
, /* dbar1_regnum */
367 H_SPR_DBAR2
, /* dbar2_regnum */
368 H_SPR_DBAR3
, /* dbar3_regnum */
369 H_SPR_SCR0
, /* scr0_regnum */
370 H_SPR_SCR1
, /* scr1_regnum */
371 H_SPR_SCR2
, /* scr2_regnum */
372 H_SPR_SCR3
, /* scr3_regnum */
373 H_SPR_LR
, /* lr_regnum */
374 H_SPR_LCR
, /* lcr_regnum */
375 H_SPR_IACC0H
, /* iacc0h_regnum */
376 H_SPR_IACC0L
, /* iacc0l_regnum */
377 H_SPR_FSR0
, /* fsr0_regnum */
378 /* FIXME: Add infrastructure for fetching/setting ACC and ACCG regs. */
379 -1, /* acc0_regnum */
380 -1, /* acc1_regnum */
381 -1, /* acc2_regnum */
382 -1, /* acc3_regnum */
383 -1, /* acc4_regnum */
384 -1, /* acc5_regnum */
385 -1, /* acc6_regnum */
386 -1, /* acc7_regnum */
387 -1, /* acc0123_regnum */
388 -1, /* acc4567_regnum */
389 H_SPR_MSR0
, /* msr0_regnum */
390 H_SPR_MSR1
, /* msr1_regnum */
391 H_SPR_GNER0
, /* gner0_regnum */
392 H_SPR_GNER1
, /* gner1_regnum */
393 H_SPR_FNER0
, /* fner0_regnum */
394 H_SPR_FNER1
, /* fner1_regnum */
397 gdb_assert (reg
>= 0 && reg
< gdbarch_num_regs (gdbarch
));
399 if (first_gpr_regnum
<= reg
&& reg
<= last_gpr_regnum
)
400 return reg
- first_gpr_regnum
+ SIM_FRV_GR0_REGNUM
;
401 else if (first_fpr_regnum
<= reg
&& reg
<= last_fpr_regnum
)
402 return reg
- first_fpr_regnum
+ SIM_FRV_FR0_REGNUM
;
403 else if (pc_regnum
== reg
)
404 return SIM_FRV_PC_REGNUM
;
405 else if (reg
>= first_spr_regnum
406 && reg
< first_spr_regnum
+ sizeof (spr_map
) / sizeof (spr_map
[0]))
408 int spr_reg_offset
= spr_map
[reg
- first_spr_regnum
];
410 if (spr_reg_offset
< 0)
411 return SIM_REGNO_DOES_NOT_EXIST
;
413 return SIM_FRV_SPR0_REGNUM
+ spr_reg_offset
;
416 internal_error (__FILE__
, __LINE__
, _("Bad register number %d"), reg
);
419 static const unsigned char *
420 frv_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pcptr
, int *lenp
)
422 static unsigned char breakpoint
[] = {0xc0, 0x70, 0x00, 0x01};
423 *lenp
= sizeof (breakpoint
);
427 /* Define the maximum number of instructions which may be packed into a
428 bundle (VLIW instruction). */
429 static const int max_instrs_per_bundle
= 8;
431 /* Define the size (in bytes) of an FR-V instruction. */
432 static const int frv_instr_size
= 4;
434 /* Adjust a breakpoint's address to account for the FR-V architecture's
435 constraint that a break instruction must not appear as any but the
436 first instruction in the bundle. */
438 frv_adjust_breakpoint_address (struct gdbarch
*gdbarch
, CORE_ADDR bpaddr
)
440 int count
= max_instrs_per_bundle
;
441 CORE_ADDR addr
= bpaddr
- frv_instr_size
;
442 CORE_ADDR func_start
= get_pc_function_start (bpaddr
);
444 /* Find the end of the previous packing sequence. This will be indicated
445 by either attempting to access some inaccessible memory or by finding
446 an instruction word whose packing bit is set to one. */
447 while (count
-- > 0 && addr
>= func_start
)
449 char instr
[frv_instr_size
];
452 status
= target_read_memory (addr
, instr
, sizeof instr
);
457 /* This is a big endian architecture, so byte zero will have most
458 significant byte. The most significant bit of this byte is the
463 addr
-= frv_instr_size
;
467 bpaddr
= addr
+ frv_instr_size
;
473 /* Return true if REG is a caller-saves ("scratch") register,
476 is_caller_saves_reg (int reg
)
478 return ((4 <= reg
&& reg
<= 7)
479 || (14 <= reg
&& reg
<= 15)
480 || (32 <= reg
&& reg
<= 47));
484 /* Return true if REG is a callee-saves register, false otherwise. */
486 is_callee_saves_reg (int reg
)
488 return ((16 <= reg
&& reg
<= 31)
489 || (48 <= reg
&& reg
<= 63));
493 /* Return true if REG is an argument register, false otherwise. */
495 is_argument_reg (int reg
)
497 return (8 <= reg
&& reg
<= 13);
500 /* Scan an FR-V prologue, starting at PC, until frame->PC.
501 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
502 We assume FRAME's saved_regs array has already been allocated and cleared.
503 Return the first PC value after the prologue.
505 Note that, for unoptimized code, we almost don't need this function
506 at all; all arguments and locals live on the stack, so we just need
507 the FP to find everything. The catch: structures passed by value
508 have their addresses living in registers; they're never spilled to
509 the stack. So if you ever want to be able to get to these
510 arguments in any frame but the top, you'll need to do this serious
511 prologue analysis. */
513 frv_analyze_prologue (CORE_ADDR pc
, struct frame_info
*this_frame
,
514 struct frv_unwind_cache
*info
)
516 /* When writing out instruction bitpatterns, we use the following
517 letters to label instruction fields:
518 P - The parallel bit. We don't use this.
519 J - The register number of GRj in the instruction description.
520 K - The register number of GRk in the instruction description.
521 I - The register number of GRi.
522 S - a signed imediate offset.
523 U - an unsigned immediate offset.
525 The dots below the numbers indicate where hex digit boundaries
526 fall, to make it easier to check the numbers. */
528 /* Non-zero iff we've seen the instruction that initializes the
529 frame pointer for this function's frame. */
532 /* If fp_set is non_zero, then this is the distance from
533 the stack pointer to frame pointer: fp = sp + fp_offset. */
536 /* Total size of frame prior to any alloca operations. */
539 /* Flag indicating if lr has been saved on the stack. */
540 int lr_saved_on_stack
= 0;
542 /* The number of the general-purpose register we saved the return
543 address ("link register") in, or -1 if we haven't moved it yet. */
544 int lr_save_reg
= -1;
546 /* Offset (from sp) at which lr has been saved on the stack. */
548 int lr_sp_offset
= 0;
550 /* If gr_saved[i] is non-zero, then we've noticed that general
551 register i has been saved at gr_sp_offset[i] from the stack
554 int gr_sp_offset
[64];
556 /* The address of the most recently scanned prologue instruction. */
557 CORE_ADDR last_prologue_pc
;
559 /* The address of the next instruction. */
562 /* The upper bound to of the pc values to scan. */
565 memset (gr_saved
, 0, sizeof (gr_saved
));
567 last_prologue_pc
= pc
;
569 /* Try to compute an upper limit (on how far to scan) based on the
571 lim_pc
= skip_prologue_using_sal (pc
);
572 /* If there's no line number info, lim_pc will be 0. In that case,
573 set the limit to be 100 instructions away from pc. Hopefully, this
574 will be far enough away to account for the entire prologue. Don't
575 worry about overshooting the end of the function. The scan loop
576 below contains some checks to avoid scanning unreasonably far. */
580 /* If we have a frame, we don't want to scan past the frame's pc. This
581 will catch those cases where the pc is in the prologue. */
584 CORE_ADDR frame_pc
= get_frame_pc (this_frame
);
585 if (frame_pc
< lim_pc
)
589 /* Scan the prologue. */
592 char buf
[frv_instr_size
];
595 if (target_read_memory (pc
, buf
, sizeof buf
) != 0)
597 op
= extract_signed_integer (buf
, sizeof buf
);
601 /* The tests in this chain of ifs should be in order of
602 decreasing selectivity, so that more particular patterns get
603 to fire before less particular patterns. */
605 /* Some sort of control transfer instruction: stop scanning prologue.
606 Integer Conditional Branch:
607 X XXXX XX 0000110 XX XXXXXXXXXXXXXXXX
608 Floating-point / media Conditional Branch:
609 X XXXX XX 0000111 XX XXXXXXXXXXXXXXXX
610 LCR Conditional Branch to LR
611 X XXXX XX 0001110 XX XX 001 X XXXXXXXXXX
612 Integer conditional Branches to LR
613 X XXXX XX 0001110 XX XX 010 X XXXXXXXXXX
614 X XXXX XX 0001110 XX XX 011 X XXXXXXXXXX
615 Floating-point/Media Branches to LR
616 X XXXX XX 0001110 XX XX 110 X XXXXXXXXXX
617 X XXXX XX 0001110 XX XX 111 X XXXXXXXXXX
619 X XXXXX X 0001100 XXXXXX XXXXXX XXXXXX
620 X XXXXX X 0001101 XXXXXX XXXXXX XXXXXX
622 X XXXXXX 0001111 XXXXXXXXXXXXXXXXXX
624 X XXXXX X 0000101 XXXXXX XXXXXX XXXXXX
625 Integer Conditional Trap
626 X XXXX XX 0000100 XXXXXX XXXX 00 XXXXXX
627 X XXXX XX 0011100 XXXXXX XXXXXXXXXXXX
628 Floating-point /media Conditional Trap
629 X XXXX XX 0000100 XXXXXX XXXX 01 XXXXXX
630 X XXXX XX 0011101 XXXXXX XXXXXXXXXXXX
632 X XXXX XX 0000100 XXXXXX XXXX 11 XXXXXX
634 X XXXX XX 0000100 XXXXXX XXXX 10 XXXXXX */
635 if ((op
& 0x01d80000) == 0x00180000 /* Conditional branches and Call */
636 || (op
& 0x01f80000) == 0x00300000 /* Jump and Link */
637 || (op
& 0x01f80000) == 0x00100000 /* Return from Trap, Trap */
638 || (op
& 0x01f80000) == 0x00700000) /* Trap immediate */
640 /* Stop scanning; not in prologue any longer. */
644 /* Loading something from memory into fp probably means that
645 we're in the epilogue. Stop scanning the prologue.
647 X 000010 0000010 XXXXXX 000100 XXXXXX
649 X 000010 0110010 XXXXXX XXXXXXXXXXXX */
650 else if ((op
& 0x7ffc0fc0) == 0x04080100
651 || (op
& 0x7ffc0000) == 0x04c80000)
656 /* Setting the FP from the SP:
658 P 000010 0100010 000001 000000000000 = 0x04881000
659 0 111111 1111111 111111 111111111111 = 0x7fffffff
661 We treat this as part of the prologue. */
662 else if ((op
& 0x7fffffff) == 0x04881000)
666 last_prologue_pc
= next_pc
;
669 /* Move the link register to the scratch register grJ, before saving:
671 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
672 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
674 We treat this as part of the prologue. */
675 else if ((op
& 0x7fffffc0) == 0x080d01c0)
677 int gr_j
= op
& 0x3f;
679 /* If we're moving it to a scratch register, that's fine. */
680 if (is_caller_saves_reg (gr_j
))
683 last_prologue_pc
= next_pc
;
687 /* To save multiple callee-saves registers on the stack, at
691 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
692 0 000000 1111111 111111 111111 111111 = 0x01ffffff
695 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
696 0 000000 1111111 111111 111111 111111 = 0x01ffffff
698 We treat this as part of the prologue, and record the register's
699 saved address in the frame structure. */
700 else if ((op
& 0x01ffffff) == 0x000c10c0
701 || (op
& 0x01ffffff) == 0x000c1100)
703 int gr_k
= ((op
>> 25) & 0x3f);
704 int ope
= ((op
>> 6) & 0x3f);
708 /* Is it an std or an stq? */
714 /* Is it really a callee-saves register? */
715 if (is_callee_saves_reg (gr_k
))
717 for (i
= 0; i
< count
; i
++)
719 gr_saved
[gr_k
+ i
] = 1;
720 gr_sp_offset
[gr_k
+ i
] = 4 * i
;
722 last_prologue_pc
= next_pc
;
726 /* Adjusting the stack pointer. (The stack pointer is GR1.)
728 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
729 0 111111 1111111 111111 000000000000 = 0x7ffff000
731 We treat this as part of the prologue. */
732 else if ((op
& 0x7ffff000) == 0x02401000)
736 /* Sign-extend the twelve-bit field.
737 (Isn't there a better way to do this?) */
738 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
741 last_prologue_pc
= pc
;
745 /* If the prologue is being adjusted again, we've
746 likely gone too far; i.e. we're probably in the
752 /* Setting the FP to a constant distance from the SP:
754 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
755 0 111111 1111111 111111 000000000000 = 0x7ffff000
757 We treat this as part of the prologue. */
758 else if ((op
& 0x7ffff000) == 0x04401000)
760 /* Sign-extend the twelve-bit field.
761 (Isn't there a better way to do this?) */
762 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
765 last_prologue_pc
= pc
;
768 /* To spill an argument register to a scratch register:
770 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
771 0 000000 1111111 000000 111111111111 = 0x01fc0fff
773 For the time being, we treat this as a prologue instruction,
774 assuming that GRi is an argument register. This one's kind
775 of suspicious, because it seems like it could be part of a
776 legitimate body instruction. But we only come here when the
777 source info wasn't helpful, so we have to do the best we can.
778 Hopefully once GCC and GDB agree on how to emit line number
779 info for prologues, then this code will never come into play. */
780 else if ((op
& 0x01fc0fff) == 0x00880000)
782 int gr_i
= ((op
>> 12) & 0x3f);
784 /* Make sure that the source is an arg register; if it is, we'll
785 treat it as a prologue instruction. */
786 if (is_argument_reg (gr_i
))
787 last_prologue_pc
= next_pc
;
790 /* To spill 16-bit values to the stack:
792 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
793 0 000000 1111111 111111 000000000000 = 0x01fff000
795 And for 8-bit values, we use STB instructions.
797 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
798 0 000000 1111111 111111 000000000000 = 0x01fff000
800 We check that GRk is really an argument register, and treat
801 all such as part of the prologue. */
802 else if ( (op
& 0x01fff000) == 0x01442000
803 || (op
& 0x01fff000) == 0x01402000)
805 int gr_k
= ((op
>> 25) & 0x3f);
807 /* Make sure that GRk is really an argument register; treat
808 it as a prologue instruction if so. */
809 if (is_argument_reg (gr_k
))
810 last_prologue_pc
= next_pc
;
813 /* To save multiple callee-saves register on the stack, at a
817 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
818 0 000000 1111111 111111 000000000000 = 0x01fff000
821 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
822 0 000000 1111111 111111 000000000000 = 0x01fff000
824 We treat this as part of the prologue, and record the register's
825 saved address in the frame structure. */
826 else if ((op
& 0x01fff000) == 0x014c1000
827 || (op
& 0x01fff000) == 0x01501000)
829 int gr_k
= ((op
>> 25) & 0x3f);
833 /* Is it a stdi or a stqi? */
834 if ((op
& 0x01fff000) == 0x014c1000)
839 /* Is it really a callee-saves register? */
840 if (is_callee_saves_reg (gr_k
))
842 /* Sign-extend the twelve-bit field.
843 (Isn't there a better way to do this?) */
844 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
846 for (i
= 0; i
< count
; i
++)
848 gr_saved
[gr_k
+ i
] = 1;
849 gr_sp_offset
[gr_k
+ i
] = s
+ (4 * i
);
851 last_prologue_pc
= next_pc
;
855 /* Storing any kind of integer register at any constant offset
856 from any other register.
859 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
860 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
863 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
864 0 000000 1111111 000000 000000000000 = 0x01fc0000
866 These could be almost anything, but a lot of prologue
867 instructions fall into this pattern, so let's decode the
868 instruction once, and then work at a higher level. */
869 else if (((op
& 0x01fc0fff) == 0x000c0080)
870 || ((op
& 0x01fc0000) == 0x01480000))
872 int gr_k
= ((op
>> 25) & 0x3f);
873 int gr_i
= ((op
>> 12) & 0x3f);
876 /* Are we storing with gr0 as an offset, or using an
878 if ((op
& 0x01fc0fff) == 0x000c0080)
881 offset
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
883 /* If the address isn't relative to the SP or FP, it's not a
884 prologue instruction. */
885 if (gr_i
!= sp_regnum
&& gr_i
!= fp_regnum
)
887 /* Do nothing; not a prologue instruction. */
890 /* Saving the old FP in the new frame (relative to the SP). */
891 else if (gr_k
== fp_regnum
&& gr_i
== sp_regnum
)
893 gr_saved
[fp_regnum
] = 1;
894 gr_sp_offset
[fp_regnum
] = offset
;
895 last_prologue_pc
= next_pc
;
898 /* Saving callee-saves register(s) on the stack, relative to
900 else if (gr_i
== sp_regnum
901 && is_callee_saves_reg (gr_k
))
904 if (gr_i
== sp_regnum
)
905 gr_sp_offset
[gr_k
] = offset
;
907 gr_sp_offset
[gr_k
] = offset
+ fp_offset
;
908 last_prologue_pc
= next_pc
;
911 /* Saving the scratch register holding the return address. */
912 else if (lr_save_reg
!= -1
913 && gr_k
== lr_save_reg
)
915 lr_saved_on_stack
= 1;
916 if (gr_i
== sp_regnum
)
917 lr_sp_offset
= offset
;
919 lr_sp_offset
= offset
+ fp_offset
;
920 last_prologue_pc
= next_pc
;
923 /* Spilling int-sized arguments to the stack. */
924 else if (is_argument_reg (gr_k
))
925 last_prologue_pc
= next_pc
;
930 if (this_frame
&& info
)
935 /* If we know the relationship between the stack and frame
936 pointers, record the addresses of the registers we noticed.
937 Note that we have to do this as a separate step at the end,
938 because instructions may save relative to the SP, but we need
939 their addresses relative to the FP. */
941 this_base
= get_frame_register_unsigned (this_frame
, fp_regnum
);
943 this_base
= get_frame_register_unsigned (this_frame
, sp_regnum
);
945 for (i
= 0; i
< 64; i
++)
947 info
->saved_regs
[i
].addr
= this_base
- fp_offset
+ gr_sp_offset
[i
];
949 info
->prev_sp
= this_base
- fp_offset
+ framesize
;
950 info
->base
= this_base
;
952 /* If LR was saved on the stack, record its location. */
953 if (lr_saved_on_stack
)
954 info
->saved_regs
[lr_regnum
].addr
= this_base
- fp_offset
+ lr_sp_offset
;
956 /* The call instruction moves the caller's PC in the callee's LR.
957 Since this is an unwind, do the reverse. Copy the location of LR
958 into PC (the address / regnum) so that a request for PC will be
959 converted into a request for the LR. */
960 info
->saved_regs
[pc_regnum
] = info
->saved_regs
[lr_regnum
];
962 /* Save the previous frame's computed SP value. */
963 trad_frame_set_value (info
->saved_regs
, sp_regnum
, info
->prev_sp
);
966 return last_prologue_pc
;
971 frv_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
973 CORE_ADDR func_addr
, func_end
, new_pc
;
977 /* If the line table has entry for a line *within* the function
978 (i.e., not in the prologue, and not past the end), then that's
980 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
982 struct symtab_and_line sal
;
984 sal
= find_pc_line (func_addr
, 0);
986 if (sal
.line
!= 0 && sal
.end
< func_end
)
992 /* The FR-V prologue is at least five instructions long (twenty bytes).
993 If we didn't find a real source location past that, then
994 do a full analysis of the prologue. */
995 if (new_pc
< pc
+ 20)
996 new_pc
= frv_analyze_prologue (pc
, 0, 0);
1002 static struct frv_unwind_cache
*
1003 frv_frame_unwind_cache (struct frame_info
*this_frame
,
1004 void **this_prologue_cache
)
1006 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1009 struct frv_unwind_cache
*info
;
1011 if ((*this_prologue_cache
))
1012 return (*this_prologue_cache
);
1014 info
= FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache
);
1015 (*this_prologue_cache
) = info
;
1016 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
1018 /* Prologue analysis does the rest... */
1019 frv_analyze_prologue (get_frame_func (this_frame
), this_frame
, info
);
1025 frv_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1028 int len
= TYPE_LENGTH (type
);
1033 regcache_cooked_read_unsigned (regcache
, 8, &gpr8_val
);
1034 store_unsigned_integer (valbuf
, len
, gpr8_val
);
1039 regcache_cooked_read_unsigned (regcache
, 8, ®val
);
1040 store_unsigned_integer (valbuf
, 4, regval
);
1041 regcache_cooked_read_unsigned (regcache
, 9, ®val
);
1042 store_unsigned_integer ((bfd_byte
*) valbuf
+ 4, 4, regval
);
1045 internal_error (__FILE__
, __LINE__
, _("Illegal return value length: %d"), len
);
1049 frv_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1051 /* Require dword alignment. */
1052 return align_down (sp
, 8);
1056 find_func_descr (struct gdbarch
*gdbarch
, CORE_ADDR entry_point
)
1060 CORE_ADDR start_addr
;
1062 /* If we can't find the function in the symbol table, then we assume
1063 that the function address is already in descriptor form. */
1064 if (!find_pc_partial_function (entry_point
, NULL
, &start_addr
, NULL
)
1065 || entry_point
!= start_addr
)
1068 descr
= frv_fdpic_find_canonical_descriptor (entry_point
);
1073 /* Construct a non-canonical descriptor from space allocated on
1076 descr
= value_as_long (value_allocate_space_in_inferior (8));
1077 store_unsigned_integer (valbuf
, 4, entry_point
);
1078 write_memory (descr
, valbuf
, 4);
1079 store_unsigned_integer (valbuf
, 4,
1080 frv_fdpic_find_global_pointer (entry_point
));
1081 write_memory (descr
+ 4, valbuf
, 4);
1086 frv_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
1087 struct target_ops
*targ
)
1089 CORE_ADDR entry_point
;
1090 CORE_ADDR got_address
;
1092 entry_point
= get_target_memory_unsigned (targ
, addr
, 4);
1093 got_address
= get_target_memory_unsigned (targ
, addr
+ 4, 4);
1095 if (got_address
== frv_fdpic_find_global_pointer (entry_point
))
1102 frv_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1103 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1104 int nargs
, struct value
**args
, CORE_ADDR sp
,
1105 int struct_return
, CORE_ADDR struct_addr
)
1112 struct type
*arg_type
;
1114 enum type_code typecode
;
1118 enum frv_abi abi
= frv_abi (gdbarch
);
1119 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
1122 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
1123 nargs
, (int) sp
, struct_return
, struct_addr
);
1127 for (argnum
= 0; argnum
< nargs
; ++argnum
)
1128 stack_space
+= align_up (TYPE_LENGTH (value_type (args
[argnum
])), 4);
1130 stack_space
-= (6 * 4);
1131 if (stack_space
> 0)
1134 /* Make sure stack is dword aligned. */
1135 sp
= align_down (sp
, 8);
1142 regcache_cooked_write_unsigned (regcache
, struct_return_regnum
,
1145 for (argnum
= 0; argnum
< nargs
; ++argnum
)
1148 arg_type
= check_typedef (value_type (arg
));
1149 len
= TYPE_LENGTH (arg_type
);
1150 typecode
= TYPE_CODE (arg_type
);
1152 if (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
)
1154 store_unsigned_integer (valbuf
, 4, VALUE_ADDRESS (arg
));
1155 typecode
= TYPE_CODE_PTR
;
1159 else if (abi
== FRV_ABI_FDPIC
1161 && typecode
== TYPE_CODE_PTR
1162 && TYPE_CODE (TYPE_TARGET_TYPE (arg_type
)) == TYPE_CODE_FUNC
)
1164 /* The FDPIC ABI requires function descriptors to be passed instead
1166 store_unsigned_integer
1168 find_func_descr (gdbarch
,
1169 extract_unsigned_integer (value_contents (arg
),
1171 typecode
= TYPE_CODE_PTR
;
1177 val
= (char *) value_contents (arg
);
1182 int partial_len
= (len
< 4 ? len
: 4);
1186 regval
= extract_unsigned_integer (val
, partial_len
);
1188 printf(" Argnum %d data %x -> reg %d\n",
1189 argnum
, (int) regval
, argreg
);
1191 regcache_cooked_write_unsigned (regcache
, argreg
, regval
);
1197 printf(" Argnum %d data %x -> offset %d (%x)\n",
1198 argnum
, *((int *)val
), stack_offset
, (int) (sp
+ stack_offset
));
1200 write_memory (sp
+ stack_offset
, val
, partial_len
);
1201 stack_offset
+= align_up (partial_len
, 4);
1208 /* Set the return address. For the frv, the return breakpoint is
1209 always at BP_ADDR. */
1210 regcache_cooked_write_unsigned (regcache
, lr_regnum
, bp_addr
);
1212 if (abi
== FRV_ABI_FDPIC
)
1214 /* Set the GOT register for the FDPIC ABI. */
1215 regcache_cooked_write_unsigned
1216 (regcache
, first_gpr_regnum
+ 15,
1217 frv_fdpic_find_global_pointer (func_addr
));
1220 /* Finally, update the SP register. */
1221 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
1227 frv_store_return_value (struct type
*type
, struct regcache
*regcache
,
1228 const gdb_byte
*valbuf
)
1230 int len
= TYPE_LENGTH (type
);
1235 memset (val
, 0, sizeof (val
));
1236 memcpy (val
+ (4 - len
), valbuf
, len
);
1237 regcache_cooked_write (regcache
, 8, val
);
1241 regcache_cooked_write (regcache
, 8, valbuf
);
1242 regcache_cooked_write (regcache
, 9, (bfd_byte
*) valbuf
+ 4);
1245 internal_error (__FILE__
, __LINE__
,
1246 _("Don't know how to return a %d-byte value."), len
);
1249 enum return_value_convention
1250 frv_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
1251 struct type
*valtype
, struct regcache
*regcache
,
1252 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
1254 int struct_return
= TYPE_CODE (valtype
) == TYPE_CODE_STRUCT
1255 || TYPE_CODE (valtype
) == TYPE_CODE_UNION
1256 || TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
;
1258 if (writebuf
!= NULL
)
1260 gdb_assert (!struct_return
);
1261 frv_store_return_value (valtype
, regcache
, writebuf
);
1264 if (readbuf
!= NULL
)
1266 gdb_assert (!struct_return
);
1267 frv_extract_return_value (valtype
, regcache
, readbuf
);
1271 return RETURN_VALUE_STRUCT_CONVENTION
;
1273 return RETURN_VALUE_REGISTER_CONVENTION
;
1277 /* Hardware watchpoint / breakpoint support for the FR500
1281 frv_check_watch_resources (struct gdbarch
*gdbarch
, int type
, int cnt
, int ot
)
1283 struct gdbarch_tdep
*var
= gdbarch_tdep (gdbarch
);
1285 /* Watchpoints not supported on simulator. */
1286 if (strcmp (target_shortname
, "sim") == 0)
1289 if (type
== bp_hardware_breakpoint
)
1291 if (var
->num_hw_breakpoints
== 0)
1293 else if (cnt
<= var
->num_hw_breakpoints
)
1298 if (var
->num_hw_watchpoints
== 0)
1302 else if (cnt
<= var
->num_hw_watchpoints
)
1310 frv_stopped_data_address (CORE_ADDR
*addr_p
)
1312 struct frame_info
*frame
= get_current_frame ();
1313 CORE_ADDR brr
, dbar0
, dbar1
, dbar2
, dbar3
;
1315 brr
= get_frame_register_unsigned (frame
, brr_regnum
);
1316 dbar0
= get_frame_register_unsigned (frame
, dbar0_regnum
);
1317 dbar1
= get_frame_register_unsigned (frame
, dbar1_regnum
);
1318 dbar2
= get_frame_register_unsigned (frame
, dbar2_regnum
);
1319 dbar3
= get_frame_register_unsigned (frame
, dbar3_regnum
);
1323 else if (brr
& (1<<10))
1325 else if (brr
& (1<<9))
1327 else if (brr
& (1<<8))
1336 frv_have_stopped_data_address (void)
1339 return frv_stopped_data_address (&addr
);
1343 frv_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1345 return frame_unwind_register_unsigned (next_frame
, pc_regnum
);
1348 /* Given a GDB frame, determine the address of the calling function's
1349 frame. This will be used to create a new GDB frame struct. */
1352 frv_frame_this_id (struct frame_info
*this_frame
,
1353 void **this_prologue_cache
, struct frame_id
*this_id
)
1355 struct frv_unwind_cache
*info
1356 = frv_frame_unwind_cache (this_frame
, this_prologue_cache
);
1359 struct minimal_symbol
*msym_stack
;
1362 /* The FUNC is easy. */
1363 func
= get_frame_func (this_frame
);
1365 /* Check if the stack is empty. */
1366 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
1367 if (msym_stack
&& info
->base
== SYMBOL_VALUE_ADDRESS (msym_stack
))
1370 /* Hopefully the prologue analysis either correctly determined the
1371 frame's base (which is the SP from the previous frame), or set
1372 that base to "NULL". */
1373 base
= info
->prev_sp
;
1377 id
= frame_id_build (base
, func
);
1381 static struct value
*
1382 frv_frame_prev_register (struct frame_info
*this_frame
,
1383 void **this_prologue_cache
, int regnum
)
1385 struct frv_unwind_cache
*info
1386 = frv_frame_unwind_cache (this_frame
, this_prologue_cache
);
1387 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
1390 static const struct frame_unwind frv_frame_unwind
= {
1393 frv_frame_prev_register
,
1395 default_frame_sniffer
1399 frv_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
1401 struct frv_unwind_cache
*info
1402 = frv_frame_unwind_cache (this_frame
, this_cache
);
1406 static const struct frame_base frv_frame_base
= {
1408 frv_frame_base_address
,
1409 frv_frame_base_address
,
1410 frv_frame_base_address
1414 frv_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1416 return frame_unwind_register_unsigned (next_frame
, sp_regnum
);
1420 /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
1421 frame. The frame ID's base needs to match the TOS value saved by
1422 save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
1424 static struct frame_id
1425 frv_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1427 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, sp_regnum
);
1428 return frame_id_build (sp
, get_frame_pc (this_frame
));
1431 static struct gdbarch
*
1432 frv_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1434 struct gdbarch
*gdbarch
;
1435 struct gdbarch_tdep
*var
;
1438 /* Check to see if we've already built an appropriate architecture
1439 object for this executable. */
1440 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1442 return arches
->gdbarch
;
1444 /* Select the right tdep structure for this variant. */
1445 var
= new_variant ();
1446 switch (info
.bfd_arch_info
->mach
)
1449 case bfd_mach_frvsimple
:
1450 case bfd_mach_fr500
:
1451 case bfd_mach_frvtomcat
:
1452 case bfd_mach_fr550
:
1453 set_variant_num_gprs (var
, 64);
1454 set_variant_num_fprs (var
, 64);
1457 case bfd_mach_fr400
:
1458 case bfd_mach_fr450
:
1459 set_variant_num_gprs (var
, 32);
1460 set_variant_num_fprs (var
, 32);
1464 /* Never heard of this variant. */
1468 /* Extract the ELF flags, if available. */
1469 if (info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
1470 elf_flags
= elf_elfheader (info
.abfd
)->e_flags
;
1472 if (elf_flags
& EF_FRV_FDPIC
)
1473 set_variant_abi_fdpic (var
);
1475 if (elf_flags
& EF_FRV_CPU_FR450
)
1476 set_variant_scratch_registers (var
);
1478 gdbarch
= gdbarch_alloc (&info
, var
);
1480 set_gdbarch_short_bit (gdbarch
, 16);
1481 set_gdbarch_int_bit (gdbarch
, 32);
1482 set_gdbarch_long_bit (gdbarch
, 32);
1483 set_gdbarch_long_long_bit (gdbarch
, 64);
1484 set_gdbarch_float_bit (gdbarch
, 32);
1485 set_gdbarch_double_bit (gdbarch
, 64);
1486 set_gdbarch_long_double_bit (gdbarch
, 64);
1487 set_gdbarch_ptr_bit (gdbarch
, 32);
1489 set_gdbarch_num_regs (gdbarch
, frv_num_regs
);
1490 set_gdbarch_num_pseudo_regs (gdbarch
, frv_num_pseudo_regs
);
1492 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
1493 set_gdbarch_deprecated_fp_regnum (gdbarch
, fp_regnum
);
1494 set_gdbarch_pc_regnum (gdbarch
, pc_regnum
);
1496 set_gdbarch_register_name (gdbarch
, frv_register_name
);
1497 set_gdbarch_register_type (gdbarch
, frv_register_type
);
1498 set_gdbarch_register_sim_regno (gdbarch
, frv_register_sim_regno
);
1500 set_gdbarch_pseudo_register_read (gdbarch
, frv_pseudo_register_read
);
1501 set_gdbarch_pseudo_register_write (gdbarch
, frv_pseudo_register_write
);
1503 set_gdbarch_skip_prologue (gdbarch
, frv_skip_prologue
);
1504 set_gdbarch_breakpoint_from_pc (gdbarch
, frv_breakpoint_from_pc
);
1505 set_gdbarch_adjust_breakpoint_address
1506 (gdbarch
, frv_adjust_breakpoint_address
);
1508 set_gdbarch_return_value (gdbarch
, frv_return_value
);
1511 set_gdbarch_unwind_pc (gdbarch
, frv_unwind_pc
);
1512 set_gdbarch_unwind_sp (gdbarch
, frv_unwind_sp
);
1513 set_gdbarch_frame_align (gdbarch
, frv_frame_align
);
1514 frame_base_set_default (gdbarch
, &frv_frame_base
);
1515 /* We set the sniffer lower down after the OSABI hooks have been
1518 /* Settings for calling functions in the inferior. */
1519 set_gdbarch_push_dummy_call (gdbarch
, frv_push_dummy_call
);
1520 set_gdbarch_dummy_id (gdbarch
, frv_dummy_id
);
1522 /* Settings that should be unnecessary. */
1523 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1525 /* Hardware watchpoint / breakpoint support. */
1526 switch (info
.bfd_arch_info
->mach
)
1529 case bfd_mach_frvsimple
:
1530 case bfd_mach_fr500
:
1531 case bfd_mach_frvtomcat
:
1532 /* fr500-style hardware debugging support. */
1533 var
->num_hw_watchpoints
= 4;
1534 var
->num_hw_breakpoints
= 4;
1537 case bfd_mach_fr400
:
1538 case bfd_mach_fr450
:
1539 /* fr400-style hardware debugging support. */
1540 var
->num_hw_watchpoints
= 2;
1541 var
->num_hw_breakpoints
= 4;
1545 /* Otherwise, assume we don't have hardware debugging support. */
1546 var
->num_hw_watchpoints
= 0;
1547 var
->num_hw_breakpoints
= 0;
1551 set_gdbarch_print_insn (gdbarch
, print_insn_frv
);
1552 if (frv_abi (gdbarch
) == FRV_ABI_FDPIC
)
1553 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
1554 frv_convert_from_func_ptr_addr
);
1556 set_solib_ops (gdbarch
, &frv_so_ops
);
1558 /* Hook in ABI-specific overrides, if they have been registered. */
1559 gdbarch_init_osabi (info
, gdbarch
);
1561 /* Set the fallback (prologue based) frame sniffer. */
1562 frame_unwind_append_unwinder (gdbarch
, &frv_frame_unwind
);
1564 /* Enable TLS support. */
1565 set_gdbarch_fetch_tls_load_module_address (gdbarch
,
1566 frv_fetch_objfile_link_map
);
1572 _initialize_frv_tdep (void)
1574 register_gdbarch_init (bfd_arch_frv
, frv_gdbarch_init
);